mach-imx27_visstrim_m10.c 13 KB

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  1. /*
  2. * mach-imx27_visstrim_m10.c
  3. *
  4. * Copyright 2010 Javier Martin <javier.martin@vista-silicon.com>
  5. *
  6. * Based on mach-pcm038.c, mach-pca100.c, mach-mx27ads.c and others.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  21. * MA 02110-1301, USA.
  22. */
  23. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  24. #include <linux/platform_device.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/i2c.h>
  27. #include <linux/i2c/pca953x.h>
  28. #include <linux/input.h>
  29. #include <linux/gpio.h>
  30. #include <linux/delay.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/leds.h>
  33. #include <media/soc_camera.h>
  34. #include <sound/tlv320aic32x4.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/time.h>
  38. #include <asm/system_info.h>
  39. #include <asm/memblock.h>
  40. #include <mach/common.h>
  41. #include <mach/hardware.h>
  42. #include <mach/iomux-mx27.h>
  43. #include "devices-imx27.h"
  44. #define TVP5150_RSTN (GPIO_PORTC + 18)
  45. #define TVP5150_PWDN (GPIO_PORTC + 19)
  46. #define OTG_PHY_CS_GPIO (GPIO_PORTF + 17)
  47. #define SDHC1_IRQ_GPIO IMX_GPIO_NR(2, 25)
  48. #define MOTHERBOARD_BIT2 (GPIO_PORTD + 31)
  49. #define MOTHERBOARD_BIT1 (GPIO_PORTD + 30)
  50. #define MOTHERBOARD_BIT0 (GPIO_PORTD + 29)
  51. #define EXPBOARD_BIT2 (GPIO_PORTD + 25)
  52. #define EXPBOARD_BIT1 (GPIO_PORTD + 27)
  53. #define EXPBOARD_BIT0 (GPIO_PORTD + 28)
  54. static const int visstrim_m10_pins[] __initconst = {
  55. /* UART1 (console) */
  56. PE12_PF_UART1_TXD,
  57. PE13_PF_UART1_RXD,
  58. PE14_PF_UART1_CTS,
  59. PE15_PF_UART1_RTS,
  60. /* FEC */
  61. PD0_AIN_FEC_TXD0,
  62. PD1_AIN_FEC_TXD1,
  63. PD2_AIN_FEC_TXD2,
  64. PD3_AIN_FEC_TXD3,
  65. PD4_AOUT_FEC_RX_ER,
  66. PD5_AOUT_FEC_RXD1,
  67. PD6_AOUT_FEC_RXD2,
  68. PD7_AOUT_FEC_RXD3,
  69. PD8_AF_FEC_MDIO,
  70. PD9_AIN_FEC_MDC,
  71. PD10_AOUT_FEC_CRS,
  72. PD11_AOUT_FEC_TX_CLK,
  73. PD12_AOUT_FEC_RXD0,
  74. PD13_AOUT_FEC_RX_DV,
  75. PD14_AOUT_FEC_RX_CLK,
  76. PD15_AOUT_FEC_COL,
  77. PD16_AIN_FEC_TX_ER,
  78. PF23_AIN_FEC_TX_EN,
  79. /* SSI1 */
  80. PC20_PF_SSI1_FS,
  81. PC21_PF_SSI1_RXD,
  82. PC22_PF_SSI1_TXD,
  83. PC23_PF_SSI1_CLK,
  84. /* SDHC1 */
  85. PE18_PF_SD1_D0,
  86. PE19_PF_SD1_D1,
  87. PE20_PF_SD1_D2,
  88. PE21_PF_SD1_D3,
  89. PE22_PF_SD1_CMD,
  90. PE23_PF_SD1_CLK,
  91. /* Both I2Cs */
  92. PD17_PF_I2C_DATA,
  93. PD18_PF_I2C_CLK,
  94. PC5_PF_I2C2_SDA,
  95. PC6_PF_I2C2_SCL,
  96. /* USB OTG */
  97. OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
  98. PC9_PF_USBOTG_DATA0,
  99. PC11_PF_USBOTG_DATA1,
  100. PC10_PF_USBOTG_DATA2,
  101. PC13_PF_USBOTG_DATA3,
  102. PC12_PF_USBOTG_DATA4,
  103. PC7_PF_USBOTG_DATA5,
  104. PC8_PF_USBOTG_DATA6,
  105. PE25_PF_USBOTG_DATA7,
  106. PE24_PF_USBOTG_CLK,
  107. PE2_PF_USBOTG_DIR,
  108. PE0_PF_USBOTG_NXT,
  109. PE1_PF_USBOTG_STP,
  110. PB23_PF_USB_PWR,
  111. PB24_PF_USB_OC,
  112. /* CSI */
  113. TVP5150_RSTN | GPIO_GPIO | GPIO_OUT,
  114. TVP5150_PWDN | GPIO_GPIO | GPIO_OUT,
  115. PB10_PF_CSI_D0,
  116. PB11_PF_CSI_D1,
  117. PB12_PF_CSI_D2,
  118. PB13_PF_CSI_D3,
  119. PB14_PF_CSI_D4,
  120. PB15_PF_CSI_MCLK,
  121. PB16_PF_CSI_PIXCLK,
  122. PB17_PF_CSI_D5,
  123. PB18_PF_CSI_D6,
  124. PB19_PF_CSI_D7,
  125. PB20_PF_CSI_VSYNC,
  126. PB21_PF_CSI_HSYNC,
  127. /* mother board version */
  128. MOTHERBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  129. MOTHERBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  130. MOTHERBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  131. /* expansion board version */
  132. EXPBOARD_BIT2 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  133. EXPBOARD_BIT1 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  134. EXPBOARD_BIT0 | GPIO_GPIO | GPIO_IN | GPIO_PUEN,
  135. };
  136. static struct gpio visstrim_m10_version_gpios[] = {
  137. { EXPBOARD_BIT0, GPIOF_IN, "exp-version-0" },
  138. { EXPBOARD_BIT1, GPIOF_IN, "exp-version-1" },
  139. { EXPBOARD_BIT2, GPIOF_IN, "exp-version-2" },
  140. { MOTHERBOARD_BIT0, GPIOF_IN, "mother-version-0" },
  141. { MOTHERBOARD_BIT1, GPIOF_IN, "mother-version-1" },
  142. { MOTHERBOARD_BIT2, GPIOF_IN, "mother-version-2" },
  143. };
  144. static const struct gpio visstrim_m10_gpios[] __initconst = {
  145. {
  146. .gpio = TVP5150_RSTN,
  147. .flags = GPIOF_DIR_OUT | GPIOF_INIT_HIGH,
  148. .label = "tvp5150_rstn",
  149. },
  150. {
  151. .gpio = TVP5150_PWDN,
  152. .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  153. .label = "tvp5150_pwdn",
  154. },
  155. {
  156. .gpio = OTG_PHY_CS_GPIO,
  157. .flags = GPIOF_DIR_OUT | GPIOF_INIT_LOW,
  158. .label = "usbotg_cs",
  159. },
  160. };
  161. /* Camera */
  162. static int visstrim_camera_power(struct device *dev, int on)
  163. {
  164. gpio_set_value(TVP5150_PWDN, on);
  165. return 0;
  166. };
  167. static int visstrim_camera_reset(struct device *dev)
  168. {
  169. gpio_set_value(TVP5150_RSTN, 0);
  170. ndelay(500);
  171. gpio_set_value(TVP5150_RSTN, 1);
  172. return 0;
  173. };
  174. static struct i2c_board_info visstrim_i2c_camera = {
  175. I2C_BOARD_INFO("tvp5150", 0x5d),
  176. };
  177. static struct soc_camera_link iclink_tvp5150 = {
  178. .bus_id = 0,
  179. .board_info = &visstrim_i2c_camera,
  180. .i2c_adapter_id = 0,
  181. .power = visstrim_camera_power,
  182. .reset = visstrim_camera_reset,
  183. };
  184. static struct mx2_camera_platform_data visstrim_camera = {
  185. .flags = MX2_CAMERA_CCIR | MX2_CAMERA_CCIR_INTERLACE |
  186. MX2_CAMERA_PCLK_SAMPLE_RISING,
  187. .clk = 100000,
  188. };
  189. static phys_addr_t mx2_camera_base __initdata;
  190. #define MX2_CAMERA_BUF_SIZE SZ_8M
  191. static void __init visstrim_camera_init(void)
  192. {
  193. struct platform_device *pdev;
  194. int dma;
  195. gpio_set_value(TVP5150_PWDN, 1);
  196. ndelay(1);
  197. gpio_set_value(TVP5150_RSTN, 0);
  198. ndelay(500);
  199. gpio_set_value(TVP5150_RSTN, 1);
  200. ndelay(200000);
  201. pdev = imx27_add_mx2_camera(&visstrim_camera);
  202. if (IS_ERR(pdev))
  203. return;
  204. dma = dma_declare_coherent_memory(&pdev->dev,
  205. mx2_camera_base, mx2_camera_base,
  206. MX2_CAMERA_BUF_SIZE,
  207. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  208. if (!(dma & DMA_MEMORY_MAP))
  209. return;
  210. }
  211. static void __init visstrim_reserve(void)
  212. {
  213. /* reserve 4 MiB for mx2-camera */
  214. mx2_camera_base = arm_memblock_steal(3 * MX2_CAMERA_BUF_SIZE,
  215. MX2_CAMERA_BUF_SIZE);
  216. }
  217. /* GPIOs used as events for applications */
  218. static struct gpio_keys_button visstrim_gpio_keys[] = {
  219. {
  220. .type = EV_KEY,
  221. .code = KEY_RESTART,
  222. .gpio = (GPIO_PORTC + 15),
  223. .desc = "Default config",
  224. .active_low = 0,
  225. .wakeup = 1,
  226. },
  227. {
  228. .type = EV_KEY,
  229. .code = KEY_RECORD,
  230. .gpio = (GPIO_PORTF + 14),
  231. .desc = "Record",
  232. .active_low = 0,
  233. .wakeup = 1,
  234. },
  235. {
  236. .type = EV_KEY,
  237. .code = KEY_STOP,
  238. .gpio = (GPIO_PORTF + 13),
  239. .desc = "Stop",
  240. .active_low = 0,
  241. .wakeup = 1,
  242. }
  243. };
  244. static const struct gpio_keys_platform_data
  245. visstrim_gpio_keys_platform_data __initconst = {
  246. .buttons = visstrim_gpio_keys,
  247. .nbuttons = ARRAY_SIZE(visstrim_gpio_keys),
  248. };
  249. /* led */
  250. static const struct gpio_led visstrim_m10_leds[] __initconst = {
  251. {
  252. .name = "visstrim:ld0",
  253. .default_trigger = "nand-disk",
  254. .gpio = (GPIO_PORTC + 29),
  255. },
  256. {
  257. .name = "visstrim:ld1",
  258. .default_trigger = "nand-disk",
  259. .gpio = (GPIO_PORTC + 24),
  260. },
  261. {
  262. .name = "visstrim:ld2",
  263. .default_trigger = "nand-disk",
  264. .gpio = (GPIO_PORTC + 28),
  265. },
  266. {
  267. .name = "visstrim:ld3",
  268. .default_trigger = "nand-disk",
  269. .gpio = (GPIO_PORTC + 25),
  270. },
  271. };
  272. static const struct gpio_led_platform_data visstrim_m10_led_data __initconst = {
  273. .leds = visstrim_m10_leds,
  274. .num_leds = ARRAY_SIZE(visstrim_m10_leds),
  275. };
  276. /* Visstrim_SM10 has a microSD slot connected to sdhc1 */
  277. static int visstrim_m10_sdhc1_init(struct device *dev,
  278. irq_handler_t detect_irq, void *data)
  279. {
  280. int ret;
  281. ret = request_irq(gpio_to_irq(SDHC1_IRQ_GPIO), detect_irq,
  282. IRQF_TRIGGER_FALLING, "mmc-detect", data);
  283. return ret;
  284. }
  285. static void visstrim_m10_sdhc1_exit(struct device *dev, void *data)
  286. {
  287. free_irq(gpio_to_irq(SDHC1_IRQ_GPIO), data);
  288. }
  289. static const struct imxmmc_platform_data visstrim_m10_sdhc_pdata __initconst = {
  290. .init = visstrim_m10_sdhc1_init,
  291. .exit = visstrim_m10_sdhc1_exit,
  292. };
  293. /* Visstrim_SM10 NOR flash */
  294. static struct physmap_flash_data visstrim_m10_flash_data = {
  295. .width = 2,
  296. };
  297. static struct resource visstrim_m10_flash_resource = {
  298. .start = 0xc0000000,
  299. .end = 0xc0000000 + SZ_64M - 1,
  300. .flags = IORESOURCE_MEM,
  301. };
  302. static struct platform_device visstrim_m10_nor_mtd_device = {
  303. .name = "physmap-flash",
  304. .id = 0,
  305. .dev = {
  306. .platform_data = &visstrim_m10_flash_data,
  307. },
  308. .num_resources = 1,
  309. .resource = &visstrim_m10_flash_resource,
  310. };
  311. static struct platform_device *platform_devices[] __initdata = {
  312. &visstrim_m10_nor_mtd_device,
  313. };
  314. /* Visstrim_M10 uses UART0 as console */
  315. static const struct imxuart_platform_data uart_pdata __initconst = {
  316. .flags = IMXUART_HAVE_RTSCTS,
  317. };
  318. /* I2C */
  319. static const struct imxi2c_platform_data visstrim_m10_i2c_data __initconst = {
  320. .bitrate = 100000,
  321. };
  322. static struct pca953x_platform_data visstrim_m10_pca9555_pdata = {
  323. .gpio_base = 240, /* After MX27 internal GPIOs */
  324. .invert = 0,
  325. };
  326. static struct aic32x4_pdata visstrim_m10_aic32x4_pdata = {
  327. .power_cfg = AIC32X4_PWR_MICBIAS_2075_LDOIN |
  328. AIC32X4_PWR_AVDD_DVDD_WEAK_DISABLE |
  329. AIC32X4_PWR_AIC32X4_LDO_ENABLE |
  330. AIC32X4_PWR_CMMODE_LDOIN_RANGE_18_36 |
  331. AIC32X4_PWR_CMMODE_HP_LDOIN_POWERED,
  332. .micpga_routing = AIC32X4_MICPGA_ROUTE_LMIC_IN2R_10K |
  333. AIC32X4_MICPGA_ROUTE_RMIC_IN1L_10K,
  334. .swapdacs = false,
  335. };
  336. static struct i2c_board_info visstrim_m10_i2c_devices[] = {
  337. {
  338. I2C_BOARD_INFO("pca9555", 0x20),
  339. .platform_data = &visstrim_m10_pca9555_pdata,
  340. },
  341. {
  342. I2C_BOARD_INFO("tlv320aic32x4", 0x18),
  343. .platform_data = &visstrim_m10_aic32x4_pdata,
  344. },
  345. {
  346. I2C_BOARD_INFO("m41t00", 0x68),
  347. }
  348. };
  349. /* USB OTG */
  350. static int otg_phy_init(struct platform_device *pdev)
  351. {
  352. return mx27_initialize_usb_hw(pdev->id, MXC_EHCI_POWER_PINS_ENABLED);
  353. }
  354. static const struct mxc_usbh_platform_data
  355. visstrim_m10_usbotg_pdata __initconst = {
  356. .init = otg_phy_init,
  357. .portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
  358. };
  359. /* SSI */
  360. static const struct imx_ssi_platform_data visstrim_m10_ssi_pdata __initconst = {
  361. .flags = IMX_SSI_DMA | IMX_SSI_SYN,
  362. };
  363. /* coda */
  364. static void __init visstrim_coda_init(void)
  365. {
  366. struct platform_device *pdev;
  367. int dma;
  368. pdev = imx27_add_coda();
  369. dma = dma_declare_coherent_memory(&pdev->dev,
  370. mx2_camera_base + MX2_CAMERA_BUF_SIZE,
  371. mx2_camera_base + MX2_CAMERA_BUF_SIZE,
  372. MX2_CAMERA_BUF_SIZE,
  373. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  374. if (!(dma & DMA_MEMORY_MAP))
  375. return;
  376. }
  377. /* DMA deinterlace */
  378. static struct platform_device visstrim_deinterlace = {
  379. .name = "m2m-deinterlace",
  380. .id = 0,
  381. };
  382. static void __init visstrim_deinterlace_init(void)
  383. {
  384. int ret = -ENOMEM;
  385. struct platform_device *pdev = &visstrim_deinterlace;
  386. int dma;
  387. ret = platform_device_register(pdev);
  388. dma = dma_declare_coherent_memory(&pdev->dev,
  389. mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
  390. mx2_camera_base + 2 * MX2_CAMERA_BUF_SIZE,
  391. MX2_CAMERA_BUF_SIZE,
  392. DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
  393. if (!(dma & DMA_MEMORY_MAP))
  394. return;
  395. }
  396. static void __init visstrim_m10_revision(void)
  397. {
  398. int exp_version = 0;
  399. int mo_version = 0;
  400. int ret;
  401. ret = gpio_request_array(visstrim_m10_version_gpios,
  402. ARRAY_SIZE(visstrim_m10_version_gpios));
  403. if (ret) {
  404. pr_err("Failed to request version gpios");
  405. return;
  406. }
  407. /* Get expansion board version (negative logic) */
  408. exp_version |= !gpio_get_value(EXPBOARD_BIT2) << 2;
  409. exp_version |= !gpio_get_value(EXPBOARD_BIT1) << 1;
  410. exp_version |= !gpio_get_value(EXPBOARD_BIT0);
  411. /* Get mother board version (negative logic) */
  412. mo_version |= !gpio_get_value(MOTHERBOARD_BIT2) << 2;
  413. mo_version |= !gpio_get_value(MOTHERBOARD_BIT1) << 1;
  414. mo_version |= !gpio_get_value(MOTHERBOARD_BIT0);
  415. system_rev = 0x27000;
  416. system_rev |= (mo_version << 4);
  417. system_rev |= exp_version;
  418. }
  419. static void __init visstrim_m10_board_init(void)
  420. {
  421. int ret;
  422. imx27_soc_init();
  423. visstrim_m10_revision();
  424. ret = mxc_gpio_setup_multiple_pins(visstrim_m10_pins,
  425. ARRAY_SIZE(visstrim_m10_pins), "VISSTRIM_M10");
  426. if (ret)
  427. pr_err("Failed to setup pins (%d)\n", ret);
  428. ret = gpio_request_array(visstrim_m10_gpios,
  429. ARRAY_SIZE(visstrim_m10_gpios));
  430. if (ret)
  431. pr_err("Failed to request gpios (%d)\n", ret);
  432. imx27_add_imx_ssi(0, &visstrim_m10_ssi_pdata);
  433. imx27_add_imx_uart0(&uart_pdata);
  434. imx27_add_imx_i2c(0, &visstrim_m10_i2c_data);
  435. imx27_add_imx_i2c(1, &visstrim_m10_i2c_data);
  436. i2c_register_board_info(0, visstrim_m10_i2c_devices,
  437. ARRAY_SIZE(visstrim_m10_i2c_devices));
  438. imx27_add_mxc_mmc(0, &visstrim_m10_sdhc_pdata);
  439. imx27_add_mxc_ehci_otg(&visstrim_m10_usbotg_pdata);
  440. imx27_add_fec(NULL);
  441. imx_add_gpio_keys(&visstrim_gpio_keys_platform_data);
  442. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  443. imx_add_platform_device("mx27vis", 0, NULL, 0, NULL, 0);
  444. platform_device_register_resndata(NULL, "soc-camera-pdrv", 0, NULL, 0,
  445. &iclink_tvp5150, sizeof(iclink_tvp5150));
  446. gpio_led_register_device(0, &visstrim_m10_led_data);
  447. visstrim_deinterlace_init();
  448. visstrim_camera_init();
  449. visstrim_coda_init();
  450. }
  451. static void __init visstrim_m10_timer_init(void)
  452. {
  453. mx27_clocks_init((unsigned long)25000000);
  454. }
  455. static struct sys_timer visstrim_m10_timer = {
  456. .init = visstrim_m10_timer_init,
  457. };
  458. MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10")
  459. .atag_offset = 0x100,
  460. .reserve = visstrim_reserve,
  461. .map_io = mx27_map_io,
  462. .init_early = imx27_init_early,
  463. .init_irq = mx27_init_irq,
  464. .handle_irq = imx27_handle_irq,
  465. .timer = &visstrim_m10_timer,
  466. .init_machine = visstrim_m10_board_init,
  467. .restart = mxc_restart,
  468. MACHINE_END