iwl4965-base.c 224 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-eeprom.h"
  45. #include "iwl-4965.h"
  46. #include "iwl-core.h"
  47. #include "iwl-io.h"
  48. #include "iwl-helpers.h"
  49. #include "iwl-sta.h"
  50. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  51. struct iwl4965_tx_queue *txq);
  52. /******************************************************************************
  53. *
  54. * module boiler plate
  55. *
  56. ******************************************************************************/
  57. /*
  58. * module name, copyright, version, etc.
  59. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  60. */
  61. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  62. #ifdef CONFIG_IWLWIFI_DEBUG
  63. #define VD "d"
  64. #else
  65. #define VD
  66. #endif
  67. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  68. #define VS "s"
  69. #else
  70. #define VS
  71. #endif
  72. #define DRV_VERSION IWLWIFI_VERSION VD VS
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT);
  76. MODULE_LICENSE("GPL");
  77. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  78. {
  79. u16 fc = le16_to_cpu(hdr->frame_control);
  80. int hdr_len = ieee80211_get_hdrlen(fc);
  81. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  82. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  83. return NULL;
  84. }
  85. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  86. struct iwl_priv *priv, enum ieee80211_band band)
  87. {
  88. return priv->hw->wiphy->bands[band];
  89. }
  90. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  91. {
  92. /* Single white space is for Linksys APs */
  93. if (essid_len == 1 && essid[0] == ' ')
  94. return 1;
  95. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  96. while (essid_len) {
  97. essid_len--;
  98. if (essid[essid_len] != '\0')
  99. return 0;
  100. }
  101. return 1;
  102. }
  103. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  104. {
  105. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  106. const char *s = essid;
  107. char *d = escaped;
  108. if (iwl4965_is_empty_essid(essid, essid_len)) {
  109. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  110. return escaped;
  111. }
  112. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  113. while (essid_len--) {
  114. if (*s == '\0') {
  115. *d++ = '\\';
  116. *d++ = '0';
  117. s++;
  118. } else
  119. *d++ = *s++;
  120. }
  121. *d = '\0';
  122. return escaped;
  123. }
  124. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  125. * DMA services
  126. *
  127. * Theory of operation
  128. *
  129. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  130. * of buffer descriptors, each of which points to one or more data buffers for
  131. * the device to read from or fill. Driver and device exchange status of each
  132. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  133. * entries in each circular buffer, to protect against confusing empty and full
  134. * queue states.
  135. *
  136. * The device reads or writes the data in the queues via the device's several
  137. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  138. *
  139. * For Tx queue, there are low mark and high mark limits. If, after queuing
  140. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  141. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  142. * Tx queue resumed.
  143. *
  144. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  145. * queue (#4) for sending commands to the device firmware, and 15 other
  146. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  147. *
  148. * See more detailed info in iwl-4965-hw.h.
  149. ***************************************************/
  150. int iwl4965_queue_space(const struct iwl4965_queue *q)
  151. {
  152. int s = q->read_ptr - q->write_ptr;
  153. if (q->read_ptr > q->write_ptr)
  154. s -= q->n_bd;
  155. if (s <= 0)
  156. s += q->n_window;
  157. /* keep some reserve to not confuse empty and full situations */
  158. s -= 2;
  159. if (s < 0)
  160. s = 0;
  161. return s;
  162. }
  163. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  164. {
  165. return q->write_ptr > q->read_ptr ?
  166. (i >= q->read_ptr && i < q->write_ptr) :
  167. !(i < q->read_ptr && i >= q->write_ptr);
  168. }
  169. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  170. {
  171. /* This is for scan command, the big buffer at end of command array */
  172. if (is_huge)
  173. return q->n_window; /* must be power of 2 */
  174. /* Otherwise, use normal size buffers */
  175. return index & (q->n_window - 1);
  176. }
  177. /**
  178. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  179. */
  180. static int iwl4965_queue_init(struct iwl_priv *priv, struct iwl4965_queue *q,
  181. int count, int slots_num, u32 id)
  182. {
  183. q->n_bd = count;
  184. q->n_window = slots_num;
  185. q->id = id;
  186. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  187. * and iwl_queue_dec_wrap are broken. */
  188. BUG_ON(!is_power_of_2(count));
  189. /* slots_num must be power-of-two size, otherwise
  190. * get_cmd_index is broken. */
  191. BUG_ON(!is_power_of_2(slots_num));
  192. q->low_mark = q->n_window / 4;
  193. if (q->low_mark < 4)
  194. q->low_mark = 4;
  195. q->high_mark = q->n_window / 8;
  196. if (q->high_mark < 2)
  197. q->high_mark = 2;
  198. q->write_ptr = q->read_ptr = 0;
  199. return 0;
  200. }
  201. /**
  202. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  203. */
  204. static int iwl4965_tx_queue_alloc(struct iwl_priv *priv,
  205. struct iwl4965_tx_queue *txq, u32 id)
  206. {
  207. struct pci_dev *dev = priv->pci_dev;
  208. /* Driver private data, only for Tx (not command) queues,
  209. * not shared with device. */
  210. if (id != IWL_CMD_QUEUE_NUM) {
  211. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  212. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  213. if (!txq->txb) {
  214. IWL_ERROR("kmalloc for auxiliary BD "
  215. "structures failed\n");
  216. goto error;
  217. }
  218. } else
  219. txq->txb = NULL;
  220. /* Circular buffer of transmit frame descriptors (TFDs),
  221. * shared with device */
  222. txq->bd = pci_alloc_consistent(dev,
  223. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  224. &txq->q.dma_addr);
  225. if (!txq->bd) {
  226. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  227. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  228. goto error;
  229. }
  230. txq->q.id = id;
  231. return 0;
  232. error:
  233. if (txq->txb) {
  234. kfree(txq->txb);
  235. txq->txb = NULL;
  236. }
  237. return -ENOMEM;
  238. }
  239. /**
  240. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  241. */
  242. int iwl4965_tx_queue_init(struct iwl_priv *priv,
  243. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  244. {
  245. struct pci_dev *dev = priv->pci_dev;
  246. int len;
  247. int rc = 0;
  248. /*
  249. * Alloc buffer array for commands (Tx or other types of commands).
  250. * For the command queue (#4), allocate command space + one big
  251. * command for scan, since scan command is very huge; the system will
  252. * not have two scans at the same time, so only one is needed.
  253. * For normal Tx queues (all other queues), no super-size command
  254. * space is needed.
  255. */
  256. len = sizeof(struct iwl_cmd) * slots_num;
  257. if (txq_id == IWL_CMD_QUEUE_NUM)
  258. len += IWL_MAX_SCAN_SIZE;
  259. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  260. if (!txq->cmd)
  261. return -ENOMEM;
  262. /* Alloc driver data array and TFD circular buffer */
  263. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  264. if (rc) {
  265. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  266. return -ENOMEM;
  267. }
  268. txq->need_update = 0;
  269. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  270. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  271. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  272. /* Initialize queue's high/low-water marks, and head/tail indexes */
  273. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  274. /* Tell device where to find queue */
  275. iwl4965_hw_tx_queue_init(priv, txq);
  276. return 0;
  277. }
  278. /**
  279. * iwl4965_tx_queue_free - Deallocate DMA queue.
  280. * @txq: Transmit queue to deallocate.
  281. *
  282. * Empty queue by removing and destroying all BD's.
  283. * Free all buffers.
  284. * 0-fill, but do not free "txq" descriptor structure.
  285. */
  286. void iwl4965_tx_queue_free(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  287. {
  288. struct iwl4965_queue *q = &txq->q;
  289. struct pci_dev *dev = priv->pci_dev;
  290. int len;
  291. if (q->n_bd == 0)
  292. return;
  293. /* first, empty all BD's */
  294. for (; q->write_ptr != q->read_ptr;
  295. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  296. iwl4965_hw_txq_free_tfd(priv, txq);
  297. len = sizeof(struct iwl_cmd) * q->n_window;
  298. if (q->id == IWL_CMD_QUEUE_NUM)
  299. len += IWL_MAX_SCAN_SIZE;
  300. /* De-alloc array of command/tx buffers */
  301. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  302. /* De-alloc circular buffer of TFDs */
  303. if (txq->q.n_bd)
  304. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  305. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  306. /* De-alloc array of per-TFD driver data */
  307. if (txq->txb) {
  308. kfree(txq->txb);
  309. txq->txb = NULL;
  310. }
  311. /* 0-fill queue descriptor structure */
  312. memset(txq, 0, sizeof(*txq));
  313. }
  314. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  315. /*************** STATION TABLE MANAGEMENT ****
  316. * mac80211 should be examined to determine if sta_info is duplicating
  317. * the functionality provided here
  318. */
  319. /**************************************************************/
  320. #if 0 /* temporary disable till we add real remove station */
  321. /**
  322. * iwl4965_remove_station - Remove driver's knowledge of station.
  323. *
  324. * NOTE: This does not remove station from device's station table.
  325. */
  326. static u8 iwl4965_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  327. {
  328. int index = IWL_INVALID_STATION;
  329. int i;
  330. unsigned long flags;
  331. spin_lock_irqsave(&priv->sta_lock, flags);
  332. if (is_ap)
  333. index = IWL_AP_ID;
  334. else if (is_broadcast_ether_addr(addr))
  335. index = priv->hw_setting.bcast_sta_id;
  336. else
  337. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  338. if (priv->stations[i].used &&
  339. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  340. addr)) {
  341. index = i;
  342. break;
  343. }
  344. if (unlikely(index == IWL_INVALID_STATION))
  345. goto out;
  346. if (priv->stations[index].used) {
  347. priv->stations[index].used = 0;
  348. priv->num_stations--;
  349. }
  350. BUG_ON(priv->num_stations < 0);
  351. out:
  352. spin_unlock_irqrestore(&priv->sta_lock, flags);
  353. return 0;
  354. }
  355. #endif
  356. /**
  357. * iwl4965_add_station_flags - Add station to tables in driver and device
  358. */
  359. u8 iwl4965_add_station_flags(struct iwl_priv *priv, const u8 *addr,
  360. int is_ap, u8 flags, void *ht_data)
  361. {
  362. int i;
  363. int index = IWL_INVALID_STATION;
  364. struct iwl4965_station_entry *station;
  365. unsigned long flags_spin;
  366. DECLARE_MAC_BUF(mac);
  367. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  368. if (is_ap)
  369. index = IWL_AP_ID;
  370. else if (is_broadcast_ether_addr(addr))
  371. index = priv->hw_setting.bcast_sta_id;
  372. else
  373. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  374. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  375. addr)) {
  376. index = i;
  377. break;
  378. }
  379. if (!priv->stations[i].used &&
  380. index == IWL_INVALID_STATION)
  381. index = i;
  382. }
  383. /* These two conditions have the same outcome, but keep them separate
  384. since they have different meanings */
  385. if (unlikely(index == IWL_INVALID_STATION)) {
  386. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  387. return index;
  388. }
  389. if (priv->stations[index].used &&
  390. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  391. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  392. return index;
  393. }
  394. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  395. station = &priv->stations[index];
  396. station->used = 1;
  397. priv->num_stations++;
  398. /* Set up the REPLY_ADD_STA command to send to device */
  399. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  400. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  401. station->sta.mode = 0;
  402. station->sta.sta.sta_id = index;
  403. station->sta.station_flags = 0;
  404. #ifdef CONFIG_IWL4965_HT
  405. /* BCAST station and IBSS stations do not work in HT mode */
  406. if (index != priv->hw_setting.bcast_sta_id &&
  407. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  408. iwl4965_set_ht_add_station(priv, index,
  409. (struct ieee80211_ht_info *) ht_data);
  410. #endif /*CONFIG_IWL4965_HT*/
  411. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  412. /* Add station to device's station table */
  413. iwl4965_send_add_station(priv, &station->sta, flags);
  414. return index;
  415. }
  416. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  417. /**
  418. * iwl4965_enqueue_hcmd - enqueue a uCode command
  419. * @priv: device private data point
  420. * @cmd: a point to the ucode command structure
  421. *
  422. * The function returns < 0 values to indicate the operation is
  423. * failed. On success, it turns the index (> 0) of command in the
  424. * command queue.
  425. */
  426. int iwl4965_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
  427. {
  428. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  429. struct iwl4965_queue *q = &txq->q;
  430. struct iwl4965_tfd_frame *tfd;
  431. u32 *control_flags;
  432. struct iwl_cmd *out_cmd;
  433. u32 idx;
  434. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  435. dma_addr_t phys_addr;
  436. int ret;
  437. unsigned long flags;
  438. /* If any of the command structures end up being larger than
  439. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  440. * we will need to increase the size of the TFD entries */
  441. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  442. !(cmd->meta.flags & CMD_SIZE_HUGE));
  443. if (iwl_is_rfkill(priv)) {
  444. IWL_DEBUG_INFO("Not sending command - RF KILL");
  445. return -EIO;
  446. }
  447. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  448. IWL_ERROR("No space for Tx\n");
  449. return -ENOSPC;
  450. }
  451. spin_lock_irqsave(&priv->hcmd_lock, flags);
  452. tfd = &txq->bd[q->write_ptr];
  453. memset(tfd, 0, sizeof(*tfd));
  454. control_flags = (u32 *) tfd;
  455. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  456. out_cmd = &txq->cmd[idx];
  457. out_cmd->hdr.cmd = cmd->id;
  458. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  459. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  460. /* At this point, the out_cmd now has all of the incoming cmd
  461. * information */
  462. out_cmd->hdr.flags = 0;
  463. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  464. INDEX_TO_SEQ(q->write_ptr));
  465. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  466. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  467. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  468. offsetof(struct iwl_cmd, hdr);
  469. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  470. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  471. "%d bytes at %d[%d]:%d\n",
  472. get_cmd_string(out_cmd->hdr.cmd),
  473. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  474. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  475. txq->need_update = 1;
  476. /* Set up entry in queue's byte count circular buffer */
  477. priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, 0);
  478. /* Increment and update queue's write index */
  479. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  480. ret = iwl4965_tx_queue_update_write_ptr(priv, txq);
  481. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  482. return ret ? ret : idx;
  483. }
  484. static void iwl4965_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  485. {
  486. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  487. if (hw_decrypt)
  488. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  489. else
  490. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  491. }
  492. int iwl4965_send_statistics_request(struct iwl_priv *priv)
  493. {
  494. u32 flags = 0;
  495. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  496. sizeof(flags), &flags);
  497. }
  498. /**
  499. * iwl4965_rxon_add_station - add station into station table.
  500. *
  501. * there is only one AP station with id= IWL_AP_ID
  502. * NOTE: mutex must be held before calling this fnction
  503. */
  504. static int iwl4965_rxon_add_station(struct iwl_priv *priv,
  505. const u8 *addr, int is_ap)
  506. {
  507. u8 sta_id;
  508. /* Add station to device's station table */
  509. #ifdef CONFIG_IWL4965_HT
  510. struct ieee80211_conf *conf = &priv->hw->conf;
  511. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  512. if ((is_ap) &&
  513. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  514. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  515. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  516. 0, cur_ht_config);
  517. else
  518. #endif /* CONFIG_IWL4965_HT */
  519. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  520. 0, NULL);
  521. /* Set up default rate scaling table in device's station table */
  522. iwl4965_add_station(priv, addr, is_ap);
  523. return sta_id;
  524. }
  525. /**
  526. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  527. *
  528. * NOTE: This is really only useful during development and can eventually
  529. * be #ifdef'd out once the driver is stable and folks aren't actively
  530. * making changes
  531. */
  532. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  533. {
  534. int error = 0;
  535. int counter = 1;
  536. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  537. error |= le32_to_cpu(rxon->flags &
  538. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  539. RXON_FLG_RADAR_DETECT_MSK));
  540. if (error)
  541. IWL_WARNING("check 24G fields %d | %d\n",
  542. counter++, error);
  543. } else {
  544. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  545. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  546. if (error)
  547. IWL_WARNING("check 52 fields %d | %d\n",
  548. counter++, error);
  549. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  550. if (error)
  551. IWL_WARNING("check 52 CCK %d | %d\n",
  552. counter++, error);
  553. }
  554. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  555. if (error)
  556. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  557. /* make sure basic rates 6Mbps and 1Mbps are supported */
  558. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  559. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  560. if (error)
  561. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  562. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  563. if (error)
  564. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  565. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  566. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  567. if (error)
  568. IWL_WARNING("check CCK and short slot %d | %d\n",
  569. counter++, error);
  570. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  571. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  572. if (error)
  573. IWL_WARNING("check CCK & auto detect %d | %d\n",
  574. counter++, error);
  575. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  576. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  577. if (error)
  578. IWL_WARNING("check TGG and auto detect %d | %d\n",
  579. counter++, error);
  580. if (error)
  581. IWL_WARNING("Tuning to channel %d\n",
  582. le16_to_cpu(rxon->channel));
  583. if (error) {
  584. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  585. return -1;
  586. }
  587. return 0;
  588. }
  589. /**
  590. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  591. * @priv: staging_rxon is compared to active_rxon
  592. *
  593. * If the RXON structure is changing enough to require a new tune,
  594. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  595. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  596. */
  597. static int iwl4965_full_rxon_required(struct iwl_priv *priv)
  598. {
  599. /* These items are only settable from the full RXON command */
  600. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  601. compare_ether_addr(priv->staging_rxon.bssid_addr,
  602. priv->active_rxon.bssid_addr) ||
  603. compare_ether_addr(priv->staging_rxon.node_addr,
  604. priv->active_rxon.node_addr) ||
  605. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  606. priv->active_rxon.wlap_bssid_addr) ||
  607. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  608. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  609. (priv->staging_rxon.air_propagation !=
  610. priv->active_rxon.air_propagation) ||
  611. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  612. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  613. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  614. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  615. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  616. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  617. return 1;
  618. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  619. * be updated with the RXON_ASSOC command -- however only some
  620. * flag transitions are allowed using RXON_ASSOC */
  621. /* Check if we are not switching bands */
  622. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  623. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  624. return 1;
  625. /* Check if we are switching association toggle */
  626. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  627. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  628. return 1;
  629. return 0;
  630. }
  631. static int iwl4965_send_rxon_assoc(struct iwl_priv *priv)
  632. {
  633. int ret = 0;
  634. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  635. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  636. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  637. if ((rxon1->flags == rxon2->flags) &&
  638. (rxon1->filter_flags == rxon2->filter_flags) &&
  639. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  640. (rxon1->ofdm_ht_single_stream_basic_rates ==
  641. rxon2->ofdm_ht_single_stream_basic_rates) &&
  642. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  643. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  644. (rxon1->rx_chain == rxon2->rx_chain) &&
  645. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  646. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  647. return 0;
  648. }
  649. rxon_assoc.flags = priv->staging_rxon.flags;
  650. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  651. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  652. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  653. rxon_assoc.reserved = 0;
  654. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  655. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  656. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  657. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  658. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  659. ret = iwl_send_cmd_pdu_async(priv, REPLY_RXON_ASSOC,
  660. sizeof(rxon_assoc), &rxon_assoc, NULL);
  661. if (ret)
  662. return ret;
  663. return ret;
  664. }
  665. /**
  666. * iwl4965_commit_rxon - commit staging_rxon to hardware
  667. *
  668. * The RXON command in staging_rxon is committed to the hardware and
  669. * the active_rxon structure is updated with the new data. This
  670. * function correctly transitions out of the RXON_ASSOC_MSK state if
  671. * a HW tune is required based on the RXON structure changes.
  672. */
  673. static int iwl4965_commit_rxon(struct iwl_priv *priv)
  674. {
  675. /* cast away the const for active_rxon in this function */
  676. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  677. DECLARE_MAC_BUF(mac);
  678. int rc = 0;
  679. if (!iwl_is_alive(priv))
  680. return -1;
  681. /* always get timestamp with Rx frame */
  682. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  683. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  684. if (rc) {
  685. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  686. return -EINVAL;
  687. }
  688. /* If we don't need to send a full RXON, we can use
  689. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  690. * and other flags for the current radio configuration. */
  691. if (!iwl4965_full_rxon_required(priv)) {
  692. rc = iwl4965_send_rxon_assoc(priv);
  693. if (rc) {
  694. IWL_ERROR("Error setting RXON_ASSOC "
  695. "configuration (%d).\n", rc);
  696. return rc;
  697. }
  698. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  699. return 0;
  700. }
  701. /* station table will be cleared */
  702. priv->assoc_station_added = 0;
  703. #ifdef CONFIG_IWL4965_SENSITIVITY
  704. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  705. if (!priv->error_recovering)
  706. priv->start_calib = 0;
  707. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  708. #endif /* CONFIG_IWL4965_SENSITIVITY */
  709. /* If we are currently associated and the new config requires
  710. * an RXON_ASSOC and the new config wants the associated mask enabled,
  711. * we must clear the associated from the active configuration
  712. * before we apply the new config */
  713. if (iwl_is_associated(priv) &&
  714. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  715. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  716. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  717. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  718. sizeof(struct iwl4965_rxon_cmd),
  719. &priv->active_rxon);
  720. /* If the mask clearing failed then we set
  721. * active_rxon back to what it was previously */
  722. if (rc) {
  723. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  724. IWL_ERROR("Error clearing ASSOC_MSK on current "
  725. "configuration (%d).\n", rc);
  726. return rc;
  727. }
  728. }
  729. IWL_DEBUG_INFO("Sending RXON\n"
  730. "* with%s RXON_FILTER_ASSOC_MSK\n"
  731. "* channel = %d\n"
  732. "* bssid = %s\n",
  733. ((priv->staging_rxon.filter_flags &
  734. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  735. le16_to_cpu(priv->staging_rxon.channel),
  736. print_mac(mac, priv->staging_rxon.bssid_addr));
  737. iwl4965_set_rxon_hwcrypto(priv, priv->cfg->mod_params->hw_crypto);
  738. /* Apply the new configuration */
  739. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  740. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  741. if (rc) {
  742. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  743. return rc;
  744. }
  745. iwlcore_clear_stations_table(priv);
  746. #ifdef CONFIG_IWL4965_SENSITIVITY
  747. if (!priv->error_recovering)
  748. priv->start_calib = 0;
  749. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  750. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  751. #endif /* CONFIG_IWL4965_SENSITIVITY */
  752. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  753. /* If we issue a new RXON command which required a tune then we must
  754. * send a new TXPOWER command or we won't be able to Tx any frames */
  755. rc = iwl4965_hw_reg_send_txpower(priv);
  756. if (rc) {
  757. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  758. return rc;
  759. }
  760. /* Add the broadcast address so we can send broadcast frames */
  761. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  762. IWL_INVALID_STATION) {
  763. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  764. return -EIO;
  765. }
  766. /* If we have set the ASSOC_MSK and we are in BSS mode then
  767. * add the IWL_AP_ID to the station rate table */
  768. if (iwl_is_associated(priv) &&
  769. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  770. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  771. == IWL_INVALID_STATION) {
  772. IWL_ERROR("Error adding AP address for transmit.\n");
  773. return -EIO;
  774. }
  775. priv->assoc_station_added = 1;
  776. if (priv->default_wep_key &&
  777. iwl_send_static_wepkey_cmd(priv, 0))
  778. IWL_ERROR("Could not send WEP static key.\n");
  779. }
  780. return 0;
  781. }
  782. static int iwl4965_send_bt_config(struct iwl_priv *priv)
  783. {
  784. struct iwl4965_bt_cmd bt_cmd = {
  785. .flags = 3,
  786. .lead_time = 0xAA,
  787. .max_kill = 1,
  788. .kill_ack_mask = 0,
  789. .kill_cts_mask = 0,
  790. };
  791. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  792. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  793. }
  794. static int iwl4965_send_scan_abort(struct iwl_priv *priv)
  795. {
  796. int rc = 0;
  797. struct iwl4965_rx_packet *res;
  798. struct iwl_host_cmd cmd = {
  799. .id = REPLY_SCAN_ABORT_CMD,
  800. .meta.flags = CMD_WANT_SKB,
  801. };
  802. /* If there isn't a scan actively going on in the hardware
  803. * then we are in between scan bands and not actually
  804. * actively scanning, so don't send the abort command */
  805. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  806. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  807. return 0;
  808. }
  809. rc = iwl_send_cmd_sync(priv, &cmd);
  810. if (rc) {
  811. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  812. return rc;
  813. }
  814. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  815. if (res->u.status != CAN_ABORT_STATUS) {
  816. /* The scan abort will return 1 for success or
  817. * 2 for "failure". A failure condition can be
  818. * due to simply not being in an active scan which
  819. * can occur if we send the scan abort before we
  820. * the microcode has notified us that a scan is
  821. * completed. */
  822. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  823. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  824. clear_bit(STATUS_SCAN_HW, &priv->status);
  825. }
  826. dev_kfree_skb_any(cmd.meta.u.skb);
  827. return rc;
  828. }
  829. static int iwl4965_card_state_sync_callback(struct iwl_priv *priv,
  830. struct iwl_cmd *cmd,
  831. struct sk_buff *skb)
  832. {
  833. return 1;
  834. }
  835. /*
  836. * CARD_STATE_CMD
  837. *
  838. * Use: Sets the device's internal card state to enable, disable, or halt
  839. *
  840. * When in the 'enable' state the card operates as normal.
  841. * When in the 'disable' state, the card enters into a low power mode.
  842. * When in the 'halt' state, the card is shut down and must be fully
  843. * restarted to come back on.
  844. */
  845. static int iwl4965_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
  846. {
  847. struct iwl_host_cmd cmd = {
  848. .id = REPLY_CARD_STATE_CMD,
  849. .len = sizeof(u32),
  850. .data = &flags,
  851. .meta.flags = meta_flag,
  852. };
  853. if (meta_flag & CMD_ASYNC)
  854. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  855. return iwl_send_cmd(priv, &cmd);
  856. }
  857. static int iwl4965_add_sta_sync_callback(struct iwl_priv *priv,
  858. struct iwl_cmd *cmd, struct sk_buff *skb)
  859. {
  860. struct iwl4965_rx_packet *res = NULL;
  861. if (!skb) {
  862. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  863. return 1;
  864. }
  865. res = (struct iwl4965_rx_packet *)skb->data;
  866. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  867. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  868. res->hdr.flags);
  869. return 1;
  870. }
  871. switch (res->u.add_sta.status) {
  872. case ADD_STA_SUCCESS_MSK:
  873. break;
  874. default:
  875. break;
  876. }
  877. /* We didn't cache the SKB; let the caller free it */
  878. return 1;
  879. }
  880. int iwl4965_send_add_station(struct iwl_priv *priv,
  881. struct iwl4965_addsta_cmd *sta, u8 flags)
  882. {
  883. struct iwl4965_rx_packet *res = NULL;
  884. int rc = 0;
  885. struct iwl_host_cmd cmd = {
  886. .id = REPLY_ADD_STA,
  887. .len = sizeof(struct iwl4965_addsta_cmd),
  888. .meta.flags = flags,
  889. .data = sta,
  890. };
  891. if (flags & CMD_ASYNC)
  892. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  893. else
  894. cmd.meta.flags |= CMD_WANT_SKB;
  895. rc = iwl_send_cmd(priv, &cmd);
  896. if (rc || (flags & CMD_ASYNC))
  897. return rc;
  898. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  899. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  900. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  901. res->hdr.flags);
  902. rc = -EIO;
  903. }
  904. if (rc == 0) {
  905. switch (res->u.add_sta.status) {
  906. case ADD_STA_SUCCESS_MSK:
  907. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  908. break;
  909. default:
  910. rc = -EIO;
  911. IWL_WARNING("REPLY_ADD_STA failed\n");
  912. break;
  913. }
  914. }
  915. priv->alloc_rxb_skb--;
  916. dev_kfree_skb_any(cmd.meta.u.skb);
  917. return rc;
  918. }
  919. static void iwl4965_clear_free_frames(struct iwl_priv *priv)
  920. {
  921. struct list_head *element;
  922. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  923. priv->frames_count);
  924. while (!list_empty(&priv->free_frames)) {
  925. element = priv->free_frames.next;
  926. list_del(element);
  927. kfree(list_entry(element, struct iwl4965_frame, list));
  928. priv->frames_count--;
  929. }
  930. if (priv->frames_count) {
  931. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  932. priv->frames_count);
  933. priv->frames_count = 0;
  934. }
  935. }
  936. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl_priv *priv)
  937. {
  938. struct iwl4965_frame *frame;
  939. struct list_head *element;
  940. if (list_empty(&priv->free_frames)) {
  941. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  942. if (!frame) {
  943. IWL_ERROR("Could not allocate frame!\n");
  944. return NULL;
  945. }
  946. priv->frames_count++;
  947. return frame;
  948. }
  949. element = priv->free_frames.next;
  950. list_del(element);
  951. return list_entry(element, struct iwl4965_frame, list);
  952. }
  953. static void iwl4965_free_frame(struct iwl_priv *priv, struct iwl4965_frame *frame)
  954. {
  955. memset(frame, 0, sizeof(*frame));
  956. list_add(&frame->list, &priv->free_frames);
  957. }
  958. unsigned int iwl4965_fill_beacon_frame(struct iwl_priv *priv,
  959. struct ieee80211_hdr *hdr,
  960. const u8 *dest, int left)
  961. {
  962. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  963. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  964. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  965. return 0;
  966. if (priv->ibss_beacon->len > left)
  967. return 0;
  968. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  969. return priv->ibss_beacon->len;
  970. }
  971. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  972. {
  973. u8 i;
  974. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  975. i = iwl4965_rates[i].next_ieee) {
  976. if (rate_mask & (1 << i))
  977. return iwl4965_rates[i].plcp;
  978. }
  979. return IWL_RATE_INVALID;
  980. }
  981. static int iwl4965_send_beacon_cmd(struct iwl_priv *priv)
  982. {
  983. struct iwl4965_frame *frame;
  984. unsigned int frame_size;
  985. int rc;
  986. u8 rate;
  987. frame = iwl4965_get_free_frame(priv);
  988. if (!frame) {
  989. IWL_ERROR("Could not obtain free frame buffer for beacon "
  990. "command.\n");
  991. return -ENOMEM;
  992. }
  993. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  994. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  995. 0xFF0);
  996. if (rate == IWL_INVALID_RATE)
  997. rate = IWL_RATE_6M_PLCP;
  998. } else {
  999. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1000. if (rate == IWL_INVALID_RATE)
  1001. rate = IWL_RATE_1M_PLCP;
  1002. }
  1003. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1004. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1005. &frame->u.cmd[0]);
  1006. iwl4965_free_frame(priv, frame);
  1007. return rc;
  1008. }
  1009. /******************************************************************************
  1010. *
  1011. * Misc. internal state and helper functions
  1012. *
  1013. ******************************************************************************/
  1014. static void iwl4965_unset_hw_setting(struct iwl_priv *priv)
  1015. {
  1016. if (priv->shared_virt)
  1017. pci_free_consistent(priv->pci_dev,
  1018. sizeof(struct iwl4965_shared),
  1019. priv->shared_virt,
  1020. priv->shared_phys);
  1021. }
  1022. /**
  1023. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1024. *
  1025. * return : set the bit for each supported rate insert in ie
  1026. */
  1027. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1028. u16 basic_rate, int *left)
  1029. {
  1030. u16 ret_rates = 0, bit;
  1031. int i;
  1032. u8 *cnt = ie;
  1033. u8 *rates = ie + 1;
  1034. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1035. if (bit & supported_rate) {
  1036. ret_rates |= bit;
  1037. rates[*cnt] = iwl4965_rates[i].ieee |
  1038. ((bit & basic_rate) ? 0x80 : 0x00);
  1039. (*cnt)++;
  1040. (*left)--;
  1041. if ((*left <= 0) ||
  1042. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1043. break;
  1044. }
  1045. }
  1046. return ret_rates;
  1047. }
  1048. /**
  1049. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1050. */
  1051. static u16 iwl4965_fill_probe_req(struct iwl_priv *priv,
  1052. enum ieee80211_band band,
  1053. struct ieee80211_mgmt *frame,
  1054. int left, int is_direct)
  1055. {
  1056. int len = 0;
  1057. u8 *pos = NULL;
  1058. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1059. #ifdef CONFIG_IWL4965_HT
  1060. const struct ieee80211_supported_band *sband =
  1061. iwl4965_get_hw_mode(priv, band);
  1062. #endif /* CONFIG_IWL4965_HT */
  1063. /* Make sure there is enough space for the probe request,
  1064. * two mandatory IEs and the data */
  1065. left -= 24;
  1066. if (left < 0)
  1067. return 0;
  1068. len += 24;
  1069. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1070. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1071. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1072. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1073. frame->seq_ctrl = 0;
  1074. /* fill in our indirect SSID IE */
  1075. /* ...next IE... */
  1076. left -= 2;
  1077. if (left < 0)
  1078. return 0;
  1079. len += 2;
  1080. pos = &(frame->u.probe_req.variable[0]);
  1081. *pos++ = WLAN_EID_SSID;
  1082. *pos++ = 0;
  1083. /* fill in our direct SSID IE... */
  1084. if (is_direct) {
  1085. /* ...next IE... */
  1086. left -= 2 + priv->essid_len;
  1087. if (left < 0)
  1088. return 0;
  1089. /* ... fill it in... */
  1090. *pos++ = WLAN_EID_SSID;
  1091. *pos++ = priv->essid_len;
  1092. memcpy(pos, priv->essid, priv->essid_len);
  1093. pos += priv->essid_len;
  1094. len += 2 + priv->essid_len;
  1095. }
  1096. /* fill in supported rate */
  1097. /* ...next IE... */
  1098. left -= 2;
  1099. if (left < 0)
  1100. return 0;
  1101. /* ... fill it in... */
  1102. *pos++ = WLAN_EID_SUPP_RATES;
  1103. *pos = 0;
  1104. /* exclude 60M rate */
  1105. active_rates = priv->rates_mask;
  1106. active_rates &= ~IWL_RATE_60M_MASK;
  1107. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1108. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1109. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1110. active_rate_basic, &left);
  1111. active_rates &= ~ret_rates;
  1112. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1113. active_rate_basic, &left);
  1114. active_rates &= ~ret_rates;
  1115. len += 2 + *pos;
  1116. pos += (*pos) + 1;
  1117. if (active_rates == 0)
  1118. goto fill_end;
  1119. /* fill in supported extended rate */
  1120. /* ...next IE... */
  1121. left -= 2;
  1122. if (left < 0)
  1123. return 0;
  1124. /* ... fill it in... */
  1125. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1126. *pos = 0;
  1127. iwl4965_supported_rate_to_ie(pos, active_rates,
  1128. active_rate_basic, &left);
  1129. if (*pos > 0)
  1130. len += 2 + *pos;
  1131. #ifdef CONFIG_IWL4965_HT
  1132. if (sband && sband->ht_info.ht_supported) {
  1133. struct ieee80211_ht_cap *ht_cap;
  1134. pos += (*pos) + 1;
  1135. *pos++ = WLAN_EID_HT_CAPABILITY;
  1136. *pos++ = sizeof(struct ieee80211_ht_cap);
  1137. ht_cap = (struct ieee80211_ht_cap *)pos;
  1138. ht_cap->cap_info = cpu_to_le16(sband->ht_info.cap);
  1139. memcpy(ht_cap->supp_mcs_set, sband->ht_info.supp_mcs_set, 16);
  1140. ht_cap->ampdu_params_info =(sband->ht_info.ampdu_factor &
  1141. IEEE80211_HT_CAP_AMPDU_FACTOR) |
  1142. ((sband->ht_info.ampdu_density << 2) &
  1143. IEEE80211_HT_CAP_AMPDU_DENSITY);
  1144. len += 2 + sizeof(struct ieee80211_ht_cap);
  1145. }
  1146. #endif /*CONFIG_IWL4965_HT */
  1147. fill_end:
  1148. return (u16)len;
  1149. }
  1150. /*
  1151. * QoS support
  1152. */
  1153. static int iwl4965_send_qos_params_command(struct iwl_priv *priv,
  1154. struct iwl4965_qosparam_cmd *qos)
  1155. {
  1156. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1157. sizeof(struct iwl4965_qosparam_cmd), qos);
  1158. }
  1159. static void iwl4965_activate_qos(struct iwl_priv *priv, u8 force)
  1160. {
  1161. unsigned long flags;
  1162. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1163. return;
  1164. if (!priv->qos_data.qos_enable)
  1165. return;
  1166. spin_lock_irqsave(&priv->lock, flags);
  1167. priv->qos_data.def_qos_parm.qos_flags = 0;
  1168. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1169. !priv->qos_data.qos_cap.q_AP.txop_request)
  1170. priv->qos_data.def_qos_parm.qos_flags |=
  1171. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1172. if (priv->qos_data.qos_active)
  1173. priv->qos_data.def_qos_parm.qos_flags |=
  1174. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1175. #ifdef CONFIG_IWL4965_HT
  1176. if (priv->current_ht_config.is_ht)
  1177. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1178. #endif /* CONFIG_IWL4965_HT */
  1179. spin_unlock_irqrestore(&priv->lock, flags);
  1180. if (force || iwl_is_associated(priv)) {
  1181. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1182. priv->qos_data.qos_active,
  1183. priv->qos_data.def_qos_parm.qos_flags);
  1184. iwl4965_send_qos_params_command(priv,
  1185. &(priv->qos_data.def_qos_parm));
  1186. }
  1187. }
  1188. /*
  1189. * Power management (not Tx power!) functions
  1190. */
  1191. #define MSEC_TO_USEC 1024
  1192. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1193. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1194. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1195. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1196. __constant_cpu_to_le32(X1), \
  1197. __constant_cpu_to_le32(X2), \
  1198. __constant_cpu_to_le32(X3), \
  1199. __constant_cpu_to_le32(X4)}
  1200. /* default power management (not Tx power) table values */
  1201. /* for tim 0-10 */
  1202. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1203. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1204. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1205. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1206. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1207. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1208. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1209. };
  1210. /* for tim > 10 */
  1211. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1212. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1213. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1214. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1215. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1216. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1217. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1218. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1219. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1220. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1221. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1222. };
  1223. int iwl4965_power_init_handle(struct iwl_priv *priv)
  1224. {
  1225. int rc = 0, i;
  1226. struct iwl4965_power_mgr *pow_data;
  1227. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1228. u16 pci_pm;
  1229. IWL_DEBUG_POWER("Initialize power \n");
  1230. pow_data = &(priv->power_data);
  1231. memset(pow_data, 0, sizeof(*pow_data));
  1232. pow_data->active_index = IWL_POWER_RANGE_0;
  1233. pow_data->dtim_val = 0xffff;
  1234. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1235. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1236. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1237. if (rc != 0)
  1238. return 0;
  1239. else {
  1240. struct iwl4965_powertable_cmd *cmd;
  1241. IWL_DEBUG_POWER("adjust power command flags\n");
  1242. for (i = 0; i < IWL_POWER_AC; i++) {
  1243. cmd = &pow_data->pwr_range_0[i].cmd;
  1244. if (pci_pm & 0x1)
  1245. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1246. else
  1247. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1248. }
  1249. }
  1250. return rc;
  1251. }
  1252. static int iwl4965_update_power_cmd(struct iwl_priv *priv,
  1253. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1254. {
  1255. int rc = 0, i;
  1256. u8 skip;
  1257. u32 max_sleep = 0;
  1258. struct iwl4965_power_vec_entry *range;
  1259. u8 period = 0;
  1260. struct iwl4965_power_mgr *pow_data;
  1261. if (mode > IWL_POWER_INDEX_5) {
  1262. IWL_DEBUG_POWER("Error invalid power mode \n");
  1263. return -1;
  1264. }
  1265. pow_data = &(priv->power_data);
  1266. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1267. range = &pow_data->pwr_range_0[0];
  1268. else
  1269. range = &pow_data->pwr_range_1[1];
  1270. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1271. #ifdef IWL_MAC80211_DISABLE
  1272. if (priv->assoc_network != NULL) {
  1273. unsigned long flags;
  1274. period = priv->assoc_network->tim.tim_period;
  1275. }
  1276. #endif /*IWL_MAC80211_DISABLE */
  1277. skip = range[mode].no_dtim;
  1278. if (period == 0) {
  1279. period = 1;
  1280. skip = 0;
  1281. }
  1282. if (skip == 0) {
  1283. max_sleep = period;
  1284. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1285. } else {
  1286. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1287. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1288. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1289. }
  1290. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1291. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1292. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1293. }
  1294. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1295. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1296. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1297. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1298. le32_to_cpu(cmd->sleep_interval[0]),
  1299. le32_to_cpu(cmd->sleep_interval[1]),
  1300. le32_to_cpu(cmd->sleep_interval[2]),
  1301. le32_to_cpu(cmd->sleep_interval[3]),
  1302. le32_to_cpu(cmd->sleep_interval[4]));
  1303. return rc;
  1304. }
  1305. static int iwl4965_send_power_mode(struct iwl_priv *priv, u32 mode)
  1306. {
  1307. u32 uninitialized_var(final_mode);
  1308. int rc;
  1309. struct iwl4965_powertable_cmd cmd;
  1310. /* If on battery, set to 3,
  1311. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1312. * else user level */
  1313. switch (mode) {
  1314. case IWL_POWER_BATTERY:
  1315. final_mode = IWL_POWER_INDEX_3;
  1316. break;
  1317. case IWL_POWER_AC:
  1318. final_mode = IWL_POWER_MODE_CAM;
  1319. break;
  1320. default:
  1321. final_mode = mode;
  1322. break;
  1323. }
  1324. cmd.keep_alive_beacons = 0;
  1325. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1326. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1327. if (final_mode == IWL_POWER_MODE_CAM)
  1328. clear_bit(STATUS_POWER_PMI, &priv->status);
  1329. else
  1330. set_bit(STATUS_POWER_PMI, &priv->status);
  1331. return rc;
  1332. }
  1333. int iwl4965_is_network_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  1334. {
  1335. /* Filter incoming packets to determine if they are targeted toward
  1336. * this network, discarding packets coming from ourselves */
  1337. switch (priv->iw_mode) {
  1338. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1339. /* packets from our adapter are dropped (echo) */
  1340. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1341. return 0;
  1342. /* {broad,multi}cast packets to our IBSS go through */
  1343. if (is_multicast_ether_addr(header->addr1))
  1344. return !compare_ether_addr(header->addr3, priv->bssid);
  1345. /* packets to our adapter go through */
  1346. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1347. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1348. /* packets from our adapter are dropped (echo) */
  1349. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1350. return 0;
  1351. /* {broad,multi}cast packets to our BSS go through */
  1352. if (is_multicast_ether_addr(header->addr1))
  1353. return !compare_ether_addr(header->addr2, priv->bssid);
  1354. /* packets to our adapter go through */
  1355. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1356. default:
  1357. break;
  1358. }
  1359. return 1;
  1360. }
  1361. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1362. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1363. {
  1364. switch (status & TX_STATUS_MSK) {
  1365. case TX_STATUS_SUCCESS:
  1366. return "SUCCESS";
  1367. TX_STATUS_ENTRY(SHORT_LIMIT);
  1368. TX_STATUS_ENTRY(LONG_LIMIT);
  1369. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1370. TX_STATUS_ENTRY(MGMNT_ABORT);
  1371. TX_STATUS_ENTRY(NEXT_FRAG);
  1372. TX_STATUS_ENTRY(LIFE_EXPIRE);
  1373. TX_STATUS_ENTRY(DEST_PS);
  1374. TX_STATUS_ENTRY(ABORTED);
  1375. TX_STATUS_ENTRY(BT_RETRY);
  1376. TX_STATUS_ENTRY(STA_INVALID);
  1377. TX_STATUS_ENTRY(FRAG_DROPPED);
  1378. TX_STATUS_ENTRY(TID_DISABLE);
  1379. TX_STATUS_ENTRY(FRAME_FLUSHED);
  1380. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  1381. TX_STATUS_ENTRY(TX_LOCKED);
  1382. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  1383. }
  1384. return "UNKNOWN";
  1385. }
  1386. /**
  1387. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  1388. *
  1389. * NOTE: priv->mutex is not required before calling this function
  1390. */
  1391. static int iwl4965_scan_cancel(struct iwl_priv *priv)
  1392. {
  1393. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1394. clear_bit(STATUS_SCANNING, &priv->status);
  1395. return 0;
  1396. }
  1397. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1398. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1399. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  1400. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  1401. queue_work(priv->workqueue, &priv->abort_scan);
  1402. } else
  1403. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  1404. return test_bit(STATUS_SCANNING, &priv->status);
  1405. }
  1406. return 0;
  1407. }
  1408. /**
  1409. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  1410. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1411. *
  1412. * NOTE: priv->mutex must be held before calling this function
  1413. */
  1414. static int iwl4965_scan_cancel_timeout(struct iwl_priv *priv, unsigned long ms)
  1415. {
  1416. unsigned long now = jiffies;
  1417. int ret;
  1418. ret = iwl4965_scan_cancel(priv);
  1419. if (ret && ms) {
  1420. mutex_unlock(&priv->mutex);
  1421. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  1422. test_bit(STATUS_SCANNING, &priv->status))
  1423. msleep(1);
  1424. mutex_lock(&priv->mutex);
  1425. return test_bit(STATUS_SCANNING, &priv->status);
  1426. }
  1427. return ret;
  1428. }
  1429. static void iwl4965_sequence_reset(struct iwl_priv *priv)
  1430. {
  1431. /* Reset ieee stats */
  1432. /* We don't reset the net_device_stats (ieee->stats) on
  1433. * re-association */
  1434. priv->last_seq_num = -1;
  1435. priv->last_frag_num = -1;
  1436. priv->last_packet_time = 0;
  1437. iwl4965_scan_cancel(priv);
  1438. }
  1439. #define MAX_UCODE_BEACON_INTERVAL 4096
  1440. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1441. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  1442. {
  1443. u16 new_val = 0;
  1444. u16 beacon_factor = 0;
  1445. beacon_factor =
  1446. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1447. / MAX_UCODE_BEACON_INTERVAL;
  1448. new_val = beacon_val / beacon_factor;
  1449. return cpu_to_le16(new_val);
  1450. }
  1451. static void iwl4965_setup_rxon_timing(struct iwl_priv *priv)
  1452. {
  1453. u64 interval_tm_unit;
  1454. u64 tsf, result;
  1455. unsigned long flags;
  1456. struct ieee80211_conf *conf = NULL;
  1457. u16 beacon_int = 0;
  1458. conf = ieee80211_get_hw_conf(priv->hw);
  1459. spin_lock_irqsave(&priv->lock, flags);
  1460. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp >> 32);
  1461. priv->rxon_timing.timestamp.dw[0] =
  1462. cpu_to_le32(priv->timestamp & 0xFFFFFFFF);
  1463. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1464. tsf = priv->timestamp;
  1465. beacon_int = priv->beacon_int;
  1466. spin_unlock_irqrestore(&priv->lock, flags);
  1467. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  1468. if (beacon_int == 0) {
  1469. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1470. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1471. } else {
  1472. priv->rxon_timing.beacon_interval =
  1473. cpu_to_le16(beacon_int);
  1474. priv->rxon_timing.beacon_interval =
  1475. iwl4965_adjust_beacon_interval(
  1476. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1477. }
  1478. priv->rxon_timing.atim_window = 0;
  1479. } else {
  1480. priv->rxon_timing.beacon_interval =
  1481. iwl4965_adjust_beacon_interval(conf->beacon_int);
  1482. /* TODO: we need to get atim_window from upper stack
  1483. * for now we set to 0 */
  1484. priv->rxon_timing.atim_window = 0;
  1485. }
  1486. interval_tm_unit =
  1487. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1488. result = do_div(tsf, interval_tm_unit);
  1489. priv->rxon_timing.beacon_init_val =
  1490. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1491. IWL_DEBUG_ASSOC
  1492. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1493. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1494. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1495. le16_to_cpu(priv->rxon_timing.atim_window));
  1496. }
  1497. static int iwl4965_scan_initiate(struct iwl_priv *priv)
  1498. {
  1499. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1500. IWL_ERROR("APs don't scan.\n");
  1501. return 0;
  1502. }
  1503. if (!iwl_is_ready_rf(priv)) {
  1504. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1505. return -EIO;
  1506. }
  1507. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1508. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1509. return -EAGAIN;
  1510. }
  1511. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1512. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1513. "Queuing.\n");
  1514. return -EAGAIN;
  1515. }
  1516. IWL_DEBUG_INFO("Starting scan...\n");
  1517. priv->scan_bands = 2;
  1518. set_bit(STATUS_SCANNING, &priv->status);
  1519. priv->scan_start = jiffies;
  1520. priv->scan_pass_start = priv->scan_start;
  1521. queue_work(priv->workqueue, &priv->request_scan);
  1522. return 0;
  1523. }
  1524. static void iwl4965_set_flags_for_phymode(struct iwl_priv *priv,
  1525. enum ieee80211_band band)
  1526. {
  1527. if (band == IEEE80211_BAND_5GHZ) {
  1528. priv->staging_rxon.flags &=
  1529. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1530. | RXON_FLG_CCK_MSK);
  1531. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1532. } else {
  1533. /* Copied from iwl4965_post_associate() */
  1534. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1535. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1536. else
  1537. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1538. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  1539. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1540. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1541. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1542. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1543. }
  1544. }
  1545. /*
  1546. * initialize rxon structure with default values from eeprom
  1547. */
  1548. static void iwl4965_connection_init_rx_config(struct iwl_priv *priv)
  1549. {
  1550. const struct iwl_channel_info *ch_info;
  1551. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  1552. switch (priv->iw_mode) {
  1553. case IEEE80211_IF_TYPE_AP:
  1554. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  1555. break;
  1556. case IEEE80211_IF_TYPE_STA:
  1557. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1558. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1559. break;
  1560. case IEEE80211_IF_TYPE_IBSS:
  1561. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1562. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1563. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1564. RXON_FILTER_ACCEPT_GRP_MSK;
  1565. break;
  1566. case IEEE80211_IF_TYPE_MNTR:
  1567. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1568. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1569. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1570. break;
  1571. default:
  1572. IWL_ERROR("Unsupported interface type %d\n", priv->iw_mode);
  1573. break;
  1574. }
  1575. #if 0
  1576. /* TODO: Figure out when short_preamble would be set and cache from
  1577. * that */
  1578. if (!hw_to_local(priv->hw)->short_preamble)
  1579. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1580. else
  1581. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1582. #endif
  1583. ch_info = iwl_get_channel_info(priv, priv->band,
  1584. le16_to_cpu(priv->staging_rxon.channel));
  1585. if (!ch_info)
  1586. ch_info = &priv->channel_info[0];
  1587. /*
  1588. * in some case A channels are all non IBSS
  1589. * in this case force B/G channel
  1590. */
  1591. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  1592. !(is_channel_ibss(ch_info)))
  1593. ch_info = &priv->channel_info[0];
  1594. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  1595. priv->band = ch_info->band;
  1596. iwl4965_set_flags_for_phymode(priv, priv->band);
  1597. priv->staging_rxon.ofdm_basic_rates =
  1598. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1599. priv->staging_rxon.cck_basic_rates =
  1600. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1601. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  1602. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  1603. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1604. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  1605. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  1606. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  1607. iwl4965_set_rxon_chain(priv);
  1608. }
  1609. static int iwl4965_set_mode(struct iwl_priv *priv, int mode)
  1610. {
  1611. if (mode == IEEE80211_IF_TYPE_IBSS) {
  1612. const struct iwl_channel_info *ch_info;
  1613. ch_info = iwl_get_channel_info(priv,
  1614. priv->band,
  1615. le16_to_cpu(priv->staging_rxon.channel));
  1616. if (!ch_info || !is_channel_ibss(ch_info)) {
  1617. IWL_ERROR("channel %d not IBSS channel\n",
  1618. le16_to_cpu(priv->staging_rxon.channel));
  1619. return -EINVAL;
  1620. }
  1621. }
  1622. priv->iw_mode = mode;
  1623. iwl4965_connection_init_rx_config(priv);
  1624. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1625. iwlcore_clear_stations_table(priv);
  1626. /* dont commit rxon if rf-kill is on*/
  1627. if (!iwl_is_ready_rf(priv))
  1628. return -EAGAIN;
  1629. cancel_delayed_work(&priv->scan_check);
  1630. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  1631. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  1632. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1633. return -EAGAIN;
  1634. }
  1635. iwl4965_commit_rxon(priv);
  1636. return 0;
  1637. }
  1638. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1639. struct ieee80211_tx_control *ctl,
  1640. struct iwl_cmd *cmd,
  1641. struct sk_buff *skb_frag,
  1642. int sta_id)
  1643. {
  1644. struct iwl4965_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  1645. struct iwl_wep_key *wepkey;
  1646. int keyidx = 0;
  1647. BUG_ON(ctl->key_idx > 3);
  1648. switch (keyinfo->alg) {
  1649. case ALG_CCMP:
  1650. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  1651. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  1652. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1653. cmd->cmd.tx.tx_flags |= TX_CMD_FLG_AGG_CCMP_MSK;
  1654. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  1655. break;
  1656. case ALG_TKIP:
  1657. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  1658. ieee80211_get_tkip_key(keyinfo->conf, skb_frag,
  1659. IEEE80211_TKIP_P2_KEY, cmd->cmd.tx.key);
  1660. IWL_DEBUG_TX("tx_cmd with tkip hwcrypto\n");
  1661. break;
  1662. case ALG_WEP:
  1663. wepkey = &priv->wep_keys[ctl->key_idx];
  1664. cmd->cmd.tx.sec_ctl = 0;
  1665. if (priv->default_wep_key) {
  1666. /* the WEP key was sent as static */
  1667. keyidx = ctl->key_idx;
  1668. memcpy(&cmd->cmd.tx.key[3], wepkey->key,
  1669. wepkey->key_size);
  1670. if (wepkey->key_size == WEP_KEY_LEN_128)
  1671. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1672. } else {
  1673. /* the WEP key was sent as dynamic */
  1674. keyidx = keyinfo->keyidx;
  1675. memcpy(&cmd->cmd.tx.key[3], keyinfo->key,
  1676. keyinfo->keylen);
  1677. if (keyinfo->keylen == WEP_KEY_LEN_128)
  1678. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  1679. }
  1680. cmd->cmd.tx.sec_ctl |= (TX_CMD_SEC_WEP |
  1681. (keyidx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT);
  1682. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1683. "with key %d\n", keyidx);
  1684. break;
  1685. default:
  1686. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  1687. break;
  1688. }
  1689. }
  1690. /*
  1691. * handle build REPLY_TX command notification.
  1692. */
  1693. static void iwl4965_build_tx_cmd_basic(struct iwl_priv *priv,
  1694. struct iwl_cmd *cmd,
  1695. struct ieee80211_tx_control *ctrl,
  1696. struct ieee80211_hdr *hdr,
  1697. int is_unicast, u8 std_id)
  1698. {
  1699. __le16 *qc;
  1700. u16 fc = le16_to_cpu(hdr->frame_control);
  1701. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  1702. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1703. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  1704. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1705. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  1706. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1707. if (ieee80211_is_probe_response(fc) &&
  1708. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1709. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1710. } else {
  1711. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1712. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1713. }
  1714. if (ieee80211_is_back_request(fc))
  1715. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  1716. cmd->cmd.tx.sta_id = std_id;
  1717. if (ieee80211_get_morefrag(hdr))
  1718. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1719. qc = ieee80211_get_qos_ctrl(hdr);
  1720. if (qc) {
  1721. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  1722. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1723. } else
  1724. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1725. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  1726. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1727. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1728. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  1729. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1730. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1731. }
  1732. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1733. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1734. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1735. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  1736. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  1737. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  1738. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  1739. else
  1740. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  1741. } else {
  1742. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  1743. }
  1744. cmd->cmd.tx.driver_txop = 0;
  1745. cmd->cmd.tx.tx_flags = tx_flags;
  1746. cmd->cmd.tx.next_frame_len = 0;
  1747. }
  1748. static void iwl_update_tx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  1749. {
  1750. /* 0 - mgmt, 1 - cnt, 2 - data */
  1751. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  1752. priv->tx_stats[idx].cnt++;
  1753. priv->tx_stats[idx].bytes += len;
  1754. }
  1755. /**
  1756. * iwl4965_get_sta_id - Find station's index within station table
  1757. *
  1758. * If new IBSS station, create new entry in station table
  1759. */
  1760. static int iwl4965_get_sta_id(struct iwl_priv *priv,
  1761. struct ieee80211_hdr *hdr)
  1762. {
  1763. int sta_id;
  1764. u16 fc = le16_to_cpu(hdr->frame_control);
  1765. DECLARE_MAC_BUF(mac);
  1766. /* If this frame is broadcast or management, use broadcast station id */
  1767. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1768. is_multicast_ether_addr(hdr->addr1))
  1769. return priv->hw_setting.bcast_sta_id;
  1770. switch (priv->iw_mode) {
  1771. /* If we are a client station in a BSS network, use the special
  1772. * AP station entry (that's the only station we communicate with) */
  1773. case IEEE80211_IF_TYPE_STA:
  1774. return IWL_AP_ID;
  1775. /* If we are an AP, then find the station, or use BCAST */
  1776. case IEEE80211_IF_TYPE_AP:
  1777. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1778. if (sta_id != IWL_INVALID_STATION)
  1779. return sta_id;
  1780. return priv->hw_setting.bcast_sta_id;
  1781. /* If this frame is going out to an IBSS network, find the station,
  1782. * or create a new station table entry */
  1783. case IEEE80211_IF_TYPE_IBSS:
  1784. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  1785. if (sta_id != IWL_INVALID_STATION)
  1786. return sta_id;
  1787. /* Create new station table entry */
  1788. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  1789. 0, CMD_ASYNC, NULL);
  1790. if (sta_id != IWL_INVALID_STATION)
  1791. return sta_id;
  1792. IWL_DEBUG_DROP("Station %s not in station map. "
  1793. "Defaulting to broadcast...\n",
  1794. print_mac(mac, hdr->addr1));
  1795. iwl_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1796. return priv->hw_setting.bcast_sta_id;
  1797. default:
  1798. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  1799. return priv->hw_setting.bcast_sta_id;
  1800. }
  1801. }
  1802. /*
  1803. * start REPLY_TX command process
  1804. */
  1805. static int iwl4965_tx_skb(struct iwl_priv *priv,
  1806. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  1807. {
  1808. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1809. struct iwl4965_tfd_frame *tfd;
  1810. u32 *control_flags;
  1811. int txq_id = ctl->queue;
  1812. struct iwl4965_tx_queue *txq = NULL;
  1813. struct iwl4965_queue *q = NULL;
  1814. dma_addr_t phys_addr;
  1815. dma_addr_t txcmd_phys;
  1816. dma_addr_t scratch_phys;
  1817. struct iwl_cmd *out_cmd = NULL;
  1818. u16 len, idx, len_org;
  1819. u8 id, hdr_len, unicast;
  1820. u8 sta_id;
  1821. u16 seq_number = 0;
  1822. u16 fc;
  1823. __le16 *qc;
  1824. u8 wait_write_ptr = 0;
  1825. unsigned long flags;
  1826. int rc;
  1827. spin_lock_irqsave(&priv->lock, flags);
  1828. if (iwl_is_rfkill(priv)) {
  1829. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1830. goto drop_unlock;
  1831. }
  1832. if (!priv->vif) {
  1833. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  1834. goto drop_unlock;
  1835. }
  1836. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1837. IWL_ERROR("ERROR: No TX rate available.\n");
  1838. goto drop_unlock;
  1839. }
  1840. unicast = !is_multicast_ether_addr(hdr->addr1);
  1841. id = 0;
  1842. fc = le16_to_cpu(hdr->frame_control);
  1843. #ifdef CONFIG_IWLWIFI_DEBUG
  1844. if (ieee80211_is_auth(fc))
  1845. IWL_DEBUG_TX("Sending AUTH frame\n");
  1846. else if (ieee80211_is_assoc_request(fc))
  1847. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1848. else if (ieee80211_is_reassoc_request(fc))
  1849. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1850. #endif
  1851. /* drop all data frame if we are not associated */
  1852. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  1853. (!iwl_is_associated(priv) ||
  1854. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  1855. !priv->assoc_station_added)) {
  1856. IWL_DEBUG_DROP("Dropping - !iwl_is_associated\n");
  1857. goto drop_unlock;
  1858. }
  1859. spin_unlock_irqrestore(&priv->lock, flags);
  1860. hdr_len = ieee80211_get_hdrlen(fc);
  1861. /* Find (or create) index into station table for destination station */
  1862. sta_id = iwl4965_get_sta_id(priv, hdr);
  1863. if (sta_id == IWL_INVALID_STATION) {
  1864. DECLARE_MAC_BUF(mac);
  1865. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  1866. print_mac(mac, hdr->addr1));
  1867. goto drop;
  1868. }
  1869. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1870. qc = ieee80211_get_qos_ctrl(hdr);
  1871. if (qc) {
  1872. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1873. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  1874. IEEE80211_SCTL_SEQ;
  1875. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1876. (hdr->seq_ctrl &
  1877. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1878. seq_number += 0x10;
  1879. #ifdef CONFIG_IWL4965_HT
  1880. /* aggregation is on for this <sta,tid> */
  1881. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  1882. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  1883. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  1884. #endif /* CONFIG_IWL4965_HT */
  1885. }
  1886. /* Descriptor for chosen Tx queue */
  1887. txq = &priv->txq[txq_id];
  1888. q = &txq->q;
  1889. spin_lock_irqsave(&priv->lock, flags);
  1890. /* Set up first empty TFD within this queue's circular TFD buffer */
  1891. tfd = &txq->bd[q->write_ptr];
  1892. memset(tfd, 0, sizeof(*tfd));
  1893. control_flags = (u32 *) tfd;
  1894. idx = get_cmd_index(q, q->write_ptr, 0);
  1895. /* Set up driver data for this TFD */
  1896. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  1897. txq->txb[q->write_ptr].skb[0] = skb;
  1898. memcpy(&(txq->txb[q->write_ptr].status.control),
  1899. ctl, sizeof(struct ieee80211_tx_control));
  1900. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  1901. out_cmd = &txq->cmd[idx];
  1902. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1903. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  1904. /*
  1905. * Set up the Tx-command (not MAC!) header.
  1906. * Store the chosen Tx queue and TFD index within the sequence field;
  1907. * after Tx, uCode's Tx response will return this value so driver can
  1908. * locate the frame within the tx queue and do post-tx processing.
  1909. */
  1910. out_cmd->hdr.cmd = REPLY_TX;
  1911. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1912. INDEX_TO_SEQ(q->write_ptr)));
  1913. /* Copy MAC header from skb into command buffer */
  1914. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  1915. /*
  1916. * Use the first empty entry in this queue's command buffer array
  1917. * to contain the Tx command and MAC header concatenated together
  1918. * (payload data will be in another buffer).
  1919. * Size of this varies, due to varying MAC header length.
  1920. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1921. * of the MAC header (device reads on dword boundaries).
  1922. * We'll tell device about this padding later.
  1923. */
  1924. len = priv->hw_setting.tx_cmd_len +
  1925. sizeof(struct iwl_cmd_header) + hdr_len;
  1926. len_org = len;
  1927. len = (len + 3) & ~3;
  1928. if (len_org != len)
  1929. len_org = 1;
  1930. else
  1931. len_org = 0;
  1932. /* Physical address of this Tx command's header (not MAC header!),
  1933. * within command buffer array. */
  1934. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl_cmd) * idx +
  1935. offsetof(struct iwl_cmd, hdr);
  1936. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1937. * first entry */
  1938. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  1939. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  1940. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, sta_id);
  1941. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1942. * if any (802.11 null frames have no payload). */
  1943. len = skb->len - hdr_len;
  1944. if (len) {
  1945. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1946. len, PCI_DMA_TODEVICE);
  1947. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  1948. }
  1949. /* Tell 4965 about any 2-byte padding after MAC header */
  1950. if (len_org)
  1951. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  1952. /* Total # bytes to be transmitted */
  1953. len = (u16)skb->len;
  1954. out_cmd->cmd.tx.len = cpu_to_le16(len);
  1955. /* TODO need this for burst mode later on */
  1956. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  1957. /* set is_hcca to 0; it probably will never be implemented */
  1958. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  1959. iwl_update_tx_stats(priv, fc, len);
  1960. scratch_phys = txcmd_phys + sizeof(struct iwl_cmd_header) +
  1961. offsetof(struct iwl4965_tx_cmd, scratch);
  1962. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  1963. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  1964. if (!ieee80211_get_morefrag(hdr)) {
  1965. txq->need_update = 1;
  1966. if (qc) {
  1967. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  1968. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  1969. }
  1970. } else {
  1971. wait_write_ptr = 1;
  1972. txq->need_update = 0;
  1973. }
  1974. iwl_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  1975. sizeof(out_cmd->cmd.tx));
  1976. iwl_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  1977. ieee80211_get_hdrlen(fc));
  1978. /* Set up entry for this TFD in Tx byte-count array */
  1979. priv->cfg->ops->lib->txq_update_byte_cnt_tbl(priv, txq, len);
  1980. /* Tell device the write index *just past* this latest filled TFD */
  1981. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1982. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  1983. spin_unlock_irqrestore(&priv->lock, flags);
  1984. if (rc)
  1985. return rc;
  1986. if ((iwl4965_queue_space(q) < q->high_mark)
  1987. && priv->mac80211_registered) {
  1988. if (wait_write_ptr) {
  1989. spin_lock_irqsave(&priv->lock, flags);
  1990. txq->need_update = 1;
  1991. iwl4965_tx_queue_update_write_ptr(priv, txq);
  1992. spin_unlock_irqrestore(&priv->lock, flags);
  1993. }
  1994. ieee80211_stop_queue(priv->hw, ctl->queue);
  1995. }
  1996. return 0;
  1997. drop_unlock:
  1998. spin_unlock_irqrestore(&priv->lock, flags);
  1999. drop:
  2000. return -1;
  2001. }
  2002. static void iwl4965_set_rate(struct iwl_priv *priv)
  2003. {
  2004. const struct ieee80211_supported_band *hw = NULL;
  2005. struct ieee80211_rate *rate;
  2006. int i;
  2007. hw = iwl4965_get_hw_mode(priv, priv->band);
  2008. if (!hw) {
  2009. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2010. return;
  2011. }
  2012. priv->active_rate = 0;
  2013. priv->active_rate_basic = 0;
  2014. for (i = 0; i < hw->n_bitrates; i++) {
  2015. rate = &(hw->bitrates[i]);
  2016. if (rate->hw_value < IWL_RATE_COUNT)
  2017. priv->active_rate |= (1 << rate->hw_value);
  2018. }
  2019. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2020. priv->active_rate, priv->active_rate_basic);
  2021. /*
  2022. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2023. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2024. * OFDM
  2025. */
  2026. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2027. priv->staging_rxon.cck_basic_rates =
  2028. ((priv->active_rate_basic &
  2029. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2030. else
  2031. priv->staging_rxon.cck_basic_rates =
  2032. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2033. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2034. priv->staging_rxon.ofdm_basic_rates =
  2035. ((priv->active_rate_basic &
  2036. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2037. IWL_FIRST_OFDM_RATE) & 0xFF;
  2038. else
  2039. priv->staging_rxon.ofdm_basic_rates =
  2040. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2041. }
  2042. void iwl4965_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  2043. {
  2044. unsigned long flags;
  2045. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2046. return;
  2047. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2048. disable_radio ? "OFF" : "ON");
  2049. if (disable_radio) {
  2050. iwl4965_scan_cancel(priv);
  2051. /* FIXME: This is a workaround for AP */
  2052. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2053. spin_lock_irqsave(&priv->lock, flags);
  2054. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2055. CSR_UCODE_SW_BIT_RFKILL);
  2056. spin_unlock_irqrestore(&priv->lock, flags);
  2057. /* call the host command only if no hw rf-kill set */
  2058. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  2059. iwl4965_send_card_state(priv,
  2060. CARD_STATE_CMD_DISABLE,
  2061. 0);
  2062. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2063. /* make sure mac80211 stop sending Tx frame */
  2064. if (priv->mac80211_registered)
  2065. ieee80211_stop_queues(priv->hw);
  2066. }
  2067. return;
  2068. }
  2069. spin_lock_irqsave(&priv->lock, flags);
  2070. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2071. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2072. spin_unlock_irqrestore(&priv->lock, flags);
  2073. /* wake up ucode */
  2074. msleep(10);
  2075. spin_lock_irqsave(&priv->lock, flags);
  2076. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2077. if (!iwl_grab_nic_access(priv))
  2078. iwl_release_nic_access(priv);
  2079. spin_unlock_irqrestore(&priv->lock, flags);
  2080. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2081. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2082. "disabled by HW switch\n");
  2083. return;
  2084. }
  2085. queue_work(priv->workqueue, &priv->restart);
  2086. return;
  2087. }
  2088. void iwl4965_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  2089. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2090. {
  2091. u16 fc =
  2092. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2093. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2094. return;
  2095. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2096. return;
  2097. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2098. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2099. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2100. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2101. * Decryption will be done in SW. */
  2102. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2103. RX_RES_STATUS_BAD_KEY_TTAK)
  2104. break;
  2105. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2106. RX_RES_STATUS_BAD_ICV_MIC)
  2107. stats->flag |= RX_FLAG_MMIC_ERROR;
  2108. case RX_RES_STATUS_SEC_TYPE_WEP:
  2109. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2110. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2111. RX_RES_STATUS_DECRYPT_OK) {
  2112. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2113. stats->flag |= RX_FLAG_DECRYPTED;
  2114. }
  2115. break;
  2116. default:
  2117. break;
  2118. }
  2119. }
  2120. #define IWL_PACKET_RETRY_TIME HZ
  2121. int iwl4965_is_duplicate_packet(struct iwl_priv *priv, struct ieee80211_hdr *header)
  2122. {
  2123. u16 sc = le16_to_cpu(header->seq_ctrl);
  2124. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2125. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2126. u16 *last_seq, *last_frag;
  2127. unsigned long *last_time;
  2128. switch (priv->iw_mode) {
  2129. case IEEE80211_IF_TYPE_IBSS:{
  2130. struct list_head *p;
  2131. struct iwl4965_ibss_seq *entry = NULL;
  2132. u8 *mac = header->addr2;
  2133. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2134. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2135. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2136. if (!compare_ether_addr(entry->mac, mac))
  2137. break;
  2138. }
  2139. if (p == &priv->ibss_mac_hash[index]) {
  2140. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2141. if (!entry) {
  2142. IWL_ERROR("Cannot malloc new mac entry\n");
  2143. return 0;
  2144. }
  2145. memcpy(entry->mac, mac, ETH_ALEN);
  2146. entry->seq_num = seq;
  2147. entry->frag_num = frag;
  2148. entry->packet_time = jiffies;
  2149. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2150. return 0;
  2151. }
  2152. last_seq = &entry->seq_num;
  2153. last_frag = &entry->frag_num;
  2154. last_time = &entry->packet_time;
  2155. break;
  2156. }
  2157. case IEEE80211_IF_TYPE_STA:
  2158. last_seq = &priv->last_seq_num;
  2159. last_frag = &priv->last_frag_num;
  2160. last_time = &priv->last_packet_time;
  2161. break;
  2162. default:
  2163. return 0;
  2164. }
  2165. if ((*last_seq == seq) &&
  2166. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2167. if (*last_frag == frag)
  2168. goto drop;
  2169. if (*last_frag + 1 != frag)
  2170. /* out-of-order fragment */
  2171. goto drop;
  2172. } else
  2173. *last_seq = seq;
  2174. *last_frag = frag;
  2175. *last_time = jiffies;
  2176. return 0;
  2177. drop:
  2178. return 1;
  2179. }
  2180. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2181. #include "iwl-spectrum.h"
  2182. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2183. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2184. #define TIME_UNIT 1024
  2185. /*
  2186. * extended beacon time format
  2187. * time in usec will be changed into a 32-bit value in 8:24 format
  2188. * the high 1 byte is the beacon counts
  2189. * the lower 3 bytes is the time in usec within one beacon interval
  2190. */
  2191. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2192. {
  2193. u32 quot;
  2194. u32 rem;
  2195. u32 interval = beacon_interval * 1024;
  2196. if (!interval || !usec)
  2197. return 0;
  2198. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2199. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2200. return (quot << 24) + rem;
  2201. }
  2202. /* base is usually what we get from ucode with each received frame,
  2203. * the same as HW timer counter counting down
  2204. */
  2205. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2206. {
  2207. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2208. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2209. u32 interval = beacon_interval * TIME_UNIT;
  2210. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2211. (addon & BEACON_TIME_MASK_HIGH);
  2212. if (base_low > addon_low)
  2213. res += base_low - addon_low;
  2214. else if (base_low < addon_low) {
  2215. res += interval + base_low - addon_low;
  2216. res += (1 << 24);
  2217. } else
  2218. res += (1 << 24);
  2219. return cpu_to_le32(res);
  2220. }
  2221. static int iwl4965_get_measurement(struct iwl_priv *priv,
  2222. struct ieee80211_measurement_params *params,
  2223. u8 type)
  2224. {
  2225. struct iwl4965_spectrum_cmd spectrum;
  2226. struct iwl4965_rx_packet *res;
  2227. struct iwl_host_cmd cmd = {
  2228. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2229. .data = (void *)&spectrum,
  2230. .meta.flags = CMD_WANT_SKB,
  2231. };
  2232. u32 add_time = le64_to_cpu(params->start_time);
  2233. int rc;
  2234. int spectrum_resp_status;
  2235. int duration = le16_to_cpu(params->duration);
  2236. if (iwl_is_associated(priv))
  2237. add_time =
  2238. iwl4965_usecs_to_beacons(
  2239. le64_to_cpu(params->start_time) - priv->last_tsf,
  2240. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2241. memset(&spectrum, 0, sizeof(spectrum));
  2242. spectrum.channel_count = cpu_to_le16(1);
  2243. spectrum.flags =
  2244. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2245. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2246. cmd.len = sizeof(spectrum);
  2247. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2248. if (iwl_is_associated(priv))
  2249. spectrum.start_time =
  2250. iwl4965_add_beacon_time(priv->last_beacon_time,
  2251. add_time,
  2252. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2253. else
  2254. spectrum.start_time = 0;
  2255. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2256. spectrum.channels[0].channel = params->channel;
  2257. spectrum.channels[0].type = type;
  2258. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2259. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2260. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2261. rc = iwl_send_cmd_sync(priv, &cmd);
  2262. if (rc)
  2263. return rc;
  2264. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2265. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2266. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2267. rc = -EIO;
  2268. }
  2269. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2270. switch (spectrum_resp_status) {
  2271. case 0: /* Command will be handled */
  2272. if (res->u.spectrum.id != 0xff) {
  2273. IWL_DEBUG_INFO
  2274. ("Replaced existing measurement: %d\n",
  2275. res->u.spectrum.id);
  2276. priv->measurement_status &= ~MEASUREMENT_READY;
  2277. }
  2278. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2279. rc = 0;
  2280. break;
  2281. case 1: /* Command will not be handled */
  2282. rc = -EAGAIN;
  2283. break;
  2284. }
  2285. dev_kfree_skb_any(cmd.meta.u.skb);
  2286. return rc;
  2287. }
  2288. #endif
  2289. static void iwl4965_txstatus_to_ieee(struct iwl_priv *priv,
  2290. struct iwl4965_tx_info *tx_sta)
  2291. {
  2292. tx_sta->status.ack_signal = 0;
  2293. tx_sta->status.excessive_retries = 0;
  2294. tx_sta->status.queue_length = 0;
  2295. tx_sta->status.queue_number = 0;
  2296. if (in_interrupt())
  2297. ieee80211_tx_status_irqsafe(priv->hw,
  2298. tx_sta->skb[0], &(tx_sta->status));
  2299. else
  2300. ieee80211_tx_status(priv->hw,
  2301. tx_sta->skb[0], &(tx_sta->status));
  2302. tx_sta->skb[0] = NULL;
  2303. }
  2304. /**
  2305. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2306. *
  2307. * When FW advances 'R' index, all entries between old and new 'R' index
  2308. * need to be reclaimed. As result, some free space forms. If there is
  2309. * enough free space (> low mark), wake the stack that feeds us.
  2310. */
  2311. int iwl4965_tx_queue_reclaim(struct iwl_priv *priv, int txq_id, int index)
  2312. {
  2313. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2314. struct iwl4965_queue *q = &txq->q;
  2315. int nfreed = 0;
  2316. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2317. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2318. "is out of range [0-%d] %d %d.\n", txq_id,
  2319. index, q->n_bd, q->write_ptr, q->read_ptr);
  2320. return 0;
  2321. }
  2322. for (index = iwl_queue_inc_wrap(index, q->n_bd);
  2323. q->read_ptr != index;
  2324. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2325. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2326. iwl4965_txstatus_to_ieee(priv,
  2327. &(txq->txb[txq->q.read_ptr]));
  2328. iwl4965_hw_txq_free_tfd(priv, txq);
  2329. } else if (nfreed > 1) {
  2330. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2331. q->write_ptr, q->read_ptr);
  2332. queue_work(priv->workqueue, &priv->restart);
  2333. }
  2334. nfreed++;
  2335. }
  2336. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2337. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2338. priv->mac80211_registered)
  2339. ieee80211_wake_queue(priv->hw, txq_id); */
  2340. return nfreed;
  2341. }
  2342. static int iwl4965_is_tx_success(u32 status)
  2343. {
  2344. status &= TX_STATUS_MSK;
  2345. return (status == TX_STATUS_SUCCESS)
  2346. || (status == TX_STATUS_DIRECT_DONE);
  2347. }
  2348. /******************************************************************************
  2349. *
  2350. * Generic RX handler implementations
  2351. *
  2352. ******************************************************************************/
  2353. #ifdef CONFIG_IWL4965_HT
  2354. static inline int iwl4965_get_ra_sta_id(struct iwl_priv *priv,
  2355. struct ieee80211_hdr *hdr)
  2356. {
  2357. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2358. return IWL_AP_ID;
  2359. else {
  2360. u8 *da = ieee80211_get_DA(hdr);
  2361. return iwl4965_hw_find_station(priv, da);
  2362. }
  2363. }
  2364. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2365. struct iwl_priv *priv, int txq_id, int idx)
  2366. {
  2367. if (priv->txq[txq_id].txb[idx].skb[0])
  2368. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2369. txb[idx].skb[0]->data;
  2370. return NULL;
  2371. }
  2372. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2373. {
  2374. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2375. tx_resp->frame_count);
  2376. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2377. }
  2378. /**
  2379. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2380. */
  2381. static int iwl4965_tx_status_reply_tx(struct iwl_priv *priv,
  2382. struct iwl4965_ht_agg *agg,
  2383. struct iwl4965_tx_resp_agg *tx_resp,
  2384. u16 start_idx)
  2385. {
  2386. u16 status;
  2387. struct agg_tx_status *frame_status = &tx_resp->status;
  2388. struct ieee80211_tx_status *tx_status = NULL;
  2389. struct ieee80211_hdr *hdr = NULL;
  2390. int i, sh;
  2391. int txq_id, idx;
  2392. u16 seq;
  2393. if (agg->wait_for_ba)
  2394. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2395. agg->frame_count = tx_resp->frame_count;
  2396. agg->start_idx = start_idx;
  2397. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2398. agg->bitmap = 0;
  2399. /* # frames attempted by Tx command */
  2400. if (agg->frame_count == 1) {
  2401. /* Only one frame was attempted; no block-ack will arrive */
  2402. status = le16_to_cpu(frame_status[0].status);
  2403. seq = le16_to_cpu(frame_status[0].sequence);
  2404. idx = SEQ_TO_INDEX(seq);
  2405. txq_id = SEQ_TO_QUEUE(seq);
  2406. /* FIXME: code repetition */
  2407. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  2408. agg->frame_count, agg->start_idx, idx);
  2409. tx_status = &(priv->txq[txq_id].txb[idx].status);
  2410. tx_status->retry_count = tx_resp->failure_frame;
  2411. tx_status->queue_number = status & 0xff;
  2412. tx_status->queue_length = tx_resp->failure_rts;
  2413. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  2414. tx_status->flags = iwl4965_is_tx_success(status)?
  2415. IEEE80211_TX_STATUS_ACK : 0;
  2416. iwl4965_hwrate_to_tx_control(priv,
  2417. le32_to_cpu(tx_resp->rate_n_flags),
  2418. &tx_status->control);
  2419. /* FIXME: code repetition end */
  2420. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  2421. status & 0xff, tx_resp->failure_frame);
  2422. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  2423. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  2424. agg->wait_for_ba = 0;
  2425. } else {
  2426. /* Two or more frames were attempted; expect block-ack */
  2427. u64 bitmap = 0;
  2428. int start = agg->start_idx;
  2429. /* Construct bit-map of pending frames within Tx window */
  2430. for (i = 0; i < agg->frame_count; i++) {
  2431. u16 sc;
  2432. status = le16_to_cpu(frame_status[i].status);
  2433. seq = le16_to_cpu(frame_status[i].sequence);
  2434. idx = SEQ_TO_INDEX(seq);
  2435. txq_id = SEQ_TO_QUEUE(seq);
  2436. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  2437. AGG_TX_STATE_ABORT_MSK))
  2438. continue;
  2439. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  2440. agg->frame_count, txq_id, idx);
  2441. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  2442. sc = le16_to_cpu(hdr->seq_ctrl);
  2443. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  2444. IWL_ERROR("BUG_ON idx doesn't match seq control"
  2445. " idx=%d, seq_idx=%d, seq=%d\n",
  2446. idx, SEQ_TO_SN(sc),
  2447. hdr->seq_ctrl);
  2448. return -1;
  2449. }
  2450. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  2451. i, idx, SEQ_TO_SN(sc));
  2452. sh = idx - start;
  2453. if (sh > 64) {
  2454. sh = (start - idx) + 0xff;
  2455. bitmap = bitmap << sh;
  2456. sh = 0;
  2457. start = idx;
  2458. } else if (sh < -64)
  2459. sh = 0xff - (start - idx);
  2460. else if (sh < 0) {
  2461. sh = start - idx;
  2462. start = idx;
  2463. bitmap = bitmap << sh;
  2464. sh = 0;
  2465. }
  2466. bitmap |= (1 << sh);
  2467. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  2468. start, (u32)(bitmap & 0xFFFFFFFF));
  2469. }
  2470. agg->bitmap = bitmap;
  2471. agg->start_idx = start;
  2472. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2473. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  2474. agg->frame_count, agg->start_idx,
  2475. (unsigned long long)agg->bitmap);
  2476. if (bitmap)
  2477. agg->wait_for_ba = 1;
  2478. }
  2479. return 0;
  2480. }
  2481. #endif
  2482. /**
  2483. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  2484. */
  2485. static void iwl4965_rx_reply_tx(struct iwl_priv *priv,
  2486. struct iwl4965_rx_mem_buffer *rxb)
  2487. {
  2488. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2489. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2490. int txq_id = SEQ_TO_QUEUE(sequence);
  2491. int index = SEQ_TO_INDEX(sequence);
  2492. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2493. struct ieee80211_tx_status *tx_status;
  2494. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  2495. u32 status = le32_to_cpu(tx_resp->status);
  2496. #ifdef CONFIG_IWL4965_HT
  2497. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  2498. struct ieee80211_hdr *hdr;
  2499. __le16 *qc;
  2500. #endif
  2501. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  2502. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  2503. "is out of range [0-%d] %d %d\n", txq_id,
  2504. index, txq->q.n_bd, txq->q.write_ptr,
  2505. txq->q.read_ptr);
  2506. return;
  2507. }
  2508. #ifdef CONFIG_IWL4965_HT
  2509. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  2510. qc = ieee80211_get_qos_ctrl(hdr);
  2511. if (qc)
  2512. tid = le16_to_cpu(*qc) & 0xf;
  2513. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  2514. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  2515. IWL_ERROR("Station not known\n");
  2516. return;
  2517. }
  2518. if (txq->sched_retry) {
  2519. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  2520. struct iwl4965_ht_agg *agg = NULL;
  2521. if (!qc)
  2522. return;
  2523. agg = &priv->stations[sta_id].tid[tid].agg;
  2524. iwl4965_tx_status_reply_tx(priv, agg,
  2525. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  2526. if ((tx_resp->frame_count == 1) &&
  2527. !iwl4965_is_tx_success(status)) {
  2528. /* TODO: send BAR */
  2529. }
  2530. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  2531. int freed;
  2532. index = iwl_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  2533. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  2534. "%d index %d\n", scd_ssn , index);
  2535. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2536. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2537. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2538. txq_id >= 0 && priv->mac80211_registered &&
  2539. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  2540. ieee80211_wake_queue(priv->hw, txq_id);
  2541. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2542. }
  2543. } else {
  2544. #endif /* CONFIG_IWL4965_HT */
  2545. tx_status = &(txq->txb[txq->q.read_ptr].status);
  2546. tx_status->retry_count = tx_resp->failure_frame;
  2547. tx_status->queue_number = status;
  2548. tx_status->queue_length = tx_resp->bt_kill_count;
  2549. tx_status->queue_length |= tx_resp->failure_rts;
  2550. tx_status->flags =
  2551. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  2552. iwl4965_hwrate_to_tx_control(priv, le32_to_cpu(tx_resp->rate_n_flags),
  2553. &tx_status->control);
  2554. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  2555. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  2556. status, le32_to_cpu(tx_resp->rate_n_flags),
  2557. tx_resp->failure_frame);
  2558. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  2559. if (index != -1) {
  2560. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2561. #ifdef CONFIG_IWL4965_HT
  2562. if (tid != MAX_TID_COUNT)
  2563. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  2564. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  2565. (txq_id >= 0) &&
  2566. priv->mac80211_registered)
  2567. ieee80211_wake_queue(priv->hw, txq_id);
  2568. if (tid != MAX_TID_COUNT)
  2569. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  2570. #endif
  2571. }
  2572. #ifdef CONFIG_IWL4965_HT
  2573. }
  2574. #endif /* CONFIG_IWL4965_HT */
  2575. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  2576. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  2577. }
  2578. static void iwl4965_rx_reply_alive(struct iwl_priv *priv,
  2579. struct iwl4965_rx_mem_buffer *rxb)
  2580. {
  2581. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2582. struct iwl4965_alive_resp *palive;
  2583. struct delayed_work *pwork;
  2584. palive = &pkt->u.alive_frame;
  2585. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  2586. "0x%01X 0x%01X\n",
  2587. palive->is_valid, palive->ver_type,
  2588. palive->ver_subtype);
  2589. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  2590. IWL_DEBUG_INFO("Initialization Alive received.\n");
  2591. memcpy(&priv->card_alive_init,
  2592. &pkt->u.alive_frame,
  2593. sizeof(struct iwl4965_init_alive_resp));
  2594. pwork = &priv->init_alive_start;
  2595. } else {
  2596. IWL_DEBUG_INFO("Runtime Alive received.\n");
  2597. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2598. sizeof(struct iwl4965_alive_resp));
  2599. pwork = &priv->alive_start;
  2600. }
  2601. /* We delay the ALIVE response by 5ms to
  2602. * give the HW RF Kill time to activate... */
  2603. if (palive->is_valid == UCODE_VALID_OK)
  2604. queue_delayed_work(priv->workqueue, pwork,
  2605. msecs_to_jiffies(5));
  2606. else
  2607. IWL_WARNING("uCode did not respond OK.\n");
  2608. }
  2609. static void iwl4965_rx_reply_add_sta(struct iwl_priv *priv,
  2610. struct iwl4965_rx_mem_buffer *rxb)
  2611. {
  2612. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2613. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2614. return;
  2615. }
  2616. static void iwl4965_rx_reply_error(struct iwl_priv *priv,
  2617. struct iwl4965_rx_mem_buffer *rxb)
  2618. {
  2619. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2620. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  2621. "seq 0x%04X ser 0x%08X\n",
  2622. le32_to_cpu(pkt->u.err_resp.error_type),
  2623. get_cmd_string(pkt->u.err_resp.cmd_id),
  2624. pkt->u.err_resp.cmd_id,
  2625. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2626. le32_to_cpu(pkt->u.err_resp.error_info));
  2627. }
  2628. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2629. static void iwl4965_rx_csa(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2630. {
  2631. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2632. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  2633. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  2634. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2635. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2636. rxon->channel = csa->channel;
  2637. priv->staging_rxon.channel = csa->channel;
  2638. }
  2639. static void iwl4965_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2640. struct iwl4965_rx_mem_buffer *rxb)
  2641. {
  2642. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2643. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2644. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2645. if (!report->state) {
  2646. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2647. "Spectrum Measure Notification: Start\n");
  2648. return;
  2649. }
  2650. memcpy(&priv->measure_report, report, sizeof(*report));
  2651. priv->measurement_status |= MEASUREMENT_READY;
  2652. #endif
  2653. }
  2654. static void iwl4965_rx_pm_sleep_notif(struct iwl_priv *priv,
  2655. struct iwl4965_rx_mem_buffer *rxb)
  2656. {
  2657. #ifdef CONFIG_IWLWIFI_DEBUG
  2658. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2659. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2660. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2661. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2662. #endif
  2663. }
  2664. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2665. struct iwl4965_rx_mem_buffer *rxb)
  2666. {
  2667. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2668. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2669. "notification for %s:\n",
  2670. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2671. iwl_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  2672. }
  2673. static void iwl4965_bg_beacon_update(struct work_struct *work)
  2674. {
  2675. struct iwl_priv *priv =
  2676. container_of(work, struct iwl_priv, beacon_update);
  2677. struct sk_buff *beacon;
  2678. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2679. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  2680. if (!beacon) {
  2681. IWL_ERROR("update beacon failed\n");
  2682. return;
  2683. }
  2684. mutex_lock(&priv->mutex);
  2685. /* new beacon skb is allocated every time; dispose previous.*/
  2686. if (priv->ibss_beacon)
  2687. dev_kfree_skb(priv->ibss_beacon);
  2688. priv->ibss_beacon = beacon;
  2689. mutex_unlock(&priv->mutex);
  2690. iwl4965_send_beacon_cmd(priv);
  2691. }
  2692. static void iwl4965_rx_beacon_notif(struct iwl_priv *priv,
  2693. struct iwl4965_rx_mem_buffer *rxb)
  2694. {
  2695. #ifdef CONFIG_IWLWIFI_DEBUG
  2696. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2697. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  2698. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  2699. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2700. "tsf %d %d rate %d\n",
  2701. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2702. beacon->beacon_notify_hdr.failure_frame,
  2703. le32_to_cpu(beacon->ibss_mgr_status),
  2704. le32_to_cpu(beacon->high_tsf),
  2705. le32_to_cpu(beacon->low_tsf), rate);
  2706. #endif
  2707. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  2708. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2709. queue_work(priv->workqueue, &priv->beacon_update);
  2710. }
  2711. /* Service response to REPLY_SCAN_CMD (0x80) */
  2712. static void iwl4965_rx_reply_scan(struct iwl_priv *priv,
  2713. struct iwl4965_rx_mem_buffer *rxb)
  2714. {
  2715. #ifdef CONFIG_IWLWIFI_DEBUG
  2716. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2717. struct iwl4965_scanreq_notification *notif =
  2718. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  2719. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2720. #endif
  2721. }
  2722. /* Service SCAN_START_NOTIFICATION (0x82) */
  2723. static void iwl4965_rx_scan_start_notif(struct iwl_priv *priv,
  2724. struct iwl4965_rx_mem_buffer *rxb)
  2725. {
  2726. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2727. struct iwl4965_scanstart_notification *notif =
  2728. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  2729. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2730. IWL_DEBUG_SCAN("Scan start: "
  2731. "%d [802.11%s] "
  2732. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2733. notif->channel,
  2734. notif->band ? "bg" : "a",
  2735. notif->tsf_high,
  2736. notif->tsf_low, notif->status, notif->beacon_timer);
  2737. }
  2738. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2739. static void iwl4965_rx_scan_results_notif(struct iwl_priv *priv,
  2740. struct iwl4965_rx_mem_buffer *rxb)
  2741. {
  2742. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2743. struct iwl4965_scanresults_notification *notif =
  2744. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  2745. IWL_DEBUG_SCAN("Scan ch.res: "
  2746. "%d [802.11%s] "
  2747. "(TSF: 0x%08X:%08X) - %d "
  2748. "elapsed=%lu usec (%dms since last)\n",
  2749. notif->channel,
  2750. notif->band ? "bg" : "a",
  2751. le32_to_cpu(notif->tsf_high),
  2752. le32_to_cpu(notif->tsf_low),
  2753. le32_to_cpu(notif->statistics[0]),
  2754. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2755. jiffies_to_msecs(elapsed_jiffies
  2756. (priv->last_scan_jiffies, jiffies)));
  2757. priv->last_scan_jiffies = jiffies;
  2758. priv->next_scan_jiffies = 0;
  2759. }
  2760. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2761. static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv,
  2762. struct iwl4965_rx_mem_buffer *rxb)
  2763. {
  2764. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2765. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2766. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2767. scan_notif->scanned_channels,
  2768. scan_notif->tsf_low,
  2769. scan_notif->tsf_high, scan_notif->status);
  2770. /* The HW is no longer scanning */
  2771. clear_bit(STATUS_SCAN_HW, &priv->status);
  2772. /* The scan completion notification came in, so kill that timer... */
  2773. cancel_delayed_work(&priv->scan_check);
  2774. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2775. (priv->scan_bands == 2) ? "2.4" : "5.2",
  2776. jiffies_to_msecs(elapsed_jiffies
  2777. (priv->scan_pass_start, jiffies)));
  2778. /* Remove this scanned band from the list
  2779. * of pending bands to scan */
  2780. priv->scan_bands--;
  2781. /* If a request to abort was given, or the scan did not succeed
  2782. * then we reset the scan state machine and terminate,
  2783. * re-queuing another scan if one has been requested */
  2784. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2785. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2786. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2787. } else {
  2788. /* If there are more bands on this scan pass reschedule */
  2789. if (priv->scan_bands > 0)
  2790. goto reschedule;
  2791. }
  2792. priv->last_scan_jiffies = jiffies;
  2793. priv->next_scan_jiffies = 0;
  2794. IWL_DEBUG_INFO("Setting scan to off\n");
  2795. clear_bit(STATUS_SCANNING, &priv->status);
  2796. IWL_DEBUG_INFO("Scan took %dms\n",
  2797. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2798. queue_work(priv->workqueue, &priv->scan_completed);
  2799. return;
  2800. reschedule:
  2801. priv->scan_pass_start = jiffies;
  2802. queue_work(priv->workqueue, &priv->request_scan);
  2803. }
  2804. /* Handle notification from uCode that card's power state is changing
  2805. * due to software, hardware, or critical temperature RFKILL */
  2806. static void iwl4965_rx_card_state_notif(struct iwl_priv *priv,
  2807. struct iwl4965_rx_mem_buffer *rxb)
  2808. {
  2809. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2810. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2811. unsigned long status = priv->status;
  2812. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2813. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2814. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2815. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  2816. RF_CARD_DISABLED)) {
  2817. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2818. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2819. if (!iwl_grab_nic_access(priv)) {
  2820. iwl_write_direct32(
  2821. priv, HBUS_TARG_MBX_C,
  2822. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2823. iwl_release_nic_access(priv);
  2824. }
  2825. if (!(flags & RXON_CARD_DISABLED)) {
  2826. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2827. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2828. if (!iwl_grab_nic_access(priv)) {
  2829. iwl_write_direct32(
  2830. priv, HBUS_TARG_MBX_C,
  2831. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  2832. iwl_release_nic_access(priv);
  2833. }
  2834. }
  2835. if (flags & RF_CARD_DISABLED) {
  2836. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2837. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  2838. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  2839. if (!iwl_grab_nic_access(priv))
  2840. iwl_release_nic_access(priv);
  2841. }
  2842. }
  2843. if (flags & HW_CARD_DISABLED)
  2844. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2845. else
  2846. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2847. if (flags & SW_CARD_DISABLED)
  2848. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2849. else
  2850. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2851. if (!(flags & RXON_CARD_DISABLED))
  2852. iwl4965_scan_cancel(priv);
  2853. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2854. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2855. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2856. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2857. queue_work(priv->workqueue, &priv->rf_kill);
  2858. else
  2859. wake_up_interruptible(&priv->wait_command_queue);
  2860. }
  2861. /**
  2862. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  2863. *
  2864. * Setup the RX handlers for each of the reply types sent from the uCode
  2865. * to the host.
  2866. *
  2867. * This function chains into the hardware specific files for them to setup
  2868. * any hardware specific handlers as well.
  2869. */
  2870. static void iwl4965_setup_rx_handlers(struct iwl_priv *priv)
  2871. {
  2872. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  2873. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  2874. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  2875. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  2876. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2877. iwl4965_rx_spectrum_measure_notif;
  2878. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  2879. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2880. iwl4965_rx_pm_debug_statistics_notif;
  2881. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  2882. /*
  2883. * The same handler is used for both the REPLY to a discrete
  2884. * statistics request from the host as well as for the periodic
  2885. * statistics notifications (after received beacons) from the uCode.
  2886. */
  2887. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  2888. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  2889. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  2890. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  2891. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2892. iwl4965_rx_scan_results_notif;
  2893. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2894. iwl4965_rx_scan_complete_notif;
  2895. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  2896. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  2897. /* Set up hardware specific Rx handlers */
  2898. iwl4965_hw_rx_handler_setup(priv);
  2899. }
  2900. /**
  2901. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2902. * @rxb: Rx buffer to reclaim
  2903. *
  2904. * If an Rx buffer has an async callback associated with it the callback
  2905. * will be executed. The attached skb (if present) will only be freed
  2906. * if the callback returns 1
  2907. */
  2908. static void iwl4965_tx_cmd_complete(struct iwl_priv *priv,
  2909. struct iwl4965_rx_mem_buffer *rxb)
  2910. {
  2911. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  2912. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2913. int txq_id = SEQ_TO_QUEUE(sequence);
  2914. int index = SEQ_TO_INDEX(sequence);
  2915. int huge = sequence & SEQ_HUGE_FRAME;
  2916. int cmd_index;
  2917. struct iwl_cmd *cmd;
  2918. /* If a Tx command is being handled and it isn't in the actual
  2919. * command queue then there a command routing bug has been introduced
  2920. * in the queue management code. */
  2921. if (txq_id != IWL_CMD_QUEUE_NUM)
  2922. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  2923. txq_id, pkt->hdr.cmd);
  2924. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  2925. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2926. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2927. /* Input error checking is done when commands are added to queue. */
  2928. if (cmd->meta.flags & CMD_WANT_SKB) {
  2929. cmd->meta.source->u.skb = rxb->skb;
  2930. rxb->skb = NULL;
  2931. } else if (cmd->meta.u.callback &&
  2932. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2933. rxb->skb = NULL;
  2934. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  2935. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2936. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2937. wake_up_interruptible(&priv->wait_command_queue);
  2938. }
  2939. }
  2940. /************************** RX-FUNCTIONS ****************************/
  2941. /*
  2942. * Rx theory of operation
  2943. *
  2944. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  2945. * each of which point to Receive Buffers to be filled by 4965. These get
  2946. * used not only for Rx frames, but for any command response or notification
  2947. * from the 4965. The driver and 4965 manage the Rx buffers by means
  2948. * of indexes into the circular buffer.
  2949. *
  2950. * Rx Queue Indexes
  2951. * The host/firmware share two index registers for managing the Rx buffers.
  2952. *
  2953. * The READ index maps to the first position that the firmware may be writing
  2954. * to -- the driver can read up to (but not including) this position and get
  2955. * good data.
  2956. * The READ index is managed by the firmware once the card is enabled.
  2957. *
  2958. * The WRITE index maps to the last position the driver has read from -- the
  2959. * position preceding WRITE is the last slot the firmware can place a packet.
  2960. *
  2961. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2962. * WRITE = READ.
  2963. *
  2964. * During initialization, the host sets up the READ queue position to the first
  2965. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2966. *
  2967. * When the firmware places a packet in a buffer, it will advance the READ index
  2968. * and fire the RX interrupt. The driver can then query the READ index and
  2969. * process as many packets as possible, moving the WRITE index forward as it
  2970. * resets the Rx queue buffers with new memory.
  2971. *
  2972. * The management in the driver is as follows:
  2973. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2974. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2975. * to replenish the iwl->rxq->rx_free.
  2976. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  2977. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2978. * 'processed' and 'read' driver indexes as well)
  2979. * + A received packet is processed and handed to the kernel network stack,
  2980. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2981. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2982. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2983. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2984. * were enough free buffers and RX_STALLED is set it is cleared.
  2985. *
  2986. *
  2987. * Driver sequence:
  2988. *
  2989. * iwl4965_rx_queue_alloc() Allocates rx_free
  2990. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2991. * iwl4965_rx_queue_restock
  2992. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  2993. * queue, updates firmware pointers, and updates
  2994. * the WRITE index. If insufficient rx_free buffers
  2995. * are available, schedules iwl4965_rx_replenish
  2996. *
  2997. * -- enable interrupts --
  2998. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  2999. * READ INDEX, detaching the SKB from the pool.
  3000. * Moves the packet buffer from queue to rx_used.
  3001. * Calls iwl4965_rx_queue_restock to refill any empty
  3002. * slots.
  3003. * ...
  3004. *
  3005. */
  3006. /**
  3007. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3008. */
  3009. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3010. {
  3011. int s = q->read - q->write;
  3012. if (s <= 0)
  3013. s += RX_QUEUE_SIZE;
  3014. /* keep some buffer to not confuse full and empty queue */
  3015. s -= 2;
  3016. if (s < 0)
  3017. s = 0;
  3018. return s;
  3019. }
  3020. /**
  3021. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3022. */
  3023. int iwl4965_rx_queue_update_write_ptr(struct iwl_priv *priv, struct iwl4965_rx_queue *q)
  3024. {
  3025. u32 reg = 0;
  3026. int rc = 0;
  3027. unsigned long flags;
  3028. spin_lock_irqsave(&q->lock, flags);
  3029. if (q->need_update == 0)
  3030. goto exit_unlock;
  3031. /* If power-saving is in use, make sure device is awake */
  3032. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3033. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3034. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3035. iwl_set_bit(priv, CSR_GP_CNTRL,
  3036. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3037. goto exit_unlock;
  3038. }
  3039. rc = iwl_grab_nic_access(priv);
  3040. if (rc)
  3041. goto exit_unlock;
  3042. /* Device expects a multiple of 8 */
  3043. iwl_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3044. q->write & ~0x7);
  3045. iwl_release_nic_access(priv);
  3046. /* Else device is assumed to be awake */
  3047. } else
  3048. /* Device expects a multiple of 8 */
  3049. iwl_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3050. q->need_update = 0;
  3051. exit_unlock:
  3052. spin_unlock_irqrestore(&q->lock, flags);
  3053. return rc;
  3054. }
  3055. /**
  3056. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3057. */
  3058. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl_priv *priv,
  3059. dma_addr_t dma_addr)
  3060. {
  3061. return cpu_to_le32((u32)(dma_addr >> 8));
  3062. }
  3063. /**
  3064. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3065. *
  3066. * If there are slots in the RX queue that need to be restocked,
  3067. * and we have free pre-allocated buffers, fill the ranks as much
  3068. * as we can, pulling from rx_free.
  3069. *
  3070. * This moves the 'write' index forward to catch up with 'processed', and
  3071. * also updates the memory address in the firmware to reference the new
  3072. * target buffer.
  3073. */
  3074. static int iwl4965_rx_queue_restock(struct iwl_priv *priv)
  3075. {
  3076. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3077. struct list_head *element;
  3078. struct iwl4965_rx_mem_buffer *rxb;
  3079. unsigned long flags;
  3080. int write, rc;
  3081. spin_lock_irqsave(&rxq->lock, flags);
  3082. write = rxq->write & ~0x7;
  3083. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3084. /* Get next free Rx buffer, remove from free list */
  3085. element = rxq->rx_free.next;
  3086. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3087. list_del(element);
  3088. /* Point to Rx buffer via next RBD in circular buffer */
  3089. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3090. rxq->queue[rxq->write] = rxb;
  3091. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3092. rxq->free_count--;
  3093. }
  3094. spin_unlock_irqrestore(&rxq->lock, flags);
  3095. /* If the pre-allocated buffer pool is dropping low, schedule to
  3096. * refill it */
  3097. if (rxq->free_count <= RX_LOW_WATERMARK)
  3098. queue_work(priv->workqueue, &priv->rx_replenish);
  3099. /* If we've added more space for the firmware to place data, tell it.
  3100. * Increment device's write pointer in multiples of 8. */
  3101. if ((write != (rxq->write & ~0x7))
  3102. || (abs(rxq->write - rxq->read) > 7)) {
  3103. spin_lock_irqsave(&rxq->lock, flags);
  3104. rxq->need_update = 1;
  3105. spin_unlock_irqrestore(&rxq->lock, flags);
  3106. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3107. if (rc)
  3108. return rc;
  3109. }
  3110. return 0;
  3111. }
  3112. /**
  3113. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3114. *
  3115. * When moving to rx_free an SKB is allocated for the slot.
  3116. *
  3117. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3118. * This is called as a scheduled work item (except for during initialization)
  3119. */
  3120. static void iwl4965_rx_allocate(struct iwl_priv *priv)
  3121. {
  3122. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3123. struct list_head *element;
  3124. struct iwl4965_rx_mem_buffer *rxb;
  3125. unsigned long flags;
  3126. spin_lock_irqsave(&rxq->lock, flags);
  3127. while (!list_empty(&rxq->rx_used)) {
  3128. element = rxq->rx_used.next;
  3129. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3130. /* Alloc a new receive buffer */
  3131. rxb->skb =
  3132. alloc_skb(priv->hw_setting.rx_buf_size,
  3133. __GFP_NOWARN | GFP_ATOMIC);
  3134. if (!rxb->skb) {
  3135. if (net_ratelimit())
  3136. printk(KERN_CRIT DRV_NAME
  3137. ": Can not allocate SKB buffers\n");
  3138. /* We don't reschedule replenish work here -- we will
  3139. * call the restock method and if it still needs
  3140. * more buffers it will schedule replenish */
  3141. break;
  3142. }
  3143. priv->alloc_rxb_skb++;
  3144. list_del(element);
  3145. /* Get physical address of RB/SKB */
  3146. rxb->dma_addr =
  3147. pci_map_single(priv->pci_dev, rxb->skb->data,
  3148. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3149. list_add_tail(&rxb->list, &rxq->rx_free);
  3150. rxq->free_count++;
  3151. }
  3152. spin_unlock_irqrestore(&rxq->lock, flags);
  3153. }
  3154. /*
  3155. * this should be called while priv->lock is locked
  3156. */
  3157. static void __iwl4965_rx_replenish(void *data)
  3158. {
  3159. struct iwl_priv *priv = data;
  3160. iwl4965_rx_allocate(priv);
  3161. iwl4965_rx_queue_restock(priv);
  3162. }
  3163. void iwl4965_rx_replenish(void *data)
  3164. {
  3165. struct iwl_priv *priv = data;
  3166. unsigned long flags;
  3167. iwl4965_rx_allocate(priv);
  3168. spin_lock_irqsave(&priv->lock, flags);
  3169. iwl4965_rx_queue_restock(priv);
  3170. spin_unlock_irqrestore(&priv->lock, flags);
  3171. }
  3172. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3173. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3174. * This free routine walks the list of POOL entries and if SKB is set to
  3175. * non NULL it is unmapped and freed
  3176. */
  3177. static void iwl4965_rx_queue_free(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3178. {
  3179. int i;
  3180. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3181. if (rxq->pool[i].skb != NULL) {
  3182. pci_unmap_single(priv->pci_dev,
  3183. rxq->pool[i].dma_addr,
  3184. priv->hw_setting.rx_buf_size,
  3185. PCI_DMA_FROMDEVICE);
  3186. dev_kfree_skb(rxq->pool[i].skb);
  3187. }
  3188. }
  3189. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3190. rxq->dma_addr);
  3191. rxq->bd = NULL;
  3192. }
  3193. int iwl4965_rx_queue_alloc(struct iwl_priv *priv)
  3194. {
  3195. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3196. struct pci_dev *dev = priv->pci_dev;
  3197. int i;
  3198. spin_lock_init(&rxq->lock);
  3199. INIT_LIST_HEAD(&rxq->rx_free);
  3200. INIT_LIST_HEAD(&rxq->rx_used);
  3201. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3202. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3203. if (!rxq->bd)
  3204. return -ENOMEM;
  3205. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3206. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3207. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3208. /* Set us so that we have processed and used all buffers, but have
  3209. * not restocked the Rx queue with fresh buffers */
  3210. rxq->read = rxq->write = 0;
  3211. rxq->free_count = 0;
  3212. rxq->need_update = 0;
  3213. return 0;
  3214. }
  3215. void iwl4965_rx_queue_reset(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  3216. {
  3217. unsigned long flags;
  3218. int i;
  3219. spin_lock_irqsave(&rxq->lock, flags);
  3220. INIT_LIST_HEAD(&rxq->rx_free);
  3221. INIT_LIST_HEAD(&rxq->rx_used);
  3222. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3223. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3224. /* In the reset function, these buffers may have been allocated
  3225. * to an SKB, so we need to unmap and free potential storage */
  3226. if (rxq->pool[i].skb != NULL) {
  3227. pci_unmap_single(priv->pci_dev,
  3228. rxq->pool[i].dma_addr,
  3229. priv->hw_setting.rx_buf_size,
  3230. PCI_DMA_FROMDEVICE);
  3231. priv->alloc_rxb_skb--;
  3232. dev_kfree_skb(rxq->pool[i].skb);
  3233. rxq->pool[i].skb = NULL;
  3234. }
  3235. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3236. }
  3237. /* Set us so that we have processed and used all buffers, but have
  3238. * not restocked the Rx queue with fresh buffers */
  3239. rxq->read = rxq->write = 0;
  3240. rxq->free_count = 0;
  3241. spin_unlock_irqrestore(&rxq->lock, flags);
  3242. }
  3243. /* Convert linear signal-to-noise ratio into dB */
  3244. static u8 ratio2dB[100] = {
  3245. /* 0 1 2 3 4 5 6 7 8 9 */
  3246. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3247. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3248. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3249. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3250. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3251. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3252. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3253. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3254. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3255. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3256. };
  3257. /* Calculates a relative dB value from a ratio of linear
  3258. * (i.e. not dB) signal levels.
  3259. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3260. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3261. {
  3262. /* 1000:1 or higher just report as 60 dB */
  3263. if (sig_ratio >= 1000)
  3264. return 60;
  3265. /* 100:1 or higher, divide by 10 and use table,
  3266. * add 20 dB to make up for divide by 10 */
  3267. if (sig_ratio >= 100)
  3268. return (20 + (int)ratio2dB[sig_ratio/10]);
  3269. /* We shouldn't see this */
  3270. if (sig_ratio < 1)
  3271. return 0;
  3272. /* Use table for ratios 1:1 - 99:1 */
  3273. return (int)ratio2dB[sig_ratio];
  3274. }
  3275. #define PERFECT_RSSI (-20) /* dBm */
  3276. #define WORST_RSSI (-95) /* dBm */
  3277. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3278. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3279. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3280. * about formulas used below. */
  3281. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3282. {
  3283. int sig_qual;
  3284. int degradation = PERFECT_RSSI - rssi_dbm;
  3285. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3286. * as indicator; formula is (signal dbm - noise dbm).
  3287. * SNR at or above 40 is a great signal (100%).
  3288. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3289. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3290. if (noise_dbm) {
  3291. if (rssi_dbm - noise_dbm >= 40)
  3292. return 100;
  3293. else if (rssi_dbm < noise_dbm)
  3294. return 0;
  3295. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3296. /* Else use just the signal level.
  3297. * This formula is a least squares fit of data points collected and
  3298. * compared with a reference system that had a percentage (%) display
  3299. * for signal quality. */
  3300. } else
  3301. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3302. (15 * RSSI_RANGE + 62 * degradation)) /
  3303. (RSSI_RANGE * RSSI_RANGE);
  3304. if (sig_qual > 100)
  3305. sig_qual = 100;
  3306. else if (sig_qual < 1)
  3307. sig_qual = 0;
  3308. return sig_qual;
  3309. }
  3310. /**
  3311. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3312. *
  3313. * Uses the priv->rx_handlers callback function array to invoke
  3314. * the appropriate handlers, including command responses,
  3315. * frame-received notifications, and other notifications.
  3316. */
  3317. static void iwl4965_rx_handle(struct iwl_priv *priv)
  3318. {
  3319. struct iwl4965_rx_mem_buffer *rxb;
  3320. struct iwl4965_rx_packet *pkt;
  3321. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3322. u32 r, i;
  3323. int reclaim;
  3324. unsigned long flags;
  3325. u8 fill_rx = 0;
  3326. u32 count = 8;
  3327. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3328. * buffer that the driver may process (last buffer filled by ucode). */
  3329. r = iwl4965_hw_get_rx_read(priv);
  3330. i = rxq->read;
  3331. /* Rx interrupt, but nothing sent from uCode */
  3332. if (i == r)
  3333. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3334. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3335. fill_rx = 1;
  3336. while (i != r) {
  3337. rxb = rxq->queue[i];
  3338. /* If an RXB doesn't have a Rx queue slot associated with it,
  3339. * then a bug has been introduced in the queue refilling
  3340. * routines -- catch it here */
  3341. BUG_ON(rxb == NULL);
  3342. rxq->queue[i] = NULL;
  3343. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3344. priv->hw_setting.rx_buf_size,
  3345. PCI_DMA_FROMDEVICE);
  3346. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3347. /* Reclaim a command buffer only if this packet is a response
  3348. * to a (driver-originated) command.
  3349. * If the packet (e.g. Rx frame) originated from uCode,
  3350. * there is no command buffer to reclaim.
  3351. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3352. * but apparently a few don't get set; catch them here. */
  3353. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3354. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3355. (pkt->hdr.cmd != REPLY_RX) &&
  3356. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3357. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3358. (pkt->hdr.cmd != REPLY_TX);
  3359. /* Based on type of command response or notification,
  3360. * handle those that need handling via function in
  3361. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3362. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3363. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3364. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3365. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3366. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3367. } else {
  3368. /* No handling needed */
  3369. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3370. "r %d i %d No handler needed for %s, 0x%02x\n",
  3371. r, i, get_cmd_string(pkt->hdr.cmd),
  3372. pkt->hdr.cmd);
  3373. }
  3374. if (reclaim) {
  3375. /* Invoke any callbacks, transfer the skb to caller, and
  3376. * fire off the (possibly) blocking iwl_send_cmd()
  3377. * as we reclaim the driver command queue */
  3378. if (rxb && rxb->skb)
  3379. iwl4965_tx_cmd_complete(priv, rxb);
  3380. else
  3381. IWL_WARNING("Claim null rxb?\n");
  3382. }
  3383. /* For now we just don't re-use anything. We can tweak this
  3384. * later to try and re-use notification packets and SKBs that
  3385. * fail to Rx correctly */
  3386. if (rxb->skb != NULL) {
  3387. priv->alloc_rxb_skb--;
  3388. dev_kfree_skb_any(rxb->skb);
  3389. rxb->skb = NULL;
  3390. }
  3391. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3392. priv->hw_setting.rx_buf_size,
  3393. PCI_DMA_FROMDEVICE);
  3394. spin_lock_irqsave(&rxq->lock, flags);
  3395. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3396. spin_unlock_irqrestore(&rxq->lock, flags);
  3397. i = (i + 1) & RX_QUEUE_MASK;
  3398. /* If there are a lot of unused frames,
  3399. * restock the Rx queue so ucode wont assert. */
  3400. if (fill_rx) {
  3401. count++;
  3402. if (count >= 8) {
  3403. priv->rxq.read = i;
  3404. __iwl4965_rx_replenish(priv);
  3405. count = 0;
  3406. }
  3407. }
  3408. }
  3409. /* Backtrack one entry */
  3410. priv->rxq.read = i;
  3411. iwl4965_rx_queue_restock(priv);
  3412. }
  3413. /**
  3414. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  3415. */
  3416. static int iwl4965_tx_queue_update_write_ptr(struct iwl_priv *priv,
  3417. struct iwl4965_tx_queue *txq)
  3418. {
  3419. u32 reg = 0;
  3420. int rc = 0;
  3421. int txq_id = txq->q.id;
  3422. if (txq->need_update == 0)
  3423. return rc;
  3424. /* if we're trying to save power */
  3425. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3426. /* wake up nic if it's powered down ...
  3427. * uCode will wake up, and interrupt us again, so next
  3428. * time we'll skip this part. */
  3429. reg = iwl_read32(priv, CSR_UCODE_DRV_GP1);
  3430. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3431. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  3432. iwl_set_bit(priv, CSR_GP_CNTRL,
  3433. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3434. return rc;
  3435. }
  3436. /* restore this queue's parameters in nic hardware. */
  3437. rc = iwl_grab_nic_access(priv);
  3438. if (rc)
  3439. return rc;
  3440. iwl_write_direct32(priv, HBUS_TARG_WRPTR,
  3441. txq->q.write_ptr | (txq_id << 8));
  3442. iwl_release_nic_access(priv);
  3443. /* else not in power-save mode, uCode will never sleep when we're
  3444. * trying to tx (during RFKILL, we're not trying to tx). */
  3445. } else
  3446. iwl_write32(priv, HBUS_TARG_WRPTR,
  3447. txq->q.write_ptr | (txq_id << 8));
  3448. txq->need_update = 0;
  3449. return rc;
  3450. }
  3451. #ifdef CONFIG_IWLWIFI_DEBUG
  3452. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  3453. {
  3454. DECLARE_MAC_BUF(mac);
  3455. IWL_DEBUG_RADIO("RX CONFIG:\n");
  3456. iwl_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3457. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3458. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3459. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  3460. le32_to_cpu(rxon->filter_flags));
  3461. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3462. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  3463. rxon->ofdm_basic_rates);
  3464. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3465. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  3466. print_mac(mac, rxon->node_addr));
  3467. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  3468. print_mac(mac, rxon->bssid_addr));
  3469. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3470. }
  3471. #endif
  3472. static void iwl4965_enable_interrupts(struct iwl_priv *priv)
  3473. {
  3474. IWL_DEBUG_ISR("Enabling interrupts\n");
  3475. set_bit(STATUS_INT_ENABLED, &priv->status);
  3476. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  3477. }
  3478. /* call this function to flush any scheduled tasklet */
  3479. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  3480. {
  3481. /* wait to make sure we flush pedding tasklet*/
  3482. synchronize_irq(priv->pci_dev->irq);
  3483. tasklet_kill(&priv->irq_tasklet);
  3484. }
  3485. static inline void iwl4965_disable_interrupts(struct iwl_priv *priv)
  3486. {
  3487. clear_bit(STATUS_INT_ENABLED, &priv->status);
  3488. /* disable interrupts from uCode/NIC to host */
  3489. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3490. /* acknowledge/clear/reset any interrupts still pending
  3491. * from uCode or flow handler (Rx/Tx DMA) */
  3492. iwl_write32(priv, CSR_INT, 0xffffffff);
  3493. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  3494. IWL_DEBUG_ISR("Disabled interrupts\n");
  3495. }
  3496. static const char *desc_lookup(int i)
  3497. {
  3498. switch (i) {
  3499. case 1:
  3500. return "FAIL";
  3501. case 2:
  3502. return "BAD_PARAM";
  3503. case 3:
  3504. return "BAD_CHECKSUM";
  3505. case 4:
  3506. return "NMI_INTERRUPT";
  3507. case 5:
  3508. return "SYSASSERT";
  3509. case 6:
  3510. return "FATAL_ERROR";
  3511. }
  3512. return "UNKNOWN";
  3513. }
  3514. #define ERROR_START_OFFSET (1 * sizeof(u32))
  3515. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  3516. static void iwl4965_dump_nic_error_log(struct iwl_priv *priv)
  3517. {
  3518. u32 data2, line;
  3519. u32 desc, time, count, base, data1;
  3520. u32 blink1, blink2, ilink1, ilink2;
  3521. int rc;
  3522. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  3523. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  3524. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  3525. return;
  3526. }
  3527. rc = iwl_grab_nic_access(priv);
  3528. if (rc) {
  3529. IWL_WARNING("Can not read from adapter at this time.\n");
  3530. return;
  3531. }
  3532. count = iwl_read_targ_mem(priv, base);
  3533. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  3534. IWL_ERROR("Start IWL Error Log Dump:\n");
  3535. IWL_ERROR("Status: 0x%08lX, count: %d\n", priv->status, count);
  3536. }
  3537. desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32));
  3538. blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32));
  3539. blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32));
  3540. ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32));
  3541. ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32));
  3542. data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32));
  3543. data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32));
  3544. line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32));
  3545. time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32));
  3546. IWL_ERROR("Desc Time "
  3547. "data1 data2 line\n");
  3548. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  3549. desc_lookup(desc), desc, time, data1, data2, line);
  3550. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  3551. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  3552. ilink1, ilink2);
  3553. iwl_release_nic_access(priv);
  3554. }
  3555. #define EVENT_START_OFFSET (4 * sizeof(u32))
  3556. /**
  3557. * iwl4965_print_event_log - Dump error event log to syslog
  3558. *
  3559. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  3560. */
  3561. static void iwl4965_print_event_log(struct iwl_priv *priv, u32 start_idx,
  3562. u32 num_events, u32 mode)
  3563. {
  3564. u32 i;
  3565. u32 base; /* SRAM byte address of event log header */
  3566. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  3567. u32 ptr; /* SRAM byte address of log data */
  3568. u32 ev, time, data; /* event log data */
  3569. if (num_events == 0)
  3570. return;
  3571. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3572. if (mode == 0)
  3573. event_size = 2 * sizeof(u32);
  3574. else
  3575. event_size = 3 * sizeof(u32);
  3576. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  3577. /* "time" is actually "data" for mode 0 (no timestamp).
  3578. * place event id # at far right for easier visual parsing. */
  3579. for (i = 0; i < num_events; i++) {
  3580. ev = iwl_read_targ_mem(priv, ptr);
  3581. ptr += sizeof(u32);
  3582. time = iwl_read_targ_mem(priv, ptr);
  3583. ptr += sizeof(u32);
  3584. if (mode == 0)
  3585. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  3586. else {
  3587. data = iwl_read_targ_mem(priv, ptr);
  3588. ptr += sizeof(u32);
  3589. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  3590. }
  3591. }
  3592. }
  3593. static void iwl4965_dump_nic_event_log(struct iwl_priv *priv)
  3594. {
  3595. int rc;
  3596. u32 base; /* SRAM byte address of event log header */
  3597. u32 capacity; /* event log capacity in # entries */
  3598. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  3599. u32 num_wraps; /* # times uCode wrapped to top of log */
  3600. u32 next_entry; /* index of next entry to be written by uCode */
  3601. u32 size; /* # entries that we'll print */
  3602. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  3603. if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
  3604. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  3605. return;
  3606. }
  3607. rc = iwl_grab_nic_access(priv);
  3608. if (rc) {
  3609. IWL_WARNING("Can not read from adapter at this time.\n");
  3610. return;
  3611. }
  3612. /* event log header */
  3613. capacity = iwl_read_targ_mem(priv, base);
  3614. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  3615. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  3616. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  3617. size = num_wraps ? capacity : next_entry;
  3618. /* bail out if nothing in log */
  3619. if (size == 0) {
  3620. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  3621. iwl_release_nic_access(priv);
  3622. return;
  3623. }
  3624. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  3625. size, num_wraps);
  3626. /* if uCode has wrapped back to top of log, start at the oldest entry,
  3627. * i.e the next one that uCode would fill. */
  3628. if (num_wraps)
  3629. iwl4965_print_event_log(priv, next_entry,
  3630. capacity - next_entry, mode);
  3631. /* (then/else) start at top of log */
  3632. iwl4965_print_event_log(priv, 0, next_entry, mode);
  3633. iwl_release_nic_access(priv);
  3634. }
  3635. /**
  3636. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  3637. */
  3638. static void iwl4965_irq_handle_error(struct iwl_priv *priv)
  3639. {
  3640. /* Set the FW error flag -- cleared on iwl4965_down */
  3641. set_bit(STATUS_FW_ERROR, &priv->status);
  3642. /* Cancel currently queued command. */
  3643. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3644. #ifdef CONFIG_IWLWIFI_DEBUG
  3645. if (iwl_debug_level & IWL_DL_FW_ERRORS) {
  3646. iwl4965_dump_nic_error_log(priv);
  3647. iwl4965_dump_nic_event_log(priv);
  3648. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  3649. }
  3650. #endif
  3651. wake_up_interruptible(&priv->wait_command_queue);
  3652. /* Keep the restart process from trying to send host
  3653. * commands by clearing the INIT status bit */
  3654. clear_bit(STATUS_READY, &priv->status);
  3655. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  3656. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  3657. "Restarting adapter due to uCode error.\n");
  3658. if (iwl_is_associated(priv)) {
  3659. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  3660. sizeof(priv->recovery_rxon));
  3661. priv->error_recovering = 1;
  3662. }
  3663. queue_work(priv->workqueue, &priv->restart);
  3664. }
  3665. }
  3666. static void iwl4965_error_recovery(struct iwl_priv *priv)
  3667. {
  3668. unsigned long flags;
  3669. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  3670. sizeof(priv->staging_rxon));
  3671. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  3672. iwl4965_commit_rxon(priv);
  3673. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  3674. spin_lock_irqsave(&priv->lock, flags);
  3675. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  3676. priv->error_recovering = 0;
  3677. spin_unlock_irqrestore(&priv->lock, flags);
  3678. }
  3679. static void iwl4965_irq_tasklet(struct iwl_priv *priv)
  3680. {
  3681. u32 inta, handled = 0;
  3682. u32 inta_fh;
  3683. unsigned long flags;
  3684. #ifdef CONFIG_IWLWIFI_DEBUG
  3685. u32 inta_mask;
  3686. #endif
  3687. spin_lock_irqsave(&priv->lock, flags);
  3688. /* Ack/clear/reset pending uCode interrupts.
  3689. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  3690. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  3691. inta = iwl_read32(priv, CSR_INT);
  3692. iwl_write32(priv, CSR_INT, inta);
  3693. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  3694. * Any new interrupts that happen after this, either while we're
  3695. * in this tasklet, or later, will show up in next ISR/tasklet. */
  3696. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3697. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  3698. #ifdef CONFIG_IWLWIFI_DEBUG
  3699. if (iwl_debug_level & IWL_DL_ISR) {
  3700. /* just for debug */
  3701. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3702. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3703. inta, inta_mask, inta_fh);
  3704. }
  3705. #endif
  3706. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  3707. * atomic, make sure that inta covers all the interrupts that
  3708. * we've discovered, even if FH interrupt came in just after
  3709. * reading CSR_INT. */
  3710. if (inta_fh & CSR49_FH_INT_RX_MASK)
  3711. inta |= CSR_INT_BIT_FH_RX;
  3712. if (inta_fh & CSR49_FH_INT_TX_MASK)
  3713. inta |= CSR_INT_BIT_FH_TX;
  3714. /* Now service all interrupt bits discovered above. */
  3715. if (inta & CSR_INT_BIT_HW_ERR) {
  3716. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  3717. /* Tell the device to stop sending interrupts */
  3718. iwl4965_disable_interrupts(priv);
  3719. iwl4965_irq_handle_error(priv);
  3720. handled |= CSR_INT_BIT_HW_ERR;
  3721. spin_unlock_irqrestore(&priv->lock, flags);
  3722. return;
  3723. }
  3724. #ifdef CONFIG_IWLWIFI_DEBUG
  3725. if (iwl_debug_level & (IWL_DL_ISR)) {
  3726. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  3727. if (inta & CSR_INT_BIT_SCD)
  3728. IWL_DEBUG_ISR("Scheduler finished to transmit "
  3729. "the frame/frames.\n");
  3730. /* Alive notification via Rx interrupt will do the real work */
  3731. if (inta & CSR_INT_BIT_ALIVE)
  3732. IWL_DEBUG_ISR("Alive interrupt\n");
  3733. }
  3734. #endif
  3735. /* Safely ignore these bits for debug checks below */
  3736. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3737. /* HW RF KILL switch toggled */
  3738. if (inta & CSR_INT_BIT_RF_KILL) {
  3739. int hw_rf_kill = 0;
  3740. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  3741. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  3742. hw_rf_kill = 1;
  3743. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  3744. "RF_KILL bit toggled to %s.\n",
  3745. hw_rf_kill ? "disable radio":"enable radio");
  3746. /* Queue restart only if RF_KILL switch was set to "kill"
  3747. * when we loaded driver, and is now set to "enable".
  3748. * After we're Alive, RF_KILL gets handled by
  3749. * iwl4965_rx_card_state_notif() */
  3750. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  3751. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3752. queue_work(priv->workqueue, &priv->restart);
  3753. }
  3754. handled |= CSR_INT_BIT_RF_KILL;
  3755. }
  3756. /* Chip got too hot and stopped itself */
  3757. if (inta & CSR_INT_BIT_CT_KILL) {
  3758. IWL_ERROR("Microcode CT kill error detected.\n");
  3759. handled |= CSR_INT_BIT_CT_KILL;
  3760. }
  3761. /* Error detected by uCode */
  3762. if (inta & CSR_INT_BIT_SW_ERR) {
  3763. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  3764. inta);
  3765. iwl4965_irq_handle_error(priv);
  3766. handled |= CSR_INT_BIT_SW_ERR;
  3767. }
  3768. /* uCode wakes up after power-down sleep */
  3769. if (inta & CSR_INT_BIT_WAKEUP) {
  3770. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3771. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  3772. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  3773. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  3774. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  3775. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  3776. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  3777. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  3778. handled |= CSR_INT_BIT_WAKEUP;
  3779. }
  3780. /* All uCode command responses, including Tx command responses,
  3781. * Rx "responses" (frame-received notification), and other
  3782. * notifications from uCode come through here*/
  3783. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3784. iwl4965_rx_handle(priv);
  3785. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3786. }
  3787. if (inta & CSR_INT_BIT_FH_TX) {
  3788. IWL_DEBUG_ISR("Tx interrupt\n");
  3789. handled |= CSR_INT_BIT_FH_TX;
  3790. }
  3791. if (inta & ~handled)
  3792. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3793. if (inta & ~CSR_INI_SET_MASK) {
  3794. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  3795. inta & ~CSR_INI_SET_MASK);
  3796. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  3797. }
  3798. /* Re-enable all interrupts */
  3799. /* only Re-enable if diabled by irq */
  3800. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3801. iwl4965_enable_interrupts(priv);
  3802. #ifdef CONFIG_IWLWIFI_DEBUG
  3803. if (iwl_debug_level & (IWL_DL_ISR)) {
  3804. inta = iwl_read32(priv, CSR_INT);
  3805. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3806. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3807. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3808. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3809. }
  3810. #endif
  3811. spin_unlock_irqrestore(&priv->lock, flags);
  3812. }
  3813. static irqreturn_t iwl4965_isr(int irq, void *data)
  3814. {
  3815. struct iwl_priv *priv = data;
  3816. u32 inta, inta_mask;
  3817. u32 inta_fh;
  3818. if (!priv)
  3819. return IRQ_NONE;
  3820. spin_lock(&priv->lock);
  3821. /* Disable (but don't clear!) interrupts here to avoid
  3822. * back-to-back ISRs and sporadic interrupts from our NIC.
  3823. * If we have something to service, the tasklet will re-enable ints.
  3824. * If we *don't* have something, we'll re-enable before leaving here. */
  3825. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3826. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3827. /* Discover which interrupts are active/pending */
  3828. inta = iwl_read32(priv, CSR_INT);
  3829. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3830. /* Ignore interrupt if there's nothing in NIC to service.
  3831. * This may be due to IRQ shared with another device,
  3832. * or due to sporadic interrupts thrown from our NIC. */
  3833. if (!inta && !inta_fh) {
  3834. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3835. goto none;
  3836. }
  3837. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3838. /* Hardware disappeared. It might have already raised
  3839. * an interrupt */
  3840. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  3841. goto unplugged;
  3842. }
  3843. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3844. inta, inta_mask, inta_fh);
  3845. inta &= ~CSR_INT_BIT_SCD;
  3846. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  3847. if (likely(inta || inta_fh))
  3848. tasklet_schedule(&priv->irq_tasklet);
  3849. unplugged:
  3850. spin_unlock(&priv->lock);
  3851. return IRQ_HANDLED;
  3852. none:
  3853. /* re-enable interrupts here since we don't have anything to service. */
  3854. /* only Re-enable if diabled by irq */
  3855. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3856. iwl4965_enable_interrupts(priv);
  3857. spin_unlock(&priv->lock);
  3858. return IRQ_NONE;
  3859. }
  3860. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3861. * sending probe req. This should be set long enough to hear probe responses
  3862. * from more than one AP. */
  3863. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  3864. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  3865. /* For faster active scanning, scan will move to the next channel if fewer than
  3866. * PLCP_QUIET_THRESH packets are heard on this channel within
  3867. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3868. * time if it's a quiet channel (nothing responded to our probe, and there's
  3869. * no other traffic).
  3870. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3871. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3872. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  3873. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3874. * Must be set longer than active dwell time.
  3875. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3876. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3877. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3878. #define IWL_PASSIVE_DWELL_BASE (100)
  3879. #define IWL_CHANNEL_TUNE_TIME 5
  3880. static inline u16 iwl4965_get_active_dwell_time(struct iwl_priv *priv,
  3881. enum ieee80211_band band)
  3882. {
  3883. if (band == IEEE80211_BAND_5GHZ)
  3884. return IWL_ACTIVE_DWELL_TIME_52;
  3885. else
  3886. return IWL_ACTIVE_DWELL_TIME_24;
  3887. }
  3888. static u16 iwl4965_get_passive_dwell_time(struct iwl_priv *priv,
  3889. enum ieee80211_band band)
  3890. {
  3891. u16 active = iwl4965_get_active_dwell_time(priv, band);
  3892. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  3893. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3894. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3895. if (iwl_is_associated(priv)) {
  3896. /* If we're associated, we clamp the maximum passive
  3897. * dwell time to be 98% of the beacon interval (minus
  3898. * 2 * channel tune time) */
  3899. passive = priv->beacon_int;
  3900. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3901. passive = IWL_PASSIVE_DWELL_BASE;
  3902. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3903. }
  3904. if (passive <= active)
  3905. passive = active + 1;
  3906. return passive;
  3907. }
  3908. static int iwl4965_get_channels_for_scan(struct iwl_priv *priv,
  3909. enum ieee80211_band band,
  3910. u8 is_active, u8 direct_mask,
  3911. struct iwl4965_scan_channel *scan_ch)
  3912. {
  3913. const struct ieee80211_channel *channels = NULL;
  3914. const struct ieee80211_supported_band *sband;
  3915. const struct iwl_channel_info *ch_info;
  3916. u16 passive_dwell = 0;
  3917. u16 active_dwell = 0;
  3918. int added, i;
  3919. sband = iwl4965_get_hw_mode(priv, band);
  3920. if (!sband)
  3921. return 0;
  3922. channels = sband->channels;
  3923. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  3924. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  3925. for (i = 0, added = 0; i < sband->n_channels; i++) {
  3926. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  3927. continue;
  3928. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  3929. le16_to_cpu(priv->active_rxon.channel)) {
  3930. if (iwl_is_associated(priv)) {
  3931. IWL_DEBUG_SCAN
  3932. ("Skipping current channel %d\n",
  3933. le16_to_cpu(priv->active_rxon.channel));
  3934. continue;
  3935. }
  3936. } else if (priv->only_active_channel)
  3937. continue;
  3938. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  3939. ch_info = iwl_get_channel_info(priv, band,
  3940. scan_ch->channel);
  3941. if (!is_channel_valid(ch_info)) {
  3942. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  3943. scan_ch->channel);
  3944. continue;
  3945. }
  3946. if (!is_active || is_channel_passive(ch_info) ||
  3947. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  3948. scan_ch->type = 0; /* passive */
  3949. else
  3950. scan_ch->type = 1; /* active */
  3951. if (scan_ch->type & 1)
  3952. scan_ch->type |= (direct_mask << 1);
  3953. if (is_channel_narrow(ch_info))
  3954. scan_ch->type |= (1 << 7);
  3955. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  3956. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  3957. /* Set txpower levels to defaults */
  3958. scan_ch->tpc.dsp_atten = 110;
  3959. /* scan_pwr_info->tpc.dsp_atten; */
  3960. /*scan_pwr_info->tpc.tx_gain; */
  3961. if (band == IEEE80211_BAND_5GHZ)
  3962. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  3963. else {
  3964. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  3965. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  3966. * power level:
  3967. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  3968. */
  3969. }
  3970. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  3971. scan_ch->channel,
  3972. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  3973. (scan_ch->type & 1) ?
  3974. active_dwell : passive_dwell);
  3975. scan_ch++;
  3976. added++;
  3977. }
  3978. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  3979. return added;
  3980. }
  3981. static void iwl4965_init_hw_rates(struct iwl_priv *priv,
  3982. struct ieee80211_rate *rates)
  3983. {
  3984. int i;
  3985. for (i = 0; i < IWL_RATE_COUNT; i++) {
  3986. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  3987. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  3988. rates[i].hw_value_short = i;
  3989. rates[i].flags = 0;
  3990. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  3991. /*
  3992. * If CCK != 1M then set short preamble rate flag.
  3993. */
  3994. rates[i].flags |=
  3995. (iwl4965_rates[i].plcp == IWL_RATE_1M_PLCP) ?
  3996. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  3997. }
  3998. }
  3999. }
  4000. /**
  4001. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4002. */
  4003. int iwl4965_init_geos(struct iwl_priv *priv)
  4004. {
  4005. struct iwl_channel_info *ch;
  4006. struct ieee80211_supported_band *sband;
  4007. struct ieee80211_channel *channels;
  4008. struct ieee80211_channel *geo_ch;
  4009. struct ieee80211_rate *rates;
  4010. int i = 0;
  4011. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4012. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4013. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4014. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4015. return 0;
  4016. }
  4017. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4018. priv->channel_count, GFP_KERNEL);
  4019. if (!channels)
  4020. return -ENOMEM;
  4021. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  4022. GFP_KERNEL);
  4023. if (!rates) {
  4024. kfree(channels);
  4025. return -ENOMEM;
  4026. }
  4027. /* 5.2GHz channels start after the 2.4GHz channels */
  4028. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4029. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  4030. /* just OFDM */
  4031. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  4032. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  4033. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_5GHZ);
  4034. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4035. sband->channels = channels;
  4036. /* OFDM & CCK */
  4037. sband->bitrates = rates;
  4038. sband->n_bitrates = IWL_RATE_COUNT;
  4039. iwl4965_init_ht_hw_capab(priv, &sband->ht_info, IEEE80211_BAND_2GHZ);
  4040. priv->ieee_channels = channels;
  4041. priv->ieee_rates = rates;
  4042. iwl4965_init_hw_rates(priv, rates);
  4043. for (i = 0; i < priv->channel_count; i++) {
  4044. ch = &priv->channel_info[i];
  4045. /* FIXME: might be removed if scan is OK */
  4046. if (!is_channel_valid(ch))
  4047. continue;
  4048. if (is_channel_a_band(ch))
  4049. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  4050. else
  4051. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  4052. geo_ch = &sband->channels[sband->n_channels++];
  4053. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  4054. geo_ch->max_power = ch->max_power_avg;
  4055. geo_ch->max_antenna_gain = 0xff;
  4056. geo_ch->hw_value = ch->channel;
  4057. if (is_channel_valid(ch)) {
  4058. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4059. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4060. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4061. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4062. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4063. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4064. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4065. priv->max_channel_txpower_limit =
  4066. ch->max_power_avg;
  4067. } else {
  4068. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4069. }
  4070. /* Save flags for reg domain usage */
  4071. geo_ch->orig_flags = geo_ch->flags;
  4072. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  4073. ch->channel, geo_ch->center_freq,
  4074. is_channel_a_band(ch) ? "5.2" : "2.4",
  4075. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  4076. "restricted" : "valid",
  4077. geo_ch->flags);
  4078. }
  4079. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  4080. priv->cfg->sku & IWL_SKU_A) {
  4081. printk(KERN_INFO DRV_NAME
  4082. ": Incorrectly detected BG card as ABG. Please send "
  4083. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4084. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4085. priv->cfg->sku &= ~IWL_SKU_A;
  4086. }
  4087. printk(KERN_INFO DRV_NAME
  4088. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4089. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4090. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4091. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  4092. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  4093. &priv->bands[IEEE80211_BAND_2GHZ];
  4094. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  4095. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  4096. &priv->bands[IEEE80211_BAND_5GHZ];
  4097. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4098. return 0;
  4099. }
  4100. /*
  4101. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4102. */
  4103. void iwl4965_free_geos(struct iwl_priv *priv)
  4104. {
  4105. kfree(priv->ieee_channels);
  4106. kfree(priv->ieee_rates);
  4107. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4108. }
  4109. /******************************************************************************
  4110. *
  4111. * uCode download functions
  4112. *
  4113. ******************************************************************************/
  4114. static void iwl4965_dealloc_ucode_pci(struct iwl_priv *priv)
  4115. {
  4116. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4117. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4118. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4119. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4120. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4121. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4122. }
  4123. /**
  4124. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4125. * looking at all data.
  4126. */
  4127. static int iwl4965_verify_inst_full(struct iwl_priv *priv, __le32 *image,
  4128. u32 len)
  4129. {
  4130. u32 val;
  4131. u32 save_len = len;
  4132. int rc = 0;
  4133. u32 errcnt;
  4134. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4135. rc = iwl_grab_nic_access(priv);
  4136. if (rc)
  4137. return rc;
  4138. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4139. errcnt = 0;
  4140. for (; len > 0; len -= sizeof(u32), image++) {
  4141. /* read data comes through single port, auto-incr addr */
  4142. /* NOTE: Use the debugless read so we don't flood kernel log
  4143. * if IWL_DL_IO is set */
  4144. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4145. if (val != le32_to_cpu(*image)) {
  4146. IWL_ERROR("uCode INST section is invalid at "
  4147. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4148. save_len - len, val, le32_to_cpu(*image));
  4149. rc = -EIO;
  4150. errcnt++;
  4151. if (errcnt >= 20)
  4152. break;
  4153. }
  4154. }
  4155. iwl_release_nic_access(priv);
  4156. if (!errcnt)
  4157. IWL_DEBUG_INFO
  4158. ("ucode image in INSTRUCTION memory is good\n");
  4159. return rc;
  4160. }
  4161. /**
  4162. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4163. * using sample data 100 bytes apart. If these sample points are good,
  4164. * it's a pretty good bet that everything between them is good, too.
  4165. */
  4166. static int iwl4965_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  4167. {
  4168. u32 val;
  4169. int rc = 0;
  4170. u32 errcnt = 0;
  4171. u32 i;
  4172. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4173. rc = iwl_grab_nic_access(priv);
  4174. if (rc)
  4175. return rc;
  4176. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  4177. /* read data comes through single port, auto-incr addr */
  4178. /* NOTE: Use the debugless read so we don't flood kernel log
  4179. * if IWL_DL_IO is set */
  4180. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  4181. i + RTC_INST_LOWER_BOUND);
  4182. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4183. if (val != le32_to_cpu(*image)) {
  4184. #if 0 /* Enable this if you want to see details */
  4185. IWL_ERROR("uCode INST section is invalid at "
  4186. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4187. i, val, *image);
  4188. #endif
  4189. rc = -EIO;
  4190. errcnt++;
  4191. if (errcnt >= 3)
  4192. break;
  4193. }
  4194. }
  4195. iwl_release_nic_access(priv);
  4196. return rc;
  4197. }
  4198. /**
  4199. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  4200. * and verify its contents
  4201. */
  4202. static int iwl4965_verify_ucode(struct iwl_priv *priv)
  4203. {
  4204. __le32 *image;
  4205. u32 len;
  4206. int rc = 0;
  4207. /* Try bootstrap */
  4208. image = (__le32 *)priv->ucode_boot.v_addr;
  4209. len = priv->ucode_boot.len;
  4210. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4211. if (rc == 0) {
  4212. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  4213. return 0;
  4214. }
  4215. /* Try initialize */
  4216. image = (__le32 *)priv->ucode_init.v_addr;
  4217. len = priv->ucode_init.len;
  4218. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4219. if (rc == 0) {
  4220. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  4221. return 0;
  4222. }
  4223. /* Try runtime/protocol */
  4224. image = (__le32 *)priv->ucode_code.v_addr;
  4225. len = priv->ucode_code.len;
  4226. rc = iwl4965_verify_inst_sparse(priv, image, len);
  4227. if (rc == 0) {
  4228. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  4229. return 0;
  4230. }
  4231. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  4232. /* Since nothing seems to match, show first several data entries in
  4233. * instruction SRAM, so maybe visual inspection will give a clue.
  4234. * Selection of bootstrap image (vs. other images) is arbitrary. */
  4235. image = (__le32 *)priv->ucode_boot.v_addr;
  4236. len = priv->ucode_boot.len;
  4237. rc = iwl4965_verify_inst_full(priv, image, len);
  4238. return rc;
  4239. }
  4240. static void iwl4965_nic_start(struct iwl_priv *priv)
  4241. {
  4242. /* Remove all resets to allow NIC to operate */
  4243. iwl_write32(priv, CSR_RESET, 0);
  4244. }
  4245. /**
  4246. * iwl4965_read_ucode - Read uCode images from disk file.
  4247. *
  4248. * Copy into buffers for card to fetch via bus-mastering
  4249. */
  4250. static int iwl4965_read_ucode(struct iwl_priv *priv)
  4251. {
  4252. struct iwl4965_ucode *ucode;
  4253. int ret;
  4254. const struct firmware *ucode_raw;
  4255. const char *name = priv->cfg->fw_name;
  4256. u8 *src;
  4257. size_t len;
  4258. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  4259. /* Ask kernel firmware_class module to get the boot firmware off disk.
  4260. * request_firmware() is synchronous, file is in memory on return. */
  4261. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  4262. if (ret < 0) {
  4263. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  4264. name, ret);
  4265. goto error;
  4266. }
  4267. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  4268. name, ucode_raw->size);
  4269. /* Make sure that we got at least our header! */
  4270. if (ucode_raw->size < sizeof(*ucode)) {
  4271. IWL_ERROR("File size way too small!\n");
  4272. ret = -EINVAL;
  4273. goto err_release;
  4274. }
  4275. /* Data from ucode file: header followed by uCode images */
  4276. ucode = (void *)ucode_raw->data;
  4277. ver = le32_to_cpu(ucode->ver);
  4278. inst_size = le32_to_cpu(ucode->inst_size);
  4279. data_size = le32_to_cpu(ucode->data_size);
  4280. init_size = le32_to_cpu(ucode->init_size);
  4281. init_data_size = le32_to_cpu(ucode->init_data_size);
  4282. boot_size = le32_to_cpu(ucode->boot_size);
  4283. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  4284. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  4285. inst_size);
  4286. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  4287. data_size);
  4288. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  4289. init_size);
  4290. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  4291. init_data_size);
  4292. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  4293. boot_size);
  4294. /* Verify size of file vs. image size info in file's header */
  4295. if (ucode_raw->size < sizeof(*ucode) +
  4296. inst_size + data_size + init_size +
  4297. init_data_size + boot_size) {
  4298. IWL_DEBUG_INFO("uCode file size %d too small\n",
  4299. (int)ucode_raw->size);
  4300. ret = -EINVAL;
  4301. goto err_release;
  4302. }
  4303. /* Verify that uCode images will fit in card's SRAM */
  4304. if (inst_size > IWL_MAX_INST_SIZE) {
  4305. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  4306. inst_size);
  4307. ret = -EINVAL;
  4308. goto err_release;
  4309. }
  4310. if (data_size > IWL_MAX_DATA_SIZE) {
  4311. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  4312. data_size);
  4313. ret = -EINVAL;
  4314. goto err_release;
  4315. }
  4316. if (init_size > IWL_MAX_INST_SIZE) {
  4317. IWL_DEBUG_INFO
  4318. ("uCode init instr len %d too large to fit in\n",
  4319. init_size);
  4320. ret = -EINVAL;
  4321. goto err_release;
  4322. }
  4323. if (init_data_size > IWL_MAX_DATA_SIZE) {
  4324. IWL_DEBUG_INFO
  4325. ("uCode init data len %d too large to fit in\n",
  4326. init_data_size);
  4327. ret = -EINVAL;
  4328. goto err_release;
  4329. }
  4330. if (boot_size > IWL_MAX_BSM_SIZE) {
  4331. IWL_DEBUG_INFO
  4332. ("uCode boot instr len %d too large to fit in\n",
  4333. boot_size);
  4334. ret = -EINVAL;
  4335. goto err_release;
  4336. }
  4337. /* Allocate ucode buffers for card's bus-master loading ... */
  4338. /* Runtime instructions and 2 copies of data:
  4339. * 1) unmodified from disk
  4340. * 2) backup cache for save/restore during power-downs */
  4341. priv->ucode_code.len = inst_size;
  4342. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  4343. priv->ucode_data.len = data_size;
  4344. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  4345. priv->ucode_data_backup.len = data_size;
  4346. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4347. /* Initialization instructions and data */
  4348. if (init_size && init_data_size) {
  4349. priv->ucode_init.len = init_size;
  4350. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  4351. priv->ucode_init_data.len = init_data_size;
  4352. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4353. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  4354. goto err_pci_alloc;
  4355. }
  4356. /* Bootstrap (instructions only, no data) */
  4357. if (boot_size) {
  4358. priv->ucode_boot.len = boot_size;
  4359. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4360. if (!priv->ucode_boot.v_addr)
  4361. goto err_pci_alloc;
  4362. }
  4363. /* Copy images into buffers for card's bus-master reads ... */
  4364. /* Runtime instructions (first block of data in file) */
  4365. src = &ucode->data[0];
  4366. len = priv->ucode_code.len;
  4367. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  4368. memcpy(priv->ucode_code.v_addr, src, len);
  4369. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  4370. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  4371. /* Runtime data (2nd block)
  4372. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  4373. src = &ucode->data[inst_size];
  4374. len = priv->ucode_data.len;
  4375. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  4376. memcpy(priv->ucode_data.v_addr, src, len);
  4377. memcpy(priv->ucode_data_backup.v_addr, src, len);
  4378. /* Initialization instructions (3rd block) */
  4379. if (init_size) {
  4380. src = &ucode->data[inst_size + data_size];
  4381. len = priv->ucode_init.len;
  4382. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  4383. len);
  4384. memcpy(priv->ucode_init.v_addr, src, len);
  4385. }
  4386. /* Initialization data (4th block) */
  4387. if (init_data_size) {
  4388. src = &ucode->data[inst_size + data_size + init_size];
  4389. len = priv->ucode_init_data.len;
  4390. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  4391. len);
  4392. memcpy(priv->ucode_init_data.v_addr, src, len);
  4393. }
  4394. /* Bootstrap instructions (5th block) */
  4395. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  4396. len = priv->ucode_boot.len;
  4397. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  4398. memcpy(priv->ucode_boot.v_addr, src, len);
  4399. /* We have our copies now, allow OS release its copies */
  4400. release_firmware(ucode_raw);
  4401. return 0;
  4402. err_pci_alloc:
  4403. IWL_ERROR("failed to allocate pci memory\n");
  4404. ret = -ENOMEM;
  4405. iwl4965_dealloc_ucode_pci(priv);
  4406. err_release:
  4407. release_firmware(ucode_raw);
  4408. error:
  4409. return ret;
  4410. }
  4411. /**
  4412. * iwl4965_set_ucode_ptrs - Set uCode address location
  4413. *
  4414. * Tell initialization uCode where to find runtime uCode.
  4415. *
  4416. * BSM registers initially contain pointers to initialization uCode.
  4417. * We need to replace them to load runtime uCode inst and data,
  4418. * and to save runtime data when powering down.
  4419. */
  4420. static int iwl4965_set_ucode_ptrs(struct iwl_priv *priv)
  4421. {
  4422. dma_addr_t pinst;
  4423. dma_addr_t pdata;
  4424. int rc = 0;
  4425. unsigned long flags;
  4426. /* bits 35:4 for 4965 */
  4427. pinst = priv->ucode_code.p_addr >> 4;
  4428. pdata = priv->ucode_data_backup.p_addr >> 4;
  4429. spin_lock_irqsave(&priv->lock, flags);
  4430. rc = iwl_grab_nic_access(priv);
  4431. if (rc) {
  4432. spin_unlock_irqrestore(&priv->lock, flags);
  4433. return rc;
  4434. }
  4435. /* Tell bootstrap uCode where to find image to load */
  4436. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  4437. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  4438. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  4439. priv->ucode_data.len);
  4440. /* Inst bytecount must be last to set up, bit 31 signals uCode
  4441. * that all new ptr/size info is in place */
  4442. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  4443. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  4444. iwl_release_nic_access(priv);
  4445. spin_unlock_irqrestore(&priv->lock, flags);
  4446. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  4447. return rc;
  4448. }
  4449. /**
  4450. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  4451. *
  4452. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  4453. *
  4454. * The 4965 "initialize" ALIVE reply contains calibration data for:
  4455. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  4456. * (3945 does not contain this data).
  4457. *
  4458. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  4459. */
  4460. static void iwl4965_init_alive_start(struct iwl_priv *priv)
  4461. {
  4462. /* Check alive response for "valid" sign from uCode */
  4463. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  4464. /* We had an error bringing up the hardware, so take it
  4465. * all the way back down so we can try again */
  4466. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  4467. goto restart;
  4468. }
  4469. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  4470. * This is a paranoid check, because we would not have gotten the
  4471. * "initialize" alive if code weren't properly loaded. */
  4472. if (iwl4965_verify_ucode(priv)) {
  4473. /* Runtime instruction load was bad;
  4474. * take it all the way back down so we can try again */
  4475. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  4476. goto restart;
  4477. }
  4478. /* Calculate temperature */
  4479. priv->temperature = iwl4965_get_temperature(priv);
  4480. /* Send pointers to protocol/runtime uCode image ... init code will
  4481. * load and launch runtime uCode, which will send us another "Alive"
  4482. * notification. */
  4483. IWL_DEBUG_INFO("Initialization Alive received.\n");
  4484. if (iwl4965_set_ucode_ptrs(priv)) {
  4485. /* Runtime instruction load won't happen;
  4486. * take it all the way back down so we can try again */
  4487. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  4488. goto restart;
  4489. }
  4490. return;
  4491. restart:
  4492. queue_work(priv->workqueue, &priv->restart);
  4493. }
  4494. /**
  4495. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  4496. * from protocol/runtime uCode (initialization uCode's
  4497. * Alive gets handled by iwl4965_init_alive_start()).
  4498. */
  4499. static void iwl4965_alive_start(struct iwl_priv *priv)
  4500. {
  4501. int ret = 0;
  4502. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4503. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4504. /* We had an error bringing up the hardware, so take it
  4505. * all the way back down so we can try again */
  4506. IWL_DEBUG_INFO("Alive failed.\n");
  4507. goto restart;
  4508. }
  4509. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4510. * This is a paranoid check, because we would not have gotten the
  4511. * "runtime" alive if code weren't properly loaded. */
  4512. if (iwl4965_verify_ucode(priv)) {
  4513. /* Runtime instruction load was bad;
  4514. * take it all the way back down so we can try again */
  4515. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4516. goto restart;
  4517. }
  4518. iwlcore_clear_stations_table(priv);
  4519. ret = priv->cfg->ops->lib->alive_notify(priv);
  4520. if (ret) {
  4521. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  4522. ret);
  4523. goto restart;
  4524. }
  4525. /* After the ALIVE response, we can send host commands to 4965 uCode */
  4526. set_bit(STATUS_ALIVE, &priv->status);
  4527. /* Clear out the uCode error bit if it is set */
  4528. clear_bit(STATUS_FW_ERROR, &priv->status);
  4529. if (iwl_is_rfkill(priv))
  4530. return;
  4531. ieee80211_start_queues(priv->hw);
  4532. priv->active_rate = priv->rates_mask;
  4533. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4534. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4535. if (iwl_is_associated(priv)) {
  4536. struct iwl4965_rxon_cmd *active_rxon =
  4537. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  4538. memcpy(&priv->staging_rxon, &priv->active_rxon,
  4539. sizeof(priv->staging_rxon));
  4540. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4541. } else {
  4542. /* Initialize our rx_config data */
  4543. iwl4965_connection_init_rx_config(priv);
  4544. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4545. }
  4546. /* Configure Bluetooth device coexistence support */
  4547. iwl4965_send_bt_config(priv);
  4548. /* Configure the adapter for unassociated operation */
  4549. iwl4965_commit_rxon(priv);
  4550. /* At this point, the NIC is initialized and operational */
  4551. priv->notif_missed_beacons = 0;
  4552. iwl4965_rf_kill_ct_config(priv);
  4553. iwl_leds_register(priv);
  4554. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4555. set_bit(STATUS_READY, &priv->status);
  4556. wake_up_interruptible(&priv->wait_command_queue);
  4557. if (priv->error_recovering)
  4558. iwl4965_error_recovery(priv);
  4559. iwlcore_low_level_notify(priv, IWLCORE_START_EVT);
  4560. ieee80211_notify_mac(priv->hw, IEEE80211_NOTIFY_RE_ASSOC);
  4561. return;
  4562. restart:
  4563. queue_work(priv->workqueue, &priv->restart);
  4564. }
  4565. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv);
  4566. static void __iwl4965_down(struct iwl_priv *priv)
  4567. {
  4568. unsigned long flags;
  4569. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4570. struct ieee80211_conf *conf = NULL;
  4571. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4572. conf = ieee80211_get_hw_conf(priv->hw);
  4573. if (!exit_pending)
  4574. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4575. iwl_leds_unregister(priv);
  4576. iwlcore_low_level_notify(priv, IWLCORE_STOP_EVT);
  4577. iwlcore_clear_stations_table(priv);
  4578. /* Unblock any waiting calls */
  4579. wake_up_interruptible_all(&priv->wait_command_queue);
  4580. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4581. * exiting the module */
  4582. if (!exit_pending)
  4583. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4584. /* stop and reset the on-board processor */
  4585. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4586. /* tell the device to stop sending interrupts */
  4587. spin_lock_irqsave(&priv->lock, flags);
  4588. iwl4965_disable_interrupts(priv);
  4589. spin_unlock_irqrestore(&priv->lock, flags);
  4590. iwl_synchronize_irq(priv);
  4591. if (priv->mac80211_registered)
  4592. ieee80211_stop_queues(priv->hw);
  4593. /* If we have not previously called iwl4965_init() then
  4594. * clear all bits but the RF Kill and SUSPEND bits and return */
  4595. if (!iwl_is_init(priv)) {
  4596. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4597. STATUS_RF_KILL_HW |
  4598. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4599. STATUS_RF_KILL_SW |
  4600. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4601. STATUS_GEO_CONFIGURED |
  4602. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4603. STATUS_IN_SUSPEND;
  4604. goto exit;
  4605. }
  4606. /* ...otherwise clear out all the status bits but the RF Kill and
  4607. * SUSPEND bits and continue taking the NIC down. */
  4608. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4609. STATUS_RF_KILL_HW |
  4610. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4611. STATUS_RF_KILL_SW |
  4612. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4613. STATUS_GEO_CONFIGURED |
  4614. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4615. STATUS_IN_SUSPEND |
  4616. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4617. STATUS_FW_ERROR;
  4618. spin_lock_irqsave(&priv->lock, flags);
  4619. iwl_clear_bit(priv, CSR_GP_CNTRL,
  4620. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4621. spin_unlock_irqrestore(&priv->lock, flags);
  4622. iwl4965_hw_txq_ctx_stop(priv);
  4623. iwl4965_hw_rxq_stop(priv);
  4624. spin_lock_irqsave(&priv->lock, flags);
  4625. if (!iwl_grab_nic_access(priv)) {
  4626. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4627. APMG_CLK_VAL_DMA_CLK_RQT);
  4628. iwl_release_nic_access(priv);
  4629. }
  4630. spin_unlock_irqrestore(&priv->lock, flags);
  4631. udelay(5);
  4632. iwl4965_hw_nic_stop_master(priv);
  4633. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  4634. iwl4965_hw_nic_reset(priv);
  4635. exit:
  4636. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  4637. if (priv->ibss_beacon)
  4638. dev_kfree_skb(priv->ibss_beacon);
  4639. priv->ibss_beacon = NULL;
  4640. /* clear out any free frames */
  4641. iwl4965_clear_free_frames(priv);
  4642. }
  4643. static void iwl4965_down(struct iwl_priv *priv)
  4644. {
  4645. mutex_lock(&priv->mutex);
  4646. __iwl4965_down(priv);
  4647. mutex_unlock(&priv->mutex);
  4648. iwl4965_cancel_deferred_work(priv);
  4649. }
  4650. #define MAX_HW_RESTARTS 5
  4651. static int __iwl4965_up(struct iwl_priv *priv)
  4652. {
  4653. int i;
  4654. int ret;
  4655. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4656. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  4657. return -EIO;
  4658. }
  4659. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4660. IWL_WARNING("Radio disabled by SW RF kill (module "
  4661. "parameter)\n");
  4662. iwl_rfkill_set_hw_state(priv);
  4663. return -ENODEV;
  4664. }
  4665. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4666. IWL_ERROR("ucode not available for device bringup\n");
  4667. return -EIO;
  4668. }
  4669. /* If platform's RF_KILL switch is NOT set to KILL */
  4670. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4671. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4672. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4673. else {
  4674. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4675. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4676. iwl_rfkill_set_hw_state(priv);
  4677. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  4678. return -ENODEV;
  4679. }
  4680. }
  4681. iwl_rfkill_set_hw_state(priv);
  4682. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4683. ret = priv->cfg->ops->lib->hw_nic_init(priv);
  4684. if (ret) {
  4685. IWL_ERROR("Unable to init nic\n");
  4686. return ret;
  4687. }
  4688. /* make sure rfkill handshake bits are cleared */
  4689. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4690. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4691. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4692. /* clear (again), then enable host interrupts */
  4693. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4694. iwl4965_enable_interrupts(priv);
  4695. /* really make sure rfkill handshake bits are cleared */
  4696. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4697. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4698. /* Copy original ucode data image from disk into backup cache.
  4699. * This will be used to initialize the on-board processor's
  4700. * data SRAM for a clean start when the runtime program first loads. */
  4701. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4702. priv->ucode_data.len);
  4703. /* We return success when we resume from suspend and rf_kill is on. */
  4704. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4705. return 0;
  4706. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4707. iwlcore_clear_stations_table(priv);
  4708. /* load bootstrap state machine,
  4709. * load bootstrap program into processor's memory,
  4710. * prepare to load the "initialize" uCode */
  4711. ret = priv->cfg->ops->lib->load_ucode(priv);
  4712. if (ret) {
  4713. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", ret);
  4714. continue;
  4715. }
  4716. /* start card; "initialize" will load runtime ucode */
  4717. iwl4965_nic_start(priv);
  4718. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4719. return 0;
  4720. }
  4721. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4722. __iwl4965_down(priv);
  4723. /* tried to restart and config the device for as long as our
  4724. * patience could withstand */
  4725. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  4726. return -EIO;
  4727. }
  4728. /*****************************************************************************
  4729. *
  4730. * Workqueue callbacks
  4731. *
  4732. *****************************************************************************/
  4733. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  4734. {
  4735. struct iwl_priv *priv =
  4736. container_of(data, struct iwl_priv, init_alive_start.work);
  4737. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4738. return;
  4739. mutex_lock(&priv->mutex);
  4740. iwl4965_init_alive_start(priv);
  4741. mutex_unlock(&priv->mutex);
  4742. }
  4743. static void iwl4965_bg_alive_start(struct work_struct *data)
  4744. {
  4745. struct iwl_priv *priv =
  4746. container_of(data, struct iwl_priv, alive_start.work);
  4747. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4748. return;
  4749. mutex_lock(&priv->mutex);
  4750. iwl4965_alive_start(priv);
  4751. mutex_unlock(&priv->mutex);
  4752. }
  4753. static void iwl4965_bg_rf_kill(struct work_struct *work)
  4754. {
  4755. struct iwl_priv *priv = container_of(work, struct iwl_priv, rf_kill);
  4756. wake_up_interruptible(&priv->wait_command_queue);
  4757. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4758. return;
  4759. mutex_lock(&priv->mutex);
  4760. if (!iwl_is_rfkill(priv)) {
  4761. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  4762. "HW and/or SW RF Kill no longer active, restarting "
  4763. "device\n");
  4764. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4765. queue_work(priv->workqueue, &priv->restart);
  4766. } else {
  4767. /* make sure mac80211 stop sending Tx frame */
  4768. if (priv->mac80211_registered)
  4769. ieee80211_stop_queues(priv->hw);
  4770. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  4771. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  4772. "disabled by SW switch\n");
  4773. else
  4774. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  4775. "Kill switch must be turned off for "
  4776. "wireless networking to work.\n");
  4777. }
  4778. iwl_rfkill_set_hw_state(priv);
  4779. mutex_unlock(&priv->mutex);
  4780. }
  4781. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4782. static void iwl4965_bg_scan_check(struct work_struct *data)
  4783. {
  4784. struct iwl_priv *priv =
  4785. container_of(data, struct iwl_priv, scan_check.work);
  4786. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4787. return;
  4788. mutex_lock(&priv->mutex);
  4789. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4790. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4791. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4792. "Scan completion watchdog resetting adapter (%dms)\n",
  4793. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4794. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4795. iwl4965_send_scan_abort(priv);
  4796. }
  4797. mutex_unlock(&priv->mutex);
  4798. }
  4799. static void iwl4965_bg_request_scan(struct work_struct *data)
  4800. {
  4801. struct iwl_priv *priv =
  4802. container_of(data, struct iwl_priv, request_scan);
  4803. struct iwl_host_cmd cmd = {
  4804. .id = REPLY_SCAN_CMD,
  4805. .len = sizeof(struct iwl4965_scan_cmd),
  4806. .meta.flags = CMD_SIZE_HUGE,
  4807. };
  4808. struct iwl4965_scan_cmd *scan;
  4809. struct ieee80211_conf *conf = NULL;
  4810. u16 cmd_len;
  4811. enum ieee80211_band band;
  4812. u8 direct_mask;
  4813. int ret = 0;
  4814. conf = ieee80211_get_hw_conf(priv->hw);
  4815. mutex_lock(&priv->mutex);
  4816. if (!iwl_is_ready(priv)) {
  4817. IWL_WARNING("request scan called when driver not ready.\n");
  4818. goto done;
  4819. }
  4820. /* Make sure the scan wasn't cancelled before this queued work
  4821. * was given the chance to run... */
  4822. if (!test_bit(STATUS_SCANNING, &priv->status))
  4823. goto done;
  4824. /* This should never be called or scheduled if there is currently
  4825. * a scan active in the hardware. */
  4826. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  4827. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  4828. "Ignoring second request.\n");
  4829. ret = -EIO;
  4830. goto done;
  4831. }
  4832. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4833. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  4834. goto done;
  4835. }
  4836. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4837. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  4838. goto done;
  4839. }
  4840. if (iwl_is_rfkill(priv)) {
  4841. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  4842. goto done;
  4843. }
  4844. if (!test_bit(STATUS_READY, &priv->status)) {
  4845. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  4846. goto done;
  4847. }
  4848. if (!priv->scan_bands) {
  4849. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  4850. goto done;
  4851. }
  4852. if (!priv->scan) {
  4853. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  4854. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4855. if (!priv->scan) {
  4856. ret = -ENOMEM;
  4857. goto done;
  4858. }
  4859. }
  4860. scan = priv->scan;
  4861. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4862. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4863. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4864. if (iwl_is_associated(priv)) {
  4865. u16 interval = 0;
  4866. u32 extra;
  4867. u32 suspend_time = 100;
  4868. u32 scan_suspend_time = 100;
  4869. unsigned long flags;
  4870. IWL_DEBUG_INFO("Scanning while associated...\n");
  4871. spin_lock_irqsave(&priv->lock, flags);
  4872. interval = priv->beacon_int;
  4873. spin_unlock_irqrestore(&priv->lock, flags);
  4874. scan->suspend_time = 0;
  4875. scan->max_out_time = cpu_to_le32(200 * 1024);
  4876. if (!interval)
  4877. interval = suspend_time;
  4878. extra = (suspend_time / interval) << 22;
  4879. scan_suspend_time = (extra |
  4880. ((suspend_time % interval) * 1024));
  4881. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4882. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4883. scan_suspend_time, interval);
  4884. }
  4885. /* We should add the ability for user to lock to PASSIVE ONLY */
  4886. if (priv->one_direct_scan) {
  4887. IWL_DEBUG_SCAN
  4888. ("Kicking off one direct scan for '%s'\n",
  4889. iwl4965_escape_essid(priv->direct_ssid,
  4890. priv->direct_ssid_len));
  4891. scan->direct_scan[0].id = WLAN_EID_SSID;
  4892. scan->direct_scan[0].len = priv->direct_ssid_len;
  4893. memcpy(scan->direct_scan[0].ssid,
  4894. priv->direct_ssid, priv->direct_ssid_len);
  4895. direct_mask = 1;
  4896. } else if (!iwl_is_associated(priv) && priv->essid_len) {
  4897. scan->direct_scan[0].id = WLAN_EID_SSID;
  4898. scan->direct_scan[0].len = priv->essid_len;
  4899. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  4900. direct_mask = 1;
  4901. } else {
  4902. direct_mask = 0;
  4903. }
  4904. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  4905. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  4906. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  4907. switch (priv->scan_bands) {
  4908. case 2:
  4909. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  4910. scan->tx_cmd.rate_n_flags =
  4911. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  4912. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  4913. scan->good_CRC_th = 0;
  4914. band = IEEE80211_BAND_2GHZ;
  4915. break;
  4916. case 1:
  4917. scan->tx_cmd.rate_n_flags =
  4918. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  4919. RATE_MCS_ANT_B_MSK);
  4920. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  4921. band = IEEE80211_BAND_5GHZ;
  4922. break;
  4923. default:
  4924. IWL_WARNING("Invalid scan band count\n");
  4925. goto done;
  4926. }
  4927. /* We don't build a direct scan probe request; the uCode will do
  4928. * that based on the direct_mask added to each channel entry */
  4929. cmd_len = iwl4965_fill_probe_req(priv, band,
  4930. (struct ieee80211_mgmt *)scan->data,
  4931. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0);
  4932. scan->tx_cmd.len = cpu_to_le16(cmd_len);
  4933. /* select Rx chains */
  4934. /* Force use of chains B and C (0x6) for scan Rx.
  4935. * Avoid A (0x1) because of its off-channel reception on A-band.
  4936. * MIMO is not used here, but value is required to make uCode happy. */
  4937. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  4938. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  4939. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  4940. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  4941. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  4942. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  4943. if (direct_mask) {
  4944. IWL_DEBUG_SCAN
  4945. ("Initiating direct scan for %s.\n",
  4946. iwl4965_escape_essid(priv->essid, priv->essid_len));
  4947. scan->channel_count =
  4948. iwl4965_get_channels_for_scan(
  4949. priv, band, 1, /* active */
  4950. direct_mask,
  4951. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4952. } else {
  4953. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  4954. scan->channel_count =
  4955. iwl4965_get_channels_for_scan(
  4956. priv, band, 0, /* passive */
  4957. direct_mask,
  4958. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4959. }
  4960. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  4961. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  4962. cmd.data = scan;
  4963. scan->len = cpu_to_le16(cmd.len);
  4964. set_bit(STATUS_SCAN_HW, &priv->status);
  4965. ret = iwl_send_cmd_sync(priv, &cmd);
  4966. if (ret)
  4967. goto done;
  4968. queue_delayed_work(priv->workqueue, &priv->scan_check,
  4969. IWL_SCAN_CHECK_WATCHDOG);
  4970. mutex_unlock(&priv->mutex);
  4971. return;
  4972. done:
  4973. /* inform mac80211 scan aborted */
  4974. queue_work(priv->workqueue, &priv->scan_completed);
  4975. mutex_unlock(&priv->mutex);
  4976. }
  4977. static void iwl4965_bg_up(struct work_struct *data)
  4978. {
  4979. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  4980. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4981. return;
  4982. mutex_lock(&priv->mutex);
  4983. __iwl4965_up(priv);
  4984. mutex_unlock(&priv->mutex);
  4985. }
  4986. static void iwl4965_bg_restart(struct work_struct *data)
  4987. {
  4988. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  4989. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4990. return;
  4991. iwl4965_down(priv);
  4992. queue_work(priv->workqueue, &priv->up);
  4993. }
  4994. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  4995. {
  4996. struct iwl_priv *priv =
  4997. container_of(data, struct iwl_priv, rx_replenish);
  4998. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4999. return;
  5000. mutex_lock(&priv->mutex);
  5001. iwl4965_rx_replenish(priv);
  5002. mutex_unlock(&priv->mutex);
  5003. }
  5004. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5005. static void iwl4965_post_associate(struct iwl_priv *priv)
  5006. {
  5007. struct ieee80211_conf *conf = NULL;
  5008. int ret = 0;
  5009. DECLARE_MAC_BUF(mac);
  5010. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5011. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5012. return;
  5013. }
  5014. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5015. priv->assoc_id,
  5016. print_mac(mac, priv->active_rxon.bssid_addr));
  5017. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5018. return;
  5019. if (!priv->vif || !priv->is_open)
  5020. return;
  5021. iwl4965_scan_cancel_timeout(priv, 200);
  5022. conf = ieee80211_get_hw_conf(priv->hw);
  5023. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5024. iwl4965_commit_rxon(priv);
  5025. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5026. iwl4965_setup_rxon_timing(priv);
  5027. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5028. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5029. if (ret)
  5030. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5031. "Attempting to continue.\n");
  5032. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5033. #ifdef CONFIG_IWL4965_HT
  5034. if (priv->current_ht_config.is_ht)
  5035. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5036. #endif /* CONFIG_IWL4965_HT*/
  5037. iwl4965_set_rxon_chain(priv);
  5038. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5039. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5040. priv->assoc_id, priv->beacon_int);
  5041. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5042. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5043. else
  5044. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5045. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5046. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5047. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5048. else
  5049. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5050. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5051. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5052. }
  5053. iwl4965_commit_rxon(priv);
  5054. switch (priv->iw_mode) {
  5055. case IEEE80211_IF_TYPE_STA:
  5056. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  5057. break;
  5058. case IEEE80211_IF_TYPE_IBSS:
  5059. /* clear out the station table */
  5060. iwlcore_clear_stations_table(priv);
  5061. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5062. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  5063. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  5064. iwl4965_send_beacon_cmd(priv);
  5065. break;
  5066. default:
  5067. IWL_ERROR("%s Should not be called in %d mode\n",
  5068. __FUNCTION__, priv->iw_mode);
  5069. break;
  5070. }
  5071. iwl4965_sequence_reset(priv);
  5072. #ifdef CONFIG_IWL4965_SENSITIVITY
  5073. /* Enable Rx differential gain and sensitivity calibrations */
  5074. iwl4965_chain_noise_reset(priv);
  5075. priv->start_calib = 1;
  5076. #endif /* CONFIG_IWL4965_SENSITIVITY */
  5077. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5078. priv->assoc_station_added = 1;
  5079. iwl4965_activate_qos(priv, 0);
  5080. /* we have just associated, don't start scan too early */
  5081. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  5082. }
  5083. static void iwl4965_bg_post_associate(struct work_struct *data)
  5084. {
  5085. struct iwl_priv *priv = container_of(data, struct iwl_priv,
  5086. post_associate.work);
  5087. mutex_lock(&priv->mutex);
  5088. iwl4965_post_associate(priv);
  5089. mutex_unlock(&priv->mutex);
  5090. }
  5091. static void iwl4965_bg_abort_scan(struct work_struct *work)
  5092. {
  5093. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  5094. if (!iwl_is_ready(priv))
  5095. return;
  5096. mutex_lock(&priv->mutex);
  5097. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  5098. iwl4965_send_scan_abort(priv);
  5099. mutex_unlock(&priv->mutex);
  5100. }
  5101. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  5102. static void iwl4965_bg_scan_completed(struct work_struct *work)
  5103. {
  5104. struct iwl_priv *priv =
  5105. container_of(work, struct iwl_priv, scan_completed);
  5106. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  5107. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5108. return;
  5109. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  5110. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  5111. ieee80211_scan_completed(priv->hw);
  5112. /* Since setting the TXPOWER may have been deferred while
  5113. * performing the scan, fire one off */
  5114. mutex_lock(&priv->mutex);
  5115. iwl4965_hw_reg_send_txpower(priv);
  5116. mutex_unlock(&priv->mutex);
  5117. }
  5118. /*****************************************************************************
  5119. *
  5120. * mac80211 entry point functions
  5121. *
  5122. *****************************************************************************/
  5123. #define UCODE_READY_TIMEOUT (2 * HZ)
  5124. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  5125. {
  5126. struct iwl_priv *priv = hw->priv;
  5127. int ret;
  5128. IWL_DEBUG_MAC80211("enter\n");
  5129. if (pci_enable_device(priv->pci_dev)) {
  5130. IWL_ERROR("Fail to pci_enable_device\n");
  5131. return -ENODEV;
  5132. }
  5133. pci_restore_state(priv->pci_dev);
  5134. pci_enable_msi(priv->pci_dev);
  5135. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  5136. DRV_NAME, priv);
  5137. if (ret) {
  5138. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  5139. goto out_disable_msi;
  5140. }
  5141. /* we should be verifying the device is ready to be opened */
  5142. mutex_lock(&priv->mutex);
  5143. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  5144. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  5145. * ucode filename and max sizes are card-specific. */
  5146. if (!priv->ucode_code.len) {
  5147. ret = iwl4965_read_ucode(priv);
  5148. if (ret) {
  5149. IWL_ERROR("Could not read microcode: %d\n", ret);
  5150. mutex_unlock(&priv->mutex);
  5151. goto out_release_irq;
  5152. }
  5153. }
  5154. ret = __iwl4965_up(priv);
  5155. mutex_unlock(&priv->mutex);
  5156. if (ret)
  5157. goto out_release_irq;
  5158. IWL_DEBUG_INFO("Start UP work done.\n");
  5159. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  5160. return 0;
  5161. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  5162. * mac80211 will not be run successfully. */
  5163. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  5164. test_bit(STATUS_READY, &priv->status),
  5165. UCODE_READY_TIMEOUT);
  5166. if (!ret) {
  5167. if (!test_bit(STATUS_READY, &priv->status)) {
  5168. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  5169. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  5170. ret = -ETIMEDOUT;
  5171. goto out_release_irq;
  5172. }
  5173. }
  5174. priv->is_open = 1;
  5175. IWL_DEBUG_MAC80211("leave\n");
  5176. return 0;
  5177. out_release_irq:
  5178. free_irq(priv->pci_dev->irq, priv);
  5179. out_disable_msi:
  5180. pci_disable_msi(priv->pci_dev);
  5181. pci_disable_device(priv->pci_dev);
  5182. priv->is_open = 0;
  5183. IWL_DEBUG_MAC80211("leave - failed\n");
  5184. return ret;
  5185. }
  5186. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  5187. {
  5188. struct iwl_priv *priv = hw->priv;
  5189. IWL_DEBUG_MAC80211("enter\n");
  5190. if (!priv->is_open) {
  5191. IWL_DEBUG_MAC80211("leave - skip\n");
  5192. return;
  5193. }
  5194. priv->is_open = 0;
  5195. if (iwl_is_ready_rf(priv)) {
  5196. /* stop mac, cancel any scan request and clear
  5197. * RXON_FILTER_ASSOC_MSK BIT
  5198. */
  5199. mutex_lock(&priv->mutex);
  5200. iwl4965_scan_cancel_timeout(priv, 100);
  5201. cancel_delayed_work(&priv->post_associate);
  5202. mutex_unlock(&priv->mutex);
  5203. }
  5204. iwl4965_down(priv);
  5205. flush_workqueue(priv->workqueue);
  5206. free_irq(priv->pci_dev->irq, priv);
  5207. pci_disable_msi(priv->pci_dev);
  5208. pci_save_state(priv->pci_dev);
  5209. pci_disable_device(priv->pci_dev);
  5210. IWL_DEBUG_MAC80211("leave\n");
  5211. }
  5212. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  5213. struct ieee80211_tx_control *ctl)
  5214. {
  5215. struct iwl_priv *priv = hw->priv;
  5216. IWL_DEBUG_MAC80211("enter\n");
  5217. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  5218. IWL_DEBUG_MAC80211("leave - monitor\n");
  5219. return -1;
  5220. }
  5221. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  5222. ctl->tx_rate->bitrate);
  5223. if (iwl4965_tx_skb(priv, skb, ctl))
  5224. dev_kfree_skb_any(skb);
  5225. IWL_DEBUG_MAC80211("leave\n");
  5226. return 0;
  5227. }
  5228. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  5229. struct ieee80211_if_init_conf *conf)
  5230. {
  5231. struct iwl_priv *priv = hw->priv;
  5232. unsigned long flags;
  5233. DECLARE_MAC_BUF(mac);
  5234. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  5235. if (priv->vif) {
  5236. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  5237. return -EOPNOTSUPP;
  5238. }
  5239. spin_lock_irqsave(&priv->lock, flags);
  5240. priv->vif = conf->vif;
  5241. spin_unlock_irqrestore(&priv->lock, flags);
  5242. mutex_lock(&priv->mutex);
  5243. if (conf->mac_addr) {
  5244. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  5245. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  5246. }
  5247. if (iwl_is_ready(priv))
  5248. iwl4965_set_mode(priv, conf->type);
  5249. mutex_unlock(&priv->mutex);
  5250. IWL_DEBUG_MAC80211("leave\n");
  5251. return 0;
  5252. }
  5253. /**
  5254. * iwl4965_mac_config - mac80211 config callback
  5255. *
  5256. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  5257. * be set inappropriately and the driver currently sets the hardware up to
  5258. * use it whenever needed.
  5259. */
  5260. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  5261. {
  5262. struct iwl_priv *priv = hw->priv;
  5263. const struct iwl_channel_info *ch_info;
  5264. unsigned long flags;
  5265. int ret = 0;
  5266. mutex_lock(&priv->mutex);
  5267. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  5268. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  5269. if (!iwl_is_ready(priv)) {
  5270. IWL_DEBUG_MAC80211("leave - not ready\n");
  5271. ret = -EIO;
  5272. goto out;
  5273. }
  5274. if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
  5275. test_bit(STATUS_SCANNING, &priv->status))) {
  5276. IWL_DEBUG_MAC80211("leave - scanning\n");
  5277. set_bit(STATUS_CONF_PENDING, &priv->status);
  5278. mutex_unlock(&priv->mutex);
  5279. return 0;
  5280. }
  5281. spin_lock_irqsave(&priv->lock, flags);
  5282. ch_info = iwl_get_channel_info(priv, conf->channel->band,
  5283. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5284. if (!is_channel_valid(ch_info)) {
  5285. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  5286. spin_unlock_irqrestore(&priv->lock, flags);
  5287. ret = -EINVAL;
  5288. goto out;
  5289. }
  5290. #ifdef CONFIG_IWL4965_HT
  5291. /* if we are switching from ht to 2.4 clear flags
  5292. * from any ht related info since 2.4 does not
  5293. * support ht */
  5294. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel->hw_value)
  5295. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5296. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  5297. #endif
  5298. )
  5299. priv->staging_rxon.flags = 0;
  5300. #endif /* CONFIG_IWL4965_HT */
  5301. iwlcore_set_rxon_channel(priv, conf->channel->band,
  5302. ieee80211_frequency_to_channel(conf->channel->center_freq));
  5303. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  5304. /* The list of supported rates and rate mask can be different
  5305. * for each band; since the band may have changed, reset
  5306. * the rate mask to what mac80211 lists */
  5307. iwl4965_set_rate(priv);
  5308. spin_unlock_irqrestore(&priv->lock, flags);
  5309. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  5310. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  5311. iwl4965_hw_channel_switch(priv, conf->channel);
  5312. goto out;
  5313. }
  5314. #endif
  5315. if (priv->cfg->ops->lib->radio_kill_sw)
  5316. priv->cfg->ops->lib->radio_kill_sw(priv, !conf->radio_enabled);
  5317. if (!conf->radio_enabled) {
  5318. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  5319. goto out;
  5320. }
  5321. if (iwl_is_rfkill(priv)) {
  5322. IWL_DEBUG_MAC80211("leave - RF kill\n");
  5323. ret = -EIO;
  5324. goto out;
  5325. }
  5326. iwl4965_set_rate(priv);
  5327. if (memcmp(&priv->active_rxon,
  5328. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  5329. iwl4965_commit_rxon(priv);
  5330. else
  5331. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  5332. IWL_DEBUG_MAC80211("leave\n");
  5333. out:
  5334. clear_bit(STATUS_CONF_PENDING, &priv->status);
  5335. mutex_unlock(&priv->mutex);
  5336. return ret;
  5337. }
  5338. static void iwl4965_config_ap(struct iwl_priv *priv)
  5339. {
  5340. int ret = 0;
  5341. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5342. return;
  5343. /* The following should be done only at AP bring up */
  5344. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  5345. /* RXON - unassoc (to set timing command) */
  5346. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5347. iwl4965_commit_rxon(priv);
  5348. /* RXON Timing */
  5349. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5350. iwl4965_setup_rxon_timing(priv);
  5351. ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5352. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5353. if (ret)
  5354. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5355. "Attempting to continue.\n");
  5356. iwl4965_set_rxon_chain(priv);
  5357. /* FIXME: what should be the assoc_id for AP? */
  5358. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5359. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5360. priv->staging_rxon.flags |=
  5361. RXON_FLG_SHORT_PREAMBLE_MSK;
  5362. else
  5363. priv->staging_rxon.flags &=
  5364. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5365. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5366. if (priv->assoc_capability &
  5367. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5368. priv->staging_rxon.flags |=
  5369. RXON_FLG_SHORT_SLOT_MSK;
  5370. else
  5371. priv->staging_rxon.flags &=
  5372. ~RXON_FLG_SHORT_SLOT_MSK;
  5373. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5374. priv->staging_rxon.flags &=
  5375. ~RXON_FLG_SHORT_SLOT_MSK;
  5376. }
  5377. /* restore RXON assoc */
  5378. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5379. iwl4965_commit_rxon(priv);
  5380. iwl4965_activate_qos(priv, 1);
  5381. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  5382. }
  5383. iwl4965_send_beacon_cmd(priv);
  5384. /* FIXME - we need to add code here to detect a totally new
  5385. * configuration, reset the AP, unassoc, rxon timing, assoc,
  5386. * clear sta table, add BCAST sta... */
  5387. }
  5388. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  5389. struct ieee80211_vif *vif,
  5390. struct ieee80211_if_conf *conf)
  5391. {
  5392. struct iwl_priv *priv = hw->priv;
  5393. DECLARE_MAC_BUF(mac);
  5394. unsigned long flags;
  5395. int rc;
  5396. if (conf == NULL)
  5397. return -EIO;
  5398. if (priv->vif != vif) {
  5399. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  5400. mutex_unlock(&priv->mutex);
  5401. return 0;
  5402. }
  5403. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  5404. (!conf->beacon || !conf->ssid_len)) {
  5405. IWL_DEBUG_MAC80211
  5406. ("Leaving in AP mode because HostAPD is not ready.\n");
  5407. return 0;
  5408. }
  5409. if (!iwl_is_alive(priv))
  5410. return -EAGAIN;
  5411. mutex_lock(&priv->mutex);
  5412. if (conf->bssid)
  5413. IWL_DEBUG_MAC80211("bssid: %s\n",
  5414. print_mac(mac, conf->bssid));
  5415. /*
  5416. * very dubious code was here; the probe filtering flag is never set:
  5417. *
  5418. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  5419. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  5420. */
  5421. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5422. if (!conf->bssid) {
  5423. conf->bssid = priv->mac_addr;
  5424. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  5425. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  5426. print_mac(mac, conf->bssid));
  5427. }
  5428. if (priv->ibss_beacon)
  5429. dev_kfree_skb(priv->ibss_beacon);
  5430. priv->ibss_beacon = conf->beacon;
  5431. }
  5432. if (iwl_is_rfkill(priv))
  5433. goto done;
  5434. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  5435. !is_multicast_ether_addr(conf->bssid)) {
  5436. /* If there is currently a HW scan going on in the background
  5437. * then we need to cancel it else the RXON below will fail. */
  5438. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  5439. IWL_WARNING("Aborted scan still in progress "
  5440. "after 100ms\n");
  5441. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  5442. mutex_unlock(&priv->mutex);
  5443. return -EAGAIN;
  5444. }
  5445. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  5446. /* TODO: Audit driver for usage of these members and see
  5447. * if mac80211 deprecates them (priv->bssid looks like it
  5448. * shouldn't be there, but I haven't scanned the IBSS code
  5449. * to verify) - jpk */
  5450. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  5451. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5452. iwl4965_config_ap(priv);
  5453. else {
  5454. rc = iwl4965_commit_rxon(priv);
  5455. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  5456. iwl4965_rxon_add_station(
  5457. priv, priv->active_rxon.bssid_addr, 1);
  5458. }
  5459. } else {
  5460. iwl4965_scan_cancel_timeout(priv, 100);
  5461. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5462. iwl4965_commit_rxon(priv);
  5463. }
  5464. done:
  5465. spin_lock_irqsave(&priv->lock, flags);
  5466. if (!conf->ssid_len)
  5467. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5468. else
  5469. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  5470. priv->essid_len = conf->ssid_len;
  5471. spin_unlock_irqrestore(&priv->lock, flags);
  5472. IWL_DEBUG_MAC80211("leave\n");
  5473. mutex_unlock(&priv->mutex);
  5474. return 0;
  5475. }
  5476. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  5477. unsigned int changed_flags,
  5478. unsigned int *total_flags,
  5479. int mc_count, struct dev_addr_list *mc_list)
  5480. {
  5481. /*
  5482. * XXX: dummy
  5483. * see also iwl4965_connection_init_rx_config
  5484. */
  5485. *total_flags = 0;
  5486. }
  5487. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  5488. struct ieee80211_if_init_conf *conf)
  5489. {
  5490. struct iwl_priv *priv = hw->priv;
  5491. IWL_DEBUG_MAC80211("enter\n");
  5492. mutex_lock(&priv->mutex);
  5493. if (iwl_is_ready_rf(priv)) {
  5494. iwl4965_scan_cancel_timeout(priv, 100);
  5495. cancel_delayed_work(&priv->post_associate);
  5496. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5497. iwl4965_commit_rxon(priv);
  5498. }
  5499. if (priv->vif == conf->vif) {
  5500. priv->vif = NULL;
  5501. memset(priv->bssid, 0, ETH_ALEN);
  5502. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  5503. priv->essid_len = 0;
  5504. }
  5505. mutex_unlock(&priv->mutex);
  5506. IWL_DEBUG_MAC80211("leave\n");
  5507. }
  5508. #ifdef CONFIG_IWL4965_HT
  5509. static void iwl4965_ht_conf(struct iwl_priv *priv,
  5510. struct ieee80211_bss_conf *bss_conf)
  5511. {
  5512. struct ieee80211_ht_info *ht_conf = bss_conf->ht_conf;
  5513. struct ieee80211_ht_bss_info *ht_bss_conf = bss_conf->ht_bss_conf;
  5514. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  5515. IWL_DEBUG_MAC80211("enter: \n");
  5516. iwl_conf->is_ht = bss_conf->assoc_ht;
  5517. if (!iwl_conf->is_ht)
  5518. return;
  5519. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5520. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  5521. iwl_conf->sgf |= 0x1;
  5522. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  5523. iwl_conf->sgf |= 0x2;
  5524. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  5525. iwl_conf->max_amsdu_size =
  5526. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  5527. iwl_conf->supported_chan_width =
  5528. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  5529. iwl_conf->extension_chan_offset =
  5530. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  5531. /* If no above or below channel supplied disable FAT channel */
  5532. if (iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_ABOVE &&
  5533. iwl_conf->extension_chan_offset != IWL_EXT_CHANNEL_OFFSET_BELOW)
  5534. iwl_conf->supported_chan_width = 0;
  5535. iwl_conf->tx_mimo_ps_mode =
  5536. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  5537. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  5538. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  5539. iwl_conf->tx_chan_width =
  5540. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  5541. iwl_conf->ht_protection =
  5542. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  5543. iwl_conf->non_GF_STA_present =
  5544. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  5545. IWL_DEBUG_MAC80211("control channel %d\n", iwl_conf->control_channel);
  5546. IWL_DEBUG_MAC80211("leave\n");
  5547. }
  5548. #else
  5549. static inline void iwl4965_ht_conf(struct iwl_priv *priv,
  5550. struct ieee80211_bss_conf *bss_conf)
  5551. {
  5552. }
  5553. #endif
  5554. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  5555. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  5556. struct ieee80211_vif *vif,
  5557. struct ieee80211_bss_conf *bss_conf,
  5558. u32 changes)
  5559. {
  5560. struct iwl_priv *priv = hw->priv;
  5561. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  5562. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  5563. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  5564. bss_conf->use_short_preamble);
  5565. if (bss_conf->use_short_preamble)
  5566. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5567. else
  5568. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5569. }
  5570. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  5571. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  5572. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  5573. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  5574. else
  5575. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  5576. }
  5577. if (changes & BSS_CHANGED_HT) {
  5578. IWL_DEBUG_MAC80211("HT %d\n", bss_conf->assoc_ht);
  5579. iwl4965_ht_conf(priv, bss_conf);
  5580. iwl4965_set_rxon_chain(priv);
  5581. }
  5582. if (changes & BSS_CHANGED_ASSOC) {
  5583. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  5584. /* This should never happen as this function should
  5585. * never be called from interrupt context. */
  5586. if (WARN_ON_ONCE(in_interrupt()))
  5587. return;
  5588. if (bss_conf->assoc) {
  5589. priv->assoc_id = bss_conf->aid;
  5590. priv->beacon_int = bss_conf->beacon_int;
  5591. priv->timestamp = bss_conf->timestamp;
  5592. priv->assoc_capability = bss_conf->assoc_capability;
  5593. priv->next_scan_jiffies = jiffies +
  5594. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5595. mutex_lock(&priv->mutex);
  5596. iwl4965_post_associate(priv);
  5597. mutex_unlock(&priv->mutex);
  5598. } else {
  5599. priv->assoc_id = 0;
  5600. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5601. }
  5602. } else if (changes && iwl_is_associated(priv) && priv->assoc_id) {
  5603. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5604. iwl4965_send_rxon_assoc(priv);
  5605. }
  5606. }
  5607. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5608. {
  5609. int rc = 0;
  5610. unsigned long flags;
  5611. struct iwl_priv *priv = hw->priv;
  5612. IWL_DEBUG_MAC80211("enter\n");
  5613. mutex_lock(&priv->mutex);
  5614. spin_lock_irqsave(&priv->lock, flags);
  5615. if (!iwl_is_ready_rf(priv)) {
  5616. rc = -EIO;
  5617. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5618. goto out_unlock;
  5619. }
  5620. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  5621. rc = -EIO;
  5622. IWL_ERROR("ERROR: APs don't scan\n");
  5623. goto out_unlock;
  5624. }
  5625. /* we don't schedule scan within next_scan_jiffies period */
  5626. if (priv->next_scan_jiffies &&
  5627. time_after(priv->next_scan_jiffies, jiffies)) {
  5628. rc = -EAGAIN;
  5629. goto out_unlock;
  5630. }
  5631. /* if we just finished scan ask for delay */
  5632. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  5633. IWL_DELAY_NEXT_SCAN, jiffies)) {
  5634. rc = -EAGAIN;
  5635. goto out_unlock;
  5636. }
  5637. if (len) {
  5638. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5639. iwl4965_escape_essid(ssid, len), (int)len);
  5640. priv->one_direct_scan = 1;
  5641. priv->direct_ssid_len = (u8)
  5642. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5643. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5644. } else
  5645. priv->one_direct_scan = 0;
  5646. rc = iwl4965_scan_initiate(priv);
  5647. IWL_DEBUG_MAC80211("leave\n");
  5648. out_unlock:
  5649. spin_unlock_irqrestore(&priv->lock, flags);
  5650. mutex_unlock(&priv->mutex);
  5651. return rc;
  5652. }
  5653. static void iwl4965_mac_update_tkip_key(struct ieee80211_hw *hw,
  5654. struct ieee80211_key_conf *keyconf, const u8 *addr,
  5655. u32 iv32, u16 *phase1key)
  5656. {
  5657. struct iwl_priv *priv = hw->priv;
  5658. u8 sta_id = IWL_INVALID_STATION;
  5659. unsigned long flags;
  5660. __le16 key_flags = 0;
  5661. int i;
  5662. DECLARE_MAC_BUF(mac);
  5663. IWL_DEBUG_MAC80211("enter\n");
  5664. sta_id = iwl4965_hw_find_station(priv, addr);
  5665. if (sta_id == IWL_INVALID_STATION) {
  5666. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5667. print_mac(mac, addr));
  5668. return;
  5669. }
  5670. iwl4965_scan_cancel_timeout(priv, 100);
  5671. key_flags |= (STA_KEY_FLG_TKIP | STA_KEY_FLG_MAP_KEY_MSK);
  5672. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  5673. key_flags &= ~STA_KEY_FLG_INVALID;
  5674. if (sta_id == priv->hw_setting.bcast_sta_id)
  5675. key_flags |= STA_KEY_MULTICAST_MSK;
  5676. spin_lock_irqsave(&priv->sta_lock, flags);
  5677. priv->stations[sta_id].sta.key.key_offset =
  5678. iwl_get_free_ucode_key_index(priv);
  5679. priv->stations[sta_id].sta.key.key_flags = key_flags;
  5680. priv->stations[sta_id].sta.key.tkip_rx_tsc_byte2 = (u8) iv32;
  5681. for (i = 0; i < 5; i++)
  5682. priv->stations[sta_id].sta.key.tkip_rx_ttak[i] =
  5683. cpu_to_le16(phase1key[i]);
  5684. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  5685. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  5686. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  5687. spin_unlock_irqrestore(&priv->sta_lock, flags);
  5688. IWL_DEBUG_MAC80211("leave\n");
  5689. }
  5690. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5691. const u8 *local_addr, const u8 *addr,
  5692. struct ieee80211_key_conf *key)
  5693. {
  5694. struct iwl_priv *priv = hw->priv;
  5695. DECLARE_MAC_BUF(mac);
  5696. int ret = 0;
  5697. u8 sta_id = IWL_INVALID_STATION;
  5698. u8 is_default_wep_key = 0;
  5699. IWL_DEBUG_MAC80211("enter\n");
  5700. if (!priv->cfg->mod_params->hw_crypto) {
  5701. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5702. return -EOPNOTSUPP;
  5703. }
  5704. if (is_zero_ether_addr(addr))
  5705. /* only support pairwise keys */
  5706. return -EOPNOTSUPP;
  5707. sta_id = iwl4965_hw_find_station(priv, addr);
  5708. if (sta_id == IWL_INVALID_STATION) {
  5709. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  5710. print_mac(mac, addr));
  5711. return -EINVAL;
  5712. }
  5713. mutex_lock(&priv->mutex);
  5714. iwl4965_scan_cancel_timeout(priv, 100);
  5715. mutex_unlock(&priv->mutex);
  5716. /* If we are getting WEP group key and we didn't receive any key mapping
  5717. * so far, we are in legacy wep mode (group key only), otherwise we are
  5718. * in 1X mode.
  5719. * In legacy wep mode, we use another host command to the uCode */
  5720. if (key->alg == ALG_WEP && sta_id == priv->hw_setting.bcast_sta_id &&
  5721. priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5722. if (cmd == SET_KEY)
  5723. is_default_wep_key = !priv->key_mapping_key;
  5724. else
  5725. is_default_wep_key = priv->default_wep_key;
  5726. }
  5727. switch (cmd) {
  5728. case SET_KEY:
  5729. if (is_default_wep_key)
  5730. ret = iwl_set_default_wep_key(priv, key);
  5731. else
  5732. ret = iwl_set_dynamic_key(priv, key, sta_id);
  5733. IWL_DEBUG_MAC80211("enable hwcrypto key\n");
  5734. break;
  5735. case DISABLE_KEY:
  5736. if (is_default_wep_key)
  5737. ret = iwl_remove_default_wep_key(priv, key);
  5738. else
  5739. ret = iwl_remove_dynamic_key(priv, sta_id);
  5740. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5741. break;
  5742. default:
  5743. ret = -EINVAL;
  5744. }
  5745. IWL_DEBUG_MAC80211("leave\n");
  5746. return ret;
  5747. }
  5748. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  5749. const struct ieee80211_tx_queue_params *params)
  5750. {
  5751. struct iwl_priv *priv = hw->priv;
  5752. unsigned long flags;
  5753. int q;
  5754. IWL_DEBUG_MAC80211("enter\n");
  5755. if (!iwl_is_ready_rf(priv)) {
  5756. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5757. return -EIO;
  5758. }
  5759. if (queue >= AC_NUM) {
  5760. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5761. return 0;
  5762. }
  5763. if (!priv->qos_data.qos_enable) {
  5764. priv->qos_data.qos_active = 0;
  5765. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  5766. return 0;
  5767. }
  5768. q = AC_NUM - 1 - queue;
  5769. spin_lock_irqsave(&priv->lock, flags);
  5770. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5771. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5772. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5773. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5774. cpu_to_le16((params->txop * 32));
  5775. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5776. priv->qos_data.qos_active = 1;
  5777. spin_unlock_irqrestore(&priv->lock, flags);
  5778. mutex_lock(&priv->mutex);
  5779. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  5780. iwl4965_activate_qos(priv, 1);
  5781. else if (priv->assoc_id && iwl_is_associated(priv))
  5782. iwl4965_activate_qos(priv, 0);
  5783. mutex_unlock(&priv->mutex);
  5784. IWL_DEBUG_MAC80211("leave\n");
  5785. return 0;
  5786. }
  5787. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  5788. struct ieee80211_tx_queue_stats *stats)
  5789. {
  5790. struct iwl_priv *priv = hw->priv;
  5791. int i, avail;
  5792. struct iwl4965_tx_queue *txq;
  5793. struct iwl4965_queue *q;
  5794. unsigned long flags;
  5795. IWL_DEBUG_MAC80211("enter\n");
  5796. if (!iwl_is_ready_rf(priv)) {
  5797. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5798. return -EIO;
  5799. }
  5800. spin_lock_irqsave(&priv->lock, flags);
  5801. for (i = 0; i < AC_NUM; i++) {
  5802. txq = &priv->txq[i];
  5803. q = &txq->q;
  5804. avail = iwl4965_queue_space(q);
  5805. stats->data[i].len = q->n_window - avail;
  5806. stats->data[i].limit = q->n_window - q->high_mark;
  5807. stats->data[i].count = q->n_window;
  5808. }
  5809. spin_unlock_irqrestore(&priv->lock, flags);
  5810. IWL_DEBUG_MAC80211("leave\n");
  5811. return 0;
  5812. }
  5813. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  5814. struct ieee80211_low_level_stats *stats)
  5815. {
  5816. IWL_DEBUG_MAC80211("enter\n");
  5817. IWL_DEBUG_MAC80211("leave\n");
  5818. return 0;
  5819. }
  5820. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  5821. {
  5822. IWL_DEBUG_MAC80211("enter\n");
  5823. IWL_DEBUG_MAC80211("leave\n");
  5824. return 0;
  5825. }
  5826. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  5827. {
  5828. struct iwl_priv *priv = hw->priv;
  5829. unsigned long flags;
  5830. mutex_lock(&priv->mutex);
  5831. IWL_DEBUG_MAC80211("enter\n");
  5832. priv->lq_mngr.lq_ready = 0;
  5833. #ifdef CONFIG_IWL4965_HT
  5834. spin_lock_irqsave(&priv->lock, flags);
  5835. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  5836. spin_unlock_irqrestore(&priv->lock, flags);
  5837. #endif /* CONFIG_IWL4965_HT */
  5838. iwlcore_reset_qos(priv);
  5839. cancel_delayed_work(&priv->post_associate);
  5840. spin_lock_irqsave(&priv->lock, flags);
  5841. priv->assoc_id = 0;
  5842. priv->assoc_capability = 0;
  5843. priv->assoc_station_added = 0;
  5844. /* new association get rid of ibss beacon skb */
  5845. if (priv->ibss_beacon)
  5846. dev_kfree_skb(priv->ibss_beacon);
  5847. priv->ibss_beacon = NULL;
  5848. priv->beacon_int = priv->hw->conf.beacon_int;
  5849. priv->timestamp = 0;
  5850. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  5851. priv->beacon_int = 0;
  5852. spin_unlock_irqrestore(&priv->lock, flags);
  5853. if (!iwl_is_ready_rf(priv)) {
  5854. IWL_DEBUG_MAC80211("leave - not ready\n");
  5855. mutex_unlock(&priv->mutex);
  5856. return;
  5857. }
  5858. /* we are restarting association process
  5859. * clear RXON_FILTER_ASSOC_MSK bit
  5860. */
  5861. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  5862. iwl4965_scan_cancel_timeout(priv, 100);
  5863. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5864. iwl4965_commit_rxon(priv);
  5865. }
  5866. /* Per mac80211.h: This is only used in IBSS mode... */
  5867. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5868. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5869. mutex_unlock(&priv->mutex);
  5870. return;
  5871. }
  5872. priv->only_active_channel = 0;
  5873. iwl4965_set_rate(priv);
  5874. mutex_unlock(&priv->mutex);
  5875. IWL_DEBUG_MAC80211("leave\n");
  5876. }
  5877. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  5878. struct ieee80211_tx_control *control)
  5879. {
  5880. struct iwl_priv *priv = hw->priv;
  5881. unsigned long flags;
  5882. mutex_lock(&priv->mutex);
  5883. IWL_DEBUG_MAC80211("enter\n");
  5884. if (!iwl_is_ready_rf(priv)) {
  5885. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5886. mutex_unlock(&priv->mutex);
  5887. return -EIO;
  5888. }
  5889. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  5890. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  5891. mutex_unlock(&priv->mutex);
  5892. return -EIO;
  5893. }
  5894. spin_lock_irqsave(&priv->lock, flags);
  5895. if (priv->ibss_beacon)
  5896. dev_kfree_skb(priv->ibss_beacon);
  5897. priv->ibss_beacon = skb;
  5898. priv->assoc_id = 0;
  5899. IWL_DEBUG_MAC80211("leave\n");
  5900. spin_unlock_irqrestore(&priv->lock, flags);
  5901. iwlcore_reset_qos(priv);
  5902. queue_work(priv->workqueue, &priv->post_associate.work);
  5903. mutex_unlock(&priv->mutex);
  5904. return 0;
  5905. }
  5906. /*****************************************************************************
  5907. *
  5908. * sysfs attributes
  5909. *
  5910. *****************************************************************************/
  5911. #ifdef CONFIG_IWLWIFI_DEBUG
  5912. /*
  5913. * The following adds a new attribute to the sysfs representation
  5914. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  5915. * used for controlling the debug level.
  5916. *
  5917. * See the level definitions in iwl for details.
  5918. */
  5919. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  5920. {
  5921. return sprintf(buf, "0x%08X\n", iwl_debug_level);
  5922. }
  5923. static ssize_t store_debug_level(struct device_driver *d,
  5924. const char *buf, size_t count)
  5925. {
  5926. char *p = (char *)buf;
  5927. u32 val;
  5928. val = simple_strtoul(p, &p, 0);
  5929. if (p == buf)
  5930. printk(KERN_INFO DRV_NAME
  5931. ": %s is not in hex or decimal form.\n", buf);
  5932. else
  5933. iwl_debug_level = val;
  5934. return strnlen(buf, count);
  5935. }
  5936. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  5937. show_debug_level, store_debug_level);
  5938. #endif /* CONFIG_IWLWIFI_DEBUG */
  5939. static ssize_t show_temperature(struct device *d,
  5940. struct device_attribute *attr, char *buf)
  5941. {
  5942. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5943. if (!iwl_is_alive(priv))
  5944. return -EAGAIN;
  5945. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  5946. }
  5947. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  5948. static ssize_t show_rs_window(struct device *d,
  5949. struct device_attribute *attr,
  5950. char *buf)
  5951. {
  5952. struct iwl_priv *priv = d->driver_data;
  5953. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  5954. }
  5955. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  5956. static ssize_t show_tx_power(struct device *d,
  5957. struct device_attribute *attr, char *buf)
  5958. {
  5959. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5960. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  5961. }
  5962. static ssize_t store_tx_power(struct device *d,
  5963. struct device_attribute *attr,
  5964. const char *buf, size_t count)
  5965. {
  5966. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5967. char *p = (char *)buf;
  5968. u32 val;
  5969. val = simple_strtoul(p, &p, 10);
  5970. if (p == buf)
  5971. printk(KERN_INFO DRV_NAME
  5972. ": %s is not in decimal form.\n", buf);
  5973. else
  5974. iwl4965_hw_reg_set_txpower(priv, val);
  5975. return count;
  5976. }
  5977. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  5978. static ssize_t show_flags(struct device *d,
  5979. struct device_attribute *attr, char *buf)
  5980. {
  5981. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5982. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  5983. }
  5984. static ssize_t store_flags(struct device *d,
  5985. struct device_attribute *attr,
  5986. const char *buf, size_t count)
  5987. {
  5988. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5989. u32 flags = simple_strtoul(buf, NULL, 0);
  5990. mutex_lock(&priv->mutex);
  5991. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  5992. /* Cancel any currently running scans... */
  5993. if (iwl4965_scan_cancel_timeout(priv, 100))
  5994. IWL_WARNING("Could not cancel scan.\n");
  5995. else {
  5996. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  5997. flags);
  5998. priv->staging_rxon.flags = cpu_to_le32(flags);
  5999. iwl4965_commit_rxon(priv);
  6000. }
  6001. }
  6002. mutex_unlock(&priv->mutex);
  6003. return count;
  6004. }
  6005. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6006. static ssize_t show_filter_flags(struct device *d,
  6007. struct device_attribute *attr, char *buf)
  6008. {
  6009. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6010. return sprintf(buf, "0x%04X\n",
  6011. le32_to_cpu(priv->active_rxon.filter_flags));
  6012. }
  6013. static ssize_t store_filter_flags(struct device *d,
  6014. struct device_attribute *attr,
  6015. const char *buf, size_t count)
  6016. {
  6017. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6018. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6019. mutex_lock(&priv->mutex);
  6020. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6021. /* Cancel any currently running scans... */
  6022. if (iwl4965_scan_cancel_timeout(priv, 100))
  6023. IWL_WARNING("Could not cancel scan.\n");
  6024. else {
  6025. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6026. "0x%04X\n", filter_flags);
  6027. priv->staging_rxon.filter_flags =
  6028. cpu_to_le32(filter_flags);
  6029. iwl4965_commit_rxon(priv);
  6030. }
  6031. }
  6032. mutex_unlock(&priv->mutex);
  6033. return count;
  6034. }
  6035. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6036. store_filter_flags);
  6037. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6038. static ssize_t show_measurement(struct device *d,
  6039. struct device_attribute *attr, char *buf)
  6040. {
  6041. struct iwl_priv *priv = dev_get_drvdata(d);
  6042. struct iwl4965_spectrum_notification measure_report;
  6043. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6044. u8 *data = (u8 *) & measure_report;
  6045. unsigned long flags;
  6046. spin_lock_irqsave(&priv->lock, flags);
  6047. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6048. spin_unlock_irqrestore(&priv->lock, flags);
  6049. return 0;
  6050. }
  6051. memcpy(&measure_report, &priv->measure_report, size);
  6052. priv->measurement_status = 0;
  6053. spin_unlock_irqrestore(&priv->lock, flags);
  6054. while (size && (PAGE_SIZE - len)) {
  6055. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6056. PAGE_SIZE - len, 1);
  6057. len = strlen(buf);
  6058. if (PAGE_SIZE - len)
  6059. buf[len++] = '\n';
  6060. ofs += 16;
  6061. size -= min(size, 16U);
  6062. }
  6063. return len;
  6064. }
  6065. static ssize_t store_measurement(struct device *d,
  6066. struct device_attribute *attr,
  6067. const char *buf, size_t count)
  6068. {
  6069. struct iwl_priv *priv = dev_get_drvdata(d);
  6070. struct ieee80211_measurement_params params = {
  6071. .channel = le16_to_cpu(priv->active_rxon.channel),
  6072. .start_time = cpu_to_le64(priv->last_tsf),
  6073. .duration = cpu_to_le16(1),
  6074. };
  6075. u8 type = IWL_MEASURE_BASIC;
  6076. u8 buffer[32];
  6077. u8 channel;
  6078. if (count) {
  6079. char *p = buffer;
  6080. strncpy(buffer, buf, min(sizeof(buffer), count));
  6081. channel = simple_strtoul(p, NULL, 0);
  6082. if (channel)
  6083. params.channel = channel;
  6084. p = buffer;
  6085. while (*p && *p != ' ')
  6086. p++;
  6087. if (*p)
  6088. type = simple_strtoul(p + 1, NULL, 0);
  6089. }
  6090. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  6091. "channel %d (for '%s')\n", type, params.channel, buf);
  6092. iwl4965_get_measurement(priv, &params, type);
  6093. return count;
  6094. }
  6095. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  6096. show_measurement, store_measurement);
  6097. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  6098. static ssize_t store_retry_rate(struct device *d,
  6099. struct device_attribute *attr,
  6100. const char *buf, size_t count)
  6101. {
  6102. struct iwl_priv *priv = dev_get_drvdata(d);
  6103. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  6104. if (priv->retry_rate <= 0)
  6105. priv->retry_rate = 1;
  6106. return count;
  6107. }
  6108. static ssize_t show_retry_rate(struct device *d,
  6109. struct device_attribute *attr, char *buf)
  6110. {
  6111. struct iwl_priv *priv = dev_get_drvdata(d);
  6112. return sprintf(buf, "%d", priv->retry_rate);
  6113. }
  6114. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  6115. store_retry_rate);
  6116. static ssize_t store_power_level(struct device *d,
  6117. struct device_attribute *attr,
  6118. const char *buf, size_t count)
  6119. {
  6120. struct iwl_priv *priv = dev_get_drvdata(d);
  6121. int rc;
  6122. int mode;
  6123. mode = simple_strtoul(buf, NULL, 0);
  6124. mutex_lock(&priv->mutex);
  6125. if (!iwl_is_ready(priv)) {
  6126. rc = -EAGAIN;
  6127. goto out;
  6128. }
  6129. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  6130. mode = IWL_POWER_AC;
  6131. else
  6132. mode |= IWL_POWER_ENABLED;
  6133. if (mode != priv->power_mode) {
  6134. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  6135. if (rc) {
  6136. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  6137. goto out;
  6138. }
  6139. priv->power_mode = mode;
  6140. }
  6141. rc = count;
  6142. out:
  6143. mutex_unlock(&priv->mutex);
  6144. return rc;
  6145. }
  6146. #define MAX_WX_STRING 80
  6147. /* Values are in microsecond */
  6148. static const s32 timeout_duration[] = {
  6149. 350000,
  6150. 250000,
  6151. 75000,
  6152. 37000,
  6153. 25000,
  6154. };
  6155. static const s32 period_duration[] = {
  6156. 400000,
  6157. 700000,
  6158. 1000000,
  6159. 1000000,
  6160. 1000000
  6161. };
  6162. static ssize_t show_power_level(struct device *d,
  6163. struct device_attribute *attr, char *buf)
  6164. {
  6165. struct iwl_priv *priv = dev_get_drvdata(d);
  6166. int level = IWL_POWER_LEVEL(priv->power_mode);
  6167. char *p = buf;
  6168. p += sprintf(p, "%d ", level);
  6169. switch (level) {
  6170. case IWL_POWER_MODE_CAM:
  6171. case IWL_POWER_AC:
  6172. p += sprintf(p, "(AC)");
  6173. break;
  6174. case IWL_POWER_BATTERY:
  6175. p += sprintf(p, "(BATTERY)");
  6176. break;
  6177. default:
  6178. p += sprintf(p,
  6179. "(Timeout %dms, Period %dms)",
  6180. timeout_duration[level - 1] / 1000,
  6181. period_duration[level - 1] / 1000);
  6182. }
  6183. if (!(priv->power_mode & IWL_POWER_ENABLED))
  6184. p += sprintf(p, " OFF\n");
  6185. else
  6186. p += sprintf(p, " \n");
  6187. return (p - buf + 1);
  6188. }
  6189. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  6190. store_power_level);
  6191. static ssize_t show_channels(struct device *d,
  6192. struct device_attribute *attr, char *buf)
  6193. {
  6194. /* all this shit doesn't belong into sysfs anyway */
  6195. return 0;
  6196. }
  6197. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  6198. static ssize_t show_statistics(struct device *d,
  6199. struct device_attribute *attr, char *buf)
  6200. {
  6201. struct iwl_priv *priv = dev_get_drvdata(d);
  6202. u32 size = sizeof(struct iwl4965_notif_statistics);
  6203. u32 len = 0, ofs = 0;
  6204. u8 *data = (u8 *) & priv->statistics;
  6205. int rc = 0;
  6206. if (!iwl_is_alive(priv))
  6207. return -EAGAIN;
  6208. mutex_lock(&priv->mutex);
  6209. rc = iwl4965_send_statistics_request(priv);
  6210. mutex_unlock(&priv->mutex);
  6211. if (rc) {
  6212. len = sprintf(buf,
  6213. "Error sending statistics request: 0x%08X\n", rc);
  6214. return len;
  6215. }
  6216. while (size && (PAGE_SIZE - len)) {
  6217. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  6218. PAGE_SIZE - len, 1);
  6219. len = strlen(buf);
  6220. if (PAGE_SIZE - len)
  6221. buf[len++] = '\n';
  6222. ofs += 16;
  6223. size -= min(size, 16U);
  6224. }
  6225. return len;
  6226. }
  6227. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  6228. static ssize_t show_antenna(struct device *d,
  6229. struct device_attribute *attr, char *buf)
  6230. {
  6231. struct iwl_priv *priv = dev_get_drvdata(d);
  6232. if (!iwl_is_alive(priv))
  6233. return -EAGAIN;
  6234. return sprintf(buf, "%d\n", priv->antenna);
  6235. }
  6236. static ssize_t store_antenna(struct device *d,
  6237. struct device_attribute *attr,
  6238. const char *buf, size_t count)
  6239. {
  6240. int ant;
  6241. struct iwl_priv *priv = dev_get_drvdata(d);
  6242. if (count == 0)
  6243. return 0;
  6244. if (sscanf(buf, "%1i", &ant) != 1) {
  6245. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  6246. return count;
  6247. }
  6248. if ((ant >= 0) && (ant <= 2)) {
  6249. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  6250. priv->antenna = (enum iwl4965_antenna)ant;
  6251. } else
  6252. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  6253. return count;
  6254. }
  6255. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  6256. static ssize_t show_status(struct device *d,
  6257. struct device_attribute *attr, char *buf)
  6258. {
  6259. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  6260. if (!iwl_is_alive(priv))
  6261. return -EAGAIN;
  6262. return sprintf(buf, "0x%08x\n", (int)priv->status);
  6263. }
  6264. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  6265. static ssize_t dump_error_log(struct device *d,
  6266. struct device_attribute *attr,
  6267. const char *buf, size_t count)
  6268. {
  6269. char *p = (char *)buf;
  6270. if (p[0] == '1')
  6271. iwl4965_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  6272. return strnlen(buf, count);
  6273. }
  6274. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  6275. static ssize_t dump_event_log(struct device *d,
  6276. struct device_attribute *attr,
  6277. const char *buf, size_t count)
  6278. {
  6279. char *p = (char *)buf;
  6280. if (p[0] == '1')
  6281. iwl4965_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  6282. return strnlen(buf, count);
  6283. }
  6284. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  6285. /*****************************************************************************
  6286. *
  6287. * driver setup and teardown
  6288. *
  6289. *****************************************************************************/
  6290. static void iwl4965_setup_deferred_work(struct iwl_priv *priv)
  6291. {
  6292. priv->workqueue = create_workqueue(DRV_NAME);
  6293. init_waitqueue_head(&priv->wait_command_queue);
  6294. INIT_WORK(&priv->up, iwl4965_bg_up);
  6295. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  6296. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  6297. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  6298. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  6299. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  6300. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  6301. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  6302. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  6303. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  6304. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  6305. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  6306. iwl4965_hw_setup_deferred_work(priv);
  6307. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  6308. iwl4965_irq_tasklet, (unsigned long)priv);
  6309. }
  6310. static void iwl4965_cancel_deferred_work(struct iwl_priv *priv)
  6311. {
  6312. iwl4965_hw_cancel_deferred_work(priv);
  6313. cancel_delayed_work_sync(&priv->init_alive_start);
  6314. cancel_delayed_work(&priv->scan_check);
  6315. cancel_delayed_work(&priv->alive_start);
  6316. cancel_delayed_work(&priv->post_associate);
  6317. cancel_work_sync(&priv->beacon_update);
  6318. }
  6319. static struct attribute *iwl4965_sysfs_entries[] = {
  6320. &dev_attr_antenna.attr,
  6321. &dev_attr_channels.attr,
  6322. &dev_attr_dump_errors.attr,
  6323. &dev_attr_dump_events.attr,
  6324. &dev_attr_flags.attr,
  6325. &dev_attr_filter_flags.attr,
  6326. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6327. &dev_attr_measurement.attr,
  6328. #endif
  6329. &dev_attr_power_level.attr,
  6330. &dev_attr_retry_rate.attr,
  6331. &dev_attr_rs_window.attr,
  6332. &dev_attr_statistics.attr,
  6333. &dev_attr_status.attr,
  6334. &dev_attr_temperature.attr,
  6335. &dev_attr_tx_power.attr,
  6336. NULL
  6337. };
  6338. static struct attribute_group iwl4965_attribute_group = {
  6339. .name = NULL, /* put in device directory */
  6340. .attrs = iwl4965_sysfs_entries,
  6341. };
  6342. static struct ieee80211_ops iwl4965_hw_ops = {
  6343. .tx = iwl4965_mac_tx,
  6344. .start = iwl4965_mac_start,
  6345. .stop = iwl4965_mac_stop,
  6346. .add_interface = iwl4965_mac_add_interface,
  6347. .remove_interface = iwl4965_mac_remove_interface,
  6348. .config = iwl4965_mac_config,
  6349. .config_interface = iwl4965_mac_config_interface,
  6350. .configure_filter = iwl4965_configure_filter,
  6351. .set_key = iwl4965_mac_set_key,
  6352. .update_tkip_key = iwl4965_mac_update_tkip_key,
  6353. .get_stats = iwl4965_mac_get_stats,
  6354. .get_tx_stats = iwl4965_mac_get_tx_stats,
  6355. .conf_tx = iwl4965_mac_conf_tx,
  6356. .get_tsf = iwl4965_mac_get_tsf,
  6357. .reset_tsf = iwl4965_mac_reset_tsf,
  6358. .beacon_update = iwl4965_mac_beacon_update,
  6359. .bss_info_changed = iwl4965_bss_info_changed,
  6360. #ifdef CONFIG_IWL4965_HT
  6361. .ampdu_action = iwl4965_mac_ampdu_action,
  6362. #endif /* CONFIG_IWL4965_HT */
  6363. .hw_scan = iwl4965_mac_hw_scan
  6364. };
  6365. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  6366. {
  6367. int err = 0;
  6368. struct iwl_priv *priv;
  6369. struct ieee80211_hw *hw;
  6370. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  6371. unsigned long flags;
  6372. DECLARE_MAC_BUF(mac);
  6373. /************************
  6374. * 1. Allocating HW data
  6375. ************************/
  6376. /* Disabling hardware scan means that mac80211 will perform scans
  6377. * "the hard way", rather than using device's scan. */
  6378. if (cfg->mod_params->disable_hw_scan) {
  6379. IWL_DEBUG_INFO("Disabling hw_scan\n");
  6380. iwl4965_hw_ops.hw_scan = NULL;
  6381. }
  6382. hw = iwl_alloc_all(cfg, &iwl4965_hw_ops);
  6383. if (!hw) {
  6384. err = -ENOMEM;
  6385. goto out;
  6386. }
  6387. priv = hw->priv;
  6388. /* At this point both hw and priv are allocated. */
  6389. SET_IEEE80211_DEV(hw, &pdev->dev);
  6390. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  6391. priv->cfg = cfg;
  6392. priv->pci_dev = pdev;
  6393. #ifdef CONFIG_IWLWIFI_DEBUG
  6394. iwl_debug_level = priv->cfg->mod_params->debug;
  6395. atomic_set(&priv->restrict_refcnt, 0);
  6396. #endif
  6397. /**************************
  6398. * 2. Initializing PCI bus
  6399. **************************/
  6400. if (pci_enable_device(pdev)) {
  6401. err = -ENODEV;
  6402. goto out_ieee80211_free_hw;
  6403. }
  6404. pci_set_master(pdev);
  6405. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  6406. if (!err)
  6407. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  6408. if (err) {
  6409. printk(KERN_WARNING DRV_NAME
  6410. ": No suitable DMA available.\n");
  6411. goto out_pci_disable_device;
  6412. }
  6413. err = pci_request_regions(pdev, DRV_NAME);
  6414. if (err)
  6415. goto out_pci_disable_device;
  6416. pci_set_drvdata(pdev, priv);
  6417. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  6418. * PCI Tx retries from interfering with C3 CPU state */
  6419. pci_write_config_byte(pdev, 0x41, 0x00);
  6420. /***********************
  6421. * 3. Read REV register
  6422. ***********************/
  6423. priv->hw_base = pci_iomap(pdev, 0, 0);
  6424. if (!priv->hw_base) {
  6425. err = -ENODEV;
  6426. goto out_pci_release_regions;
  6427. }
  6428. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  6429. (unsigned long long) pci_resource_len(pdev, 0));
  6430. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  6431. printk(KERN_INFO DRV_NAME
  6432. ": Detected Intel Wireless WiFi Link %s\n", priv->cfg->name);
  6433. /*****************
  6434. * 4. Read EEPROM
  6435. *****************/
  6436. /* nic init */
  6437. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  6438. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  6439. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  6440. err = iwl_poll_bit(priv, CSR_GP_CNTRL,
  6441. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  6442. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  6443. if (err < 0) {
  6444. IWL_DEBUG_INFO("Failed to init the card\n");
  6445. goto out_iounmap;
  6446. }
  6447. /* Read the EEPROM */
  6448. err = iwl_eeprom_init(priv);
  6449. if (err) {
  6450. IWL_ERROR("Unable to init EEPROM\n");
  6451. goto out_iounmap;
  6452. }
  6453. /* MAC Address location in EEPROM same for 3945/4965 */
  6454. iwl_eeprom_get_mac(priv, priv->mac_addr);
  6455. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  6456. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  6457. /************************
  6458. * 5. Setup HW constants
  6459. ************************/
  6460. /* Device-specific setup */
  6461. if (iwl4965_hw_set_hw_setting(priv)) {
  6462. IWL_ERROR("failed to set hw settings\n");
  6463. goto out_iounmap;
  6464. }
  6465. /*******************
  6466. * 6. Setup hw/priv
  6467. *******************/
  6468. err = iwl_setup(priv);
  6469. if (err)
  6470. goto out_unset_hw_settings;
  6471. /* At this point both hw and priv are initialized. */
  6472. /**********************************
  6473. * 7. Initialize module parameters
  6474. **********************************/
  6475. /* Disable radio (SW RF KILL) via parameter when loading driver */
  6476. if (priv->cfg->mod_params->disable) {
  6477. set_bit(STATUS_RF_KILL_SW, &priv->status);
  6478. IWL_DEBUG_INFO("Radio disabled.\n");
  6479. }
  6480. if (priv->cfg->mod_params->enable_qos)
  6481. priv->qos_data.qos_enable = 1;
  6482. /********************
  6483. * 8. Setup services
  6484. ********************/
  6485. spin_lock_irqsave(&priv->lock, flags);
  6486. iwl4965_disable_interrupts(priv);
  6487. spin_unlock_irqrestore(&priv->lock, flags);
  6488. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6489. if (err) {
  6490. IWL_ERROR("failed to create sysfs device attributes\n");
  6491. goto out_unset_hw_settings;
  6492. }
  6493. err = iwl_dbgfs_register(priv, DRV_NAME);
  6494. if (err) {
  6495. IWL_ERROR("failed to create debugfs files\n");
  6496. goto out_remove_sysfs;
  6497. }
  6498. iwl4965_setup_deferred_work(priv);
  6499. iwl4965_setup_rx_handlers(priv);
  6500. /********************
  6501. * 9. Conclude
  6502. ********************/
  6503. pci_save_state(pdev);
  6504. pci_disable_device(pdev);
  6505. /* notify iwlcore to init */
  6506. iwlcore_low_level_notify(priv, IWLCORE_INIT_EVT);
  6507. return 0;
  6508. out_remove_sysfs:
  6509. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6510. out_unset_hw_settings:
  6511. iwl4965_unset_hw_setting(priv);
  6512. out_iounmap:
  6513. pci_iounmap(pdev, priv->hw_base);
  6514. out_pci_release_regions:
  6515. pci_release_regions(pdev);
  6516. pci_set_drvdata(pdev, NULL);
  6517. out_pci_disable_device:
  6518. pci_disable_device(pdev);
  6519. out_ieee80211_free_hw:
  6520. ieee80211_free_hw(priv->hw);
  6521. out:
  6522. return err;
  6523. }
  6524. static void __devexit iwl4965_pci_remove(struct pci_dev *pdev)
  6525. {
  6526. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6527. struct list_head *p, *q;
  6528. int i;
  6529. unsigned long flags;
  6530. if (!priv)
  6531. return;
  6532. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  6533. if (priv->mac80211_registered) {
  6534. ieee80211_unregister_hw(priv->hw);
  6535. priv->mac80211_registered = 0;
  6536. }
  6537. set_bit(STATUS_EXIT_PENDING, &priv->status);
  6538. iwl4965_down(priv);
  6539. /* make sure we flush any pending irq or
  6540. * tasklet for the driver
  6541. */
  6542. spin_lock_irqsave(&priv->lock, flags);
  6543. iwl4965_disable_interrupts(priv);
  6544. spin_unlock_irqrestore(&priv->lock, flags);
  6545. iwl_synchronize_irq(priv);
  6546. /* Free MAC hash list for ADHOC */
  6547. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  6548. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  6549. list_del(p);
  6550. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  6551. }
  6552. }
  6553. iwlcore_low_level_notify(priv, IWLCORE_REMOVE_EVT);
  6554. iwl_dbgfs_unregister(priv);
  6555. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  6556. iwl4965_dealloc_ucode_pci(priv);
  6557. if (priv->rxq.bd)
  6558. iwl4965_rx_queue_free(priv, &priv->rxq);
  6559. iwl4965_hw_txq_ctx_free(priv);
  6560. iwl4965_unset_hw_setting(priv);
  6561. iwlcore_clear_stations_table(priv);
  6562. /*netif_stop_queue(dev); */
  6563. flush_workqueue(priv->workqueue);
  6564. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  6565. * priv->workqueue... so we can't take down the workqueue
  6566. * until now... */
  6567. destroy_workqueue(priv->workqueue);
  6568. priv->workqueue = NULL;
  6569. pci_iounmap(pdev, priv->hw_base);
  6570. pci_release_regions(pdev);
  6571. pci_disable_device(pdev);
  6572. pci_set_drvdata(pdev, NULL);
  6573. iwl_free_channel_map(priv);
  6574. iwl4965_free_geos(priv);
  6575. if (priv->ibss_beacon)
  6576. dev_kfree_skb(priv->ibss_beacon);
  6577. ieee80211_free_hw(priv->hw);
  6578. }
  6579. #ifdef CONFIG_PM
  6580. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  6581. {
  6582. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6583. if (priv->is_open) {
  6584. set_bit(STATUS_IN_SUSPEND, &priv->status);
  6585. iwl4965_mac_stop(priv->hw);
  6586. priv->is_open = 1;
  6587. }
  6588. pci_set_power_state(pdev, PCI_D3hot);
  6589. return 0;
  6590. }
  6591. static int iwl4965_pci_resume(struct pci_dev *pdev)
  6592. {
  6593. struct iwl_priv *priv = pci_get_drvdata(pdev);
  6594. pci_set_power_state(pdev, PCI_D0);
  6595. if (priv->is_open)
  6596. iwl4965_mac_start(priv->hw);
  6597. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  6598. return 0;
  6599. }
  6600. #endif /* CONFIG_PM */
  6601. /*****************************************************************************
  6602. *
  6603. * driver and module entry point
  6604. *
  6605. *****************************************************************************/
  6606. static struct pci_driver iwl4965_driver = {
  6607. .name = DRV_NAME,
  6608. .id_table = iwl4965_hw_card_ids,
  6609. .probe = iwl4965_pci_probe,
  6610. .remove = __devexit_p(iwl4965_pci_remove),
  6611. #ifdef CONFIG_PM
  6612. .suspend = iwl4965_pci_suspend,
  6613. .resume = iwl4965_pci_resume,
  6614. #endif
  6615. };
  6616. static int __init iwl4965_init(void)
  6617. {
  6618. int ret;
  6619. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6620. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6621. ret = iwl4965_rate_control_register();
  6622. if (ret) {
  6623. IWL_ERROR("Unable to register rate control algorithm: %d\n", ret);
  6624. return ret;
  6625. }
  6626. ret = pci_register_driver(&iwl4965_driver);
  6627. if (ret) {
  6628. IWL_ERROR("Unable to initialize PCI module\n");
  6629. goto error_register;
  6630. }
  6631. #ifdef CONFIG_IWLWIFI_DEBUG
  6632. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6633. if (ret) {
  6634. IWL_ERROR("Unable to create driver sysfs file\n");
  6635. goto error_debug;
  6636. }
  6637. #endif
  6638. return ret;
  6639. #ifdef CONFIG_IWLWIFI_DEBUG
  6640. error_debug:
  6641. pci_unregister_driver(&iwl4965_driver);
  6642. #endif
  6643. error_register:
  6644. iwl4965_rate_control_unregister();
  6645. return ret;
  6646. }
  6647. static void __exit iwl4965_exit(void)
  6648. {
  6649. #ifdef CONFIG_IWLWIFI_DEBUG
  6650. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  6651. #endif
  6652. pci_unregister_driver(&iwl4965_driver);
  6653. iwl4965_rate_control_unregister();
  6654. }
  6655. module_exit(iwl4965_exit);
  6656. module_init(iwl4965_init);