cx88-dvb.c 29 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  49. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  50. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  51. MODULE_LICENSE("GPL");
  52. static unsigned int debug;
  53. module_param(debug, int, 0644);
  54. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  55. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  56. #define dprintk(level,fmt, arg...) if (debug >= level) \
  57. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  58. /* ------------------------------------------------------------------ */
  59. static int dvb_buf_setup(struct videobuf_queue *q,
  60. unsigned int *count, unsigned int *size)
  61. {
  62. struct cx8802_dev *dev = q->priv_data;
  63. dev->ts_packet_size = 188 * 4;
  64. dev->ts_packet_count = 32;
  65. *size = dev->ts_packet_size * dev->ts_packet_count;
  66. *count = 32;
  67. return 0;
  68. }
  69. static int dvb_buf_prepare(struct videobuf_queue *q,
  70. struct videobuf_buffer *vb, enum v4l2_field field)
  71. {
  72. struct cx8802_dev *dev = q->priv_data;
  73. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  74. }
  75. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  79. }
  80. static void dvb_buf_release(struct videobuf_queue *q,
  81. struct videobuf_buffer *vb)
  82. {
  83. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  84. }
  85. static struct videobuf_queue_ops dvb_qops = {
  86. .buf_setup = dvb_buf_setup,
  87. .buf_prepare = dvb_buf_prepare,
  88. .buf_queue = dvb_buf_queue,
  89. .buf_release = dvb_buf_release,
  90. };
  91. /* ------------------------------------------------------------------ */
  92. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  93. {
  94. struct cx8802_dev *dev= fe->dvb->priv;
  95. struct cx8802_driver *drv = NULL;
  96. int ret = 0;
  97. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  98. if (drv) {
  99. if (acquire)
  100. ret = drv->request_acquire(drv);
  101. else
  102. ret = drv->request_release(drv);
  103. }
  104. return ret;
  105. }
  106. /* ------------------------------------------------------------------ */
  107. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  108. {
  109. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  110. static u8 reset [] = { RESET, 0x80 };
  111. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  112. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  113. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  114. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  115. mt352_write(fe, clock_config, sizeof(clock_config));
  116. udelay(200);
  117. mt352_write(fe, reset, sizeof(reset));
  118. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  119. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  120. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  121. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  122. return 0;
  123. }
  124. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  125. {
  126. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  127. static u8 reset [] = { RESET, 0x80 };
  128. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  129. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  130. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  131. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  132. mt352_write(fe, clock_config, sizeof(clock_config));
  133. udelay(200);
  134. mt352_write(fe, reset, sizeof(reset));
  135. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  136. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  137. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  138. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  139. return 0;
  140. }
  141. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  142. {
  143. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  144. static u8 reset [] = { 0x50, 0x80 };
  145. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  146. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  147. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  148. static u8 dntv_extra[] = { 0xB5, 0x7A };
  149. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  150. mt352_write(fe, clock_config, sizeof(clock_config));
  151. udelay(2000);
  152. mt352_write(fe, reset, sizeof(reset));
  153. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  154. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  155. udelay(2000);
  156. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  157. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  158. return 0;
  159. }
  160. static struct mt352_config dvico_fusionhdtv = {
  161. .demod_address = 0x0f,
  162. .demod_init = dvico_fusionhdtv_demod_init,
  163. };
  164. static struct mt352_config dntv_live_dvbt_config = {
  165. .demod_address = 0x0f,
  166. .demod_init = dntv_live_dvbt_demod_init,
  167. };
  168. static struct mt352_config dvico_fusionhdtv_dual = {
  169. .demod_address = 0x0f,
  170. .demod_init = dvico_dual_demod_init,
  171. };
  172. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  173. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  174. {
  175. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  176. static u8 reset [] = { 0x50, 0x80 };
  177. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  178. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  179. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  180. static u8 dntv_extra[] = { 0xB5, 0x7A };
  181. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  182. mt352_write(fe, clock_config, sizeof(clock_config));
  183. udelay(2000);
  184. mt352_write(fe, reset, sizeof(reset));
  185. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  186. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  187. udelay(2000);
  188. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  189. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  190. return 0;
  191. }
  192. static struct mt352_config dntv_live_dvbt_pro_config = {
  193. .demod_address = 0x0f,
  194. .no_tuner = 1,
  195. .demod_init = dntv_live_dvbt_pro_demod_init,
  196. };
  197. #endif
  198. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  199. .demod_address = 0x0f,
  200. .no_tuner = 1,
  201. };
  202. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  203. .demod_address = 0x0f,
  204. .if2 = 45600,
  205. .no_tuner = 1,
  206. };
  207. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  208. .demod_address = 0x0f,
  209. .if2 = 4560,
  210. .no_tuner = 1,
  211. .demod_init = dvico_fusionhdtv_demod_init,
  212. };
  213. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  214. .demod_address = 0x0f,
  215. };
  216. static struct cx22702_config connexant_refboard_config = {
  217. .demod_address = 0x43,
  218. .output_mode = CX22702_SERIAL_OUTPUT,
  219. };
  220. static struct cx22702_config hauppauge_hvr_config = {
  221. .demod_address = 0x63,
  222. .output_mode = CX22702_SERIAL_OUTPUT,
  223. };
  224. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  225. {
  226. struct cx8802_dev *dev= fe->dvb->priv;
  227. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  228. return 0;
  229. }
  230. static struct or51132_config pchdtv_hd3000 = {
  231. .demod_address = 0x15,
  232. .set_ts_params = or51132_set_ts_param,
  233. };
  234. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  235. {
  236. struct cx8802_dev *dev= fe->dvb->priv;
  237. struct cx88_core *core = dev->core;
  238. dprintk(1, "%s: index = %d\n", __func__, index);
  239. if (index == 0)
  240. cx_clear(MO_GP0_IO, 8);
  241. else
  242. cx_set(MO_GP0_IO, 8);
  243. return 0;
  244. }
  245. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  246. {
  247. struct cx8802_dev *dev= fe->dvb->priv;
  248. if (is_punctured)
  249. dev->ts_gen_cntrl |= 0x04;
  250. else
  251. dev->ts_gen_cntrl &= ~0x04;
  252. return 0;
  253. }
  254. static struct lgdt330x_config fusionhdtv_3_gold = {
  255. .demod_address = 0x0e,
  256. .demod_chip = LGDT3302,
  257. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  258. .set_ts_params = lgdt330x_set_ts_param,
  259. };
  260. static struct lgdt330x_config fusionhdtv_5_gold = {
  261. .demod_address = 0x0e,
  262. .demod_chip = LGDT3303,
  263. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  264. .set_ts_params = lgdt330x_set_ts_param,
  265. };
  266. static struct lgdt330x_config pchdtv_hd5500 = {
  267. .demod_address = 0x59,
  268. .demod_chip = LGDT3303,
  269. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  270. .set_ts_params = lgdt330x_set_ts_param,
  271. };
  272. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  273. {
  274. struct cx8802_dev *dev= fe->dvb->priv;
  275. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  276. return 0;
  277. }
  278. static struct nxt200x_config ati_hdtvwonder = {
  279. .demod_address = 0x0a,
  280. .set_ts_params = nxt200x_set_ts_param,
  281. };
  282. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  283. int is_punctured)
  284. {
  285. struct cx8802_dev *dev= fe->dvb->priv;
  286. dev->ts_gen_cntrl = 0x02;
  287. return 0;
  288. }
  289. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  290. fe_sec_voltage_t voltage)
  291. {
  292. struct cx8802_dev *dev= fe->dvb->priv;
  293. struct cx88_core *core = dev->core;
  294. if (voltage == SEC_VOLTAGE_OFF)
  295. cx_write(MO_GP0_IO, 0x000006fb);
  296. else
  297. cx_write(MO_GP0_IO, 0x000006f9);
  298. if (core->prev_set_voltage)
  299. return core->prev_set_voltage(fe, voltage);
  300. return 0;
  301. }
  302. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  303. fe_sec_voltage_t voltage)
  304. {
  305. struct cx8802_dev *dev= fe->dvb->priv;
  306. struct cx88_core *core = dev->core;
  307. if (voltage == SEC_VOLTAGE_OFF) {
  308. dprintk(1,"LNB Voltage OFF\n");
  309. cx_write(MO_GP0_IO, 0x0000efff);
  310. }
  311. if (core->prev_set_voltage)
  312. return core->prev_set_voltage(fe, voltage);
  313. return 0;
  314. }
  315. static int cx88_pci_nano_callback(void *ptr, int command, int arg)
  316. {
  317. struct cx88_core *core = ptr;
  318. switch (command) {
  319. case XC2028_TUNER_RESET:
  320. /* Send the tuner in then out of reset */
  321. dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __func__, arg);
  322. switch (core->boardnr) {
  323. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  324. /* GPIO-4 xc3028 tuner */
  325. cx_set(MO_GP0_IO, 0x00001000);
  326. cx_clear(MO_GP0_IO, 0x00000010);
  327. msleep(100);
  328. cx_set(MO_GP0_IO, 0x00000010);
  329. msleep(100);
  330. break;
  331. }
  332. break;
  333. case XC2028_RESET_CLK:
  334. dprintk(1, "%s: XC2028_RESET_CLK %d\n", __func__, arg);
  335. break;
  336. default:
  337. dprintk(1, "%s: unknown command %d, arg %d\n", __func__,
  338. command, arg);
  339. return -EINVAL;
  340. }
  341. return 0;
  342. }
  343. static struct cx24123_config geniatech_dvbs_config = {
  344. .demod_address = 0x55,
  345. .set_ts_params = cx24123_set_ts_param,
  346. };
  347. static struct cx24123_config hauppauge_novas_config = {
  348. .demod_address = 0x55,
  349. .set_ts_params = cx24123_set_ts_param,
  350. };
  351. static struct cx24123_config kworld_dvbs_100_config = {
  352. .demod_address = 0x15,
  353. .set_ts_params = cx24123_set_ts_param,
  354. .lnb_polarity = 1,
  355. };
  356. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  357. .demod_address = 0x32 >> 1,
  358. .output_mode = S5H1409_PARALLEL_OUTPUT,
  359. .gpio = S5H1409_GPIO_ON,
  360. .qam_if = 44000,
  361. .inversion = S5H1409_INVERSION_OFF,
  362. .status_mode = S5H1409_DEMODLOCKING,
  363. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  364. };
  365. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  366. .demod_address = 0x32 >> 1,
  367. .output_mode = S5H1409_SERIAL_OUTPUT,
  368. .gpio = S5H1409_GPIO_OFF,
  369. .inversion = S5H1409_INVERSION_OFF,
  370. .status_mode = S5H1409_DEMODLOCKING,
  371. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  372. };
  373. static struct s5h1409_config kworld_atsc_120_config = {
  374. .demod_address = 0x32 >> 1,
  375. .output_mode = S5H1409_SERIAL_OUTPUT,
  376. .gpio = S5H1409_GPIO_OFF,
  377. .inversion = S5H1409_INVERSION_OFF,
  378. .status_mode = S5H1409_DEMODLOCKING,
  379. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  380. };
  381. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  382. .i2c_address = 0x64,
  383. .if_khz = 5380,
  384. .tuner_callback = cx88_tuner_callback,
  385. };
  386. static struct zl10353_config cx88_geniatech_x8000_mt = {
  387. .demod_address = (0x1e >> 1),
  388. .no_tuner = 1,
  389. };
  390. static struct s5h1411_config dvico_fusionhdtv7_config = {
  391. .output_mode = S5H1411_SERIAL_OUTPUT,
  392. .gpio = S5H1411_GPIO_ON,
  393. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  394. .qam_if = S5H1411_IF_44000,
  395. .vsb_if = S5H1411_IF_44000,
  396. .inversion = S5H1411_INVERSION_OFF,
  397. .status_mode = S5H1411_DEMODLOCKING
  398. };
  399. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  400. .i2c_address = 0xc2 >> 1,
  401. .if_khz = 5380,
  402. .tuner_callback = cx88_tuner_callback,
  403. };
  404. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  405. {
  406. struct dvb_frontend *fe;
  407. struct xc2028_ctrl ctl;
  408. struct xc2028_config cfg = {
  409. .i2c_adap = &dev->core->i2c_adap,
  410. .i2c_addr = addr,
  411. .ctrl = &ctl,
  412. .callback = cx88_tuner_callback,
  413. };
  414. if (!dev->dvb.frontend) {
  415. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  416. "Can't attach xc3028\n",
  417. dev->core->name);
  418. return -EINVAL;
  419. }
  420. /*
  421. * Some xc3028 devices may be hidden by an I2C gate. This is known
  422. * to happen with some s5h1409-based devices.
  423. * Now that I2C gate is open, sets up xc3028 configuration
  424. */
  425. cx88_setup_xc3028(dev->core, &ctl);
  426. fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
  427. if (!fe) {
  428. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  429. dev->core->name);
  430. return -EINVAL;
  431. }
  432. printk(KERN_INFO "%s/2: xc3028 attached\n",
  433. dev->core->name);
  434. return 0;
  435. }
  436. static int dvb_register(struct cx8802_dev *dev)
  437. {
  438. struct cx88_core *core = dev->core;
  439. /* init struct videobuf_dvb */
  440. dev->dvb.name = core->name;
  441. dev->ts_gen_cntrl = 0x0c;
  442. /* init frontend */
  443. switch (core->boardnr) {
  444. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  445. dev->dvb.frontend = dvb_attach(cx22702_attach,
  446. &connexant_refboard_config,
  447. &core->i2c_adap);
  448. if (dev->dvb.frontend != NULL) {
  449. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  450. 0x61, &core->i2c_adap,
  451. DVB_PLL_THOMSON_DTT759X))
  452. goto frontend_detach;
  453. }
  454. break;
  455. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  456. case CX88_BOARD_CONEXANT_DVB_T1:
  457. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  458. case CX88_BOARD_WINFAST_DTV1000:
  459. dev->dvb.frontend = dvb_attach(cx22702_attach,
  460. &connexant_refboard_config,
  461. &core->i2c_adap);
  462. if (dev->dvb.frontend != NULL) {
  463. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  464. 0x60, &core->i2c_adap,
  465. DVB_PLL_THOMSON_DTT7579))
  466. goto frontend_detach;
  467. }
  468. break;
  469. case CX88_BOARD_WINFAST_DTV2000H:
  470. case CX88_BOARD_HAUPPAUGE_HVR1100:
  471. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  472. case CX88_BOARD_HAUPPAUGE_HVR1300:
  473. case CX88_BOARD_HAUPPAUGE_HVR3000:
  474. dev->dvb.frontend = dvb_attach(cx22702_attach,
  475. &hauppauge_hvr_config,
  476. &core->i2c_adap);
  477. if (dev->dvb.frontend != NULL) {
  478. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  479. &core->i2c_adap, 0x61,
  480. TUNER_PHILIPS_FMD1216ME_MK3))
  481. goto frontend_detach;
  482. }
  483. break;
  484. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  485. dev->dvb.frontend = dvb_attach(mt352_attach,
  486. &dvico_fusionhdtv,
  487. &core->i2c_adap);
  488. if (dev->dvb.frontend != NULL) {
  489. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  490. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  491. goto frontend_detach;
  492. break;
  493. }
  494. /* ZL10353 replaces MT352 on later cards */
  495. dev->dvb.frontend = dvb_attach(zl10353_attach,
  496. &dvico_fusionhdtv_plus_v1_1,
  497. &core->i2c_adap);
  498. if (dev->dvb.frontend != NULL) {
  499. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  500. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  501. goto frontend_detach;
  502. }
  503. break;
  504. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  505. /* The tin box says DEE1601, but it seems to be DTT7579
  506. * compatible, with a slightly different MT352 AGC gain. */
  507. dev->dvb.frontend = dvb_attach(mt352_attach,
  508. &dvico_fusionhdtv_dual,
  509. &core->i2c_adap);
  510. if (dev->dvb.frontend != NULL) {
  511. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  512. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  513. goto frontend_detach;
  514. break;
  515. }
  516. /* ZL10353 replaces MT352 on later cards */
  517. dev->dvb.frontend = dvb_attach(zl10353_attach,
  518. &dvico_fusionhdtv_plus_v1_1,
  519. &core->i2c_adap);
  520. if (dev->dvb.frontend != NULL) {
  521. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  522. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  523. goto frontend_detach;
  524. }
  525. break;
  526. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  527. dev->dvb.frontend = dvb_attach(mt352_attach,
  528. &dvico_fusionhdtv,
  529. &core->i2c_adap);
  530. if (dev->dvb.frontend != NULL) {
  531. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  532. 0x61, NULL, DVB_PLL_LG_Z201))
  533. goto frontend_detach;
  534. }
  535. break;
  536. case CX88_BOARD_KWORLD_DVB_T:
  537. case CX88_BOARD_DNTV_LIVE_DVB_T:
  538. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  539. dev->dvb.frontend = dvb_attach(mt352_attach,
  540. &dntv_live_dvbt_config,
  541. &core->i2c_adap);
  542. if (dev->dvb.frontend != NULL) {
  543. if (!dvb_attach(dvb_pll_attach, dev->dvb.frontend,
  544. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  545. goto frontend_detach;
  546. }
  547. break;
  548. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  549. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  550. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  551. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  552. &dev->vp3054->adap);
  553. if (dev->dvb.frontend != NULL) {
  554. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  555. &core->i2c_adap, 0x61,
  556. TUNER_PHILIPS_FMD1216ME_MK3))
  557. goto frontend_detach;
  558. }
  559. #else
  560. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  561. core->name);
  562. #endif
  563. break;
  564. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  565. dev->dvb.frontend = dvb_attach(zl10353_attach,
  566. &dvico_fusionhdtv_hybrid,
  567. &core->i2c_adap);
  568. if (dev->dvb.frontend != NULL) {
  569. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  570. &core->i2c_adap, 0x61,
  571. TUNER_THOMSON_FE6600))
  572. goto frontend_detach;
  573. }
  574. break;
  575. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  576. dev->dvb.frontend = dvb_attach(zl10353_attach,
  577. &dvico_fusionhdtv_xc3028,
  578. &core->i2c_adap);
  579. if (dev->dvb.frontend == NULL)
  580. dev->dvb.frontend = dvb_attach(mt352_attach,
  581. &dvico_fusionhdtv_mt352_xc3028,
  582. &core->i2c_adap);
  583. /*
  584. * On this board, the demod provides the I2C bus pullup.
  585. * We must not permit gate_ctrl to be performed, or
  586. * the xc3028 cannot communicate on the bus.
  587. */
  588. if (dev->dvb.frontend)
  589. dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  590. if (attach_xc3028(0x61, dev) < 0)
  591. return -EINVAL;
  592. break;
  593. case CX88_BOARD_PCHDTV_HD3000:
  594. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  595. &core->i2c_adap);
  596. if (dev->dvb.frontend != NULL) {
  597. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  598. &core->i2c_adap, 0x61,
  599. TUNER_THOMSON_DTT761X))
  600. goto frontend_detach;
  601. }
  602. break;
  603. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  604. dev->ts_gen_cntrl = 0x08;
  605. /* Do a hardware reset of chip before using it. */
  606. cx_clear(MO_GP0_IO, 1);
  607. mdelay(100);
  608. cx_set(MO_GP0_IO, 1);
  609. mdelay(200);
  610. /* Select RF connector callback */
  611. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  612. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  613. &fusionhdtv_3_gold,
  614. &core->i2c_adap);
  615. if (dev->dvb.frontend != NULL) {
  616. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  617. &core->i2c_adap, 0x61,
  618. TUNER_MICROTUNE_4042FI5))
  619. goto frontend_detach;
  620. }
  621. break;
  622. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  623. dev->ts_gen_cntrl = 0x08;
  624. /* Do a hardware reset of chip before using it. */
  625. cx_clear(MO_GP0_IO, 1);
  626. mdelay(100);
  627. cx_set(MO_GP0_IO, 9);
  628. mdelay(200);
  629. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  630. &fusionhdtv_3_gold,
  631. &core->i2c_adap);
  632. if (dev->dvb.frontend != NULL) {
  633. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  634. &core->i2c_adap, 0x61,
  635. TUNER_THOMSON_DTT761X))
  636. goto frontend_detach;
  637. }
  638. break;
  639. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  640. dev->ts_gen_cntrl = 0x08;
  641. /* Do a hardware reset of chip before using it. */
  642. cx_clear(MO_GP0_IO, 1);
  643. mdelay(100);
  644. cx_set(MO_GP0_IO, 1);
  645. mdelay(200);
  646. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  647. &fusionhdtv_5_gold,
  648. &core->i2c_adap);
  649. if (dev->dvb.frontend != NULL) {
  650. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  651. &core->i2c_adap, 0x61,
  652. TUNER_LG_TDVS_H06XF))
  653. goto frontend_detach;
  654. if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
  655. &core->i2c_adap, 0x43))
  656. goto frontend_detach;
  657. }
  658. break;
  659. case CX88_BOARD_PCHDTV_HD5500:
  660. dev->ts_gen_cntrl = 0x08;
  661. /* Do a hardware reset of chip before using it. */
  662. cx_clear(MO_GP0_IO, 1);
  663. mdelay(100);
  664. cx_set(MO_GP0_IO, 1);
  665. mdelay(200);
  666. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  667. &pchdtv_hd5500,
  668. &core->i2c_adap);
  669. if (dev->dvb.frontend != NULL) {
  670. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  671. &core->i2c_adap, 0x61,
  672. TUNER_LG_TDVS_H06XF))
  673. goto frontend_detach;
  674. if (!dvb_attach(tda9887_attach, dev->dvb.frontend,
  675. &core->i2c_adap, 0x43))
  676. goto frontend_detach;
  677. }
  678. break;
  679. case CX88_BOARD_ATI_HDTVWONDER:
  680. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  681. &ati_hdtvwonder,
  682. &core->i2c_adap);
  683. if (dev->dvb.frontend != NULL) {
  684. if (!dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  685. &core->i2c_adap, 0x61,
  686. TUNER_PHILIPS_TUV1236D))
  687. goto frontend_detach;
  688. }
  689. break;
  690. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  691. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  692. dev->dvb.frontend = dvb_attach(cx24123_attach,
  693. &hauppauge_novas_config,
  694. &core->i2c_adap);
  695. if (dev->dvb.frontend) {
  696. if (!dvb_attach(isl6421_attach, dev->dvb.frontend,
  697. &core->i2c_adap, 0x08, 0x00, 0x00))
  698. goto frontend_detach;
  699. }
  700. break;
  701. case CX88_BOARD_KWORLD_DVBS_100:
  702. dev->dvb.frontend = dvb_attach(cx24123_attach,
  703. &kworld_dvbs_100_config,
  704. &core->i2c_adap);
  705. if (dev->dvb.frontend) {
  706. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  707. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  708. }
  709. break;
  710. case CX88_BOARD_GENIATECH_DVBS:
  711. dev->dvb.frontend = dvb_attach(cx24123_attach,
  712. &geniatech_dvbs_config,
  713. &core->i2c_adap);
  714. if (dev->dvb.frontend) {
  715. core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  716. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  717. }
  718. break;
  719. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  720. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  721. &pinnacle_pctv_hd_800i_config,
  722. &core->i2c_adap);
  723. if (dev->dvb.frontend != NULL) {
  724. /* tuner_config.video_dev must point to
  725. * i2c_adap.algo_data
  726. */
  727. pinnacle_pctv_hd_800i_tuner_config.priv =
  728. core->i2c_adap.algo_data;
  729. if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
  730. &core->i2c_adap,
  731. &pinnacle_pctv_hd_800i_tuner_config))
  732. goto frontend_detach;
  733. }
  734. break;
  735. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  736. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  737. &dvico_hdtv5_pci_nano_config,
  738. &core->i2c_adap);
  739. if (dev->dvb.frontend != NULL) {
  740. struct dvb_frontend *fe;
  741. struct xc2028_config cfg = {
  742. .i2c_adap = &core->i2c_adap,
  743. .i2c_addr = 0x61,
  744. .callback = cx88_pci_nano_callback,
  745. };
  746. static struct xc2028_ctrl ctl = {
  747. .fname = "xc3028-v27.fw",
  748. .max_len = 64,
  749. .scode_table = XC3028_FE_OREN538,
  750. };
  751. fe = dvb_attach(xc2028_attach,
  752. dev->dvb.frontend, &cfg);
  753. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  754. fe->ops.tuner_ops.set_config(fe, &ctl);
  755. }
  756. break;
  757. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  758. dev->dvb.frontend = dvb_attach(zl10353_attach,
  759. &cx88_geniatech_x8000_mt,
  760. &core->i2c_adap);
  761. if (attach_xc3028(0x61, dev) < 0)
  762. goto frontend_detach;
  763. break;
  764. case CX88_BOARD_GENIATECH_X8000_MT:
  765. dev->ts_gen_cntrl = 0x00;
  766. dev->dvb.frontend = dvb_attach(zl10353_attach,
  767. &cx88_geniatech_x8000_mt,
  768. &core->i2c_adap);
  769. if (attach_xc3028(0x61, dev) < 0)
  770. goto frontend_detach;
  771. break;
  772. case CX88_BOARD_KWORLD_ATSC_120:
  773. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  774. &kworld_atsc_120_config,
  775. &core->i2c_adap);
  776. if (attach_xc3028(0x61, dev) < 0)
  777. goto frontend_detach;
  778. break;
  779. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  780. dev->dvb.frontend = dvb_attach(s5h1411_attach,
  781. &dvico_fusionhdtv7_config,
  782. &core->i2c_adap);
  783. if (dev->dvb.frontend != NULL) {
  784. /* tuner_config.video_dev must point to
  785. * i2c_adap.algo_data
  786. */
  787. dvico_fusionhdtv7_tuner_config.priv =
  788. core->i2c_adap.algo_data;
  789. if (!dvb_attach(xc5000_attach, dev->dvb.frontend,
  790. &core->i2c_adap,
  791. &dvico_fusionhdtv7_tuner_config))
  792. goto frontend_detach;
  793. }
  794. break;
  795. default:
  796. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  797. core->name);
  798. break;
  799. }
  800. if (NULL == dev->dvb.frontend) {
  801. printk(KERN_ERR
  802. "%s/2: frontend initialization failed\n",
  803. core->name);
  804. return -EINVAL;
  805. }
  806. /* Ensure all frontends negotiate bus access */
  807. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  808. /* Put the analog decoder in standby to keep it quiet */
  809. cx88_call_i2c_clients(core, TUNER_SET_STANDBY, NULL);
  810. /* register everything */
  811. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev,
  812. &dev->pci->dev, adapter_nr);
  813. frontend_detach:
  814. if (dev->dvb.frontend) {
  815. dvb_frontend_detach(dev->dvb.frontend);
  816. dev->dvb.frontend = NULL;
  817. }
  818. return -EINVAL;
  819. }
  820. /* ----------------------------------------------------------- */
  821. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  822. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  823. {
  824. struct cx88_core *core = drv->core;
  825. int err = 0;
  826. dprintk( 1, "%s\n", __func__);
  827. switch (core->boardnr) {
  828. case CX88_BOARD_HAUPPAUGE_HVR1300:
  829. /* We arrive here with either the cx23416 or the cx22702
  830. * on the bus. Take the bus from the cx23416 and enable the
  831. * cx22702 demod
  832. */
  833. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  834. cx_clear(MO_GP0_IO, 0x00000004);
  835. udelay(1000);
  836. break;
  837. default:
  838. err = -ENODEV;
  839. }
  840. return err;
  841. }
  842. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  843. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  844. {
  845. struct cx88_core *core = drv->core;
  846. int err = 0;
  847. dprintk( 1, "%s\n", __func__);
  848. switch (core->boardnr) {
  849. case CX88_BOARD_HAUPPAUGE_HVR1300:
  850. /* Do Nothing, leave the cx22702 on the bus. */
  851. break;
  852. default:
  853. err = -ENODEV;
  854. }
  855. return err;
  856. }
  857. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  858. {
  859. struct cx88_core *core = drv->core;
  860. struct cx8802_dev *dev = drv->core->dvbdev;
  861. int err;
  862. dprintk( 1, "%s\n", __func__);
  863. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  864. core->boardnr,
  865. core->name,
  866. core->pci_bus,
  867. core->pci_slot);
  868. err = -ENODEV;
  869. if (!(core->board.mpeg & CX88_MPEG_DVB))
  870. goto fail_core;
  871. /* If vp3054 isn't enabled, a stub will just return 0 */
  872. err = vp3054_i2c_probe(dev);
  873. if (0 != err)
  874. goto fail_core;
  875. /* dvb stuff */
  876. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  877. videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
  878. &dev->pci->dev, &dev->slock,
  879. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  880. V4L2_FIELD_TOP,
  881. sizeof(struct cx88_buffer),
  882. dev);
  883. err = dvb_register(dev);
  884. if (err != 0)
  885. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  886. core->name, err);
  887. fail_core:
  888. return err;
  889. }
  890. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  891. {
  892. struct cx8802_dev *dev = drv->core->dvbdev;
  893. /* dvb */
  894. if (dev->dvb.frontend)
  895. videobuf_dvb_unregister(&dev->dvb);
  896. vp3054_i2c_remove(dev);
  897. return 0;
  898. }
  899. static struct cx8802_driver cx8802_dvb_driver = {
  900. .type_id = CX88_MPEG_DVB,
  901. .hw_access = CX8802_DRVCTL_SHARED,
  902. .probe = cx8802_dvb_probe,
  903. .remove = cx8802_dvb_remove,
  904. .advise_acquire = cx8802_dvb_advise_acquire,
  905. .advise_release = cx8802_dvb_advise_release,
  906. };
  907. static int dvb_init(void)
  908. {
  909. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  910. (CX88_VERSION_CODE >> 16) & 0xff,
  911. (CX88_VERSION_CODE >> 8) & 0xff,
  912. CX88_VERSION_CODE & 0xff);
  913. #ifdef SNAPSHOT
  914. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  915. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  916. #endif
  917. return cx8802_register_driver(&cx8802_dvb_driver);
  918. }
  919. static void dvb_fini(void)
  920. {
  921. cx8802_unregister_driver(&cx8802_dvb_driver);
  922. }
  923. module_init(dvb_init);
  924. module_exit(dvb_fini);
  925. /*
  926. * Local variables:
  927. * c-basic-offset: 8
  928. * compile-command: "make DVB=1"
  929. * End:
  930. */