swiotlb.c 27 KB

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  1. /*
  2. * Dynamic DMA mapping support.
  3. *
  4. * This implementation is a fallback for platforms that do not support
  5. * I/O TLBs (aka DMA address translation hardware).
  6. * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
  7. * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
  8. * Copyright (C) 2000, 2003 Hewlett-Packard Co
  9. * David Mosberger-Tang <davidm@hpl.hp.com>
  10. *
  11. * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
  12. * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
  13. * unnecessary i-cache flushing.
  14. * 04/07/.. ak Better overflow handling. Assorted fixes.
  15. * 05/09/10 linville Add support for syncing ranges, support syncing for
  16. * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
  17. */
  18. #include <linux/cache.h>
  19. #include <linux/dma-mapping.h>
  20. #include <linux/mm.h>
  21. #include <linux/module.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/swiotlb.h>
  24. #include <linux/string.h>
  25. #include <linux/types.h>
  26. #include <linux/ctype.h>
  27. #include <linux/highmem.h>
  28. #include <asm/io.h>
  29. #include <asm/dma.h>
  30. #include <asm/scatterlist.h>
  31. #include <linux/init.h>
  32. #include <linux/bootmem.h>
  33. #include <linux/iommu-helper.h>
  34. #define OFFSET(val,align) ((unsigned long) \
  35. ( (val) & ( (align) - 1)))
  36. #define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
  37. /*
  38. * Minimum IO TLB size to bother booting with. Systems with mainly
  39. * 64bit capable cards will only lightly use the swiotlb. If we can't
  40. * allocate a contiguous 1MB, we're probably in trouble anyway.
  41. */
  42. #define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
  43. /*
  44. * Enumeration for sync targets
  45. */
  46. enum dma_sync_target {
  47. SYNC_FOR_CPU = 0,
  48. SYNC_FOR_DEVICE = 1,
  49. };
  50. int swiotlb_force;
  51. /*
  52. * Used to do a quick range check in swiotlb_unmap_single and
  53. * swiotlb_sync_single_*, to see if the memory was in fact allocated by this
  54. * API.
  55. */
  56. static char *io_tlb_start, *io_tlb_end;
  57. /*
  58. * The number of IO TLB blocks (in groups of 64) betweeen io_tlb_start and
  59. * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
  60. */
  61. static unsigned long io_tlb_nslabs;
  62. /*
  63. * When the IOMMU overflows we return a fallback buffer. This sets the size.
  64. */
  65. static unsigned long io_tlb_overflow = 32*1024;
  66. void *io_tlb_overflow_buffer;
  67. /*
  68. * This is a free list describing the number of free entries available from
  69. * each index
  70. */
  71. static unsigned int *io_tlb_list;
  72. static unsigned int io_tlb_index;
  73. /*
  74. * We need to save away the original address corresponding to a mapped entry
  75. * for the sync operations.
  76. */
  77. static struct swiotlb_phys_addr {
  78. struct page *page;
  79. unsigned int offset;
  80. } *io_tlb_orig_addr;
  81. /*
  82. * Protect the above data structures in the map and unmap calls
  83. */
  84. static DEFINE_SPINLOCK(io_tlb_lock);
  85. static int __init
  86. setup_io_tlb_npages(char *str)
  87. {
  88. if (isdigit(*str)) {
  89. io_tlb_nslabs = simple_strtoul(str, &str, 0);
  90. /* avoid tail segment of size < IO_TLB_SEGSIZE */
  91. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  92. }
  93. if (*str == ',')
  94. ++str;
  95. if (!strcmp(str, "force"))
  96. swiotlb_force = 1;
  97. return 1;
  98. }
  99. __setup("swiotlb=", setup_io_tlb_npages);
  100. /* make io_tlb_overflow tunable too? */
  101. void * __weak __init swiotlb_alloc_boot(size_t size, unsigned long nslabs)
  102. {
  103. return alloc_bootmem_low_pages(size);
  104. }
  105. void * __weak swiotlb_alloc(unsigned order, unsigned long nslabs)
  106. {
  107. return (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN, order);
  108. }
  109. dma_addr_t __weak swiotlb_phys_to_bus(phys_addr_t paddr)
  110. {
  111. return paddr;
  112. }
  113. phys_addr_t __weak swiotlb_bus_to_phys(dma_addr_t baddr)
  114. {
  115. return baddr;
  116. }
  117. static dma_addr_t swiotlb_virt_to_bus(volatile void *address)
  118. {
  119. return swiotlb_phys_to_bus(virt_to_phys(address));
  120. }
  121. static void *swiotlb_bus_to_virt(dma_addr_t address)
  122. {
  123. return phys_to_virt(swiotlb_bus_to_phys(address));
  124. }
  125. int __weak swiotlb_arch_range_needs_mapping(void *ptr, size_t size)
  126. {
  127. return 0;
  128. }
  129. static dma_addr_t swiotlb_sg_to_bus(struct scatterlist *sg)
  130. {
  131. return swiotlb_phys_to_bus(page_to_phys(sg_page(sg)) + sg->offset);
  132. }
  133. static void swiotlb_print_info(unsigned long bytes)
  134. {
  135. phys_addr_t pstart, pend;
  136. dma_addr_t bstart, bend;
  137. pstart = virt_to_phys(io_tlb_start);
  138. pend = virt_to_phys(io_tlb_end);
  139. bstart = swiotlb_phys_to_bus(pstart);
  140. bend = swiotlb_phys_to_bus(pend);
  141. printk(KERN_INFO "Placing %luMB software IO TLB between %p - %p\n",
  142. bytes >> 20, io_tlb_start, io_tlb_end);
  143. if (pstart != bstart || pend != bend)
  144. printk(KERN_INFO "software IO TLB at phys %#llx - %#llx"
  145. " bus %#llx - %#llx\n",
  146. (unsigned long long)pstart,
  147. (unsigned long long)pend,
  148. (unsigned long long)bstart,
  149. (unsigned long long)bend);
  150. else
  151. printk(KERN_INFO "software IO TLB at phys %#llx - %#llx\n",
  152. (unsigned long long)pstart,
  153. (unsigned long long)pend);
  154. }
  155. /*
  156. * Statically reserve bounce buffer space and initialize bounce buffer data
  157. * structures for the software IO TLB used to implement the DMA API.
  158. */
  159. void __init
  160. swiotlb_init_with_default_size(size_t default_size)
  161. {
  162. unsigned long i, bytes;
  163. if (!io_tlb_nslabs) {
  164. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  165. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  166. }
  167. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  168. /*
  169. * Get IO TLB memory from the low pages
  170. */
  171. io_tlb_start = swiotlb_alloc_boot(bytes, io_tlb_nslabs);
  172. if (!io_tlb_start)
  173. panic("Cannot allocate SWIOTLB buffer");
  174. io_tlb_end = io_tlb_start + bytes;
  175. /*
  176. * Allocate and initialize the free list array. This array is used
  177. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  178. * between io_tlb_start and io_tlb_end.
  179. */
  180. io_tlb_list = alloc_bootmem(io_tlb_nslabs * sizeof(int));
  181. for (i = 0; i < io_tlb_nslabs; i++)
  182. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  183. io_tlb_index = 0;
  184. io_tlb_orig_addr = alloc_bootmem(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
  185. /*
  186. * Get the overflow emergency buffer
  187. */
  188. io_tlb_overflow_buffer = alloc_bootmem_low(io_tlb_overflow);
  189. if (!io_tlb_overflow_buffer)
  190. panic("Cannot allocate SWIOTLB overflow buffer!\n");
  191. swiotlb_print_info(bytes);
  192. }
  193. void __init
  194. swiotlb_init(void)
  195. {
  196. swiotlb_init_with_default_size(64 * (1<<20)); /* default to 64MB */
  197. }
  198. /*
  199. * Systems with larger DMA zones (those that don't support ISA) can
  200. * initialize the swiotlb later using the slab allocator if needed.
  201. * This should be just like above, but with some error catching.
  202. */
  203. int
  204. swiotlb_late_init_with_default_size(size_t default_size)
  205. {
  206. unsigned long i, bytes, req_nslabs = io_tlb_nslabs;
  207. unsigned int order;
  208. if (!io_tlb_nslabs) {
  209. io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
  210. io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
  211. }
  212. /*
  213. * Get IO TLB memory from the low pages
  214. */
  215. order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
  216. io_tlb_nslabs = SLABS_PER_PAGE << order;
  217. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  218. while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
  219. io_tlb_start = swiotlb_alloc(order, io_tlb_nslabs);
  220. if (io_tlb_start)
  221. break;
  222. order--;
  223. }
  224. if (!io_tlb_start)
  225. goto cleanup1;
  226. if (order != get_order(bytes)) {
  227. printk(KERN_WARNING "Warning: only able to allocate %ld MB "
  228. "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
  229. io_tlb_nslabs = SLABS_PER_PAGE << order;
  230. bytes = io_tlb_nslabs << IO_TLB_SHIFT;
  231. }
  232. io_tlb_end = io_tlb_start + bytes;
  233. memset(io_tlb_start, 0, bytes);
  234. /*
  235. * Allocate and initialize the free list array. This array is used
  236. * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
  237. * between io_tlb_start and io_tlb_end.
  238. */
  239. io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
  240. get_order(io_tlb_nslabs * sizeof(int)));
  241. if (!io_tlb_list)
  242. goto cleanup2;
  243. for (i = 0; i < io_tlb_nslabs; i++)
  244. io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
  245. io_tlb_index = 0;
  246. io_tlb_orig_addr = (struct swiotlb_phys_addr *)__get_free_pages(GFP_KERNEL,
  247. get_order(io_tlb_nslabs * sizeof(struct swiotlb_phys_addr)));
  248. if (!io_tlb_orig_addr)
  249. goto cleanup3;
  250. memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(struct swiotlb_phys_addr));
  251. /*
  252. * Get the overflow emergency buffer
  253. */
  254. io_tlb_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
  255. get_order(io_tlb_overflow));
  256. if (!io_tlb_overflow_buffer)
  257. goto cleanup4;
  258. swiotlb_print_info(bytes);
  259. return 0;
  260. cleanup4:
  261. free_pages((unsigned long)io_tlb_orig_addr, get_order(io_tlb_nslabs *
  262. sizeof(char *)));
  263. io_tlb_orig_addr = NULL;
  264. cleanup3:
  265. free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
  266. sizeof(int)));
  267. io_tlb_list = NULL;
  268. cleanup2:
  269. io_tlb_end = NULL;
  270. free_pages((unsigned long)io_tlb_start, order);
  271. io_tlb_start = NULL;
  272. cleanup1:
  273. io_tlb_nslabs = req_nslabs;
  274. return -ENOMEM;
  275. }
  276. static int
  277. address_needs_mapping(struct device *hwdev, dma_addr_t addr, size_t size)
  278. {
  279. return !is_buffer_dma_capable(dma_get_mask(hwdev), addr, size);
  280. }
  281. static inline int range_needs_mapping(void *ptr, size_t size)
  282. {
  283. return swiotlb_force || swiotlb_arch_range_needs_mapping(ptr, size);
  284. }
  285. static int is_swiotlb_buffer(char *addr)
  286. {
  287. return addr >= io_tlb_start && addr < io_tlb_end;
  288. }
  289. static struct swiotlb_phys_addr swiotlb_bus_to_phys_addr(char *dma_addr)
  290. {
  291. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  292. struct swiotlb_phys_addr buffer = io_tlb_orig_addr[index];
  293. buffer.offset += (long)dma_addr & ((1 << IO_TLB_SHIFT) - 1);
  294. buffer.page += buffer.offset >> PAGE_SHIFT;
  295. buffer.offset &= PAGE_SIZE - 1;
  296. return buffer;
  297. }
  298. static void
  299. __sync_single(struct swiotlb_phys_addr buffer, char *dma_addr, size_t size, int dir)
  300. {
  301. if (PageHighMem(buffer.page)) {
  302. size_t len, bytes;
  303. char *dev, *host, *kmp;
  304. len = size;
  305. while (len != 0) {
  306. unsigned long flags;
  307. bytes = len;
  308. if ((bytes + buffer.offset) > PAGE_SIZE)
  309. bytes = PAGE_SIZE - buffer.offset;
  310. local_irq_save(flags); /* protects KM_BOUNCE_READ */
  311. kmp = kmap_atomic(buffer.page, KM_BOUNCE_READ);
  312. dev = dma_addr + size - len;
  313. host = kmp + buffer.offset;
  314. if (dir == DMA_FROM_DEVICE)
  315. memcpy(host, dev, bytes);
  316. else
  317. memcpy(dev, host, bytes);
  318. kunmap_atomic(kmp, KM_BOUNCE_READ);
  319. local_irq_restore(flags);
  320. len -= bytes;
  321. buffer.page++;
  322. buffer.offset = 0;
  323. }
  324. } else {
  325. void *v = page_address(buffer.page) + buffer.offset;
  326. if (dir == DMA_TO_DEVICE)
  327. memcpy(dma_addr, v, size);
  328. else
  329. memcpy(v, dma_addr, size);
  330. }
  331. }
  332. /*
  333. * Allocates bounce buffer and returns its kernel virtual address.
  334. */
  335. static void *
  336. map_single(struct device *hwdev, struct swiotlb_phys_addr buffer, size_t size, int dir)
  337. {
  338. unsigned long flags;
  339. char *dma_addr;
  340. unsigned int nslots, stride, index, wrap;
  341. int i;
  342. unsigned long start_dma_addr;
  343. unsigned long mask;
  344. unsigned long offset_slots;
  345. unsigned long max_slots;
  346. struct swiotlb_phys_addr slot_buf;
  347. mask = dma_get_seg_boundary(hwdev);
  348. start_dma_addr = swiotlb_virt_to_bus(io_tlb_start) & mask;
  349. offset_slots = ALIGN(start_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  350. /*
  351. * Carefully handle integer overflow which can occur when mask == ~0UL.
  352. */
  353. max_slots = mask + 1
  354. ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
  355. : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
  356. /*
  357. * For mappings greater than a page, we limit the stride (and
  358. * hence alignment) to a page size.
  359. */
  360. nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  361. if (size > PAGE_SIZE)
  362. stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
  363. else
  364. stride = 1;
  365. BUG_ON(!nslots);
  366. /*
  367. * Find suitable number of IO TLB entries size that will fit this
  368. * request and allocate a buffer from that IO TLB pool.
  369. */
  370. spin_lock_irqsave(&io_tlb_lock, flags);
  371. index = ALIGN(io_tlb_index, stride);
  372. if (index >= io_tlb_nslabs)
  373. index = 0;
  374. wrap = index;
  375. do {
  376. while (iommu_is_span_boundary(index, nslots, offset_slots,
  377. max_slots)) {
  378. index += stride;
  379. if (index >= io_tlb_nslabs)
  380. index = 0;
  381. if (index == wrap)
  382. goto not_found;
  383. }
  384. /*
  385. * If we find a slot that indicates we have 'nslots' number of
  386. * contiguous buffers, we allocate the buffers from that slot
  387. * and mark the entries as '0' indicating unavailable.
  388. */
  389. if (io_tlb_list[index] >= nslots) {
  390. int count = 0;
  391. for (i = index; i < (int) (index + nslots); i++)
  392. io_tlb_list[i] = 0;
  393. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
  394. io_tlb_list[i] = ++count;
  395. dma_addr = io_tlb_start + (index << IO_TLB_SHIFT);
  396. /*
  397. * Update the indices to avoid searching in the next
  398. * round.
  399. */
  400. io_tlb_index = ((index + nslots) < io_tlb_nslabs
  401. ? (index + nslots) : 0);
  402. goto found;
  403. }
  404. index += stride;
  405. if (index >= io_tlb_nslabs)
  406. index = 0;
  407. } while (index != wrap);
  408. not_found:
  409. spin_unlock_irqrestore(&io_tlb_lock, flags);
  410. return NULL;
  411. found:
  412. spin_unlock_irqrestore(&io_tlb_lock, flags);
  413. /*
  414. * Save away the mapping from the original address to the DMA address.
  415. * This is needed when we sync the memory. Then we sync the buffer if
  416. * needed.
  417. */
  418. slot_buf = buffer;
  419. for (i = 0; i < nslots; i++) {
  420. slot_buf.page += slot_buf.offset >> PAGE_SHIFT;
  421. slot_buf.offset &= PAGE_SIZE - 1;
  422. io_tlb_orig_addr[index+i] = slot_buf;
  423. slot_buf.offset += 1 << IO_TLB_SHIFT;
  424. }
  425. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  426. __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
  427. return dma_addr;
  428. }
  429. /*
  430. * dma_addr is the kernel virtual address of the bounce buffer to unmap.
  431. */
  432. static void
  433. unmap_single(struct device *hwdev, char *dma_addr, size_t size, int dir)
  434. {
  435. unsigned long flags;
  436. int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
  437. int index = (dma_addr - io_tlb_start) >> IO_TLB_SHIFT;
  438. struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
  439. /*
  440. * First, sync the memory before unmapping the entry
  441. */
  442. if ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL))
  443. /*
  444. * bounce... copy the data back into the original buffer * and
  445. * delete the bounce buffer.
  446. */
  447. __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
  448. /*
  449. * Return the buffer to the free list by setting the corresponding
  450. * entries to indicate the number of contigous entries available.
  451. * While returning the entries to the free list, we merge the entries
  452. * with slots below and above the pool being returned.
  453. */
  454. spin_lock_irqsave(&io_tlb_lock, flags);
  455. {
  456. count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
  457. io_tlb_list[index + nslots] : 0);
  458. /*
  459. * Step 1: return the slots to the free list, merging the
  460. * slots with superceeding slots
  461. */
  462. for (i = index + nslots - 1; i >= index; i--)
  463. io_tlb_list[i] = ++count;
  464. /*
  465. * Step 2: merge the returned slots with the preceding slots,
  466. * if available (non zero)
  467. */
  468. for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
  469. io_tlb_list[i] = ++count;
  470. }
  471. spin_unlock_irqrestore(&io_tlb_lock, flags);
  472. }
  473. static void
  474. sync_single(struct device *hwdev, char *dma_addr, size_t size,
  475. int dir, int target)
  476. {
  477. struct swiotlb_phys_addr buffer = swiotlb_bus_to_phys_addr(dma_addr);
  478. switch (target) {
  479. case SYNC_FOR_CPU:
  480. if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
  481. __sync_single(buffer, dma_addr, size, DMA_FROM_DEVICE);
  482. else
  483. BUG_ON(dir != DMA_TO_DEVICE);
  484. break;
  485. case SYNC_FOR_DEVICE:
  486. if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
  487. __sync_single(buffer, dma_addr, size, DMA_TO_DEVICE);
  488. else
  489. BUG_ON(dir != DMA_FROM_DEVICE);
  490. break;
  491. default:
  492. BUG();
  493. }
  494. }
  495. void *
  496. swiotlb_alloc_coherent(struct device *hwdev, size_t size,
  497. dma_addr_t *dma_handle, gfp_t flags)
  498. {
  499. dma_addr_t dev_addr;
  500. void *ret;
  501. int order = get_order(size);
  502. u64 dma_mask = DMA_32BIT_MASK;
  503. if (hwdev && hwdev->coherent_dma_mask)
  504. dma_mask = hwdev->coherent_dma_mask;
  505. ret = (void *)__get_free_pages(flags, order);
  506. if (ret && !is_buffer_dma_capable(dma_mask, swiotlb_virt_to_bus(ret), size)) {
  507. /*
  508. * The allocated memory isn't reachable by the device.
  509. * Fall back on swiotlb_map_single().
  510. */
  511. free_pages((unsigned long) ret, order);
  512. ret = NULL;
  513. }
  514. if (!ret) {
  515. /*
  516. * We are either out of memory or the device can't DMA
  517. * to GFP_DMA memory; fall back on
  518. * swiotlb_map_single(), which will grab memory from
  519. * the lowest available address range.
  520. */
  521. struct swiotlb_phys_addr buffer;
  522. buffer.page = virt_to_page(NULL);
  523. buffer.offset = 0;
  524. ret = map_single(hwdev, buffer, size, DMA_FROM_DEVICE);
  525. if (!ret)
  526. return NULL;
  527. }
  528. memset(ret, 0, size);
  529. dev_addr = swiotlb_virt_to_bus(ret);
  530. /* Confirm address can be DMA'd by device */
  531. if (!is_buffer_dma_capable(dma_mask, dev_addr, size)) {
  532. printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
  533. (unsigned long long)dma_mask,
  534. (unsigned long long)dev_addr);
  535. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  536. unmap_single(hwdev, ret, size, DMA_TO_DEVICE);
  537. return NULL;
  538. }
  539. *dma_handle = dev_addr;
  540. return ret;
  541. }
  542. void
  543. swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
  544. dma_addr_t dma_handle)
  545. {
  546. WARN_ON(irqs_disabled());
  547. if (!is_swiotlb_buffer(vaddr))
  548. free_pages((unsigned long) vaddr, get_order(size));
  549. else
  550. /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
  551. unmap_single(hwdev, vaddr, size, DMA_TO_DEVICE);
  552. }
  553. static void
  554. swiotlb_full(struct device *dev, size_t size, int dir, int do_panic)
  555. {
  556. /*
  557. * Ran out of IOMMU space for this operation. This is very bad.
  558. * Unfortunately the drivers cannot handle this operation properly.
  559. * unless they check for dma_mapping_error (most don't)
  560. * When the mapping is small enough return a static buffer to limit
  561. * the damage, or panic when the transfer is too big.
  562. */
  563. printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
  564. "device %s\n", size, dev ? dev->bus_id : "?");
  565. if (size > io_tlb_overflow && do_panic) {
  566. if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL)
  567. panic("DMA: Memory would be corrupted\n");
  568. if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
  569. panic("DMA: Random memory would be DMAed\n");
  570. }
  571. }
  572. /*
  573. * Map a single buffer of the indicated size for DMA in streaming mode. The
  574. * physical address to use is returned.
  575. *
  576. * Once the device is given the dma address, the device owns this memory until
  577. * either swiotlb_unmap_single or swiotlb_dma_sync_single is performed.
  578. */
  579. dma_addr_t
  580. swiotlb_map_single_attrs(struct device *hwdev, void *ptr, size_t size,
  581. int dir, struct dma_attrs *attrs)
  582. {
  583. dma_addr_t dev_addr = swiotlb_virt_to_bus(ptr);
  584. void *map;
  585. struct swiotlb_phys_addr buffer;
  586. BUG_ON(dir == DMA_NONE);
  587. /*
  588. * If the pointer passed in happens to be in the device's DMA window,
  589. * we can safely return the device addr and not worry about bounce
  590. * buffering it.
  591. */
  592. if (!address_needs_mapping(hwdev, dev_addr, size) &&
  593. !range_needs_mapping(ptr, size))
  594. return dev_addr;
  595. /*
  596. * Oh well, have to allocate and map a bounce buffer.
  597. */
  598. buffer.page = virt_to_page(ptr);
  599. buffer.offset = (unsigned long)ptr & ~PAGE_MASK;
  600. map = map_single(hwdev, buffer, size, dir);
  601. if (!map) {
  602. swiotlb_full(hwdev, size, dir, 1);
  603. map = io_tlb_overflow_buffer;
  604. }
  605. dev_addr = swiotlb_virt_to_bus(map);
  606. /*
  607. * Ensure that the address returned is DMA'ble
  608. */
  609. if (address_needs_mapping(hwdev, dev_addr, size))
  610. panic("map_single: bounce buffer is not DMA'ble");
  611. return dev_addr;
  612. }
  613. EXPORT_SYMBOL(swiotlb_map_single_attrs);
  614. dma_addr_t
  615. swiotlb_map_single(struct device *hwdev, void *ptr, size_t size, int dir)
  616. {
  617. return swiotlb_map_single_attrs(hwdev, ptr, size, dir, NULL);
  618. }
  619. /*
  620. * Unmap a single streaming mode DMA translation. The dma_addr and size must
  621. * match what was provided for in a previous swiotlb_map_single call. All
  622. * other usages are undefined.
  623. *
  624. * After this call, reads by the cpu to the buffer are guaranteed to see
  625. * whatever the device wrote there.
  626. */
  627. void
  628. swiotlb_unmap_single_attrs(struct device *hwdev, dma_addr_t dev_addr,
  629. size_t size, int dir, struct dma_attrs *attrs)
  630. {
  631. char *dma_addr = swiotlb_bus_to_virt(dev_addr);
  632. BUG_ON(dir == DMA_NONE);
  633. if (is_swiotlb_buffer(dma_addr))
  634. unmap_single(hwdev, dma_addr, size, dir);
  635. else if (dir == DMA_FROM_DEVICE)
  636. dma_mark_clean(dma_addr, size);
  637. }
  638. EXPORT_SYMBOL(swiotlb_unmap_single_attrs);
  639. void
  640. swiotlb_unmap_single(struct device *hwdev, dma_addr_t dev_addr, size_t size,
  641. int dir)
  642. {
  643. return swiotlb_unmap_single_attrs(hwdev, dev_addr, size, dir, NULL);
  644. }
  645. /*
  646. * Make physical memory consistent for a single streaming mode DMA translation
  647. * after a transfer.
  648. *
  649. * If you perform a swiotlb_map_single() but wish to interrogate the buffer
  650. * using the cpu, yet do not wish to teardown the dma mapping, you must
  651. * call this function before doing so. At the next point you give the dma
  652. * address back to the card, you must first perform a
  653. * swiotlb_dma_sync_for_device, and then the device again owns the buffer
  654. */
  655. static void
  656. swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
  657. size_t size, int dir, int target)
  658. {
  659. char *dma_addr = swiotlb_bus_to_virt(dev_addr);
  660. BUG_ON(dir == DMA_NONE);
  661. if (is_swiotlb_buffer(dma_addr))
  662. sync_single(hwdev, dma_addr, size, dir, target);
  663. else if (dir == DMA_FROM_DEVICE)
  664. dma_mark_clean(dma_addr, size);
  665. }
  666. void
  667. swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  668. size_t size, int dir)
  669. {
  670. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
  671. }
  672. void
  673. swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
  674. size_t size, int dir)
  675. {
  676. swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
  677. }
  678. /*
  679. * Same as above, but for a sub-range of the mapping.
  680. */
  681. static void
  682. swiotlb_sync_single_range(struct device *hwdev, dma_addr_t dev_addr,
  683. unsigned long offset, size_t size,
  684. int dir, int target)
  685. {
  686. char *dma_addr = swiotlb_bus_to_virt(dev_addr) + offset;
  687. BUG_ON(dir == DMA_NONE);
  688. if (is_swiotlb_buffer(dma_addr))
  689. sync_single(hwdev, dma_addr, size, dir, target);
  690. else if (dir == DMA_FROM_DEVICE)
  691. dma_mark_clean(dma_addr, size);
  692. }
  693. void
  694. swiotlb_sync_single_range_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
  695. unsigned long offset, size_t size, int dir)
  696. {
  697. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  698. SYNC_FOR_CPU);
  699. }
  700. void
  701. swiotlb_sync_single_range_for_device(struct device *hwdev, dma_addr_t dev_addr,
  702. unsigned long offset, size_t size, int dir)
  703. {
  704. swiotlb_sync_single_range(hwdev, dev_addr, offset, size, dir,
  705. SYNC_FOR_DEVICE);
  706. }
  707. void swiotlb_unmap_sg_attrs(struct device *, struct scatterlist *, int, int,
  708. struct dma_attrs *);
  709. /*
  710. * Map a set of buffers described by scatterlist in streaming mode for DMA.
  711. * This is the scatter-gather version of the above swiotlb_map_single
  712. * interface. Here the scatter gather list elements are each tagged with the
  713. * appropriate dma address and length. They are obtained via
  714. * sg_dma_{address,length}(SG).
  715. *
  716. * NOTE: An implementation may be able to use a smaller number of
  717. * DMA address/length pairs than there are SG table elements.
  718. * (for example via virtual mapping capabilities)
  719. * The routine returns the number of addr/length pairs actually
  720. * used, at most nents.
  721. *
  722. * Device ownership issues as mentioned above for swiotlb_map_single are the
  723. * same here.
  724. */
  725. int
  726. swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
  727. int dir, struct dma_attrs *attrs)
  728. {
  729. struct scatterlist *sg;
  730. struct swiotlb_phys_addr buffer;
  731. dma_addr_t dev_addr;
  732. int i;
  733. BUG_ON(dir == DMA_NONE);
  734. for_each_sg(sgl, sg, nelems, i) {
  735. dev_addr = swiotlb_sg_to_bus(sg);
  736. if (range_needs_mapping(sg_virt(sg), sg->length) ||
  737. address_needs_mapping(hwdev, dev_addr, sg->length)) {
  738. void *map;
  739. buffer.page = sg_page(sg);
  740. buffer.offset = sg->offset;
  741. map = map_single(hwdev, buffer, sg->length, dir);
  742. if (!map) {
  743. /* Don't panic here, we expect map_sg users
  744. to do proper error handling. */
  745. swiotlb_full(hwdev, sg->length, dir, 0);
  746. swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
  747. attrs);
  748. sgl[0].dma_length = 0;
  749. return 0;
  750. }
  751. sg->dma_address = swiotlb_virt_to_bus(map);
  752. } else
  753. sg->dma_address = dev_addr;
  754. sg->dma_length = sg->length;
  755. }
  756. return nelems;
  757. }
  758. EXPORT_SYMBOL(swiotlb_map_sg_attrs);
  759. int
  760. swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  761. int dir)
  762. {
  763. return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  764. }
  765. /*
  766. * Unmap a set of streaming mode DMA translations. Again, cpu read rules
  767. * concerning calls here are the same as for swiotlb_unmap_single() above.
  768. */
  769. void
  770. swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
  771. int nelems, int dir, struct dma_attrs *attrs)
  772. {
  773. struct scatterlist *sg;
  774. int i;
  775. BUG_ON(dir == DMA_NONE);
  776. for_each_sg(sgl, sg, nelems, i) {
  777. if (sg->dma_address != swiotlb_sg_to_bus(sg))
  778. unmap_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
  779. sg->dma_length, dir);
  780. else if (dir == DMA_FROM_DEVICE)
  781. dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
  782. }
  783. }
  784. EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
  785. void
  786. swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
  787. int dir)
  788. {
  789. return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
  790. }
  791. /*
  792. * Make physical memory consistent for a set of streaming mode DMA translations
  793. * after a transfer.
  794. *
  795. * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
  796. * and usage.
  797. */
  798. static void
  799. swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
  800. int nelems, int dir, int target)
  801. {
  802. struct scatterlist *sg;
  803. int i;
  804. BUG_ON(dir == DMA_NONE);
  805. for_each_sg(sgl, sg, nelems, i) {
  806. if (sg->dma_address != swiotlb_sg_to_bus(sg))
  807. sync_single(hwdev, swiotlb_bus_to_virt(sg->dma_address),
  808. sg->dma_length, dir, target);
  809. else if (dir == DMA_FROM_DEVICE)
  810. dma_mark_clean(swiotlb_bus_to_virt(sg->dma_address), sg->dma_length);
  811. }
  812. }
  813. void
  814. swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
  815. int nelems, int dir)
  816. {
  817. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
  818. }
  819. void
  820. swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
  821. int nelems, int dir)
  822. {
  823. swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
  824. }
  825. int
  826. swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
  827. {
  828. return (dma_addr == swiotlb_virt_to_bus(io_tlb_overflow_buffer));
  829. }
  830. /*
  831. * Return whether the given device DMA address mask can be supported
  832. * properly. For example, if your device can only drive the low 24-bits
  833. * during bus mastering, then you would pass 0x00ffffff as the mask to
  834. * this function.
  835. */
  836. int
  837. swiotlb_dma_supported(struct device *hwdev, u64 mask)
  838. {
  839. return swiotlb_virt_to_bus(io_tlb_end - 1) <= mask;
  840. }
  841. EXPORT_SYMBOL(swiotlb_map_single);
  842. EXPORT_SYMBOL(swiotlb_unmap_single);
  843. EXPORT_SYMBOL(swiotlb_map_sg);
  844. EXPORT_SYMBOL(swiotlb_unmap_sg);
  845. EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
  846. EXPORT_SYMBOL(swiotlb_sync_single_for_device);
  847. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_cpu);
  848. EXPORT_SYMBOL_GPL(swiotlb_sync_single_range_for_device);
  849. EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
  850. EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
  851. EXPORT_SYMBOL(swiotlb_dma_mapping_error);
  852. EXPORT_SYMBOL(swiotlb_alloc_coherent);
  853. EXPORT_SYMBOL(swiotlb_free_coherent);
  854. EXPORT_SYMBOL(swiotlb_dma_supported);