ocrdma_verbs.c 67 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498
  1. /*******************************************************************
  2. * This file is part of the Emulex RoCE Device Driver for *
  3. * RoCE (RDMA over Converged Ethernet) adapters. *
  4. * Copyright (C) 2008-2012 Emulex. All rights reserved. *
  5. * EMULEX and SLI are trademarks of Emulex. *
  6. * www.emulex.com *
  7. * *
  8. * This program is free software; you can redistribute it and/or *
  9. * modify it under the terms of version 2 of the GNU General *
  10. * Public License as published by the Free Software Foundation. *
  11. * This program is distributed in the hope that it will be useful. *
  12. * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND *
  13. * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY, *
  14. * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE *
  15. * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
  16. * TO BE LEGALLY INVALID. See the GNU General Public License for *
  17. * more details, a copy of which can be found in the file COPYING *
  18. * included with this package. *
  19. *
  20. * Contact Information:
  21. * linux-drivers@emulex.com
  22. *
  23. * Emulex
  24. * 3333 Susan Street
  25. * Costa Mesa, CA 92626
  26. *******************************************************************/
  27. #include <linux/dma-mapping.h>
  28. #include <rdma/ib_verbs.h>
  29. #include <rdma/ib_user_verbs.h>
  30. #include <rdma/iw_cm.h>
  31. #include <rdma/ib_umem.h>
  32. #include <rdma/ib_addr.h>
  33. #include "ocrdma.h"
  34. #include "ocrdma_hw.h"
  35. #include "ocrdma_verbs.h"
  36. #include "ocrdma_abi.h"
  37. int ocrdma_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
  38. {
  39. if (index > 1)
  40. return -EINVAL;
  41. *pkey = 0xffff;
  42. return 0;
  43. }
  44. int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
  45. int index, union ib_gid *sgid)
  46. {
  47. struct ocrdma_dev *dev;
  48. dev = get_ocrdma_dev(ibdev);
  49. memset(sgid, 0, sizeof(*sgid));
  50. if (index >= OCRDMA_MAX_SGID)
  51. return -EINVAL;
  52. memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
  53. return 0;
  54. }
  55. int ocrdma_query_device(struct ib_device *ibdev, struct ib_device_attr *attr)
  56. {
  57. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  58. memset(attr, 0, sizeof *attr);
  59. memcpy(&attr->fw_ver, &dev->attr.fw_ver[0],
  60. min(sizeof(dev->attr.fw_ver), sizeof(attr->fw_ver)));
  61. ocrdma_get_guid(dev, (u8 *)&attr->sys_image_guid);
  62. attr->max_mr_size = ~0ull;
  63. attr->page_size_cap = 0xffff000;
  64. attr->vendor_id = dev->nic_info.pdev->vendor;
  65. attr->vendor_part_id = dev->nic_info.pdev->device;
  66. attr->hw_ver = 0;
  67. attr->max_qp = dev->attr.max_qp;
  68. attr->max_ah = dev->attr.max_qp;
  69. attr->max_qp_wr = dev->attr.max_wqe;
  70. attr->device_cap_flags = IB_DEVICE_CURR_QP_STATE_MOD |
  71. IB_DEVICE_RC_RNR_NAK_GEN |
  72. IB_DEVICE_SHUTDOWN_PORT |
  73. IB_DEVICE_SYS_IMAGE_GUID |
  74. IB_DEVICE_LOCAL_DMA_LKEY;
  75. attr->max_sge = min(dev->attr.max_send_sge, dev->attr.max_srq_sge);
  76. attr->max_sge_rd = 0;
  77. attr->max_cq = dev->attr.max_cq;
  78. attr->max_cqe = dev->attr.max_cqe;
  79. attr->max_mr = dev->attr.max_mr;
  80. attr->max_mw = 0;
  81. attr->max_pd = dev->attr.max_pd;
  82. attr->atomic_cap = 0;
  83. attr->max_fmr = 0;
  84. attr->max_map_per_fmr = 0;
  85. attr->max_qp_rd_atom =
  86. min(dev->attr.max_ord_per_qp, dev->attr.max_ird_per_qp);
  87. attr->max_qp_init_rd_atom = dev->attr.max_ord_per_qp;
  88. attr->max_srq = (dev->attr.max_qp - 1);
  89. attr->max_srq_sge = dev->attr.max_srq_sge;
  90. attr->max_srq_wr = dev->attr.max_rqe;
  91. attr->local_ca_ack_delay = dev->attr.local_ca_ack_delay;
  92. attr->max_fast_reg_page_list_len = 0;
  93. attr->max_pkeys = 1;
  94. return 0;
  95. }
  96. int ocrdma_query_port(struct ib_device *ibdev,
  97. u8 port, struct ib_port_attr *props)
  98. {
  99. enum ib_port_state port_state;
  100. struct ocrdma_dev *dev;
  101. struct net_device *netdev;
  102. dev = get_ocrdma_dev(ibdev);
  103. if (port > 1) {
  104. pr_err("%s(%d) invalid_port=0x%x\n", __func__,
  105. dev->id, port);
  106. return -EINVAL;
  107. }
  108. netdev = dev->nic_info.netdev;
  109. if (netif_running(netdev) && netif_oper_up(netdev)) {
  110. port_state = IB_PORT_ACTIVE;
  111. props->phys_state = 5;
  112. } else {
  113. port_state = IB_PORT_DOWN;
  114. props->phys_state = 3;
  115. }
  116. props->max_mtu = IB_MTU_4096;
  117. props->active_mtu = iboe_get_mtu(netdev->mtu);
  118. props->lid = 0;
  119. props->lmc = 0;
  120. props->sm_lid = 0;
  121. props->sm_sl = 0;
  122. props->state = port_state;
  123. props->port_cap_flags =
  124. IB_PORT_CM_SUP |
  125. IB_PORT_REINIT_SUP |
  126. IB_PORT_DEVICE_MGMT_SUP | IB_PORT_VENDOR_CLASS_SUP;
  127. props->gid_tbl_len = OCRDMA_MAX_SGID;
  128. props->pkey_tbl_len = 1;
  129. props->bad_pkey_cntr = 0;
  130. props->qkey_viol_cntr = 0;
  131. props->active_width = IB_WIDTH_1X;
  132. props->active_speed = 4;
  133. props->max_msg_sz = 0x80000000;
  134. props->max_vl_num = 4;
  135. return 0;
  136. }
  137. int ocrdma_modify_port(struct ib_device *ibdev, u8 port, int mask,
  138. struct ib_port_modify *props)
  139. {
  140. struct ocrdma_dev *dev;
  141. dev = get_ocrdma_dev(ibdev);
  142. if (port > 1) {
  143. pr_err("%s(%d) invalid_port=0x%x\n", __func__, dev->id, port);
  144. return -EINVAL;
  145. }
  146. return 0;
  147. }
  148. static int ocrdma_add_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  149. unsigned long len)
  150. {
  151. struct ocrdma_mm *mm;
  152. mm = kzalloc(sizeof(*mm), GFP_KERNEL);
  153. if (mm == NULL)
  154. return -ENOMEM;
  155. mm->key.phy_addr = phy_addr;
  156. mm->key.len = len;
  157. INIT_LIST_HEAD(&mm->entry);
  158. mutex_lock(&uctx->mm_list_lock);
  159. list_add_tail(&mm->entry, &uctx->mm_head);
  160. mutex_unlock(&uctx->mm_list_lock);
  161. return 0;
  162. }
  163. static void ocrdma_del_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  164. unsigned long len)
  165. {
  166. struct ocrdma_mm *mm, *tmp;
  167. mutex_lock(&uctx->mm_list_lock);
  168. list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
  169. if (len != mm->key.len || phy_addr != mm->key.phy_addr)
  170. continue;
  171. list_del(&mm->entry);
  172. kfree(mm);
  173. break;
  174. }
  175. mutex_unlock(&uctx->mm_list_lock);
  176. }
  177. static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
  178. unsigned long len)
  179. {
  180. bool found = false;
  181. struct ocrdma_mm *mm;
  182. mutex_lock(&uctx->mm_list_lock);
  183. list_for_each_entry(mm, &uctx->mm_head, entry) {
  184. if (len != mm->key.len || phy_addr != mm->key.phy_addr)
  185. continue;
  186. found = true;
  187. break;
  188. }
  189. mutex_unlock(&uctx->mm_list_lock);
  190. return found;
  191. }
  192. struct ib_ucontext *ocrdma_alloc_ucontext(struct ib_device *ibdev,
  193. struct ib_udata *udata)
  194. {
  195. int status;
  196. struct ocrdma_ucontext *ctx;
  197. struct ocrdma_alloc_ucontext_resp resp;
  198. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  199. struct pci_dev *pdev = dev->nic_info.pdev;
  200. u32 map_len = roundup(sizeof(u32) * 2048, PAGE_SIZE);
  201. if (!udata)
  202. return ERR_PTR(-EFAULT);
  203. ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
  204. if (!ctx)
  205. return ERR_PTR(-ENOMEM);
  206. INIT_LIST_HEAD(&ctx->mm_head);
  207. mutex_init(&ctx->mm_list_lock);
  208. ctx->ah_tbl.va = dma_alloc_coherent(&pdev->dev, map_len,
  209. &ctx->ah_tbl.pa, GFP_KERNEL);
  210. if (!ctx->ah_tbl.va) {
  211. kfree(ctx);
  212. return ERR_PTR(-ENOMEM);
  213. }
  214. memset(ctx->ah_tbl.va, 0, map_len);
  215. ctx->ah_tbl.len = map_len;
  216. memset(&resp, 0, sizeof(resp));
  217. resp.ah_tbl_len = ctx->ah_tbl.len;
  218. resp.ah_tbl_page = ctx->ah_tbl.pa;
  219. status = ocrdma_add_mmap(ctx, resp.ah_tbl_page, resp.ah_tbl_len);
  220. if (status)
  221. goto map_err;
  222. resp.dev_id = dev->id;
  223. resp.max_inline_data = dev->attr.max_inline_data;
  224. resp.wqe_size = dev->attr.wqe_size;
  225. resp.rqe_size = dev->attr.rqe_size;
  226. resp.dpp_wqe_size = dev->attr.wqe_size;
  227. memcpy(resp.fw_ver, dev->attr.fw_ver, sizeof(resp.fw_ver));
  228. status = ib_copy_to_udata(udata, &resp, sizeof(resp));
  229. if (status)
  230. goto cpy_err;
  231. return &ctx->ibucontext;
  232. cpy_err:
  233. ocrdma_del_mmap(ctx, ctx->ah_tbl.pa, ctx->ah_tbl.len);
  234. map_err:
  235. dma_free_coherent(&pdev->dev, ctx->ah_tbl.len, ctx->ah_tbl.va,
  236. ctx->ah_tbl.pa);
  237. kfree(ctx);
  238. return ERR_PTR(status);
  239. }
  240. int ocrdma_dealloc_ucontext(struct ib_ucontext *ibctx)
  241. {
  242. struct ocrdma_mm *mm, *tmp;
  243. struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ibctx);
  244. struct ocrdma_dev *dev = get_ocrdma_dev(ibctx->device);
  245. struct pci_dev *pdev = dev->nic_info.pdev;
  246. ocrdma_del_mmap(uctx, uctx->ah_tbl.pa, uctx->ah_tbl.len);
  247. dma_free_coherent(&pdev->dev, uctx->ah_tbl.len, uctx->ah_tbl.va,
  248. uctx->ah_tbl.pa);
  249. list_for_each_entry_safe(mm, tmp, &uctx->mm_head, entry) {
  250. list_del(&mm->entry);
  251. kfree(mm);
  252. }
  253. kfree(uctx);
  254. return 0;
  255. }
  256. int ocrdma_mmap(struct ib_ucontext *context, struct vm_area_struct *vma)
  257. {
  258. struct ocrdma_ucontext *ucontext = get_ocrdma_ucontext(context);
  259. struct ocrdma_dev *dev = get_ocrdma_dev(context->device);
  260. unsigned long vm_page = vma->vm_pgoff << PAGE_SHIFT;
  261. u64 unmapped_db = (u64) dev->nic_info.unmapped_db;
  262. unsigned long len = (vma->vm_end - vma->vm_start);
  263. int status = 0;
  264. bool found;
  265. if (vma->vm_start & (PAGE_SIZE - 1))
  266. return -EINVAL;
  267. found = ocrdma_search_mmap(ucontext, vma->vm_pgoff << PAGE_SHIFT, len);
  268. if (!found)
  269. return -EINVAL;
  270. if ((vm_page >= unmapped_db) && (vm_page <= (unmapped_db +
  271. dev->nic_info.db_total_size)) &&
  272. (len <= dev->nic_info.db_page_size)) {
  273. /* doorbell mapping */
  274. status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  275. len, vma->vm_page_prot);
  276. } else if (dev->nic_info.dpp_unmapped_len &&
  277. (vm_page >= (u64) dev->nic_info.dpp_unmapped_addr) &&
  278. (vm_page <= (u64) (dev->nic_info.dpp_unmapped_addr +
  279. dev->nic_info.dpp_unmapped_len)) &&
  280. (len <= dev->nic_info.dpp_unmapped_len)) {
  281. /* dpp area mapping */
  282. vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
  283. status = io_remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
  284. len, vma->vm_page_prot);
  285. } else {
  286. /* queue memory mapping */
  287. status = remap_pfn_range(vma, vma->vm_start,
  288. vma->vm_pgoff, len, vma->vm_page_prot);
  289. }
  290. return status;
  291. }
  292. static int ocrdma_copy_pd_uresp(struct ocrdma_pd *pd,
  293. struct ib_ucontext *ib_ctx,
  294. struct ib_udata *udata)
  295. {
  296. int status;
  297. u64 db_page_addr;
  298. u64 dpp_page_addr = 0;
  299. u32 db_page_size;
  300. struct ocrdma_alloc_pd_uresp rsp;
  301. struct ocrdma_ucontext *uctx = get_ocrdma_ucontext(ib_ctx);
  302. struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
  303. memset(&rsp, 0, sizeof(rsp));
  304. rsp.id = pd->id;
  305. rsp.dpp_enabled = pd->dpp_enabled;
  306. db_page_addr = dev->nic_info.unmapped_db +
  307. (pd->id * dev->nic_info.db_page_size);
  308. db_page_size = dev->nic_info.db_page_size;
  309. status = ocrdma_add_mmap(uctx, db_page_addr, db_page_size);
  310. if (status)
  311. return status;
  312. if (pd->dpp_enabled) {
  313. dpp_page_addr = dev->nic_info.dpp_unmapped_addr +
  314. (pd->id * OCRDMA_DPP_PAGE_SIZE);
  315. status = ocrdma_add_mmap(uctx, dpp_page_addr,
  316. OCRDMA_DPP_PAGE_SIZE);
  317. if (status)
  318. goto dpp_map_err;
  319. rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr);
  320. rsp.dpp_page_addr_lo = dpp_page_addr;
  321. }
  322. status = ib_copy_to_udata(udata, &rsp, sizeof(rsp));
  323. if (status)
  324. goto ucopy_err;
  325. pd->uctx = uctx;
  326. return 0;
  327. ucopy_err:
  328. if (pd->dpp_enabled)
  329. ocrdma_del_mmap(pd->uctx, dpp_page_addr, OCRDMA_DPP_PAGE_SIZE);
  330. dpp_map_err:
  331. ocrdma_del_mmap(pd->uctx, db_page_addr, db_page_size);
  332. return status;
  333. }
  334. struct ib_pd *ocrdma_alloc_pd(struct ib_device *ibdev,
  335. struct ib_ucontext *context,
  336. struct ib_udata *udata)
  337. {
  338. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  339. struct ocrdma_pd *pd;
  340. int status;
  341. pd = kzalloc(sizeof(*pd), GFP_KERNEL);
  342. if (!pd)
  343. return ERR_PTR(-ENOMEM);
  344. if (udata && context) {
  345. pd->dpp_enabled =
  346. (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY);
  347. pd->num_dpp_qp =
  348. pd->dpp_enabled ? OCRDMA_PD_MAX_DPP_ENABLED_QP : 0;
  349. }
  350. status = ocrdma_mbx_alloc_pd(dev, pd);
  351. if (status) {
  352. kfree(pd);
  353. return ERR_PTR(status);
  354. }
  355. if (udata && context) {
  356. status = ocrdma_copy_pd_uresp(pd, context, udata);
  357. if (status)
  358. goto err;
  359. }
  360. return &pd->ibpd;
  361. err:
  362. ocrdma_dealloc_pd(&pd->ibpd);
  363. return ERR_PTR(status);
  364. }
  365. int ocrdma_dealloc_pd(struct ib_pd *ibpd)
  366. {
  367. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  368. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  369. int status;
  370. u64 usr_db;
  371. status = ocrdma_mbx_dealloc_pd(dev, pd);
  372. if (pd->uctx) {
  373. u64 dpp_db = dev->nic_info.dpp_unmapped_addr +
  374. (pd->id * OCRDMA_DPP_PAGE_SIZE);
  375. if (pd->dpp_enabled)
  376. ocrdma_del_mmap(pd->uctx, dpp_db, OCRDMA_DPP_PAGE_SIZE);
  377. usr_db = dev->nic_info.unmapped_db +
  378. (pd->id * dev->nic_info.db_page_size);
  379. ocrdma_del_mmap(pd->uctx, usr_db, dev->nic_info.db_page_size);
  380. }
  381. kfree(pd);
  382. return status;
  383. }
  384. static int ocrdma_alloc_lkey(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  385. u32 pdid, int acc, u32 num_pbls, u32 addr_check)
  386. {
  387. int status;
  388. mr->hwmr.fr_mr = 0;
  389. mr->hwmr.local_rd = 1;
  390. mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
  391. mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  392. mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
  393. mr->hwmr.mw_bind = (acc & IB_ACCESS_MW_BIND) ? 1 : 0;
  394. mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
  395. mr->hwmr.num_pbls = num_pbls;
  396. status = ocrdma_mbx_alloc_lkey(dev, &mr->hwmr, pdid, addr_check);
  397. if (status)
  398. return status;
  399. mr->ibmr.lkey = mr->hwmr.lkey;
  400. if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
  401. mr->ibmr.rkey = mr->hwmr.lkey;
  402. return 0;
  403. }
  404. struct ib_mr *ocrdma_get_dma_mr(struct ib_pd *ibpd, int acc)
  405. {
  406. int status;
  407. struct ocrdma_mr *mr;
  408. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  409. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  410. if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE)) {
  411. pr_err("%s err, invalid access rights\n", __func__);
  412. return ERR_PTR(-EINVAL);
  413. }
  414. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  415. if (!mr)
  416. return ERR_PTR(-ENOMEM);
  417. status = ocrdma_alloc_lkey(dev, mr, pd->id, acc, 0,
  418. OCRDMA_ADDR_CHECK_DISABLE);
  419. if (status) {
  420. kfree(mr);
  421. return ERR_PTR(status);
  422. }
  423. return &mr->ibmr;
  424. }
  425. static void ocrdma_free_mr_pbl_tbl(struct ocrdma_dev *dev,
  426. struct ocrdma_hw_mr *mr)
  427. {
  428. struct pci_dev *pdev = dev->nic_info.pdev;
  429. int i = 0;
  430. if (mr->pbl_table) {
  431. for (i = 0; i < mr->num_pbls; i++) {
  432. if (!mr->pbl_table[i].va)
  433. continue;
  434. dma_free_coherent(&pdev->dev, mr->pbl_size,
  435. mr->pbl_table[i].va,
  436. mr->pbl_table[i].pa);
  437. }
  438. kfree(mr->pbl_table);
  439. mr->pbl_table = NULL;
  440. }
  441. }
  442. static int ocrdma_get_pbl_info(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  443. u32 num_pbes)
  444. {
  445. u32 num_pbls = 0;
  446. u32 idx = 0;
  447. int status = 0;
  448. u32 pbl_size;
  449. do {
  450. pbl_size = OCRDMA_MIN_HPAGE_SIZE * (1 << idx);
  451. if (pbl_size > MAX_OCRDMA_PBL_SIZE) {
  452. status = -EFAULT;
  453. break;
  454. }
  455. num_pbls = roundup(num_pbes, (pbl_size / sizeof(u64)));
  456. num_pbls = num_pbls / (pbl_size / sizeof(u64));
  457. idx++;
  458. } while (num_pbls >= dev->attr.max_num_mr_pbl);
  459. mr->hwmr.num_pbes = num_pbes;
  460. mr->hwmr.num_pbls = num_pbls;
  461. mr->hwmr.pbl_size = pbl_size;
  462. return status;
  463. }
  464. static int ocrdma_build_pbl_tbl(struct ocrdma_dev *dev, struct ocrdma_hw_mr *mr)
  465. {
  466. int status = 0;
  467. int i;
  468. u32 dma_len = mr->pbl_size;
  469. struct pci_dev *pdev = dev->nic_info.pdev;
  470. void *va;
  471. dma_addr_t pa;
  472. mr->pbl_table = kzalloc(sizeof(struct ocrdma_pbl) *
  473. mr->num_pbls, GFP_KERNEL);
  474. if (!mr->pbl_table)
  475. return -ENOMEM;
  476. for (i = 0; i < mr->num_pbls; i++) {
  477. va = dma_alloc_coherent(&pdev->dev, dma_len, &pa, GFP_KERNEL);
  478. if (!va) {
  479. ocrdma_free_mr_pbl_tbl(dev, mr);
  480. status = -ENOMEM;
  481. break;
  482. }
  483. memset(va, 0, dma_len);
  484. mr->pbl_table[i].va = va;
  485. mr->pbl_table[i].pa = pa;
  486. }
  487. return status;
  488. }
  489. static void build_user_pbes(struct ocrdma_dev *dev, struct ocrdma_mr *mr,
  490. u32 num_pbes)
  491. {
  492. struct ocrdma_pbe *pbe;
  493. struct ib_umem_chunk *chunk;
  494. struct ocrdma_pbl *pbl_tbl = mr->hwmr.pbl_table;
  495. struct ib_umem *umem = mr->umem;
  496. int i, shift, pg_cnt, pages, pbe_cnt, total_num_pbes = 0;
  497. if (!mr->hwmr.num_pbes)
  498. return;
  499. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  500. pbe_cnt = 0;
  501. shift = ilog2(umem->page_size);
  502. list_for_each_entry(chunk, &umem->chunk_list, list) {
  503. /* get all the dma regions from the chunk. */
  504. for (i = 0; i < chunk->nmap; i++) {
  505. pages = sg_dma_len(&chunk->page_list[i]) >> shift;
  506. for (pg_cnt = 0; pg_cnt < pages; pg_cnt++) {
  507. /* store the page address in pbe */
  508. pbe->pa_lo =
  509. cpu_to_le32(sg_dma_address
  510. (&chunk->page_list[i]) +
  511. (umem->page_size * pg_cnt));
  512. pbe->pa_hi =
  513. cpu_to_le32(upper_32_bits
  514. ((sg_dma_address
  515. (&chunk->page_list[i]) +
  516. umem->page_size * pg_cnt)));
  517. pbe_cnt += 1;
  518. total_num_pbes += 1;
  519. pbe++;
  520. /* if done building pbes, issue the mbx cmd. */
  521. if (total_num_pbes == num_pbes)
  522. return;
  523. /* if the given pbl is full storing the pbes,
  524. * move to next pbl.
  525. */
  526. if (pbe_cnt ==
  527. (mr->hwmr.pbl_size / sizeof(u64))) {
  528. pbl_tbl++;
  529. pbe = (struct ocrdma_pbe *)pbl_tbl->va;
  530. pbe_cnt = 0;
  531. }
  532. }
  533. }
  534. }
  535. }
  536. struct ib_mr *ocrdma_reg_user_mr(struct ib_pd *ibpd, u64 start, u64 len,
  537. u64 usr_addr, int acc, struct ib_udata *udata)
  538. {
  539. int status = -ENOMEM;
  540. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  541. struct ocrdma_mr *mr;
  542. struct ocrdma_pd *pd;
  543. u32 num_pbes;
  544. pd = get_ocrdma_pd(ibpd);
  545. if (acc & IB_ACCESS_REMOTE_WRITE && !(acc & IB_ACCESS_LOCAL_WRITE))
  546. return ERR_PTR(-EINVAL);
  547. mr = kzalloc(sizeof(*mr), GFP_KERNEL);
  548. if (!mr)
  549. return ERR_PTR(status);
  550. mr->umem = ib_umem_get(ibpd->uobject->context, start, len, acc, 0);
  551. if (IS_ERR(mr->umem)) {
  552. status = -EFAULT;
  553. goto umem_err;
  554. }
  555. num_pbes = ib_umem_page_count(mr->umem);
  556. status = ocrdma_get_pbl_info(dev, mr, num_pbes);
  557. if (status)
  558. goto umem_err;
  559. mr->hwmr.pbe_size = mr->umem->page_size;
  560. mr->hwmr.fbo = mr->umem->offset;
  561. mr->hwmr.va = usr_addr;
  562. mr->hwmr.len = len;
  563. mr->hwmr.remote_wr = (acc & IB_ACCESS_REMOTE_WRITE) ? 1 : 0;
  564. mr->hwmr.remote_rd = (acc & IB_ACCESS_REMOTE_READ) ? 1 : 0;
  565. mr->hwmr.local_wr = (acc & IB_ACCESS_LOCAL_WRITE) ? 1 : 0;
  566. mr->hwmr.local_rd = 1;
  567. mr->hwmr.remote_atomic = (acc & IB_ACCESS_REMOTE_ATOMIC) ? 1 : 0;
  568. status = ocrdma_build_pbl_tbl(dev, &mr->hwmr);
  569. if (status)
  570. goto umem_err;
  571. build_user_pbes(dev, mr, num_pbes);
  572. status = ocrdma_reg_mr(dev, &mr->hwmr, pd->id, acc);
  573. if (status)
  574. goto mbx_err;
  575. mr->ibmr.lkey = mr->hwmr.lkey;
  576. if (mr->hwmr.remote_wr || mr->hwmr.remote_rd)
  577. mr->ibmr.rkey = mr->hwmr.lkey;
  578. return &mr->ibmr;
  579. mbx_err:
  580. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  581. umem_err:
  582. kfree(mr);
  583. return ERR_PTR(status);
  584. }
  585. int ocrdma_dereg_mr(struct ib_mr *ib_mr)
  586. {
  587. struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
  588. struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
  589. int status;
  590. status = ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
  591. if (mr->hwmr.fr_mr == 0)
  592. ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
  593. /* it could be user registered memory. */
  594. if (mr->umem)
  595. ib_umem_release(mr->umem);
  596. kfree(mr);
  597. return status;
  598. }
  599. static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
  600. struct ib_udata *udata,
  601. struct ib_ucontext *ib_ctx)
  602. {
  603. int status;
  604. struct ocrdma_ucontext *uctx;
  605. struct ocrdma_create_cq_uresp uresp;
  606. memset(&uresp, 0, sizeof(uresp));
  607. uresp.cq_id = cq->id;
  608. uresp.page_size = cq->len;
  609. uresp.num_pages = 1;
  610. uresp.max_hw_cqe = cq->max_hw_cqe;
  611. uresp.page_addr[0] = cq->pa;
  612. uresp.db_page_addr = dev->nic_info.unmapped_db;
  613. uresp.db_page_size = dev->nic_info.db_page_size;
  614. uresp.phase_change = cq->phase_change ? 1 : 0;
  615. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  616. if (status) {
  617. pr_err("%s(%d) copy error cqid=0x%x.\n",
  618. __func__, dev->id, cq->id);
  619. goto err;
  620. }
  621. uctx = get_ocrdma_ucontext(ib_ctx);
  622. status = ocrdma_add_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
  623. if (status)
  624. goto err;
  625. status = ocrdma_add_mmap(uctx, uresp.page_addr[0], uresp.page_size);
  626. if (status) {
  627. ocrdma_del_mmap(uctx, uresp.db_page_addr, uresp.db_page_size);
  628. goto err;
  629. }
  630. cq->ucontext = uctx;
  631. err:
  632. return status;
  633. }
  634. struct ib_cq *ocrdma_create_cq(struct ib_device *ibdev, int entries, int vector,
  635. struct ib_ucontext *ib_ctx,
  636. struct ib_udata *udata)
  637. {
  638. struct ocrdma_cq *cq;
  639. struct ocrdma_dev *dev = get_ocrdma_dev(ibdev);
  640. int status;
  641. struct ocrdma_create_cq_ureq ureq;
  642. if (udata) {
  643. if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
  644. return ERR_PTR(-EFAULT);
  645. } else
  646. ureq.dpp_cq = 0;
  647. cq = kzalloc(sizeof(*cq), GFP_KERNEL);
  648. if (!cq)
  649. return ERR_PTR(-ENOMEM);
  650. spin_lock_init(&cq->cq_lock);
  651. spin_lock_init(&cq->comp_handler_lock);
  652. INIT_LIST_HEAD(&cq->sq_head);
  653. INIT_LIST_HEAD(&cq->rq_head);
  654. status = ocrdma_mbx_create_cq(dev, cq, entries, ureq.dpp_cq);
  655. if (status) {
  656. kfree(cq);
  657. return ERR_PTR(status);
  658. }
  659. if (ib_ctx) {
  660. status = ocrdma_copy_cq_uresp(dev, cq, udata, ib_ctx);
  661. if (status)
  662. goto ctx_err;
  663. }
  664. cq->phase = OCRDMA_CQE_VALID;
  665. cq->arm_needed = true;
  666. dev->cq_tbl[cq->id] = cq;
  667. return &cq->ibcq;
  668. ctx_err:
  669. ocrdma_mbx_destroy_cq(dev, cq);
  670. kfree(cq);
  671. return ERR_PTR(status);
  672. }
  673. int ocrdma_resize_cq(struct ib_cq *ibcq, int new_cnt,
  674. struct ib_udata *udata)
  675. {
  676. int status = 0;
  677. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  678. if (new_cnt < 1 || new_cnt > cq->max_hw_cqe) {
  679. status = -EINVAL;
  680. return status;
  681. }
  682. ibcq->cqe = new_cnt;
  683. return status;
  684. }
  685. int ocrdma_destroy_cq(struct ib_cq *ibcq)
  686. {
  687. int status;
  688. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  689. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  690. status = ocrdma_mbx_destroy_cq(dev, cq);
  691. if (cq->ucontext) {
  692. ocrdma_del_mmap(cq->ucontext, (u64) cq->pa, cq->len);
  693. ocrdma_del_mmap(cq->ucontext, dev->nic_info.unmapped_db,
  694. dev->nic_info.db_page_size);
  695. }
  696. dev->cq_tbl[cq->id] = NULL;
  697. kfree(cq);
  698. return status;
  699. }
  700. static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
  701. {
  702. int status = -EINVAL;
  703. if (qp->id < OCRDMA_MAX_QP && dev->qp_tbl[qp->id] == NULL) {
  704. dev->qp_tbl[qp->id] = qp;
  705. status = 0;
  706. }
  707. return status;
  708. }
  709. static void ocrdma_del_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
  710. {
  711. dev->qp_tbl[qp->id] = NULL;
  712. }
  713. static int ocrdma_check_qp_params(struct ib_pd *ibpd, struct ocrdma_dev *dev,
  714. struct ib_qp_init_attr *attrs)
  715. {
  716. if (attrs->qp_type != IB_QPT_GSI &&
  717. attrs->qp_type != IB_QPT_RC &&
  718. attrs->qp_type != IB_QPT_UD) {
  719. pr_err("%s(%d) unsupported qp type=0x%x requested\n",
  720. __func__, dev->id, attrs->qp_type);
  721. return -EINVAL;
  722. }
  723. if (attrs->cap.max_send_wr > dev->attr.max_wqe) {
  724. pr_err("%s(%d) unsupported send_wr=0x%x requested\n",
  725. __func__, dev->id, attrs->cap.max_send_wr);
  726. pr_err("%s(%d) supported send_wr=0x%x\n",
  727. __func__, dev->id, dev->attr.max_wqe);
  728. return -EINVAL;
  729. }
  730. if (!attrs->srq && (attrs->cap.max_recv_wr > dev->attr.max_rqe)) {
  731. pr_err("%s(%d) unsupported recv_wr=0x%x requested\n",
  732. __func__, dev->id, attrs->cap.max_recv_wr);
  733. pr_err("%s(%d) supported recv_wr=0x%x\n",
  734. __func__, dev->id, dev->attr.max_rqe);
  735. return -EINVAL;
  736. }
  737. if (attrs->cap.max_inline_data > dev->attr.max_inline_data) {
  738. pr_err("%s(%d) unsupported inline data size=0x%x requested\n",
  739. __func__, dev->id, attrs->cap.max_inline_data);
  740. pr_err("%s(%d) supported inline data size=0x%x\n",
  741. __func__, dev->id, dev->attr.max_inline_data);
  742. return -EINVAL;
  743. }
  744. if (attrs->cap.max_send_sge > dev->attr.max_send_sge) {
  745. pr_err("%s(%d) unsupported send_sge=0x%x requested\n",
  746. __func__, dev->id, attrs->cap.max_send_sge);
  747. pr_err("%s(%d) supported send_sge=0x%x\n",
  748. __func__, dev->id, dev->attr.max_send_sge);
  749. return -EINVAL;
  750. }
  751. if (attrs->cap.max_recv_sge > dev->attr.max_recv_sge) {
  752. pr_err("%s(%d) unsupported recv_sge=0x%x requested\n",
  753. __func__, dev->id, attrs->cap.max_recv_sge);
  754. pr_err("%s(%d) supported recv_sge=0x%x\n",
  755. __func__, dev->id, dev->attr.max_recv_sge);
  756. return -EINVAL;
  757. }
  758. /* unprivileged user space cannot create special QP */
  759. if (ibpd->uobject && attrs->qp_type == IB_QPT_GSI) {
  760. pr_err
  761. ("%s(%d) Userspace can't create special QPs of type=0x%x\n",
  762. __func__, dev->id, attrs->qp_type);
  763. return -EINVAL;
  764. }
  765. /* allow creating only one GSI type of QP */
  766. if (attrs->qp_type == IB_QPT_GSI && dev->gsi_qp_created) {
  767. pr_err("%s(%d) GSI special QPs already created.\n",
  768. __func__, dev->id);
  769. return -EINVAL;
  770. }
  771. /* verify consumer QPs are not trying to use GSI QP's CQ */
  772. if ((attrs->qp_type != IB_QPT_GSI) && (dev->gsi_qp_created)) {
  773. if ((dev->gsi_sqcq == get_ocrdma_cq(attrs->send_cq)) ||
  774. (dev->gsi_sqcq == get_ocrdma_cq(attrs->recv_cq)) ||
  775. (dev->gsi_rqcq == get_ocrdma_cq(attrs->send_cq)) ||
  776. (dev->gsi_rqcq == get_ocrdma_cq(attrs->recv_cq))) {
  777. pr_err("%s(%d) Consumer QP cannot use GSI CQs.\n",
  778. __func__, dev->id);
  779. return -EINVAL;
  780. }
  781. }
  782. return 0;
  783. }
  784. static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
  785. struct ib_udata *udata, int dpp_offset,
  786. int dpp_credit_lmt, int srq)
  787. {
  788. int status = 0;
  789. u64 usr_db;
  790. struct ocrdma_create_qp_uresp uresp;
  791. struct ocrdma_dev *dev = qp->dev;
  792. struct ocrdma_pd *pd = qp->pd;
  793. memset(&uresp, 0, sizeof(uresp));
  794. usr_db = dev->nic_info.unmapped_db +
  795. (pd->id * dev->nic_info.db_page_size);
  796. uresp.qp_id = qp->id;
  797. uresp.sq_dbid = qp->sq.dbid;
  798. uresp.num_sq_pages = 1;
  799. uresp.sq_page_size = qp->sq.len;
  800. uresp.sq_page_addr[0] = qp->sq.pa;
  801. uresp.num_wqe_allocated = qp->sq.max_cnt;
  802. if (!srq) {
  803. uresp.rq_dbid = qp->rq.dbid;
  804. uresp.num_rq_pages = 1;
  805. uresp.rq_page_size = qp->rq.len;
  806. uresp.rq_page_addr[0] = qp->rq.pa;
  807. uresp.num_rqe_allocated = qp->rq.max_cnt;
  808. }
  809. uresp.db_page_addr = usr_db;
  810. uresp.db_page_size = dev->nic_info.db_page_size;
  811. if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
  812. uresp.db_sq_offset = OCRDMA_DB_GEN2_SQ_OFFSET;
  813. uresp.db_rq_offset = ((qp->id & 0xFFFF) < 128) ?
  814. OCRDMA_DB_GEN2_RQ1_OFFSET : OCRDMA_DB_GEN2_RQ2_OFFSET;
  815. uresp.db_shift = (qp->id < 128) ? 24 : 16;
  816. } else {
  817. uresp.db_sq_offset = OCRDMA_DB_SQ_OFFSET;
  818. uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
  819. uresp.db_shift = 16;
  820. }
  821. if (qp->dpp_enabled) {
  822. uresp.dpp_credit = dpp_credit_lmt;
  823. uresp.dpp_offset = dpp_offset;
  824. }
  825. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  826. if (status) {
  827. pr_err("%s(%d) user copy error.\n", __func__, dev->id);
  828. goto err;
  829. }
  830. status = ocrdma_add_mmap(pd->uctx, uresp.sq_page_addr[0],
  831. uresp.sq_page_size);
  832. if (status)
  833. goto err;
  834. if (!srq) {
  835. status = ocrdma_add_mmap(pd->uctx, uresp.rq_page_addr[0],
  836. uresp.rq_page_size);
  837. if (status)
  838. goto rq_map_err;
  839. }
  840. return status;
  841. rq_map_err:
  842. ocrdma_del_mmap(pd->uctx, uresp.sq_page_addr[0], uresp.sq_page_size);
  843. err:
  844. return status;
  845. }
  846. static void ocrdma_set_qp_db(struct ocrdma_dev *dev, struct ocrdma_qp *qp,
  847. struct ocrdma_pd *pd)
  848. {
  849. if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
  850. qp->sq_db = dev->nic_info.db +
  851. (pd->id * dev->nic_info.db_page_size) +
  852. OCRDMA_DB_GEN2_SQ_OFFSET;
  853. qp->rq_db = dev->nic_info.db +
  854. (pd->id * dev->nic_info.db_page_size) +
  855. ((qp->id < 128) ?
  856. OCRDMA_DB_GEN2_RQ1_OFFSET : OCRDMA_DB_GEN2_RQ2_OFFSET);
  857. } else {
  858. qp->sq_db = dev->nic_info.db +
  859. (pd->id * dev->nic_info.db_page_size) +
  860. OCRDMA_DB_SQ_OFFSET;
  861. qp->rq_db = dev->nic_info.db +
  862. (pd->id * dev->nic_info.db_page_size) +
  863. OCRDMA_DB_RQ_OFFSET;
  864. }
  865. }
  866. static int ocrdma_alloc_wr_id_tbl(struct ocrdma_qp *qp)
  867. {
  868. qp->wqe_wr_id_tbl =
  869. kzalloc(sizeof(*(qp->wqe_wr_id_tbl)) * qp->sq.max_cnt,
  870. GFP_KERNEL);
  871. if (qp->wqe_wr_id_tbl == NULL)
  872. return -ENOMEM;
  873. qp->rqe_wr_id_tbl =
  874. kzalloc(sizeof(u64) * qp->rq.max_cnt, GFP_KERNEL);
  875. if (qp->rqe_wr_id_tbl == NULL)
  876. return -ENOMEM;
  877. return 0;
  878. }
  879. static void ocrdma_set_qp_init_params(struct ocrdma_qp *qp,
  880. struct ocrdma_pd *pd,
  881. struct ib_qp_init_attr *attrs)
  882. {
  883. qp->pd = pd;
  884. spin_lock_init(&qp->q_lock);
  885. INIT_LIST_HEAD(&qp->sq_entry);
  886. INIT_LIST_HEAD(&qp->rq_entry);
  887. qp->qp_type = attrs->qp_type;
  888. qp->cap_flags = OCRDMA_QP_INB_RD | OCRDMA_QP_INB_WR;
  889. qp->max_inline_data = attrs->cap.max_inline_data;
  890. qp->sq.max_sges = attrs->cap.max_send_sge;
  891. qp->rq.max_sges = attrs->cap.max_recv_sge;
  892. qp->state = OCRDMA_QPS_RST;
  893. }
  894. static void ocrdma_store_gsi_qp_cq(struct ocrdma_dev *dev,
  895. struct ib_qp_init_attr *attrs)
  896. {
  897. if (attrs->qp_type == IB_QPT_GSI) {
  898. dev->gsi_qp_created = 1;
  899. dev->gsi_sqcq = get_ocrdma_cq(attrs->send_cq);
  900. dev->gsi_rqcq = get_ocrdma_cq(attrs->recv_cq);
  901. }
  902. }
  903. struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
  904. struct ib_qp_init_attr *attrs,
  905. struct ib_udata *udata)
  906. {
  907. int status;
  908. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  909. struct ocrdma_qp *qp;
  910. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  911. struct ocrdma_create_qp_ureq ureq;
  912. u16 dpp_credit_lmt, dpp_offset;
  913. status = ocrdma_check_qp_params(ibpd, dev, attrs);
  914. if (status)
  915. goto gen_err;
  916. memset(&ureq, 0, sizeof(ureq));
  917. if (udata) {
  918. if (ib_copy_from_udata(&ureq, udata, sizeof(ureq)))
  919. return ERR_PTR(-EFAULT);
  920. }
  921. qp = kzalloc(sizeof(*qp), GFP_KERNEL);
  922. if (!qp) {
  923. status = -ENOMEM;
  924. goto gen_err;
  925. }
  926. qp->dev = dev;
  927. ocrdma_set_qp_init_params(qp, pd, attrs);
  928. mutex_lock(&dev->dev_lock);
  929. status = ocrdma_mbx_create_qp(qp, attrs, ureq.enable_dpp_cq,
  930. ureq.dpp_cq_id,
  931. &dpp_offset, &dpp_credit_lmt);
  932. if (status)
  933. goto mbx_err;
  934. /* user space QP's wr_id table are managed in library */
  935. if (udata == NULL) {
  936. qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
  937. OCRDMA_QP_FAST_REG);
  938. status = ocrdma_alloc_wr_id_tbl(qp);
  939. if (status)
  940. goto map_err;
  941. }
  942. status = ocrdma_add_qpn_map(dev, qp);
  943. if (status)
  944. goto map_err;
  945. ocrdma_set_qp_db(dev, qp, pd);
  946. if (udata) {
  947. status = ocrdma_copy_qp_uresp(qp, udata, dpp_offset,
  948. dpp_credit_lmt,
  949. (attrs->srq != NULL));
  950. if (status)
  951. goto cpy_err;
  952. }
  953. ocrdma_store_gsi_qp_cq(dev, attrs);
  954. qp->ibqp.qp_num = qp->id;
  955. mutex_unlock(&dev->dev_lock);
  956. return &qp->ibqp;
  957. cpy_err:
  958. ocrdma_del_qpn_map(dev, qp);
  959. map_err:
  960. ocrdma_mbx_destroy_qp(dev, qp);
  961. mbx_err:
  962. mutex_unlock(&dev->dev_lock);
  963. kfree(qp->wqe_wr_id_tbl);
  964. kfree(qp->rqe_wr_id_tbl);
  965. kfree(qp);
  966. pr_err("%s(%d) error=%d\n", __func__, dev->id, status);
  967. gen_err:
  968. return ERR_PTR(status);
  969. }
  970. int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  971. int attr_mask)
  972. {
  973. int status = 0;
  974. struct ocrdma_qp *qp;
  975. struct ocrdma_dev *dev;
  976. enum ib_qp_state old_qps;
  977. qp = get_ocrdma_qp(ibqp);
  978. dev = qp->dev;
  979. if (attr_mask & IB_QP_STATE)
  980. status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
  981. /* if new and previous states are same hw doesn't need to
  982. * know about it.
  983. */
  984. if (status < 0)
  985. return status;
  986. status = ocrdma_mbx_modify_qp(dev, qp, attr, attr_mask, old_qps);
  987. return status;
  988. }
  989. int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
  990. int attr_mask, struct ib_udata *udata)
  991. {
  992. unsigned long flags;
  993. int status = -EINVAL;
  994. struct ocrdma_qp *qp;
  995. struct ocrdma_dev *dev;
  996. enum ib_qp_state old_qps, new_qps;
  997. qp = get_ocrdma_qp(ibqp);
  998. dev = qp->dev;
  999. /* syncronize with multiple context trying to change, retrive qps */
  1000. mutex_lock(&dev->dev_lock);
  1001. /* syncronize with wqe, rqe posting and cqe processing contexts */
  1002. spin_lock_irqsave(&qp->q_lock, flags);
  1003. old_qps = get_ibqp_state(qp->state);
  1004. if (attr_mask & IB_QP_STATE)
  1005. new_qps = attr->qp_state;
  1006. else
  1007. new_qps = old_qps;
  1008. spin_unlock_irqrestore(&qp->q_lock, flags);
  1009. if (!ib_modify_qp_is_ok(old_qps, new_qps, ibqp->qp_type, attr_mask)) {
  1010. pr_err("%s(%d) invalid attribute mask=0x%x specified for\n"
  1011. "qpn=0x%x of type=0x%x old_qps=0x%x, new_qps=0x%x\n",
  1012. __func__, dev->id, attr_mask, qp->id, ibqp->qp_type,
  1013. old_qps, new_qps);
  1014. goto param_err;
  1015. }
  1016. status = _ocrdma_modify_qp(ibqp, attr, attr_mask);
  1017. if (status > 0)
  1018. status = 0;
  1019. param_err:
  1020. mutex_unlock(&dev->dev_lock);
  1021. return status;
  1022. }
  1023. static enum ib_mtu ocrdma_mtu_int_to_enum(u16 mtu)
  1024. {
  1025. switch (mtu) {
  1026. case 256:
  1027. return IB_MTU_256;
  1028. case 512:
  1029. return IB_MTU_512;
  1030. case 1024:
  1031. return IB_MTU_1024;
  1032. case 2048:
  1033. return IB_MTU_2048;
  1034. case 4096:
  1035. return IB_MTU_4096;
  1036. default:
  1037. return IB_MTU_1024;
  1038. }
  1039. }
  1040. static int ocrdma_to_ib_qp_acc_flags(int qp_cap_flags)
  1041. {
  1042. int ib_qp_acc_flags = 0;
  1043. if (qp_cap_flags & OCRDMA_QP_INB_WR)
  1044. ib_qp_acc_flags |= IB_ACCESS_REMOTE_WRITE;
  1045. if (qp_cap_flags & OCRDMA_QP_INB_RD)
  1046. ib_qp_acc_flags |= IB_ACCESS_LOCAL_WRITE;
  1047. return ib_qp_acc_flags;
  1048. }
  1049. int ocrdma_query_qp(struct ib_qp *ibqp,
  1050. struct ib_qp_attr *qp_attr,
  1051. int attr_mask, struct ib_qp_init_attr *qp_init_attr)
  1052. {
  1053. int status;
  1054. u32 qp_state;
  1055. struct ocrdma_qp_params params;
  1056. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1057. struct ocrdma_dev *dev = qp->dev;
  1058. memset(&params, 0, sizeof(params));
  1059. mutex_lock(&dev->dev_lock);
  1060. status = ocrdma_mbx_query_qp(dev, qp, &params);
  1061. mutex_unlock(&dev->dev_lock);
  1062. if (status)
  1063. goto mbx_err;
  1064. qp_attr->qp_state = get_ibqp_state(IB_QPS_INIT);
  1065. qp_attr->cur_qp_state = get_ibqp_state(IB_QPS_INIT);
  1066. qp_attr->path_mtu =
  1067. ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
  1068. OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
  1069. OCRDMA_QP_PARAMS_PATH_MTU_SHIFT;
  1070. qp_attr->path_mig_state = IB_MIG_MIGRATED;
  1071. qp_attr->rq_psn = params.hop_lmt_rq_psn & OCRDMA_QP_PARAMS_RQ_PSN_MASK;
  1072. qp_attr->sq_psn = params.tclass_sq_psn & OCRDMA_QP_PARAMS_SQ_PSN_MASK;
  1073. qp_attr->dest_qp_num =
  1074. params.ack_to_rnr_rtc_dest_qpn & OCRDMA_QP_PARAMS_DEST_QPN_MASK;
  1075. qp_attr->qp_access_flags = ocrdma_to_ib_qp_acc_flags(qp->cap_flags);
  1076. qp_attr->cap.max_send_wr = qp->sq.max_cnt - 1;
  1077. qp_attr->cap.max_recv_wr = qp->rq.max_cnt - 1;
  1078. qp_attr->cap.max_send_sge = qp->sq.max_sges;
  1079. qp_attr->cap.max_recv_sge = qp->rq.max_sges;
  1080. qp_attr->cap.max_inline_data = dev->attr.max_inline_data;
  1081. qp_init_attr->cap = qp_attr->cap;
  1082. memcpy(&qp_attr->ah_attr.grh.dgid, &params.dgid[0],
  1083. sizeof(params.dgid));
  1084. qp_attr->ah_attr.grh.flow_label = params.rnt_rc_sl_fl &
  1085. OCRDMA_QP_PARAMS_FLOW_LABEL_MASK;
  1086. qp_attr->ah_attr.grh.sgid_index = qp->sgid_idx;
  1087. qp_attr->ah_attr.grh.hop_limit = (params.hop_lmt_rq_psn &
  1088. OCRDMA_QP_PARAMS_HOP_LMT_MASK) >>
  1089. OCRDMA_QP_PARAMS_HOP_LMT_SHIFT;
  1090. qp_attr->ah_attr.grh.traffic_class = (params.tclass_sq_psn &
  1091. OCRDMA_QP_PARAMS_SQ_PSN_MASK) >>
  1092. OCRDMA_QP_PARAMS_TCLASS_SHIFT;
  1093. qp_attr->ah_attr.ah_flags = IB_AH_GRH;
  1094. qp_attr->ah_attr.port_num = 1;
  1095. qp_attr->ah_attr.sl = (params.rnt_rc_sl_fl &
  1096. OCRDMA_QP_PARAMS_SL_MASK) >>
  1097. OCRDMA_QP_PARAMS_SL_SHIFT;
  1098. qp_attr->timeout = (params.ack_to_rnr_rtc_dest_qpn &
  1099. OCRDMA_QP_PARAMS_ACK_TIMEOUT_MASK) >>
  1100. OCRDMA_QP_PARAMS_ACK_TIMEOUT_SHIFT;
  1101. qp_attr->rnr_retry = (params.ack_to_rnr_rtc_dest_qpn &
  1102. OCRDMA_QP_PARAMS_RNR_RETRY_CNT_MASK) >>
  1103. OCRDMA_QP_PARAMS_RNR_RETRY_CNT_SHIFT;
  1104. qp_attr->retry_cnt =
  1105. (params.rnt_rc_sl_fl & OCRDMA_QP_PARAMS_RETRY_CNT_MASK) >>
  1106. OCRDMA_QP_PARAMS_RETRY_CNT_SHIFT;
  1107. qp_attr->min_rnr_timer = 0;
  1108. qp_attr->pkey_index = 0;
  1109. qp_attr->port_num = 1;
  1110. qp_attr->ah_attr.src_path_bits = 0;
  1111. qp_attr->ah_attr.static_rate = 0;
  1112. qp_attr->alt_pkey_index = 0;
  1113. qp_attr->alt_port_num = 0;
  1114. qp_attr->alt_timeout = 0;
  1115. memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
  1116. qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
  1117. OCRDMA_QP_PARAMS_STATE_SHIFT;
  1118. qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
  1119. qp_attr->max_dest_rd_atomic =
  1120. params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
  1121. qp_attr->max_rd_atomic =
  1122. params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
  1123. qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
  1124. OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
  1125. mbx_err:
  1126. return status;
  1127. }
  1128. static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx)
  1129. {
  1130. int i = idx / 32;
  1131. unsigned int mask = (1 << (idx % 32));
  1132. if (srq->idx_bit_fields[i] & mask)
  1133. srq->idx_bit_fields[i] &= ~mask;
  1134. else
  1135. srq->idx_bit_fields[i] |= mask;
  1136. }
  1137. static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
  1138. {
  1139. int free_cnt;
  1140. if (q->head >= q->tail)
  1141. free_cnt = (q->max_cnt - q->head) + q->tail;
  1142. else
  1143. free_cnt = q->tail - q->head;
  1144. return free_cnt;
  1145. }
  1146. static int is_hw_sq_empty(struct ocrdma_qp *qp)
  1147. {
  1148. return (qp->sq.tail == qp->sq.head &&
  1149. ocrdma_hwq_free_cnt(&qp->sq) ? 1 : 0);
  1150. }
  1151. static int is_hw_rq_empty(struct ocrdma_qp *qp)
  1152. {
  1153. return (qp->rq.tail == qp->rq.head) ? 1 : 0;
  1154. }
  1155. static void *ocrdma_hwq_head(struct ocrdma_qp_hwq_info *q)
  1156. {
  1157. return q->va + (q->head * q->entry_size);
  1158. }
  1159. static void *ocrdma_hwq_head_from_idx(struct ocrdma_qp_hwq_info *q,
  1160. u32 idx)
  1161. {
  1162. return q->va + (idx * q->entry_size);
  1163. }
  1164. static void ocrdma_hwq_inc_head(struct ocrdma_qp_hwq_info *q)
  1165. {
  1166. q->head = (q->head + 1) & q->max_wqe_idx;
  1167. }
  1168. static void ocrdma_hwq_inc_tail(struct ocrdma_qp_hwq_info *q)
  1169. {
  1170. q->tail = (q->tail + 1) & q->max_wqe_idx;
  1171. }
  1172. /* discard the cqe for a given QP */
  1173. static void ocrdma_discard_cqes(struct ocrdma_qp *qp, struct ocrdma_cq *cq)
  1174. {
  1175. unsigned long cq_flags;
  1176. unsigned long flags;
  1177. int discard_cnt = 0;
  1178. u32 cur_getp, stop_getp;
  1179. struct ocrdma_cqe *cqe;
  1180. u32 qpn = 0;
  1181. spin_lock_irqsave(&cq->cq_lock, cq_flags);
  1182. /* traverse through the CQEs in the hw CQ,
  1183. * find the matching CQE for a given qp,
  1184. * mark the matching one discarded by clearing qpn.
  1185. * ring the doorbell in the poll_cq() as
  1186. * we don't complete out of order cqe.
  1187. */
  1188. cur_getp = cq->getp;
  1189. /* find upto when do we reap the cq. */
  1190. stop_getp = cur_getp;
  1191. do {
  1192. if (is_hw_sq_empty(qp) && (!qp->srq && is_hw_rq_empty(qp)))
  1193. break;
  1194. cqe = cq->va + cur_getp;
  1195. /* if (a) done reaping whole hw cq, or
  1196. * (b) qp_xq becomes empty.
  1197. * then exit
  1198. */
  1199. qpn = cqe->cmn.qpn & OCRDMA_CQE_QPN_MASK;
  1200. /* if previously discarded cqe found, skip that too. */
  1201. /* check for matching qp */
  1202. if (qpn == 0 || qpn != qp->id)
  1203. goto skip_cqe;
  1204. /* mark cqe discarded so that it is not picked up later
  1205. * in the poll_cq().
  1206. */
  1207. discard_cnt += 1;
  1208. cqe->cmn.qpn = 0;
  1209. if (is_cqe_for_sq(cqe)) {
  1210. ocrdma_hwq_inc_tail(&qp->sq);
  1211. } else {
  1212. if (qp->srq) {
  1213. spin_lock_irqsave(&qp->srq->q_lock, flags);
  1214. ocrdma_hwq_inc_tail(&qp->srq->rq);
  1215. ocrdma_srq_toggle_bit(qp->srq, cur_getp);
  1216. spin_unlock_irqrestore(&qp->srq->q_lock, flags);
  1217. } else {
  1218. ocrdma_hwq_inc_tail(&qp->rq);
  1219. }
  1220. }
  1221. skip_cqe:
  1222. cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
  1223. } while (cur_getp != stop_getp);
  1224. spin_unlock_irqrestore(&cq->cq_lock, cq_flags);
  1225. }
  1226. static void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
  1227. {
  1228. int found = false;
  1229. unsigned long flags;
  1230. struct ocrdma_dev *dev = qp->dev;
  1231. /* sync with any active CQ poll */
  1232. spin_lock_irqsave(&dev->flush_q_lock, flags);
  1233. found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
  1234. if (found)
  1235. list_del(&qp->sq_entry);
  1236. if (!qp->srq) {
  1237. found = ocrdma_is_qp_in_rq_flushlist(qp->rq_cq, qp);
  1238. if (found)
  1239. list_del(&qp->rq_entry);
  1240. }
  1241. spin_unlock_irqrestore(&dev->flush_q_lock, flags);
  1242. }
  1243. int ocrdma_destroy_qp(struct ib_qp *ibqp)
  1244. {
  1245. int status;
  1246. struct ocrdma_pd *pd;
  1247. struct ocrdma_qp *qp;
  1248. struct ocrdma_dev *dev;
  1249. struct ib_qp_attr attrs;
  1250. int attr_mask = IB_QP_STATE;
  1251. unsigned long flags;
  1252. qp = get_ocrdma_qp(ibqp);
  1253. dev = qp->dev;
  1254. attrs.qp_state = IB_QPS_ERR;
  1255. pd = qp->pd;
  1256. /* change the QP state to ERROR */
  1257. _ocrdma_modify_qp(ibqp, &attrs, attr_mask);
  1258. /* ensure that CQEs for newly created QP (whose id may be same with
  1259. * one which just getting destroyed are same), dont get
  1260. * discarded until the old CQEs are discarded.
  1261. */
  1262. mutex_lock(&dev->dev_lock);
  1263. status = ocrdma_mbx_destroy_qp(dev, qp);
  1264. /*
  1265. * acquire CQ lock while destroy is in progress, in order to
  1266. * protect against proessing in-flight CQEs for this QP.
  1267. */
  1268. spin_lock_irqsave(&qp->sq_cq->cq_lock, flags);
  1269. if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
  1270. spin_lock(&qp->rq_cq->cq_lock);
  1271. ocrdma_del_qpn_map(dev, qp);
  1272. if (qp->rq_cq && (qp->rq_cq != qp->sq_cq))
  1273. spin_unlock(&qp->rq_cq->cq_lock);
  1274. spin_unlock_irqrestore(&qp->sq_cq->cq_lock, flags);
  1275. if (!pd->uctx) {
  1276. ocrdma_discard_cqes(qp, qp->sq_cq);
  1277. ocrdma_discard_cqes(qp, qp->rq_cq);
  1278. }
  1279. mutex_unlock(&dev->dev_lock);
  1280. if (pd->uctx) {
  1281. ocrdma_del_mmap(pd->uctx, (u64) qp->sq.pa, qp->sq.len);
  1282. if (!qp->srq)
  1283. ocrdma_del_mmap(pd->uctx, (u64) qp->rq.pa, qp->rq.len);
  1284. }
  1285. ocrdma_del_flush_qp(qp);
  1286. kfree(qp->wqe_wr_id_tbl);
  1287. kfree(qp->rqe_wr_id_tbl);
  1288. kfree(qp);
  1289. return status;
  1290. }
  1291. static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
  1292. struct ib_udata *udata)
  1293. {
  1294. int status;
  1295. struct ocrdma_create_srq_uresp uresp;
  1296. memset(&uresp, 0, sizeof(uresp));
  1297. uresp.rq_dbid = srq->rq.dbid;
  1298. uresp.num_rq_pages = 1;
  1299. uresp.rq_page_addr[0] = srq->rq.pa;
  1300. uresp.rq_page_size = srq->rq.len;
  1301. uresp.db_page_addr = dev->nic_info.unmapped_db +
  1302. (srq->pd->id * dev->nic_info.db_page_size);
  1303. uresp.db_page_size = dev->nic_info.db_page_size;
  1304. uresp.num_rqe_allocated = srq->rq.max_cnt;
  1305. if (dev->nic_info.dev_family == OCRDMA_GEN2_FAMILY) {
  1306. uresp.db_rq_offset = OCRDMA_DB_GEN2_RQ1_OFFSET;
  1307. uresp.db_shift = 24;
  1308. } else {
  1309. uresp.db_rq_offset = OCRDMA_DB_RQ_OFFSET;
  1310. uresp.db_shift = 16;
  1311. }
  1312. status = ib_copy_to_udata(udata, &uresp, sizeof(uresp));
  1313. if (status)
  1314. return status;
  1315. status = ocrdma_add_mmap(srq->pd->uctx, uresp.rq_page_addr[0],
  1316. uresp.rq_page_size);
  1317. if (status)
  1318. return status;
  1319. return status;
  1320. }
  1321. struct ib_srq *ocrdma_create_srq(struct ib_pd *ibpd,
  1322. struct ib_srq_init_attr *init_attr,
  1323. struct ib_udata *udata)
  1324. {
  1325. int status = -ENOMEM;
  1326. struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
  1327. struct ocrdma_dev *dev = get_ocrdma_dev(ibpd->device);
  1328. struct ocrdma_srq *srq;
  1329. if (init_attr->attr.max_sge > dev->attr.max_recv_sge)
  1330. return ERR_PTR(-EINVAL);
  1331. if (init_attr->attr.max_wr > dev->attr.max_rqe)
  1332. return ERR_PTR(-EINVAL);
  1333. srq = kzalloc(sizeof(*srq), GFP_KERNEL);
  1334. if (!srq)
  1335. return ERR_PTR(status);
  1336. spin_lock_init(&srq->q_lock);
  1337. srq->pd = pd;
  1338. srq->db = dev->nic_info.db + (pd->id * dev->nic_info.db_page_size);
  1339. status = ocrdma_mbx_create_srq(dev, srq, init_attr, pd);
  1340. if (status)
  1341. goto err;
  1342. if (udata == NULL) {
  1343. srq->rqe_wr_id_tbl = kzalloc(sizeof(u64) * srq->rq.max_cnt,
  1344. GFP_KERNEL);
  1345. if (srq->rqe_wr_id_tbl == NULL)
  1346. goto arm_err;
  1347. srq->bit_fields_len = (srq->rq.max_cnt / 32) +
  1348. (srq->rq.max_cnt % 32 ? 1 : 0);
  1349. srq->idx_bit_fields =
  1350. kmalloc(srq->bit_fields_len * sizeof(u32), GFP_KERNEL);
  1351. if (srq->idx_bit_fields == NULL)
  1352. goto arm_err;
  1353. memset(srq->idx_bit_fields, 0xff,
  1354. srq->bit_fields_len * sizeof(u32));
  1355. }
  1356. if (init_attr->attr.srq_limit) {
  1357. status = ocrdma_mbx_modify_srq(srq, &init_attr->attr);
  1358. if (status)
  1359. goto arm_err;
  1360. }
  1361. if (udata) {
  1362. status = ocrdma_copy_srq_uresp(dev, srq, udata);
  1363. if (status)
  1364. goto arm_err;
  1365. }
  1366. return &srq->ibsrq;
  1367. arm_err:
  1368. ocrdma_mbx_destroy_srq(dev, srq);
  1369. err:
  1370. kfree(srq->rqe_wr_id_tbl);
  1371. kfree(srq->idx_bit_fields);
  1372. kfree(srq);
  1373. return ERR_PTR(status);
  1374. }
  1375. int ocrdma_modify_srq(struct ib_srq *ibsrq,
  1376. struct ib_srq_attr *srq_attr,
  1377. enum ib_srq_attr_mask srq_attr_mask,
  1378. struct ib_udata *udata)
  1379. {
  1380. int status = 0;
  1381. struct ocrdma_srq *srq;
  1382. srq = get_ocrdma_srq(ibsrq);
  1383. if (srq_attr_mask & IB_SRQ_MAX_WR)
  1384. status = -EINVAL;
  1385. else
  1386. status = ocrdma_mbx_modify_srq(srq, srq_attr);
  1387. return status;
  1388. }
  1389. int ocrdma_query_srq(struct ib_srq *ibsrq, struct ib_srq_attr *srq_attr)
  1390. {
  1391. int status;
  1392. struct ocrdma_srq *srq;
  1393. srq = get_ocrdma_srq(ibsrq);
  1394. status = ocrdma_mbx_query_srq(srq, srq_attr);
  1395. return status;
  1396. }
  1397. int ocrdma_destroy_srq(struct ib_srq *ibsrq)
  1398. {
  1399. int status;
  1400. struct ocrdma_srq *srq;
  1401. struct ocrdma_dev *dev = get_ocrdma_dev(ibsrq->device);
  1402. srq = get_ocrdma_srq(ibsrq);
  1403. status = ocrdma_mbx_destroy_srq(dev, srq);
  1404. if (srq->pd->uctx)
  1405. ocrdma_del_mmap(srq->pd->uctx, (u64) srq->rq.pa, srq->rq.len);
  1406. kfree(srq->idx_bit_fields);
  1407. kfree(srq->rqe_wr_id_tbl);
  1408. kfree(srq);
  1409. return status;
  1410. }
  1411. /* unprivileged verbs and their support functions. */
  1412. static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
  1413. struct ocrdma_hdr_wqe *hdr,
  1414. struct ib_send_wr *wr)
  1415. {
  1416. struct ocrdma_ewqe_ud_hdr *ud_hdr =
  1417. (struct ocrdma_ewqe_ud_hdr *)(hdr + 1);
  1418. struct ocrdma_ah *ah = get_ocrdma_ah(wr->wr.ud.ah);
  1419. ud_hdr->rsvd_dest_qpn = wr->wr.ud.remote_qpn;
  1420. if (qp->qp_type == IB_QPT_GSI)
  1421. ud_hdr->qkey = qp->qkey;
  1422. else
  1423. ud_hdr->qkey = wr->wr.ud.remote_qkey;
  1424. ud_hdr->rsvd_ahid = ah->id;
  1425. }
  1426. static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
  1427. struct ocrdma_sge *sge, int num_sge,
  1428. struct ib_sge *sg_list)
  1429. {
  1430. int i;
  1431. for (i = 0; i < num_sge; i++) {
  1432. sge[i].lrkey = sg_list[i].lkey;
  1433. sge[i].addr_lo = sg_list[i].addr;
  1434. sge[i].addr_hi = upper_32_bits(sg_list[i].addr);
  1435. sge[i].len = sg_list[i].length;
  1436. hdr->total_len += sg_list[i].length;
  1437. }
  1438. if (num_sge == 0)
  1439. memset(sge, 0, sizeof(*sge));
  1440. }
  1441. static int ocrdma_build_inline_sges(struct ocrdma_qp *qp,
  1442. struct ocrdma_hdr_wqe *hdr,
  1443. struct ocrdma_sge *sge,
  1444. struct ib_send_wr *wr, u32 wqe_size)
  1445. {
  1446. if (wr->send_flags & IB_SEND_INLINE) {
  1447. if (wr->sg_list[0].length > qp->max_inline_data) {
  1448. pr_err("%s() supported_len=0x%x,\n"
  1449. " unspported len req=0x%x\n", __func__,
  1450. qp->max_inline_data, wr->sg_list[0].length);
  1451. return -EINVAL;
  1452. }
  1453. memcpy(sge,
  1454. (void *)(unsigned long)wr->sg_list[0].addr,
  1455. wr->sg_list[0].length);
  1456. hdr->total_len = wr->sg_list[0].length;
  1457. wqe_size += roundup(hdr->total_len, OCRDMA_WQE_ALIGN_BYTES);
  1458. hdr->cw |= (OCRDMA_TYPE_INLINE << OCRDMA_WQE_TYPE_SHIFT);
  1459. } else {
  1460. ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
  1461. if (wr->num_sge)
  1462. wqe_size += (wr->num_sge * sizeof(struct ocrdma_sge));
  1463. else
  1464. wqe_size += sizeof(struct ocrdma_sge);
  1465. hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1466. }
  1467. hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
  1468. return 0;
  1469. }
  1470. static int ocrdma_build_send(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1471. struct ib_send_wr *wr)
  1472. {
  1473. int status;
  1474. struct ocrdma_sge *sge;
  1475. u32 wqe_size = sizeof(*hdr);
  1476. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  1477. ocrdma_build_ud_hdr(qp, hdr, wr);
  1478. sge = (struct ocrdma_sge *)(hdr + 2);
  1479. wqe_size += sizeof(struct ocrdma_ewqe_ud_hdr);
  1480. } else {
  1481. sge = (struct ocrdma_sge *)(hdr + 1);
  1482. }
  1483. status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
  1484. return status;
  1485. }
  1486. static int ocrdma_build_write(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1487. struct ib_send_wr *wr)
  1488. {
  1489. int status;
  1490. struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
  1491. struct ocrdma_sge *sge = ext_rw + 1;
  1492. u32 wqe_size = sizeof(*hdr) + sizeof(*ext_rw);
  1493. status = ocrdma_build_inline_sges(qp, hdr, sge, wr, wqe_size);
  1494. if (status)
  1495. return status;
  1496. ext_rw->addr_lo = wr->wr.rdma.remote_addr;
  1497. ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
  1498. ext_rw->lrkey = wr->wr.rdma.rkey;
  1499. ext_rw->len = hdr->total_len;
  1500. return 0;
  1501. }
  1502. static void ocrdma_build_read(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
  1503. struct ib_send_wr *wr)
  1504. {
  1505. struct ocrdma_sge *ext_rw = (struct ocrdma_sge *)(hdr + 1);
  1506. struct ocrdma_sge *sge = ext_rw + 1;
  1507. u32 wqe_size = ((wr->num_sge + 1) * sizeof(struct ocrdma_sge)) +
  1508. sizeof(struct ocrdma_hdr_wqe);
  1509. ocrdma_build_sges(hdr, sge, wr->num_sge, wr->sg_list);
  1510. hdr->cw |= ((wqe_size / OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT);
  1511. hdr->cw |= (OCRDMA_READ << OCRDMA_WQE_OPCODE_SHIFT);
  1512. hdr->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1513. ext_rw->addr_lo = wr->wr.rdma.remote_addr;
  1514. ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr);
  1515. ext_rw->lrkey = wr->wr.rdma.rkey;
  1516. ext_rw->len = hdr->total_len;
  1517. }
  1518. static void ocrdma_ring_sq_db(struct ocrdma_qp *qp)
  1519. {
  1520. u32 val = qp->sq.dbid | (1 << 16);
  1521. iowrite32(val, qp->sq_db);
  1522. }
  1523. int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
  1524. struct ib_send_wr **bad_wr)
  1525. {
  1526. int status = 0;
  1527. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1528. struct ocrdma_hdr_wqe *hdr;
  1529. unsigned long flags;
  1530. spin_lock_irqsave(&qp->q_lock, flags);
  1531. if (qp->state != OCRDMA_QPS_RTS && qp->state != OCRDMA_QPS_SQD) {
  1532. spin_unlock_irqrestore(&qp->q_lock, flags);
  1533. *bad_wr = wr;
  1534. return -EINVAL;
  1535. }
  1536. while (wr) {
  1537. if (ocrdma_hwq_free_cnt(&qp->sq) == 0 ||
  1538. wr->num_sge > qp->sq.max_sges) {
  1539. *bad_wr = wr;
  1540. status = -ENOMEM;
  1541. break;
  1542. }
  1543. hdr = ocrdma_hwq_head(&qp->sq);
  1544. hdr->cw = 0;
  1545. if (wr->send_flags & IB_SEND_SIGNALED)
  1546. hdr->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
  1547. if (wr->send_flags & IB_SEND_FENCE)
  1548. hdr->cw |=
  1549. (OCRDMA_FLAG_FENCE_L << OCRDMA_WQE_FLAGS_SHIFT);
  1550. if (wr->send_flags & IB_SEND_SOLICITED)
  1551. hdr->cw |=
  1552. (OCRDMA_FLAG_SOLICIT << OCRDMA_WQE_FLAGS_SHIFT);
  1553. hdr->total_len = 0;
  1554. switch (wr->opcode) {
  1555. case IB_WR_SEND_WITH_IMM:
  1556. hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
  1557. hdr->immdt = ntohl(wr->ex.imm_data);
  1558. case IB_WR_SEND:
  1559. hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
  1560. ocrdma_build_send(qp, hdr, wr);
  1561. break;
  1562. case IB_WR_SEND_WITH_INV:
  1563. hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
  1564. hdr->cw |= (OCRDMA_SEND << OCRDMA_WQE_OPCODE_SHIFT);
  1565. hdr->lkey = wr->ex.invalidate_rkey;
  1566. status = ocrdma_build_send(qp, hdr, wr);
  1567. break;
  1568. case IB_WR_RDMA_WRITE_WITH_IMM:
  1569. hdr->cw |= (OCRDMA_FLAG_IMM << OCRDMA_WQE_FLAGS_SHIFT);
  1570. hdr->immdt = ntohl(wr->ex.imm_data);
  1571. case IB_WR_RDMA_WRITE:
  1572. hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
  1573. status = ocrdma_build_write(qp, hdr, wr);
  1574. break;
  1575. case IB_WR_RDMA_READ_WITH_INV:
  1576. hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
  1577. case IB_WR_RDMA_READ:
  1578. ocrdma_build_read(qp, hdr, wr);
  1579. break;
  1580. case IB_WR_LOCAL_INV:
  1581. hdr->cw |=
  1582. (OCRDMA_LKEY_INV << OCRDMA_WQE_OPCODE_SHIFT);
  1583. hdr->cw |= (sizeof(struct ocrdma_hdr_wqe) /
  1584. OCRDMA_WQE_STRIDE) << OCRDMA_WQE_SIZE_SHIFT;
  1585. hdr->lkey = wr->ex.invalidate_rkey;
  1586. break;
  1587. default:
  1588. status = -EINVAL;
  1589. break;
  1590. }
  1591. if (status) {
  1592. *bad_wr = wr;
  1593. break;
  1594. }
  1595. if (wr->send_flags & IB_SEND_SIGNALED)
  1596. qp->wqe_wr_id_tbl[qp->sq.head].signaled = 1;
  1597. else
  1598. qp->wqe_wr_id_tbl[qp->sq.head].signaled = 0;
  1599. qp->wqe_wr_id_tbl[qp->sq.head].wrid = wr->wr_id;
  1600. ocrdma_cpu_to_le32(hdr, ((hdr->cw >> OCRDMA_WQE_SIZE_SHIFT) &
  1601. OCRDMA_WQE_SIZE_MASK) * OCRDMA_WQE_STRIDE);
  1602. /* make sure wqe is written before adapter can access it */
  1603. wmb();
  1604. /* inform hw to start processing it */
  1605. ocrdma_ring_sq_db(qp);
  1606. /* update pointer, counter for next wr */
  1607. ocrdma_hwq_inc_head(&qp->sq);
  1608. wr = wr->next;
  1609. }
  1610. spin_unlock_irqrestore(&qp->q_lock, flags);
  1611. return status;
  1612. }
  1613. static void ocrdma_ring_rq_db(struct ocrdma_qp *qp)
  1614. {
  1615. u32 val = qp->rq.dbid | (1 << ocrdma_get_num_posted_shift(qp));
  1616. iowrite32(val, qp->rq_db);
  1617. }
  1618. static void ocrdma_build_rqe(struct ocrdma_hdr_wqe *rqe, struct ib_recv_wr *wr,
  1619. u16 tag)
  1620. {
  1621. u32 wqe_size = 0;
  1622. struct ocrdma_sge *sge;
  1623. if (wr->num_sge)
  1624. wqe_size = (wr->num_sge * sizeof(*sge)) + sizeof(*rqe);
  1625. else
  1626. wqe_size = sizeof(*sge) + sizeof(*rqe);
  1627. rqe->cw = ((wqe_size / OCRDMA_WQE_STRIDE) <<
  1628. OCRDMA_WQE_SIZE_SHIFT);
  1629. rqe->cw |= (OCRDMA_FLAG_SIG << OCRDMA_WQE_FLAGS_SHIFT);
  1630. rqe->cw |= (OCRDMA_TYPE_LKEY << OCRDMA_WQE_TYPE_SHIFT);
  1631. rqe->total_len = 0;
  1632. rqe->rsvd_tag = tag;
  1633. sge = (struct ocrdma_sge *)(rqe + 1);
  1634. ocrdma_build_sges(rqe, sge, wr->num_sge, wr->sg_list);
  1635. ocrdma_cpu_to_le32(rqe, wqe_size);
  1636. }
  1637. int ocrdma_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
  1638. struct ib_recv_wr **bad_wr)
  1639. {
  1640. int status = 0;
  1641. unsigned long flags;
  1642. struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
  1643. struct ocrdma_hdr_wqe *rqe;
  1644. spin_lock_irqsave(&qp->q_lock, flags);
  1645. if (qp->state == OCRDMA_QPS_RST || qp->state == OCRDMA_QPS_ERR) {
  1646. spin_unlock_irqrestore(&qp->q_lock, flags);
  1647. *bad_wr = wr;
  1648. return -EINVAL;
  1649. }
  1650. while (wr) {
  1651. if (ocrdma_hwq_free_cnt(&qp->rq) == 0 ||
  1652. wr->num_sge > qp->rq.max_sges) {
  1653. *bad_wr = wr;
  1654. status = -ENOMEM;
  1655. break;
  1656. }
  1657. rqe = ocrdma_hwq_head(&qp->rq);
  1658. ocrdma_build_rqe(rqe, wr, 0);
  1659. qp->rqe_wr_id_tbl[qp->rq.head] = wr->wr_id;
  1660. /* make sure rqe is written before adapter can access it */
  1661. wmb();
  1662. /* inform hw to start processing it */
  1663. ocrdma_ring_rq_db(qp);
  1664. /* update pointer, counter for next wr */
  1665. ocrdma_hwq_inc_head(&qp->rq);
  1666. wr = wr->next;
  1667. }
  1668. spin_unlock_irqrestore(&qp->q_lock, flags);
  1669. return status;
  1670. }
  1671. /* cqe for srq's rqe can potentially arrive out of order.
  1672. * index gives the entry in the shadow table where to store
  1673. * the wr_id. tag/index is returned in cqe to reference back
  1674. * for a given rqe.
  1675. */
  1676. static int ocrdma_srq_get_idx(struct ocrdma_srq *srq)
  1677. {
  1678. int row = 0;
  1679. int indx = 0;
  1680. for (row = 0; row < srq->bit_fields_len; row++) {
  1681. if (srq->idx_bit_fields[row]) {
  1682. indx = ffs(srq->idx_bit_fields[row]);
  1683. indx = (row * 32) + (indx - 1);
  1684. if (indx >= srq->rq.max_cnt)
  1685. BUG();
  1686. ocrdma_srq_toggle_bit(srq, indx);
  1687. break;
  1688. }
  1689. }
  1690. if (row == srq->bit_fields_len)
  1691. BUG();
  1692. return indx;
  1693. }
  1694. static void ocrdma_ring_srq_db(struct ocrdma_srq *srq)
  1695. {
  1696. u32 val = srq->rq.dbid | (1 << 16);
  1697. iowrite32(val, srq->db + OCRDMA_DB_GEN2_SRQ_OFFSET);
  1698. }
  1699. int ocrdma_post_srq_recv(struct ib_srq *ibsrq, struct ib_recv_wr *wr,
  1700. struct ib_recv_wr **bad_wr)
  1701. {
  1702. int status = 0;
  1703. unsigned long flags;
  1704. struct ocrdma_srq *srq;
  1705. struct ocrdma_hdr_wqe *rqe;
  1706. u16 tag;
  1707. srq = get_ocrdma_srq(ibsrq);
  1708. spin_lock_irqsave(&srq->q_lock, flags);
  1709. while (wr) {
  1710. if (ocrdma_hwq_free_cnt(&srq->rq) == 0 ||
  1711. wr->num_sge > srq->rq.max_sges) {
  1712. status = -ENOMEM;
  1713. *bad_wr = wr;
  1714. break;
  1715. }
  1716. tag = ocrdma_srq_get_idx(srq);
  1717. rqe = ocrdma_hwq_head(&srq->rq);
  1718. ocrdma_build_rqe(rqe, wr, tag);
  1719. srq->rqe_wr_id_tbl[tag] = wr->wr_id;
  1720. /* make sure rqe is written before adapter can perform DMA */
  1721. wmb();
  1722. /* inform hw to start processing it */
  1723. ocrdma_ring_srq_db(srq);
  1724. /* update pointer, counter for next wr */
  1725. ocrdma_hwq_inc_head(&srq->rq);
  1726. wr = wr->next;
  1727. }
  1728. spin_unlock_irqrestore(&srq->q_lock, flags);
  1729. return status;
  1730. }
  1731. static enum ib_wc_status ocrdma_to_ibwc_err(u16 status)
  1732. {
  1733. enum ib_wc_status ibwc_status;
  1734. switch (status) {
  1735. case OCRDMA_CQE_GENERAL_ERR:
  1736. ibwc_status = IB_WC_GENERAL_ERR;
  1737. break;
  1738. case OCRDMA_CQE_LOC_LEN_ERR:
  1739. ibwc_status = IB_WC_LOC_LEN_ERR;
  1740. break;
  1741. case OCRDMA_CQE_LOC_QP_OP_ERR:
  1742. ibwc_status = IB_WC_LOC_QP_OP_ERR;
  1743. break;
  1744. case OCRDMA_CQE_LOC_EEC_OP_ERR:
  1745. ibwc_status = IB_WC_LOC_EEC_OP_ERR;
  1746. break;
  1747. case OCRDMA_CQE_LOC_PROT_ERR:
  1748. ibwc_status = IB_WC_LOC_PROT_ERR;
  1749. break;
  1750. case OCRDMA_CQE_WR_FLUSH_ERR:
  1751. ibwc_status = IB_WC_WR_FLUSH_ERR;
  1752. break;
  1753. case OCRDMA_CQE_MW_BIND_ERR:
  1754. ibwc_status = IB_WC_MW_BIND_ERR;
  1755. break;
  1756. case OCRDMA_CQE_BAD_RESP_ERR:
  1757. ibwc_status = IB_WC_BAD_RESP_ERR;
  1758. break;
  1759. case OCRDMA_CQE_LOC_ACCESS_ERR:
  1760. ibwc_status = IB_WC_LOC_ACCESS_ERR;
  1761. break;
  1762. case OCRDMA_CQE_REM_INV_REQ_ERR:
  1763. ibwc_status = IB_WC_REM_INV_REQ_ERR;
  1764. break;
  1765. case OCRDMA_CQE_REM_ACCESS_ERR:
  1766. ibwc_status = IB_WC_REM_ACCESS_ERR;
  1767. break;
  1768. case OCRDMA_CQE_REM_OP_ERR:
  1769. ibwc_status = IB_WC_REM_OP_ERR;
  1770. break;
  1771. case OCRDMA_CQE_RETRY_EXC_ERR:
  1772. ibwc_status = IB_WC_RETRY_EXC_ERR;
  1773. break;
  1774. case OCRDMA_CQE_RNR_RETRY_EXC_ERR:
  1775. ibwc_status = IB_WC_RNR_RETRY_EXC_ERR;
  1776. break;
  1777. case OCRDMA_CQE_LOC_RDD_VIOL_ERR:
  1778. ibwc_status = IB_WC_LOC_RDD_VIOL_ERR;
  1779. break;
  1780. case OCRDMA_CQE_REM_INV_RD_REQ_ERR:
  1781. ibwc_status = IB_WC_REM_INV_RD_REQ_ERR;
  1782. break;
  1783. case OCRDMA_CQE_REM_ABORT_ERR:
  1784. ibwc_status = IB_WC_REM_ABORT_ERR;
  1785. break;
  1786. case OCRDMA_CQE_INV_EECN_ERR:
  1787. ibwc_status = IB_WC_INV_EECN_ERR;
  1788. break;
  1789. case OCRDMA_CQE_INV_EEC_STATE_ERR:
  1790. ibwc_status = IB_WC_INV_EEC_STATE_ERR;
  1791. break;
  1792. case OCRDMA_CQE_FATAL_ERR:
  1793. ibwc_status = IB_WC_FATAL_ERR;
  1794. break;
  1795. case OCRDMA_CQE_RESP_TIMEOUT_ERR:
  1796. ibwc_status = IB_WC_RESP_TIMEOUT_ERR;
  1797. break;
  1798. default:
  1799. ibwc_status = IB_WC_GENERAL_ERR;
  1800. break;
  1801. };
  1802. return ibwc_status;
  1803. }
  1804. static void ocrdma_update_wc(struct ocrdma_qp *qp, struct ib_wc *ibwc,
  1805. u32 wqe_idx)
  1806. {
  1807. struct ocrdma_hdr_wqe *hdr;
  1808. struct ocrdma_sge *rw;
  1809. int opcode;
  1810. hdr = ocrdma_hwq_head_from_idx(&qp->sq, wqe_idx);
  1811. ibwc->wr_id = qp->wqe_wr_id_tbl[wqe_idx].wrid;
  1812. /* Undo the hdr->cw swap */
  1813. opcode = le32_to_cpu(hdr->cw) & OCRDMA_WQE_OPCODE_MASK;
  1814. switch (opcode) {
  1815. case OCRDMA_WRITE:
  1816. ibwc->opcode = IB_WC_RDMA_WRITE;
  1817. break;
  1818. case OCRDMA_READ:
  1819. rw = (struct ocrdma_sge *)(hdr + 1);
  1820. ibwc->opcode = IB_WC_RDMA_READ;
  1821. ibwc->byte_len = rw->len;
  1822. break;
  1823. case OCRDMA_SEND:
  1824. ibwc->opcode = IB_WC_SEND;
  1825. break;
  1826. case OCRDMA_LKEY_INV:
  1827. ibwc->opcode = IB_WC_LOCAL_INV;
  1828. break;
  1829. default:
  1830. ibwc->status = IB_WC_GENERAL_ERR;
  1831. pr_err("%s() invalid opcode received = 0x%x\n",
  1832. __func__, hdr->cw & OCRDMA_WQE_OPCODE_MASK);
  1833. break;
  1834. };
  1835. }
  1836. static void ocrdma_set_cqe_status_flushed(struct ocrdma_qp *qp,
  1837. struct ocrdma_cqe *cqe)
  1838. {
  1839. if (is_cqe_for_sq(cqe)) {
  1840. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1841. cqe->flags_status_srcqpn) &
  1842. ~OCRDMA_CQE_STATUS_MASK);
  1843. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1844. cqe->flags_status_srcqpn) |
  1845. (OCRDMA_CQE_WR_FLUSH_ERR <<
  1846. OCRDMA_CQE_STATUS_SHIFT));
  1847. } else {
  1848. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  1849. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1850. cqe->flags_status_srcqpn) &
  1851. ~OCRDMA_CQE_UD_STATUS_MASK);
  1852. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1853. cqe->flags_status_srcqpn) |
  1854. (OCRDMA_CQE_WR_FLUSH_ERR <<
  1855. OCRDMA_CQE_UD_STATUS_SHIFT));
  1856. } else {
  1857. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1858. cqe->flags_status_srcqpn) &
  1859. ~OCRDMA_CQE_STATUS_MASK);
  1860. cqe->flags_status_srcqpn = cpu_to_le32(le32_to_cpu(
  1861. cqe->flags_status_srcqpn) |
  1862. (OCRDMA_CQE_WR_FLUSH_ERR <<
  1863. OCRDMA_CQE_STATUS_SHIFT));
  1864. }
  1865. }
  1866. }
  1867. static bool ocrdma_update_err_cqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  1868. struct ocrdma_qp *qp, int status)
  1869. {
  1870. bool expand = false;
  1871. ibwc->byte_len = 0;
  1872. ibwc->qp = &qp->ibqp;
  1873. ibwc->status = ocrdma_to_ibwc_err(status);
  1874. ocrdma_flush_qp(qp);
  1875. ocrdma_qp_state_change(qp, IB_QPS_ERR, NULL);
  1876. /* if wqe/rqe pending for which cqe needs to be returned,
  1877. * trigger inflating it.
  1878. */
  1879. if (!is_hw_rq_empty(qp) || !is_hw_sq_empty(qp)) {
  1880. expand = true;
  1881. ocrdma_set_cqe_status_flushed(qp, cqe);
  1882. }
  1883. return expand;
  1884. }
  1885. static int ocrdma_update_err_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  1886. struct ocrdma_qp *qp, int status)
  1887. {
  1888. ibwc->opcode = IB_WC_RECV;
  1889. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  1890. ocrdma_hwq_inc_tail(&qp->rq);
  1891. return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
  1892. }
  1893. static int ocrdma_update_err_scqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe,
  1894. struct ocrdma_qp *qp, int status)
  1895. {
  1896. ocrdma_update_wc(qp, ibwc, qp->sq.tail);
  1897. ocrdma_hwq_inc_tail(&qp->sq);
  1898. return ocrdma_update_err_cqe(ibwc, cqe, qp, status);
  1899. }
  1900. static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
  1901. struct ocrdma_cqe *cqe, struct ib_wc *ibwc,
  1902. bool *polled, bool *stop)
  1903. {
  1904. bool expand;
  1905. int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  1906. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  1907. /* when hw sq is empty, but rq is not empty, so we continue
  1908. * to keep the cqe in order to get the cq event again.
  1909. */
  1910. if (is_hw_sq_empty(qp) && !is_hw_rq_empty(qp)) {
  1911. /* when cq for rq and sq is same, it is safe to return
  1912. * flush cqe for RQEs.
  1913. */
  1914. if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
  1915. *polled = true;
  1916. status = OCRDMA_CQE_WR_FLUSH_ERR;
  1917. expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
  1918. } else {
  1919. /* stop processing further cqe as this cqe is used for
  1920. * triggering cq event on buddy cq of RQ.
  1921. * When QP is destroyed, this cqe will be removed
  1922. * from the cq's hardware q.
  1923. */
  1924. *polled = false;
  1925. *stop = true;
  1926. expand = false;
  1927. }
  1928. } else {
  1929. *polled = true;
  1930. expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
  1931. }
  1932. return expand;
  1933. }
  1934. static bool ocrdma_poll_success_scqe(struct ocrdma_qp *qp,
  1935. struct ocrdma_cqe *cqe,
  1936. struct ib_wc *ibwc, bool *polled)
  1937. {
  1938. bool expand = false;
  1939. int tail = qp->sq.tail;
  1940. u32 wqe_idx;
  1941. if (!qp->wqe_wr_id_tbl[tail].signaled) {
  1942. *polled = false; /* WC cannot be consumed yet */
  1943. } else {
  1944. ibwc->status = IB_WC_SUCCESS;
  1945. ibwc->wc_flags = 0;
  1946. ibwc->qp = &qp->ibqp;
  1947. ocrdma_update_wc(qp, ibwc, tail);
  1948. *polled = true;
  1949. }
  1950. wqe_idx = le32_to_cpu(cqe->wq.wqeidx) & OCRDMA_CQE_WQEIDX_MASK;
  1951. if (tail != wqe_idx)
  1952. expand = true; /* Coalesced CQE can't be consumed yet */
  1953. ocrdma_hwq_inc_tail(&qp->sq);
  1954. return expand;
  1955. }
  1956. static bool ocrdma_poll_scqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  1957. struct ib_wc *ibwc, bool *polled, bool *stop)
  1958. {
  1959. int status;
  1960. bool expand;
  1961. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  1962. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  1963. if (status == OCRDMA_CQE_SUCCESS)
  1964. expand = ocrdma_poll_success_scqe(qp, cqe, ibwc, polled);
  1965. else
  1966. expand = ocrdma_poll_err_scqe(qp, cqe, ibwc, polled, stop);
  1967. return expand;
  1968. }
  1969. static int ocrdma_update_ud_rcqe(struct ib_wc *ibwc, struct ocrdma_cqe *cqe)
  1970. {
  1971. int status;
  1972. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  1973. OCRDMA_CQE_UD_STATUS_MASK) >> OCRDMA_CQE_UD_STATUS_SHIFT;
  1974. ibwc->src_qp = le32_to_cpu(cqe->flags_status_srcqpn) &
  1975. OCRDMA_CQE_SRCQP_MASK;
  1976. ibwc->pkey_index = le32_to_cpu(cqe->ud.rxlen_pkey) &
  1977. OCRDMA_CQE_PKEY_MASK;
  1978. ibwc->wc_flags = IB_WC_GRH;
  1979. ibwc->byte_len = (le32_to_cpu(cqe->ud.rxlen_pkey) >>
  1980. OCRDMA_CQE_UD_XFER_LEN_SHIFT);
  1981. return status;
  1982. }
  1983. static void ocrdma_update_free_srq_cqe(struct ib_wc *ibwc,
  1984. struct ocrdma_cqe *cqe,
  1985. struct ocrdma_qp *qp)
  1986. {
  1987. unsigned long flags;
  1988. struct ocrdma_srq *srq;
  1989. u32 wqe_idx;
  1990. srq = get_ocrdma_srq(qp->ibqp.srq);
  1991. wqe_idx = le32_to_cpu(cqe->rq.buftag_qpn) >> OCRDMA_CQE_BUFTAG_SHIFT;
  1992. ibwc->wr_id = srq->rqe_wr_id_tbl[wqe_idx];
  1993. spin_lock_irqsave(&srq->q_lock, flags);
  1994. ocrdma_srq_toggle_bit(srq, wqe_idx);
  1995. spin_unlock_irqrestore(&srq->q_lock, flags);
  1996. ocrdma_hwq_inc_tail(&srq->rq);
  1997. }
  1998. static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  1999. struct ib_wc *ibwc, bool *polled, bool *stop,
  2000. int status)
  2001. {
  2002. bool expand;
  2003. /* when hw_rq is empty, but wq is not empty, so continue
  2004. * to keep the cqe to get the cq event again.
  2005. */
  2006. if (is_hw_rq_empty(qp) && !is_hw_sq_empty(qp)) {
  2007. if (!qp->srq && (qp->sq_cq == qp->rq_cq)) {
  2008. *polled = true;
  2009. status = OCRDMA_CQE_WR_FLUSH_ERR;
  2010. expand = ocrdma_update_err_scqe(ibwc, cqe, qp, status);
  2011. } else {
  2012. *polled = false;
  2013. *stop = true;
  2014. expand = false;
  2015. }
  2016. } else {
  2017. *polled = true;
  2018. expand = ocrdma_update_err_rcqe(ibwc, cqe, qp, status);
  2019. }
  2020. return expand;
  2021. }
  2022. static void ocrdma_poll_success_rcqe(struct ocrdma_qp *qp,
  2023. struct ocrdma_cqe *cqe, struct ib_wc *ibwc)
  2024. {
  2025. ibwc->opcode = IB_WC_RECV;
  2026. ibwc->qp = &qp->ibqp;
  2027. ibwc->status = IB_WC_SUCCESS;
  2028. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI)
  2029. ocrdma_update_ud_rcqe(ibwc, cqe);
  2030. else
  2031. ibwc->byte_len = le32_to_cpu(cqe->rq.rxlen);
  2032. if (is_cqe_imm(cqe)) {
  2033. ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
  2034. ibwc->wc_flags |= IB_WC_WITH_IMM;
  2035. } else if (is_cqe_wr_imm(cqe)) {
  2036. ibwc->opcode = IB_WC_RECV_RDMA_WITH_IMM;
  2037. ibwc->ex.imm_data = htonl(le32_to_cpu(cqe->rq.lkey_immdt));
  2038. ibwc->wc_flags |= IB_WC_WITH_IMM;
  2039. } else if (is_cqe_invalidated(cqe)) {
  2040. ibwc->ex.invalidate_rkey = le32_to_cpu(cqe->rq.lkey_immdt);
  2041. ibwc->wc_flags |= IB_WC_WITH_INVALIDATE;
  2042. }
  2043. if (qp->ibqp.srq) {
  2044. ocrdma_update_free_srq_cqe(ibwc, cqe, qp);
  2045. } else {
  2046. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  2047. ocrdma_hwq_inc_tail(&qp->rq);
  2048. }
  2049. }
  2050. static bool ocrdma_poll_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
  2051. struct ib_wc *ibwc, bool *polled, bool *stop)
  2052. {
  2053. int status;
  2054. bool expand = false;
  2055. ibwc->wc_flags = 0;
  2056. if (qp->qp_type == IB_QPT_UD || qp->qp_type == IB_QPT_GSI) {
  2057. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2058. OCRDMA_CQE_UD_STATUS_MASK) >>
  2059. OCRDMA_CQE_UD_STATUS_SHIFT;
  2060. } else {
  2061. status = (le32_to_cpu(cqe->flags_status_srcqpn) &
  2062. OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
  2063. }
  2064. if (status == OCRDMA_CQE_SUCCESS) {
  2065. *polled = true;
  2066. ocrdma_poll_success_rcqe(qp, cqe, ibwc);
  2067. } else {
  2068. expand = ocrdma_poll_err_rcqe(qp, cqe, ibwc, polled, stop,
  2069. status);
  2070. }
  2071. return expand;
  2072. }
  2073. static void ocrdma_change_cq_phase(struct ocrdma_cq *cq, struct ocrdma_cqe *cqe,
  2074. u16 cur_getp)
  2075. {
  2076. if (cq->phase_change) {
  2077. if (cur_getp == 0)
  2078. cq->phase = (~cq->phase & OCRDMA_CQE_VALID);
  2079. } else {
  2080. /* clear valid bit */
  2081. cqe->flags_status_srcqpn = 0;
  2082. }
  2083. }
  2084. static int ocrdma_poll_hwcq(struct ocrdma_cq *cq, int num_entries,
  2085. struct ib_wc *ibwc)
  2086. {
  2087. u16 qpn = 0;
  2088. int i = 0;
  2089. bool expand = false;
  2090. int polled_hw_cqes = 0;
  2091. struct ocrdma_qp *qp = NULL;
  2092. struct ocrdma_dev *dev = get_ocrdma_dev(cq->ibcq.device);
  2093. struct ocrdma_cqe *cqe;
  2094. u16 cur_getp; bool polled = false; bool stop = false;
  2095. cur_getp = cq->getp;
  2096. while (num_entries) {
  2097. cqe = cq->va + cur_getp;
  2098. /* check whether valid cqe or not */
  2099. if (!is_cqe_valid(cq, cqe))
  2100. break;
  2101. qpn = (le32_to_cpu(cqe->cmn.qpn) & OCRDMA_CQE_QPN_MASK);
  2102. /* ignore discarded cqe */
  2103. if (qpn == 0)
  2104. goto skip_cqe;
  2105. qp = dev->qp_tbl[qpn];
  2106. BUG_ON(qp == NULL);
  2107. if (is_cqe_for_sq(cqe)) {
  2108. expand = ocrdma_poll_scqe(qp, cqe, ibwc, &polled,
  2109. &stop);
  2110. } else {
  2111. expand = ocrdma_poll_rcqe(qp, cqe, ibwc, &polled,
  2112. &stop);
  2113. }
  2114. if (expand)
  2115. goto expand_cqe;
  2116. if (stop)
  2117. goto stop_cqe;
  2118. /* clear qpn to avoid duplicate processing by discard_cqe() */
  2119. cqe->cmn.qpn = 0;
  2120. skip_cqe:
  2121. polled_hw_cqes += 1;
  2122. cur_getp = (cur_getp + 1) % cq->max_hw_cqe;
  2123. ocrdma_change_cq_phase(cq, cqe, cur_getp);
  2124. expand_cqe:
  2125. if (polled) {
  2126. num_entries -= 1;
  2127. i += 1;
  2128. ibwc = ibwc + 1;
  2129. polled = false;
  2130. }
  2131. }
  2132. stop_cqe:
  2133. cq->getp = cur_getp;
  2134. if (polled_hw_cqes || expand || stop) {
  2135. ocrdma_ring_cq_db(dev, cq->id, cq->armed, cq->solicited,
  2136. polled_hw_cqes);
  2137. }
  2138. return i;
  2139. }
  2140. /* insert error cqe if the QP's SQ or RQ's CQ matches the CQ under poll. */
  2141. static int ocrdma_add_err_cqe(struct ocrdma_cq *cq, int num_entries,
  2142. struct ocrdma_qp *qp, struct ib_wc *ibwc)
  2143. {
  2144. int err_cqes = 0;
  2145. while (num_entries) {
  2146. if (is_hw_sq_empty(qp) && is_hw_rq_empty(qp))
  2147. break;
  2148. if (!is_hw_sq_empty(qp) && qp->sq_cq == cq) {
  2149. ocrdma_update_wc(qp, ibwc, qp->sq.tail);
  2150. ocrdma_hwq_inc_tail(&qp->sq);
  2151. } else if (!is_hw_rq_empty(qp) && qp->rq_cq == cq) {
  2152. ibwc->wr_id = qp->rqe_wr_id_tbl[qp->rq.tail];
  2153. ocrdma_hwq_inc_tail(&qp->rq);
  2154. } else {
  2155. return err_cqes;
  2156. }
  2157. ibwc->byte_len = 0;
  2158. ibwc->status = IB_WC_WR_FLUSH_ERR;
  2159. ibwc = ibwc + 1;
  2160. err_cqes += 1;
  2161. num_entries -= 1;
  2162. }
  2163. return err_cqes;
  2164. }
  2165. int ocrdma_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc)
  2166. {
  2167. int cqes_to_poll = num_entries;
  2168. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  2169. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  2170. int num_os_cqe = 0, err_cqes = 0;
  2171. struct ocrdma_qp *qp;
  2172. unsigned long flags;
  2173. /* poll cqes from adapter CQ */
  2174. spin_lock_irqsave(&cq->cq_lock, flags);
  2175. num_os_cqe = ocrdma_poll_hwcq(cq, cqes_to_poll, wc);
  2176. spin_unlock_irqrestore(&cq->cq_lock, flags);
  2177. cqes_to_poll -= num_os_cqe;
  2178. if (cqes_to_poll) {
  2179. wc = wc + num_os_cqe;
  2180. /* adapter returns single error cqe when qp moves to
  2181. * error state. So insert error cqes with wc_status as
  2182. * FLUSHED for pending WQEs and RQEs of QP's SQ and RQ
  2183. * respectively which uses this CQ.
  2184. */
  2185. spin_lock_irqsave(&dev->flush_q_lock, flags);
  2186. list_for_each_entry(qp, &cq->sq_head, sq_entry) {
  2187. if (cqes_to_poll == 0)
  2188. break;
  2189. err_cqes = ocrdma_add_err_cqe(cq, cqes_to_poll, qp, wc);
  2190. cqes_to_poll -= err_cqes;
  2191. num_os_cqe += err_cqes;
  2192. wc = wc + err_cqes;
  2193. }
  2194. spin_unlock_irqrestore(&dev->flush_q_lock, flags);
  2195. }
  2196. return num_os_cqe;
  2197. }
  2198. int ocrdma_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags cq_flags)
  2199. {
  2200. struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
  2201. struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
  2202. u16 cq_id;
  2203. u16 cur_getp;
  2204. struct ocrdma_cqe *cqe;
  2205. unsigned long flags;
  2206. cq_id = cq->id;
  2207. spin_lock_irqsave(&cq->cq_lock, flags);
  2208. if (cq_flags & IB_CQ_NEXT_COMP || cq_flags & IB_CQ_SOLICITED)
  2209. cq->armed = true;
  2210. if (cq_flags & IB_CQ_SOLICITED)
  2211. cq->solicited = true;
  2212. cur_getp = cq->getp;
  2213. cqe = cq->va + cur_getp;
  2214. /* check whether any valid cqe exist or not, if not then safe to
  2215. * arm. If cqe is not yet consumed, then let it get consumed and then
  2216. * we arm it to avoid false interrupts.
  2217. */
  2218. if (!is_cqe_valid(cq, cqe) || cq->arm_needed) {
  2219. cq->arm_needed = false;
  2220. ocrdma_ring_cq_db(dev, cq_id, cq->armed, cq->solicited, 0);
  2221. }
  2222. spin_unlock_irqrestore(&cq->cq_lock, flags);
  2223. return 0;
  2224. }