exynos_drm.h 3.4 KB

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  1. /* exynos_drm.h
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * Authors:
  5. * Inki Dae <inki.dae@samsung.com>
  6. * Joonyoung Shim <jy0922.shim@samsung.com>
  7. * Seung-Woo Kim <sw0312.kim@samsung.com>
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the next
  17. * paragraph) shall be included in all copies or substantial portions of the
  18. * Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  23. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  24. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  25. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  26. * OTHER DEALINGS IN THE SOFTWARE.
  27. */
  28. #ifndef _EXYNOS_DRM_H_
  29. #define _EXYNOS_DRM_H_
  30. #include <uapi/drm/exynos_drm.h>
  31. /**
  32. * A structure for lcd panel information.
  33. *
  34. * @timing: default video mode for initializing
  35. * @width_mm: physical size of lcd width.
  36. * @height_mm: physical size of lcd height.
  37. */
  38. struct exynos_drm_panel_info {
  39. struct fb_videomode timing;
  40. u32 width_mm;
  41. u32 height_mm;
  42. };
  43. /**
  44. * Platform Specific Structure for DRM based FIMD.
  45. *
  46. * @panel: default panel info for initializing
  47. * @default_win: default window layer number to be used for UI.
  48. * @bpp: default bit per pixel.
  49. */
  50. struct exynos_drm_fimd_pdata {
  51. struct exynos_drm_panel_info panel;
  52. u32 vidcon0;
  53. u32 vidcon1;
  54. unsigned int default_win;
  55. unsigned int bpp;
  56. };
  57. /**
  58. * Platform Specific Structure for DRM based HDMI.
  59. *
  60. * @hdmi_dev: device point to specific hdmi driver.
  61. * @mixer_dev: device point to specific mixer driver.
  62. *
  63. * this structure is used for common hdmi driver and each device object
  64. * would be used to access specific device driver(hdmi or mixer driver)
  65. */
  66. struct exynos_drm_common_hdmi_pd {
  67. struct device *hdmi_dev;
  68. struct device *mixer_dev;
  69. };
  70. /**
  71. * Platform Specific Structure for DRM based HDMI core.
  72. *
  73. * @is_v13: set if hdmi version 13 is.
  74. * @cfg_hpd: function pointer to configure hdmi hotplug detection pin
  75. * @get_hpd: function pointer to get value of hdmi hotplug detection pin
  76. */
  77. struct exynos_drm_hdmi_pdata {
  78. bool is_v13;
  79. void (*cfg_hpd)(bool external);
  80. int (*get_hpd)(void);
  81. };
  82. /**
  83. * Platform Specific Structure for DRM based IPP.
  84. *
  85. * @inv_pclk: if set 1. invert pixel clock
  86. * @inv_vsync: if set 1. invert vsync signal for wb
  87. * @inv_href: if set 1. invert href signal
  88. * @inv_hsync: if set 1. invert hsync signal for wb
  89. */
  90. struct exynos_drm_ipp_pol {
  91. unsigned int inv_pclk;
  92. unsigned int inv_vsync;
  93. unsigned int inv_href;
  94. unsigned int inv_hsync;
  95. };
  96. /**
  97. * Platform Specific Structure for DRM based FIMC.
  98. *
  99. * @pol: current hardware block polarity settings.
  100. * @clk_rate: current hardware clock rate.
  101. */
  102. struct exynos_drm_fimc_pdata {
  103. struct exynos_drm_ipp_pol pol;
  104. int clk_rate;
  105. };
  106. #endif /* _EXYNOS_DRM_H_ */