acpi.c 15 KB

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  1. #include <linux/pci.h>
  2. #include <linux/acpi.h>
  3. #include <linux/init.h>
  4. #include <linux/irq.h>
  5. #include <linux/dmi.h>
  6. #include <linux/slab.h>
  7. #include <asm/numa.h>
  8. #include <asm/pci_x86.h>
  9. struct pci_root_info {
  10. struct acpi_device *bridge;
  11. char name[16];
  12. unsigned int res_num;
  13. struct resource *res;
  14. resource_size_t *res_offset;
  15. struct pci_sysdata sd;
  16. #ifdef CONFIG_PCI_MMCONFIG
  17. bool mcfg_added;
  18. u16 segment;
  19. u8 start_bus;
  20. u8 end_bus;
  21. #endif
  22. };
  23. static bool pci_use_crs = true;
  24. static bool pci_ignore_seg = false;
  25. static int __init set_use_crs(const struct dmi_system_id *id)
  26. {
  27. pci_use_crs = true;
  28. return 0;
  29. }
  30. static int __init set_nouse_crs(const struct dmi_system_id *id)
  31. {
  32. pci_use_crs = false;
  33. return 0;
  34. }
  35. static int __init set_ignore_seg(const struct dmi_system_id *id)
  36. {
  37. printk(KERN_INFO "PCI: %s detected: ignoring ACPI _SEG\n", id->ident);
  38. pci_ignore_seg = true;
  39. return 0;
  40. }
  41. static const struct dmi_system_id pci_crs_quirks[] __initconst = {
  42. /* http://bugzilla.kernel.org/show_bug.cgi?id=14183 */
  43. {
  44. .callback = set_use_crs,
  45. .ident = "IBM System x3800",
  46. .matches = {
  47. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  48. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  49. },
  50. },
  51. /* https://bugzilla.kernel.org/show_bug.cgi?id=16007 */
  52. /* 2006 AMD HT/VIA system with two host bridges */
  53. {
  54. .callback = set_use_crs,
  55. .ident = "ASRock ALiveSATA2-GLAN",
  56. .matches = {
  57. DMI_MATCH(DMI_PRODUCT_NAME, "ALiveSATA2-GLAN"),
  58. },
  59. },
  60. /* https://bugzilla.kernel.org/show_bug.cgi?id=30552 */
  61. /* 2006 AMD HT/VIA system with two host bridges */
  62. {
  63. .callback = set_use_crs,
  64. .ident = "ASUS M2V-MX SE",
  65. .matches = {
  66. DMI_MATCH(DMI_BOARD_VENDOR, "ASUSTeK Computer INC."),
  67. DMI_MATCH(DMI_BOARD_NAME, "M2V-MX SE"),
  68. DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
  69. },
  70. },
  71. /* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
  72. {
  73. .callback = set_use_crs,
  74. .ident = "MSI MS-7253",
  75. .matches = {
  76. DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
  77. DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
  78. DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
  79. },
  80. },
  81. /* Now for the blacklist.. */
  82. /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
  83. {
  84. .callback = set_nouse_crs,
  85. .ident = "Dell Studio 1557",
  86. .matches = {
  87. DMI_MATCH(DMI_BOARD_VENDOR, "Dell Inc."),
  88. DMI_MATCH(DMI_PRODUCT_NAME, "Studio 1557"),
  89. DMI_MATCH(DMI_BIOS_VERSION, "A09"),
  90. },
  91. },
  92. /* https://bugzilla.redhat.com/show_bug.cgi?id=769657 */
  93. {
  94. .callback = set_nouse_crs,
  95. .ident = "Thinkpad SL510",
  96. .matches = {
  97. DMI_MATCH(DMI_BOARD_VENDOR, "LENOVO"),
  98. DMI_MATCH(DMI_BOARD_NAME, "2847DFG"),
  99. DMI_MATCH(DMI_BIOS_VERSION, "6JET85WW (1.43 )"),
  100. },
  101. },
  102. /* https://bugzilla.kernel.org/show_bug.cgi?id=15362 */
  103. {
  104. .callback = set_ignore_seg,
  105. .ident = "HP xw9300",
  106. .matches = {
  107. DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  108. DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"),
  109. },
  110. },
  111. {}
  112. };
  113. void __init pci_acpi_crs_quirks(void)
  114. {
  115. int year;
  116. if (dmi_get_date(DMI_BIOS_DATE, &year, NULL, NULL) && year < 2008)
  117. pci_use_crs = false;
  118. dmi_check_system(pci_crs_quirks);
  119. /*
  120. * If the user specifies "pci=use_crs" or "pci=nocrs" explicitly, that
  121. * takes precedence over anything we figured out above.
  122. */
  123. if (pci_probe & PCI_ROOT_NO_CRS)
  124. pci_use_crs = false;
  125. else if (pci_probe & PCI_USE__CRS)
  126. pci_use_crs = true;
  127. printk(KERN_INFO "PCI: %s host bridge windows from ACPI; "
  128. "if necessary, use \"pci=%s\" and report a bug\n",
  129. pci_use_crs ? "Using" : "Ignoring",
  130. pci_use_crs ? "nocrs" : "use_crs");
  131. }
  132. #ifdef CONFIG_PCI_MMCONFIG
  133. static int __devinit check_segment(u16 seg, struct device *dev, char *estr)
  134. {
  135. if (seg) {
  136. dev_err(dev,
  137. "%s can't access PCI configuration "
  138. "space under this host bridge.\n",
  139. estr);
  140. return -EIO;
  141. }
  142. /*
  143. * Failure in adding MMCFG information is not fatal,
  144. * just can't access extended configuration space of
  145. * devices under this host bridge.
  146. */
  147. dev_warn(dev,
  148. "%s can't access extended PCI configuration "
  149. "space under this bridge.\n",
  150. estr);
  151. return 0;
  152. }
  153. static int __devinit setup_mcfg_map(struct pci_root_info *info,
  154. u16 seg, u8 start, u8 end,
  155. phys_addr_t addr)
  156. {
  157. int result;
  158. struct device *dev = &info->bridge->dev;
  159. info->start_bus = start;
  160. info->end_bus = end;
  161. info->mcfg_added = false;
  162. /* return success if MMCFG is not in use */
  163. if (raw_pci_ext_ops && raw_pci_ext_ops != &pci_mmcfg)
  164. return 0;
  165. if (!(pci_probe & PCI_PROBE_MMCONF))
  166. return check_segment(seg, dev, "MMCONFIG is disabled,");
  167. result = pci_mmconfig_insert(dev, seg, start, end, addr);
  168. if (result == 0) {
  169. /* enable MMCFG if it hasn't been enabled yet */
  170. if (raw_pci_ext_ops == NULL)
  171. raw_pci_ext_ops = &pci_mmcfg;
  172. info->mcfg_added = true;
  173. } else if (result != -EEXIST)
  174. return check_segment(seg, dev,
  175. "fail to add MMCONFIG information,");
  176. return 0;
  177. }
  178. static void teardown_mcfg_map(struct pci_root_info *info)
  179. {
  180. if (info->mcfg_added) {
  181. pci_mmconfig_delete(info->segment, info->start_bus,
  182. info->end_bus);
  183. info->mcfg_added = false;
  184. }
  185. }
  186. #else
  187. static int __devinit setup_mcfg_map(struct pci_root_info *info,
  188. u16 seg, u8 start, u8 end,
  189. phys_addr_t addr)
  190. {
  191. return 0;
  192. }
  193. static void teardown_mcfg_map(struct pci_root_info *info)
  194. {
  195. }
  196. #endif
  197. static acpi_status
  198. resource_to_addr(struct acpi_resource *resource,
  199. struct acpi_resource_address64 *addr)
  200. {
  201. acpi_status status;
  202. struct acpi_resource_memory24 *memory24;
  203. struct acpi_resource_memory32 *memory32;
  204. struct acpi_resource_fixed_memory32 *fixed_memory32;
  205. memset(addr, 0, sizeof(*addr));
  206. switch (resource->type) {
  207. case ACPI_RESOURCE_TYPE_MEMORY24:
  208. memory24 = &resource->data.memory24;
  209. addr->resource_type = ACPI_MEMORY_RANGE;
  210. addr->minimum = memory24->minimum;
  211. addr->address_length = memory24->address_length;
  212. addr->maximum = addr->minimum + addr->address_length - 1;
  213. return AE_OK;
  214. case ACPI_RESOURCE_TYPE_MEMORY32:
  215. memory32 = &resource->data.memory32;
  216. addr->resource_type = ACPI_MEMORY_RANGE;
  217. addr->minimum = memory32->minimum;
  218. addr->address_length = memory32->address_length;
  219. addr->maximum = addr->minimum + addr->address_length - 1;
  220. return AE_OK;
  221. case ACPI_RESOURCE_TYPE_FIXED_MEMORY32:
  222. fixed_memory32 = &resource->data.fixed_memory32;
  223. addr->resource_type = ACPI_MEMORY_RANGE;
  224. addr->minimum = fixed_memory32->address;
  225. addr->address_length = fixed_memory32->address_length;
  226. addr->maximum = addr->minimum + addr->address_length - 1;
  227. return AE_OK;
  228. case ACPI_RESOURCE_TYPE_ADDRESS16:
  229. case ACPI_RESOURCE_TYPE_ADDRESS32:
  230. case ACPI_RESOURCE_TYPE_ADDRESS64:
  231. status = acpi_resource_to_address64(resource, addr);
  232. if (ACPI_SUCCESS(status) &&
  233. (addr->resource_type == ACPI_MEMORY_RANGE ||
  234. addr->resource_type == ACPI_IO_RANGE) &&
  235. addr->address_length > 0) {
  236. return AE_OK;
  237. }
  238. break;
  239. }
  240. return AE_ERROR;
  241. }
  242. static acpi_status
  243. count_resource(struct acpi_resource *acpi_res, void *data)
  244. {
  245. struct pci_root_info *info = data;
  246. struct acpi_resource_address64 addr;
  247. acpi_status status;
  248. status = resource_to_addr(acpi_res, &addr);
  249. if (ACPI_SUCCESS(status))
  250. info->res_num++;
  251. return AE_OK;
  252. }
  253. static acpi_status
  254. setup_resource(struct acpi_resource *acpi_res, void *data)
  255. {
  256. struct pci_root_info *info = data;
  257. struct resource *res;
  258. struct acpi_resource_address64 addr;
  259. acpi_status status;
  260. unsigned long flags;
  261. u64 start, orig_end, end;
  262. status = resource_to_addr(acpi_res, &addr);
  263. if (!ACPI_SUCCESS(status))
  264. return AE_OK;
  265. if (addr.resource_type == ACPI_MEMORY_RANGE) {
  266. flags = IORESOURCE_MEM;
  267. if (addr.info.mem.caching == ACPI_PREFETCHABLE_MEMORY)
  268. flags |= IORESOURCE_PREFETCH;
  269. } else if (addr.resource_type == ACPI_IO_RANGE) {
  270. flags = IORESOURCE_IO;
  271. } else
  272. return AE_OK;
  273. start = addr.minimum + addr.translation_offset;
  274. orig_end = end = addr.maximum + addr.translation_offset;
  275. /* Exclude non-addressable range or non-addressable portion of range */
  276. end = min(end, (u64)iomem_resource.end);
  277. if (end <= start) {
  278. dev_info(&info->bridge->dev,
  279. "host bridge window [%#llx-%#llx] "
  280. "(ignored, not CPU addressable)\n", start, orig_end);
  281. return AE_OK;
  282. } else if (orig_end != end) {
  283. dev_info(&info->bridge->dev,
  284. "host bridge window [%#llx-%#llx] "
  285. "([%#llx-%#llx] ignored, not CPU addressable)\n",
  286. start, orig_end, end + 1, orig_end);
  287. }
  288. res = &info->res[info->res_num];
  289. res->name = info->name;
  290. res->flags = flags;
  291. res->start = start;
  292. res->end = end;
  293. info->res_offset[info->res_num] = addr.translation_offset;
  294. if (!pci_use_crs) {
  295. dev_printk(KERN_DEBUG, &info->bridge->dev,
  296. "host bridge window %pR (ignored)\n", res);
  297. return AE_OK;
  298. }
  299. info->res_num++;
  300. return AE_OK;
  301. }
  302. static void coalesce_windows(struct pci_root_info *info, unsigned long type)
  303. {
  304. int i, j;
  305. struct resource *res1, *res2;
  306. for (i = 0; i < info->res_num; i++) {
  307. res1 = &info->res[i];
  308. if (!(res1->flags & type))
  309. continue;
  310. for (j = i + 1; j < info->res_num; j++) {
  311. res2 = &info->res[j];
  312. if (!(res2->flags & type))
  313. continue;
  314. /*
  315. * I don't like throwing away windows because then
  316. * our resources no longer match the ACPI _CRS, but
  317. * the kernel resource tree doesn't allow overlaps.
  318. */
  319. if (resource_overlaps(res1, res2)) {
  320. res1->start = min(res1->start, res2->start);
  321. res1->end = max(res1->end, res2->end);
  322. dev_info(&info->bridge->dev,
  323. "host bridge window expanded to %pR; %pR ignored\n",
  324. res1, res2);
  325. res2->flags = 0;
  326. }
  327. }
  328. }
  329. }
  330. static void add_resources(struct pci_root_info *info,
  331. struct list_head *resources)
  332. {
  333. int i;
  334. struct resource *res, *root, *conflict;
  335. coalesce_windows(info, IORESOURCE_MEM);
  336. coalesce_windows(info, IORESOURCE_IO);
  337. for (i = 0; i < info->res_num; i++) {
  338. res = &info->res[i];
  339. if (res->flags & IORESOURCE_MEM)
  340. root = &iomem_resource;
  341. else if (res->flags & IORESOURCE_IO)
  342. root = &ioport_resource;
  343. else
  344. continue;
  345. conflict = insert_resource_conflict(root, res);
  346. if (conflict)
  347. dev_info(&info->bridge->dev,
  348. "ignoring host bridge window %pR (conflicts with %s %pR)\n",
  349. res, conflict->name, conflict);
  350. else
  351. pci_add_resource_offset(resources, res,
  352. info->res_offset[i]);
  353. }
  354. }
  355. static void free_pci_root_info_res(struct pci_root_info *info)
  356. {
  357. kfree(info->res);
  358. info->res = NULL;
  359. kfree(info->res_offset);
  360. info->res_offset = NULL;
  361. info->res_num = 0;
  362. }
  363. static void __release_pci_root_info(struct pci_root_info *info)
  364. {
  365. int i;
  366. struct resource *res;
  367. for (i = 0; i < info->res_num; i++) {
  368. res = &info->res[i];
  369. if (!res->parent)
  370. continue;
  371. if (!(res->flags & (IORESOURCE_MEM | IORESOURCE_IO)))
  372. continue;
  373. release_resource(res);
  374. }
  375. free_pci_root_info_res(info);
  376. teardown_mcfg_map(info);
  377. kfree(info);
  378. }
  379. static void release_pci_root_info(struct pci_host_bridge *bridge)
  380. {
  381. struct pci_root_info *info = bridge->release_data;
  382. __release_pci_root_info(info);
  383. }
  384. static void
  385. probe_pci_root_info(struct pci_root_info *info, struct acpi_device *device,
  386. int busnum, int domain)
  387. {
  388. size_t size;
  389. sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
  390. info->bridge = device;
  391. info->res_num = 0;
  392. acpi_walk_resources(device->handle, METHOD_NAME__CRS, count_resource,
  393. info);
  394. if (!info->res_num)
  395. return;
  396. size = sizeof(*info->res) * info->res_num;
  397. info->res = kzalloc(size, GFP_KERNEL);
  398. if (!info->res) {
  399. info->res_num = 0;
  400. return;
  401. }
  402. size = sizeof(*info->res_offset) * info->res_num;
  403. info->res_num = 0;
  404. info->res_offset = kzalloc(size, GFP_KERNEL);
  405. if (!info->res_offset) {
  406. kfree(info->res);
  407. info->res = NULL;
  408. return;
  409. }
  410. acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
  411. info);
  412. }
  413. struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_pci_root *root)
  414. {
  415. struct acpi_device *device = root->device;
  416. struct pci_root_info *info = NULL;
  417. int domain = root->segment;
  418. int busnum = root->secondary.start;
  419. LIST_HEAD(resources);
  420. struct pci_bus *bus = NULL;
  421. struct pci_sysdata *sd;
  422. int node;
  423. #ifdef CONFIG_ACPI_NUMA
  424. int pxm;
  425. #endif
  426. if (pci_ignore_seg)
  427. domain = 0;
  428. if (domain && !pci_domains_supported) {
  429. printk(KERN_WARNING "pci_bus %04x:%02x: "
  430. "ignored (multiple domains not supported)\n",
  431. domain, busnum);
  432. return NULL;
  433. }
  434. node = -1;
  435. #ifdef CONFIG_ACPI_NUMA
  436. pxm = acpi_get_pxm(device->handle);
  437. if (pxm >= 0)
  438. node = pxm_to_node(pxm);
  439. if (node != -1)
  440. set_mp_bus_to_node(busnum, node);
  441. else
  442. #endif
  443. node = get_mp_bus_to_node(busnum);
  444. if (node != -1 && !node_online(node))
  445. node = -1;
  446. info = kzalloc(sizeof(*info), GFP_KERNEL);
  447. if (!info) {
  448. printk(KERN_WARNING "pci_bus %04x:%02x: "
  449. "ignored (out of memory)\n", domain, busnum);
  450. return NULL;
  451. }
  452. sd = &info->sd;
  453. sd->domain = domain;
  454. sd->node = node;
  455. /*
  456. * Maybe the desired pci bus has been already scanned. In such case
  457. * it is unnecessary to scan the pci bus with the given domain,busnum.
  458. */
  459. bus = pci_find_bus(domain, busnum);
  460. if (bus) {
  461. /*
  462. * If the desired bus exits, the content of bus->sysdata will
  463. * be replaced by sd.
  464. */
  465. memcpy(bus->sysdata, sd, sizeof(*sd));
  466. kfree(info);
  467. } else {
  468. probe_pci_root_info(info, device, busnum, domain);
  469. /* insert busn res at first */
  470. pci_add_resource(&resources, &root->secondary);
  471. /*
  472. * _CRS with no apertures is normal, so only fall back to
  473. * defaults or native bridge info if we're ignoring _CRS.
  474. */
  475. if (pci_use_crs)
  476. add_resources(info, &resources);
  477. else {
  478. free_pci_root_info_res(info);
  479. x86_pci_root_bus_resources(busnum, &resources);
  480. }
  481. if (!setup_mcfg_map(info, domain, (u8)root->secondary.start,
  482. (u8)root->secondary.end, root->mcfg_addr))
  483. bus = pci_create_root_bus(NULL, busnum, &pci_root_ops,
  484. sd, &resources);
  485. if (bus) {
  486. pci_scan_child_bus(bus);
  487. pci_set_host_bridge_release(
  488. to_pci_host_bridge(bus->bridge),
  489. release_pci_root_info, info);
  490. } else {
  491. pci_free_resource_list(&resources);
  492. __release_pci_root_info(info);
  493. }
  494. }
  495. /* After the PCI-E bus has been walked and all devices discovered,
  496. * configure any settings of the fabric that might be necessary.
  497. */
  498. if (bus) {
  499. struct pci_bus *child;
  500. list_for_each_entry(child, &bus->children, node) {
  501. struct pci_dev *self = child->self;
  502. if (!self)
  503. continue;
  504. pcie_bus_configure_settings(child, self->pcie_mpss);
  505. }
  506. }
  507. if (bus && node != -1) {
  508. #ifdef CONFIG_ACPI_NUMA
  509. if (pxm >= 0)
  510. dev_printk(KERN_DEBUG, &bus->dev,
  511. "on NUMA node %d (pxm %d)\n", node, pxm);
  512. #else
  513. dev_printk(KERN_DEBUG, &bus->dev, "on NUMA node %d\n", node);
  514. #endif
  515. }
  516. return bus;
  517. }
  518. int __init pci_acpi_init(void)
  519. {
  520. struct pci_dev *dev = NULL;
  521. if (acpi_noirq)
  522. return -ENODEV;
  523. printk(KERN_INFO "PCI: Using ACPI for IRQ routing\n");
  524. acpi_irq_penalty_init();
  525. pcibios_enable_irq = acpi_pci_irq_enable;
  526. pcibios_disable_irq = acpi_pci_irq_disable;
  527. x86_init.pci.init_irq = x86_init_noop;
  528. if (pci_routeirq) {
  529. /*
  530. * PCI IRQ routing is set up by pci_enable_device(), but we
  531. * also do it here in case there are still broken drivers that
  532. * don't use pci_enable_device().
  533. */
  534. printk(KERN_INFO "PCI: Routing PCI interrupts for all devices because \"pci=routeirq\" specified\n");
  535. for_each_pci_dev(dev)
  536. acpi_pci_irq_enable(dev);
  537. }
  538. return 0;
  539. }