ecx-2000.dts 2.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104
  1. /*
  2. * Copyright 2011-2012 Calxeda, Inc.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * You should have received a copy of the GNU General Public License along with
  14. * this program. If not, see <http://www.gnu.org/licenses/>.
  15. */
  16. /dts-v1/;
  17. /* First 4KB has pen for secondary cores. */
  18. /memreserve/ 0x00000000 0x0001000;
  19. / {
  20. model = "Calxeda ECX-2000";
  21. compatible = "calxeda,ecx-2000";
  22. #address-cells = <2>;
  23. #size-cells = <2>;
  24. clock-ranges;
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. cpu@0 {
  29. compatible = "arm,cortex-a15";
  30. reg = <0>;
  31. clocks = <&a9pll>;
  32. clock-names = "cpu";
  33. };
  34. cpu@1 {
  35. compatible = "arm,cortex-a15";
  36. reg = <1>;
  37. clocks = <&a9pll>;
  38. clock-names = "cpu";
  39. };
  40. cpu@2 {
  41. compatible = "arm,cortex-a15";
  42. reg = <2>;
  43. clocks = <&a9pll>;
  44. clock-names = "cpu";
  45. };
  46. cpu@3 {
  47. compatible = "arm,cortex-a15";
  48. reg = <3>;
  49. clocks = <&a9pll>;
  50. clock-names = "cpu";
  51. };
  52. };
  53. memory@0 {
  54. name = "memory";
  55. device_type = "memory";
  56. reg = <0x00000000 0x00000000 0x00000000 0xff800000>;
  57. };
  58. memory@200000000 {
  59. name = "memory";
  60. device_type = "memory";
  61. reg = <0x00000002 0x00000000 0x00000003 0x00000000>;
  62. };
  63. soc {
  64. ranges = <0x00000000 0x00000000 0x00000000 0xffffffff>;
  65. timer {
  66. compatible = "arm,cortex-a15-timer", "arm,armv7-timer"; interrupts = <1 13 0xf08>,
  67. <1 14 0xf08>,
  68. <1 11 0xf08>,
  69. <1 10 0xf08>;
  70. };
  71. intc: interrupt-controller@fff11000 {
  72. compatible = "arm,cortex-a15-gic";
  73. #interrupt-cells = <3>;
  74. #size-cells = <0>;
  75. #address-cells = <1>;
  76. interrupt-controller;
  77. interrupts = <1 9 0xf04>;
  78. reg = <0xfff11000 0x1000>,
  79. <0xfff12000 0x1000>,
  80. <0xfff14000 0x2000>,
  81. <0xfff16000 0x2000>;
  82. };
  83. pmu {
  84. compatible = "arm,cortex-a9-pmu";
  85. interrupts = <0 76 4 0 75 4 0 74 4 0 73 4>;
  86. };
  87. };
  88. };
  89. /include/ "ecx-common.dtsi"