mt9v011.c 11 KB

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  1. /*
  2. * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  3. *
  4. * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
  5. * This code is placed under the terms of the GNU General Public License v2
  6. */
  7. #include <linux/i2c.h>
  8. #include <linux/videodev2.h>
  9. #include <linux/delay.h>
  10. #include <asm/div64.h>
  11. #include <media/v4l2-device.h>
  12. #include "mt9v011.h"
  13. #include <media/v4l2-i2c-drv.h>
  14. #include <media/v4l2-chip-ident.h>
  15. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  16. MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
  17. MODULE_LICENSE("GPL");
  18. static int debug;
  19. module_param(debug, int, 0);
  20. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  21. /* supported controls */
  22. static struct v4l2_queryctrl mt9v011_qctrl[] = {
  23. {
  24. .id = V4L2_CID_GAIN,
  25. .type = V4L2_CTRL_TYPE_INTEGER,
  26. .name = "Gain",
  27. .minimum = 0,
  28. .maximum = (1 << 10) - 1,
  29. .step = 1,
  30. .default_value = 0x0020,
  31. .flags = 0,
  32. }, {
  33. .id = V4L2_CID_RED_BALANCE,
  34. .type = V4L2_CTRL_TYPE_INTEGER,
  35. .name = "Red Balance",
  36. .minimum = -1 << 9,
  37. .maximum = (1 << 9) - 1,
  38. .step = 1,
  39. .default_value = 0,
  40. .flags = 0,
  41. }, {
  42. .id = V4L2_CID_BLUE_BALANCE,
  43. .type = V4L2_CTRL_TYPE_INTEGER,
  44. .name = "Blue Balance",
  45. .minimum = -1 << 9,
  46. .maximum = (1 << 9) - 1,
  47. .step = 1,
  48. .default_value = 0,
  49. .flags = 0,
  50. },
  51. };
  52. struct mt9v011 {
  53. struct v4l2_subdev sd;
  54. unsigned width, height;
  55. unsigned xtal;
  56. u16 global_gain, red_bal, blue_bal;
  57. };
  58. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  59. {
  60. return container_of(sd, struct mt9v011, sd);
  61. }
  62. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  63. {
  64. struct i2c_client *c = v4l2_get_subdevdata(sd);
  65. __be16 buffer;
  66. int rc, val;
  67. rc = i2c_master_send(c, &addr, 1);
  68. if (rc != 1)
  69. v4l2_dbg(0, debug, sd,
  70. "i2c i/o error: rc == %d (should be 1)\n", rc);
  71. msleep(10);
  72. rc = i2c_master_recv(c, (char *)&buffer, 2);
  73. if (rc != 2)
  74. v4l2_dbg(0, debug, sd,
  75. "i2c i/o error: rc == %d (should be 2)\n", rc);
  76. val = be16_to_cpu(buffer);
  77. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  78. return val;
  79. }
  80. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  81. u16 value)
  82. {
  83. struct i2c_client *c = v4l2_get_subdevdata(sd);
  84. unsigned char buffer[3];
  85. int rc;
  86. buffer[0] = addr;
  87. buffer[1] = value >> 8;
  88. buffer[2] = value & 0xff;
  89. v4l2_dbg(2, debug, sd,
  90. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  91. rc = i2c_master_send(c, buffer, 3);
  92. if (rc != 3)
  93. v4l2_dbg(0, debug, sd,
  94. "i2c i/o error: rc == %d (should be 3)\n", rc);
  95. }
  96. struct i2c_reg_value {
  97. unsigned char reg;
  98. u16 value;
  99. };
  100. /*
  101. * Values used at the original driver
  102. * Some values are marked as Reserved at the datasheet
  103. */
  104. static const struct i2c_reg_value mt9v011_init_default[] = {
  105. { R0D_MT9V011_RESET, 0x0001 },
  106. { R0D_MT9V011_RESET, 0x0000 },
  107. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  108. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  109. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  110. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  111. { R20_MT9V011_READ_MODE, 0x1000 },
  112. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  113. };
  114. static void set_balance(struct v4l2_subdev *sd)
  115. {
  116. struct mt9v011 *core = to_mt9v011(sd);
  117. u16 green1_gain, green2_gain, blue_gain, red_gain;
  118. green1_gain = core->global_gain;
  119. green2_gain = core->global_gain;
  120. blue_gain = core->global_gain +
  121. core->global_gain * core->blue_bal / (1 << 9);
  122. red_gain = core->global_gain +
  123. core->global_gain * core->blue_bal / (1 << 9);
  124. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain);
  125. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain);
  126. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  127. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  128. }
  129. static void calc_fps(struct v4l2_subdev *sd)
  130. {
  131. struct mt9v011 *core = to_mt9v011(sd);
  132. unsigned height, width, hblank, vblank, speed;
  133. unsigned row_time, t_time;
  134. u64 frames_per_ms;
  135. unsigned tmp;
  136. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  137. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  138. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  139. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  140. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  141. row_time = (width + 113 + hblank) * (speed + 2);
  142. t_time = row_time * (height + vblank + 1);
  143. frames_per_ms = core->xtal * 1000l;
  144. do_div(frames_per_ms, t_time);
  145. tmp = frames_per_ms;
  146. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  147. tmp / 1000, tmp % 1000, t_time);
  148. }
  149. static void set_res(struct v4l2_subdev *sd)
  150. {
  151. struct mt9v011 *core = to_mt9v011(sd);
  152. unsigned vstart, hstart;
  153. /*
  154. * The mt9v011 doesn't have scaling. So, in order to select the desired
  155. * resolution, we're cropping at the middle of the sensor.
  156. * hblank and vblank should be adjusted, in order to warrant that
  157. * we'll preserve the line timings for 30 fps, no matter what resolution
  158. * is selected.
  159. * NOTE: datasheet says that width (and height) should be filled with
  160. * width-1. However, this doesn't work, since one pixel per line will
  161. * be missing.
  162. */
  163. hstart = 14 + (640 - core->width) / 2;
  164. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  165. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  166. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  167. vstart = 8 + (480 - core->height) / 2;
  168. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  169. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  170. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  171. calc_fps(sd);
  172. };
  173. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  174. {
  175. int i;
  176. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  177. mt9v011_write(sd, mt9v011_init_default[i].reg,
  178. mt9v011_init_default[i].value);
  179. set_balance(sd);
  180. set_res(sd);
  181. return 0;
  182. };
  183. static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  184. {
  185. struct mt9v011 *core = to_mt9v011(sd);
  186. v4l2_dbg(1, debug, sd, "g_ctrl called\n");
  187. switch (ctrl->id) {
  188. case V4L2_CID_GAIN:
  189. ctrl->value = core->global_gain;
  190. return 0;
  191. case V4L2_CID_RED_BALANCE:
  192. ctrl->value = core->red_bal;
  193. return 0;
  194. case V4L2_CID_BLUE_BALANCE:
  195. ctrl->value = core->blue_bal;
  196. return 0;
  197. }
  198. return -EINVAL;
  199. }
  200. static int mt9v011_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
  201. {
  202. int i;
  203. v4l2_dbg(1, debug, sd, "queryctrl called\n");
  204. for (i = 0; i < ARRAY_SIZE(mt9v011_qctrl); i++)
  205. if (qc->id && qc->id == mt9v011_qctrl[i].id) {
  206. memcpy(qc, &(mt9v011_qctrl[i]),
  207. sizeof(*qc));
  208. return 0;
  209. }
  210. return -EINVAL;
  211. }
  212. static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
  213. {
  214. struct mt9v011 *core = to_mt9v011(sd);
  215. u8 i, n;
  216. n = ARRAY_SIZE(mt9v011_qctrl);
  217. for (i = 0; i < n; i++) {
  218. if (ctrl->id != mt9v011_qctrl[i].id)
  219. continue;
  220. if (ctrl->value < mt9v011_qctrl[i].minimum ||
  221. ctrl->value > mt9v011_qctrl[i].maximum)
  222. return -ERANGE;
  223. v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n",
  224. ctrl->id, ctrl->value);
  225. break;
  226. }
  227. switch (ctrl->id) {
  228. case V4L2_CID_GAIN:
  229. core->global_gain = ctrl->value;
  230. break;
  231. case V4L2_CID_RED_BALANCE:
  232. core->red_bal = ctrl->value;
  233. break;
  234. case V4L2_CID_BLUE_BALANCE:
  235. core->blue_bal = ctrl->value;
  236. break;
  237. default:
  238. return -EINVAL;
  239. }
  240. set_balance(sd);
  241. return 0;
  242. }
  243. static int mt9v011_enum_fmt(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmt)
  244. {
  245. if (fmt->index > 0)
  246. return -EINVAL;
  247. fmt->flags = 0;
  248. strcpy(fmt->description, "8 bpp Bayer GRGR..BGBG");
  249. fmt->pixelformat = V4L2_PIX_FMT_SGRBG8;
  250. return 0;
  251. }
  252. static int mt9v011_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
  253. {
  254. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  255. if (pix->pixelformat != V4L2_PIX_FMT_SGRBG8)
  256. return -EINVAL;
  257. v4l_bound_align_image(&pix->width, 48, 639, 1,
  258. &pix->height, 32, 480, 1, 0);
  259. return 0;
  260. }
  261. static int mt9v011_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt)
  262. {
  263. struct v4l2_pix_format *pix = &fmt->fmt.pix;
  264. struct mt9v011 *core = to_mt9v011(sd);
  265. int rc;
  266. rc = mt9v011_try_fmt(sd, fmt);
  267. if (rc < 0)
  268. return -EINVAL;
  269. core->width = pix->width;
  270. core->height = pix->height;
  271. set_res(sd);
  272. return 0;
  273. }
  274. static int mt9v011_s_config(struct v4l2_subdev *sd, int dumb, void *data)
  275. {
  276. struct mt9v011 *core = to_mt9v011(sd);
  277. unsigned *xtal = data;
  278. v4l2_dbg(1, debug, sd, "s_config called\n");
  279. if (xtal) {
  280. core->xtal = *xtal;
  281. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  282. *xtal / 1000000, (*xtal / 1000) % 1000);
  283. }
  284. return 0;
  285. }
  286. #ifdef CONFIG_VIDEO_ADV_DEBUG
  287. static int mt9v011_g_register(struct v4l2_subdev *sd,
  288. struct v4l2_dbg_register *reg)
  289. {
  290. struct i2c_client *client = v4l2_get_subdevdata(sd);
  291. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  292. return -EINVAL;
  293. if (!capable(CAP_SYS_ADMIN))
  294. return -EPERM;
  295. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  296. reg->size = 2;
  297. return 0;
  298. }
  299. static int mt9v011_s_register(struct v4l2_subdev *sd,
  300. struct v4l2_dbg_register *reg)
  301. {
  302. struct i2c_client *client = v4l2_get_subdevdata(sd);
  303. if (!v4l2_chip_match_i2c_client(client, &reg->match))
  304. return -EINVAL;
  305. if (!capable(CAP_SYS_ADMIN))
  306. return -EPERM;
  307. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  308. return 0;
  309. }
  310. #endif
  311. static int mt9v011_g_chip_ident(struct v4l2_subdev *sd,
  312. struct v4l2_dbg_chip_ident *chip)
  313. {
  314. struct i2c_client *client = v4l2_get_subdevdata(sd);
  315. return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011,
  316. MT9V011_VERSION);
  317. }
  318. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  319. .queryctrl = mt9v011_queryctrl,
  320. .g_ctrl = mt9v011_g_ctrl,
  321. .s_ctrl = mt9v011_s_ctrl,
  322. .reset = mt9v011_reset,
  323. .s_config = mt9v011_s_config,
  324. .g_chip_ident = mt9v011_g_chip_ident,
  325. #ifdef CONFIG_VIDEO_ADV_DEBUG
  326. .g_register = mt9v011_g_register,
  327. .s_register = mt9v011_s_register,
  328. #endif
  329. };
  330. static const struct v4l2_subdev_video_ops mt9v011_video_ops = {
  331. .enum_fmt = mt9v011_enum_fmt,
  332. .try_fmt = mt9v011_try_fmt,
  333. .s_fmt = mt9v011_s_fmt,
  334. };
  335. static const struct v4l2_subdev_ops mt9v011_ops = {
  336. .core = &mt9v011_core_ops,
  337. .video = &mt9v011_video_ops,
  338. };
  339. /****************************************************************************
  340. I2C Client & Driver
  341. ****************************************************************************/
  342. static int mt9v011_probe(struct i2c_client *c,
  343. const struct i2c_device_id *id)
  344. {
  345. u16 version;
  346. struct mt9v011 *core;
  347. struct v4l2_subdev *sd;
  348. /* Check if the adapter supports the needed features */
  349. if (!i2c_check_functionality(c->adapter,
  350. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  351. return -EIO;
  352. core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL);
  353. if (!core)
  354. return -ENOMEM;
  355. sd = &core->sd;
  356. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  357. /* Check if the sensor is really a MT9V011 */
  358. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  359. if (version != MT9V011_VERSION) {
  360. v4l2_info(sd, "*** unknown micron chip detected (0x%04x.\n",
  361. version);
  362. kfree(core);
  363. return -EINVAL;
  364. }
  365. core->global_gain = 0x0024;
  366. core->width = 640;
  367. core->height = 480;
  368. core->xtal = 27000000; /* Hz */
  369. v4l_info(c, "chip found @ 0x%02x (%s)\n",
  370. c->addr << 1, c->adapter->name);
  371. return 0;
  372. }
  373. static int mt9v011_remove(struct i2c_client *c)
  374. {
  375. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  376. v4l2_dbg(1, debug, sd,
  377. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  378. c->addr << 1);
  379. v4l2_device_unregister_subdev(sd);
  380. kfree(to_mt9v011(sd));
  381. return 0;
  382. }
  383. /* ----------------------------------------------------------------------- */
  384. static const struct i2c_device_id mt9v011_id[] = {
  385. { "mt9v011", 0 },
  386. { }
  387. };
  388. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  389. static struct v4l2_i2c_driver_data v4l2_i2c_data = {
  390. .name = "mt9v011",
  391. .probe = mt9v011_probe,
  392. .remove = mt9v011_remove,
  393. .id_table = mt9v011_id,
  394. };