atl1c_main.c 75 KB

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  1. /*
  2. * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
  3. *
  4. * Derived from Intel e1000 driver
  5. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 2 of the License, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include "atl1c.h"
  22. #define ATL1C_DRV_VERSION "1.0.1.0-NAPI"
  23. char atl1c_driver_name[] = "atl1c";
  24. char atl1c_driver_version[] = ATL1C_DRV_VERSION;
  25. /*
  26. * atl1c_pci_tbl - PCI Device ID Table
  27. *
  28. * Wildcard entries (PCI_ANY_ID) should come last
  29. * Last entry must be all 0s
  30. *
  31. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  32. * Class, Class Mask, private data (not used) }
  33. */
  34. static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = {
  35. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
  36. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
  37. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)},
  39. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)},
  40. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)},
  41. /* required last entry */
  42. { 0 }
  43. };
  44. MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
  45. MODULE_AUTHOR("Jie Yang");
  46. MODULE_AUTHOR("Qualcomm Atheros Inc., <nic-devel@qualcomm.com>");
  47. MODULE_DESCRIPTION("Qualcom Atheros 100/1000M Ethernet Network Driver");
  48. MODULE_LICENSE("GPL");
  49. MODULE_VERSION(ATL1C_DRV_VERSION);
  50. static int atl1c_stop_mac(struct atl1c_hw *hw);
  51. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
  52. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed);
  53. static void atl1c_start_mac(struct atl1c_adapter *adapter);
  54. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  55. int *work_done, int work_to_do);
  56. static int atl1c_up(struct atl1c_adapter *adapter);
  57. static void atl1c_down(struct atl1c_adapter *adapter);
  58. static int atl1c_reset_mac(struct atl1c_hw *hw);
  59. static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter);
  60. static int atl1c_configure(struct atl1c_adapter *adapter);
  61. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter);
  62. static const u16 atl1c_pay_load_size[] = {
  63. 128, 256, 512, 1024, 2048, 4096,
  64. };
  65. static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  66. NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
  67. static void atl1c_pcie_patch(struct atl1c_hw *hw)
  68. {
  69. u32 mst_data, data;
  70. /* pclk sel could switch to 25M */
  71. AT_READ_REG(hw, REG_MASTER_CTRL, &mst_data);
  72. mst_data &= ~MASTER_CTRL_CLK_SEL_DIS;
  73. AT_WRITE_REG(hw, REG_MASTER_CTRL, mst_data);
  74. /* WoL/PCIE related settings */
  75. if (hw->nic_type == athr_l1c || hw->nic_type == athr_l2c) {
  76. AT_READ_REG(hw, REG_PCIE_PHYMISC, &data);
  77. data |= PCIE_PHYMISC_FORCE_RCV_DET;
  78. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, data);
  79. } else { /* new dev set bit5 of MASTER */
  80. if (!(mst_data & MASTER_CTRL_WAKEN_25M))
  81. AT_WRITE_REG(hw, REG_MASTER_CTRL,
  82. mst_data | MASTER_CTRL_WAKEN_25M);
  83. }
  84. /* aspm/PCIE setting only for l2cb 1.0 */
  85. if (hw->nic_type == athr_l2c_b && hw->revision_id == L2CB_V10) {
  86. AT_READ_REG(hw, REG_PCIE_PHYMISC2, &data);
  87. data = FIELD_SETX(data, PCIE_PHYMISC2_CDR_BW,
  88. L2CB1_PCIE_PHYMISC2_CDR_BW);
  89. data = FIELD_SETX(data, PCIE_PHYMISC2_L0S_TH,
  90. L2CB1_PCIE_PHYMISC2_L0S_TH);
  91. AT_WRITE_REG(hw, REG_PCIE_PHYMISC2, data);
  92. /* extend L1 sync timer */
  93. AT_READ_REG(hw, REG_LINK_CTRL, &data);
  94. data |= LINK_CTRL_EXT_SYNC;
  95. AT_WRITE_REG(hw, REG_LINK_CTRL, data);
  96. }
  97. /* l2cb 1.x & l1d 1.x */
  98. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d) {
  99. AT_READ_REG(hw, REG_PM_CTRL, &data);
  100. data |= PM_CTRL_L0S_BUFSRX_EN;
  101. AT_WRITE_REG(hw, REG_PM_CTRL, data);
  102. /* clear vendor msg */
  103. AT_READ_REG(hw, REG_DMA_DBG, &data);
  104. AT_WRITE_REG(hw, REG_DMA_DBG, data & ~DMA_DBG_VENDOR_MSG);
  105. }
  106. }
  107. /* FIXME: no need any more ? */
  108. /*
  109. * atl1c_init_pcie - init PCIE module
  110. */
  111. static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
  112. {
  113. u32 data;
  114. u32 pci_cmd;
  115. struct pci_dev *pdev = hw->adapter->pdev;
  116. int pos;
  117. AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
  118. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  119. pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
  120. PCI_COMMAND_IO);
  121. AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
  122. /*
  123. * Clear any PowerSaveing Settings
  124. */
  125. pci_enable_wake(pdev, PCI_D3hot, 0);
  126. pci_enable_wake(pdev, PCI_D3cold, 0);
  127. /* wol sts read-clear */
  128. AT_READ_REG(hw, REG_WOL_CTRL, &data);
  129. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  130. /*
  131. * Mask some pcie error bits
  132. */
  133. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  134. pci_read_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, &data);
  135. data &= ~(PCI_ERR_UNC_DLP | PCI_ERR_UNC_FCP);
  136. pci_write_config_dword(pdev, pos + PCI_ERR_UNCOR_SEVER, data);
  137. /* clear error status */
  138. pci_write_config_word(pdev, pci_pcie_cap(pdev) + PCI_EXP_DEVSTA,
  139. PCI_EXP_DEVSTA_NFED |
  140. PCI_EXP_DEVSTA_FED |
  141. PCI_EXP_DEVSTA_CED |
  142. PCI_EXP_DEVSTA_URD);
  143. AT_READ_REG(hw, REG_LTSSM_ID_CTRL, &data);
  144. data &= ~LTSSM_ID_EN_WRO;
  145. AT_WRITE_REG(hw, REG_LTSSM_ID_CTRL, data);
  146. atl1c_pcie_patch(hw);
  147. if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
  148. atl1c_disable_l0s_l1(hw);
  149. msleep(5);
  150. }
  151. /**
  152. * atl1c_irq_enable - Enable default interrupt generation settings
  153. * @adapter: board private structure
  154. */
  155. static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
  156. {
  157. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  158. AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
  159. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  160. AT_WRITE_FLUSH(&adapter->hw);
  161. }
  162. }
  163. /**
  164. * atl1c_irq_disable - Mask off interrupt generation on the NIC
  165. * @adapter: board private structure
  166. */
  167. static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
  168. {
  169. atomic_inc(&adapter->irq_sem);
  170. AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
  171. AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
  172. AT_WRITE_FLUSH(&adapter->hw);
  173. synchronize_irq(adapter->pdev->irq);
  174. }
  175. /**
  176. * atl1c_irq_reset - reset interrupt confiure on the NIC
  177. * @adapter: board private structure
  178. */
  179. static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
  180. {
  181. atomic_set(&adapter->irq_sem, 1);
  182. atl1c_irq_enable(adapter);
  183. }
  184. /*
  185. * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
  186. * of the idle status register until the device is actually idle
  187. */
  188. static u32 atl1c_wait_until_idle(struct atl1c_hw *hw, u32 modu_ctrl)
  189. {
  190. int timeout;
  191. u32 data;
  192. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  193. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  194. if ((data & modu_ctrl) == 0)
  195. return 0;
  196. msleep(1);
  197. }
  198. return data;
  199. }
  200. /**
  201. * atl1c_phy_config - Timer Call-back
  202. * @data: pointer to netdev cast into an unsigned long
  203. */
  204. static void atl1c_phy_config(unsigned long data)
  205. {
  206. struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
  207. struct atl1c_hw *hw = &adapter->hw;
  208. unsigned long flags;
  209. spin_lock_irqsave(&adapter->mdio_lock, flags);
  210. atl1c_restart_autoneg(hw);
  211. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  212. }
  213. void atl1c_reinit_locked(struct atl1c_adapter *adapter)
  214. {
  215. WARN_ON(in_interrupt());
  216. atl1c_down(adapter);
  217. atl1c_up(adapter);
  218. clear_bit(__AT_RESETTING, &adapter->flags);
  219. }
  220. static void atl1c_check_link_status(struct atl1c_adapter *adapter)
  221. {
  222. struct atl1c_hw *hw = &adapter->hw;
  223. struct net_device *netdev = adapter->netdev;
  224. struct pci_dev *pdev = adapter->pdev;
  225. int err;
  226. unsigned long flags;
  227. u16 speed, duplex, phy_data;
  228. spin_lock_irqsave(&adapter->mdio_lock, flags);
  229. /* MII_BMSR must read twise */
  230. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  231. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  232. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  233. if ((phy_data & BMSR_LSTATUS) == 0) {
  234. /* link down */
  235. netif_carrier_off(netdev);
  236. hw->hibernate = true;
  237. if (atl1c_reset_mac(hw) != 0)
  238. if (netif_msg_hw(adapter))
  239. dev_warn(&pdev->dev, "reset mac failed\n");
  240. atl1c_set_aspm(hw, SPEED_0);
  241. atl1c_post_phy_linkchg(hw, SPEED_0);
  242. atl1c_reset_dma_ring(adapter);
  243. atl1c_configure(adapter);
  244. } else {
  245. /* Link Up */
  246. hw->hibernate = false;
  247. spin_lock_irqsave(&adapter->mdio_lock, flags);
  248. err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
  249. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  250. if (unlikely(err))
  251. return;
  252. /* link result is our setting */
  253. if (adapter->link_speed != speed ||
  254. adapter->link_duplex != duplex) {
  255. adapter->link_speed = speed;
  256. adapter->link_duplex = duplex;
  257. atl1c_set_aspm(hw, speed);
  258. atl1c_post_phy_linkchg(hw, speed);
  259. atl1c_start_mac(adapter);
  260. if (netif_msg_link(adapter))
  261. dev_info(&pdev->dev,
  262. "%s: %s NIC Link is Up<%d Mbps %s>\n",
  263. atl1c_driver_name, netdev->name,
  264. adapter->link_speed,
  265. adapter->link_duplex == FULL_DUPLEX ?
  266. "Full Duplex" : "Half Duplex");
  267. }
  268. if (!netif_carrier_ok(netdev))
  269. netif_carrier_on(netdev);
  270. }
  271. }
  272. static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
  273. {
  274. struct net_device *netdev = adapter->netdev;
  275. struct pci_dev *pdev = adapter->pdev;
  276. u16 phy_data;
  277. u16 link_up;
  278. spin_lock(&adapter->mdio_lock);
  279. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  280. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  281. spin_unlock(&adapter->mdio_lock);
  282. link_up = phy_data & BMSR_LSTATUS;
  283. /* notify upper layer link down ASAP */
  284. if (!link_up) {
  285. if (netif_carrier_ok(netdev)) {
  286. /* old link state: Up */
  287. netif_carrier_off(netdev);
  288. if (netif_msg_link(adapter))
  289. dev_info(&pdev->dev,
  290. "%s: %s NIC Link is Down\n",
  291. atl1c_driver_name, netdev->name);
  292. adapter->link_speed = SPEED_0;
  293. }
  294. }
  295. set_bit(ATL1C_WORK_EVENT_LINK_CHANGE, &adapter->work_event);
  296. schedule_work(&adapter->common_task);
  297. }
  298. static void atl1c_common_task(struct work_struct *work)
  299. {
  300. struct atl1c_adapter *adapter;
  301. struct net_device *netdev;
  302. adapter = container_of(work, struct atl1c_adapter, common_task);
  303. netdev = adapter->netdev;
  304. if (test_bit(__AT_DOWN, &adapter->flags))
  305. return;
  306. if (test_and_clear_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event)) {
  307. netif_device_detach(netdev);
  308. atl1c_down(adapter);
  309. atl1c_up(adapter);
  310. netif_device_attach(netdev);
  311. }
  312. if (test_and_clear_bit(ATL1C_WORK_EVENT_LINK_CHANGE,
  313. &adapter->work_event)) {
  314. atl1c_irq_disable(adapter);
  315. atl1c_check_link_status(adapter);
  316. atl1c_irq_enable(adapter);
  317. }
  318. }
  319. static void atl1c_del_timer(struct atl1c_adapter *adapter)
  320. {
  321. del_timer_sync(&adapter->phy_config_timer);
  322. }
  323. /**
  324. * atl1c_tx_timeout - Respond to a Tx Hang
  325. * @netdev: network interface device structure
  326. */
  327. static void atl1c_tx_timeout(struct net_device *netdev)
  328. {
  329. struct atl1c_adapter *adapter = netdev_priv(netdev);
  330. /* Do the reset outside of interrupt context */
  331. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  332. schedule_work(&adapter->common_task);
  333. }
  334. /**
  335. * atl1c_set_multi - Multicast and Promiscuous mode set
  336. * @netdev: network interface device structure
  337. *
  338. * The set_multi entry point is called whenever the multicast address
  339. * list or the network interface flags are updated. This routine is
  340. * responsible for configuring the hardware for proper multicast,
  341. * promiscuous mode, and all-multi behavior.
  342. */
  343. static void atl1c_set_multi(struct net_device *netdev)
  344. {
  345. struct atl1c_adapter *adapter = netdev_priv(netdev);
  346. struct atl1c_hw *hw = &adapter->hw;
  347. struct netdev_hw_addr *ha;
  348. u32 mac_ctrl_data;
  349. u32 hash_value;
  350. /* Check for Promiscuous and All Multicast modes */
  351. AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
  352. if (netdev->flags & IFF_PROMISC) {
  353. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  354. } else if (netdev->flags & IFF_ALLMULTI) {
  355. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  356. mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
  357. } else {
  358. mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  359. }
  360. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  361. /* clear the old settings from the multicast hash table */
  362. AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
  363. AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
  364. /* comoute mc addresses' hash value ,and put it into hash table */
  365. netdev_for_each_mc_addr(ha, netdev) {
  366. hash_value = atl1c_hash_mc_addr(hw, ha->addr);
  367. atl1c_hash_set(hw, hash_value);
  368. }
  369. }
  370. static void __atl1c_vlan_mode(netdev_features_t features, u32 *mac_ctrl_data)
  371. {
  372. if (features & NETIF_F_HW_VLAN_RX) {
  373. /* enable VLAN tag insert/strip */
  374. *mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  375. } else {
  376. /* disable VLAN tag insert/strip */
  377. *mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
  378. }
  379. }
  380. static void atl1c_vlan_mode(struct net_device *netdev,
  381. netdev_features_t features)
  382. {
  383. struct atl1c_adapter *adapter = netdev_priv(netdev);
  384. struct pci_dev *pdev = adapter->pdev;
  385. u32 mac_ctrl_data = 0;
  386. if (netif_msg_pktdata(adapter))
  387. dev_dbg(&pdev->dev, "atl1c_vlan_mode\n");
  388. atl1c_irq_disable(adapter);
  389. AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
  390. __atl1c_vlan_mode(features, &mac_ctrl_data);
  391. AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
  392. atl1c_irq_enable(adapter);
  393. }
  394. static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
  395. {
  396. struct pci_dev *pdev = adapter->pdev;
  397. if (netif_msg_pktdata(adapter))
  398. dev_dbg(&pdev->dev, "atl1c_restore_vlan\n");
  399. atl1c_vlan_mode(adapter->netdev, adapter->netdev->features);
  400. }
  401. /**
  402. * atl1c_set_mac - Change the Ethernet Address of the NIC
  403. * @netdev: network interface device structure
  404. * @p: pointer to an address structure
  405. *
  406. * Returns 0 on success, negative on failure
  407. */
  408. static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
  409. {
  410. struct atl1c_adapter *adapter = netdev_priv(netdev);
  411. struct sockaddr *addr = p;
  412. if (!is_valid_ether_addr(addr->sa_data))
  413. return -EADDRNOTAVAIL;
  414. if (netif_running(netdev))
  415. return -EBUSY;
  416. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  417. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  418. netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
  419. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
  420. return 0;
  421. }
  422. static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
  423. struct net_device *dev)
  424. {
  425. int mtu = dev->mtu;
  426. adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
  427. roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
  428. }
  429. static netdev_features_t atl1c_fix_features(struct net_device *netdev,
  430. netdev_features_t features)
  431. {
  432. /*
  433. * Since there is no support for separate rx/tx vlan accel
  434. * enable/disable make sure tx flag is always in same state as rx.
  435. */
  436. if (features & NETIF_F_HW_VLAN_RX)
  437. features |= NETIF_F_HW_VLAN_TX;
  438. else
  439. features &= ~NETIF_F_HW_VLAN_TX;
  440. if (netdev->mtu > MAX_TSO_FRAME_SIZE)
  441. features &= ~(NETIF_F_TSO | NETIF_F_TSO6);
  442. return features;
  443. }
  444. static int atl1c_set_features(struct net_device *netdev,
  445. netdev_features_t features)
  446. {
  447. netdev_features_t changed = netdev->features ^ features;
  448. if (changed & NETIF_F_HW_VLAN_RX)
  449. atl1c_vlan_mode(netdev, features);
  450. return 0;
  451. }
  452. /**
  453. * atl1c_change_mtu - Change the Maximum Transfer Unit
  454. * @netdev: network interface device structure
  455. * @new_mtu: new value for maximum frame size
  456. *
  457. * Returns 0 on success, negative on failure
  458. */
  459. static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
  460. {
  461. struct atl1c_adapter *adapter = netdev_priv(netdev);
  462. struct atl1c_hw *hw = &adapter->hw;
  463. int old_mtu = netdev->mtu;
  464. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  465. /* Fast Ethernet controller doesn't support jumbo packet */
  466. if (((hw->nic_type == athr_l2c ||
  467. hw->nic_type == athr_l2c_b ||
  468. hw->nic_type == athr_l2c_b2) && new_mtu > ETH_DATA_LEN) ||
  469. max_frame < ETH_ZLEN + ETH_FCS_LEN ||
  470. max_frame > MAX_JUMBO_FRAME_SIZE) {
  471. if (netif_msg_link(adapter))
  472. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  473. return -EINVAL;
  474. }
  475. /* set MTU */
  476. if (old_mtu != new_mtu && netif_running(netdev)) {
  477. while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
  478. msleep(1);
  479. netdev->mtu = new_mtu;
  480. adapter->hw.max_frame_size = new_mtu;
  481. atl1c_set_rxbufsize(adapter, netdev);
  482. atl1c_down(adapter);
  483. netdev_update_features(netdev);
  484. atl1c_up(adapter);
  485. clear_bit(__AT_RESETTING, &adapter->flags);
  486. }
  487. return 0;
  488. }
  489. /*
  490. * caller should hold mdio_lock
  491. */
  492. static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  493. {
  494. struct atl1c_adapter *adapter = netdev_priv(netdev);
  495. u16 result;
  496. atl1c_read_phy_reg(&adapter->hw, reg_num, &result);
  497. return result;
  498. }
  499. static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
  500. int reg_num, int val)
  501. {
  502. struct atl1c_adapter *adapter = netdev_priv(netdev);
  503. atl1c_write_phy_reg(&adapter->hw, reg_num, val);
  504. }
  505. static int atl1c_mii_ioctl(struct net_device *netdev,
  506. struct ifreq *ifr, int cmd)
  507. {
  508. struct atl1c_adapter *adapter = netdev_priv(netdev);
  509. struct pci_dev *pdev = adapter->pdev;
  510. struct mii_ioctl_data *data = if_mii(ifr);
  511. unsigned long flags;
  512. int retval = 0;
  513. if (!netif_running(netdev))
  514. return -EINVAL;
  515. spin_lock_irqsave(&adapter->mdio_lock, flags);
  516. switch (cmd) {
  517. case SIOCGMIIPHY:
  518. data->phy_id = 0;
  519. break;
  520. case SIOCGMIIREG:
  521. if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  522. &data->val_out)) {
  523. retval = -EIO;
  524. goto out;
  525. }
  526. break;
  527. case SIOCSMIIREG:
  528. if (data->reg_num & ~(0x1F)) {
  529. retval = -EFAULT;
  530. goto out;
  531. }
  532. dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
  533. data->reg_num, data->val_in);
  534. if (atl1c_write_phy_reg(&adapter->hw,
  535. data->reg_num, data->val_in)) {
  536. retval = -EIO;
  537. goto out;
  538. }
  539. break;
  540. default:
  541. retval = -EOPNOTSUPP;
  542. break;
  543. }
  544. out:
  545. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  546. return retval;
  547. }
  548. static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  549. {
  550. switch (cmd) {
  551. case SIOCGMIIPHY:
  552. case SIOCGMIIREG:
  553. case SIOCSMIIREG:
  554. return atl1c_mii_ioctl(netdev, ifr, cmd);
  555. default:
  556. return -EOPNOTSUPP;
  557. }
  558. }
  559. /**
  560. * atl1c_alloc_queues - Allocate memory for all rings
  561. * @adapter: board private structure to initialize
  562. *
  563. */
  564. static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
  565. {
  566. return 0;
  567. }
  568. static void atl1c_set_mac_type(struct atl1c_hw *hw)
  569. {
  570. switch (hw->device_id) {
  571. case PCI_DEVICE_ID_ATTANSIC_L2C:
  572. hw->nic_type = athr_l2c;
  573. break;
  574. case PCI_DEVICE_ID_ATTANSIC_L1C:
  575. hw->nic_type = athr_l1c;
  576. break;
  577. case PCI_DEVICE_ID_ATHEROS_L2C_B:
  578. hw->nic_type = athr_l2c_b;
  579. break;
  580. case PCI_DEVICE_ID_ATHEROS_L2C_B2:
  581. hw->nic_type = athr_l2c_b2;
  582. break;
  583. case PCI_DEVICE_ID_ATHEROS_L1D:
  584. hw->nic_type = athr_l1d;
  585. break;
  586. case PCI_DEVICE_ID_ATHEROS_L1D_2_0:
  587. hw->nic_type = athr_l1d_2;
  588. break;
  589. default:
  590. break;
  591. }
  592. }
  593. static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
  594. {
  595. u32 link_ctrl_data;
  596. atl1c_set_mac_type(hw);
  597. AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
  598. hw->ctrl_flags = ATL1C_INTR_MODRT_ENABLE |
  599. ATL1C_TXQ_MODE_ENHANCE;
  600. hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT |
  601. ATL1C_ASPM_L1_SUPPORT;
  602. hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
  603. if (hw->nic_type == athr_l1c ||
  604. hw->nic_type == athr_l1d ||
  605. hw->nic_type == athr_l1d_2)
  606. hw->link_cap_flags |= ATL1C_LINK_CAP_1000M;
  607. return 0;
  608. }
  609. struct atl1c_platform_patch {
  610. u16 pci_did;
  611. u8 pci_revid;
  612. u16 subsystem_vid;
  613. u16 subsystem_did;
  614. u32 patch_flag;
  615. #define ATL1C_LINK_PATCH 0x1
  616. };
  617. static const struct atl1c_platform_patch plats[] __devinitdata = {
  618. {0x2060, 0xC1, 0x1019, 0x8152, 0x1},
  619. {0x2060, 0xC1, 0x1019, 0x2060, 0x1},
  620. {0x2060, 0xC1, 0x1019, 0xE000, 0x1},
  621. {0x2062, 0xC0, 0x1019, 0x8152, 0x1},
  622. {0x2062, 0xC0, 0x1019, 0x2062, 0x1},
  623. {0x2062, 0xC0, 0x1458, 0xE000, 0x1},
  624. {0x2062, 0xC1, 0x1019, 0x8152, 0x1},
  625. {0x2062, 0xC1, 0x1019, 0x2062, 0x1},
  626. {0x2062, 0xC1, 0x1458, 0xE000, 0x1},
  627. {0x2062, 0xC1, 0x1565, 0x2802, 0x1},
  628. {0x2062, 0xC1, 0x1565, 0x2801, 0x1},
  629. {0x1073, 0xC0, 0x1019, 0x8151, 0x1},
  630. {0x1073, 0xC0, 0x1019, 0x1073, 0x1},
  631. {0x1073, 0xC0, 0x1458, 0xE000, 0x1},
  632. {0x1083, 0xC0, 0x1458, 0xE000, 0x1},
  633. {0x1083, 0xC0, 0x1019, 0x8151, 0x1},
  634. {0x1083, 0xC0, 0x1019, 0x1083, 0x1},
  635. {0x1083, 0xC0, 0x1462, 0x7680, 0x1},
  636. {0x1083, 0xC0, 0x1565, 0x2803, 0x1},
  637. {0},
  638. };
  639. static void __devinit atl1c_patch_assign(struct atl1c_hw *hw)
  640. {
  641. int i = 0;
  642. hw->msi_lnkpatch = false;
  643. while (plats[i].pci_did != 0) {
  644. if (plats[i].pci_did == hw->device_id &&
  645. plats[i].pci_revid == hw->revision_id &&
  646. plats[i].subsystem_vid == hw->subsystem_vendor_id &&
  647. plats[i].subsystem_did == hw->subsystem_id) {
  648. if (plats[i].patch_flag & ATL1C_LINK_PATCH)
  649. hw->msi_lnkpatch = true;
  650. }
  651. i++;
  652. }
  653. }
  654. /**
  655. * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
  656. * @adapter: board private structure to initialize
  657. *
  658. * atl1c_sw_init initializes the Adapter private data structure.
  659. * Fields are initialized based on PCI device information and
  660. * OS network device settings (MTU size).
  661. */
  662. static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
  663. {
  664. struct atl1c_hw *hw = &adapter->hw;
  665. struct pci_dev *pdev = adapter->pdev;
  666. u32 revision;
  667. adapter->wol = 0;
  668. device_set_wakeup_enable(&pdev->dev, false);
  669. adapter->link_speed = SPEED_0;
  670. adapter->link_duplex = FULL_DUPLEX;
  671. adapter->tpd_ring[0].count = 1024;
  672. adapter->rfd_ring.count = 512;
  673. hw->vendor_id = pdev->vendor;
  674. hw->device_id = pdev->device;
  675. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  676. hw->subsystem_id = pdev->subsystem_device;
  677. AT_READ_REG(hw, PCI_CLASS_REVISION, &revision);
  678. hw->revision_id = revision & 0xFF;
  679. /* before link up, we assume hibernate is true */
  680. hw->hibernate = true;
  681. hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
  682. if (atl1c_setup_mac_funcs(hw) != 0) {
  683. dev_err(&pdev->dev, "set mac function pointers failed\n");
  684. return -1;
  685. }
  686. atl1c_patch_assign(hw);
  687. hw->intr_mask = IMR_NORMAL_MASK;
  688. hw->phy_configured = false;
  689. hw->preamble_len = 7;
  690. hw->max_frame_size = adapter->netdev->mtu;
  691. hw->autoneg_advertised = ADVERTISED_Autoneg;
  692. hw->indirect_tab = 0xE4E4E4E4;
  693. hw->base_cpu = 0;
  694. hw->ict = 50000; /* 100ms */
  695. hw->smb_timer = 200000; /* 400ms */
  696. hw->rx_imt = 200;
  697. hw->tx_imt = 1000;
  698. hw->tpd_burst = 5;
  699. hw->rfd_burst = 8;
  700. hw->dma_order = atl1c_dma_ord_out;
  701. hw->dmar_block = atl1c_dma_req_1024;
  702. if (atl1c_alloc_queues(adapter)) {
  703. dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
  704. return -ENOMEM;
  705. }
  706. /* TODO */
  707. atl1c_set_rxbufsize(adapter, adapter->netdev);
  708. atomic_set(&adapter->irq_sem, 1);
  709. spin_lock_init(&adapter->mdio_lock);
  710. spin_lock_init(&adapter->tx_lock);
  711. set_bit(__AT_DOWN, &adapter->flags);
  712. return 0;
  713. }
  714. static inline void atl1c_clean_buffer(struct pci_dev *pdev,
  715. struct atl1c_buffer *buffer_info, int in_irq)
  716. {
  717. u16 pci_driection;
  718. if (buffer_info->flags & ATL1C_BUFFER_FREE)
  719. return;
  720. if (buffer_info->dma) {
  721. if (buffer_info->flags & ATL1C_PCIMAP_FROMDEVICE)
  722. pci_driection = PCI_DMA_FROMDEVICE;
  723. else
  724. pci_driection = PCI_DMA_TODEVICE;
  725. if (buffer_info->flags & ATL1C_PCIMAP_SINGLE)
  726. pci_unmap_single(pdev, buffer_info->dma,
  727. buffer_info->length, pci_driection);
  728. else if (buffer_info->flags & ATL1C_PCIMAP_PAGE)
  729. pci_unmap_page(pdev, buffer_info->dma,
  730. buffer_info->length, pci_driection);
  731. }
  732. if (buffer_info->skb) {
  733. if (in_irq)
  734. dev_kfree_skb_irq(buffer_info->skb);
  735. else
  736. dev_kfree_skb(buffer_info->skb);
  737. }
  738. buffer_info->dma = 0;
  739. buffer_info->skb = NULL;
  740. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  741. }
  742. /**
  743. * atl1c_clean_tx_ring - Free Tx-skb
  744. * @adapter: board private structure
  745. */
  746. static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
  747. enum atl1c_trans_queue type)
  748. {
  749. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  750. struct atl1c_buffer *buffer_info;
  751. struct pci_dev *pdev = adapter->pdev;
  752. u16 index, ring_count;
  753. ring_count = tpd_ring->count;
  754. for (index = 0; index < ring_count; index++) {
  755. buffer_info = &tpd_ring->buffer_info[index];
  756. atl1c_clean_buffer(pdev, buffer_info, 0);
  757. }
  758. /* Zero out Tx-buffers */
  759. memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
  760. ring_count);
  761. atomic_set(&tpd_ring->next_to_clean, 0);
  762. tpd_ring->next_to_use = 0;
  763. }
  764. /**
  765. * atl1c_clean_rx_ring - Free rx-reservation skbs
  766. * @adapter: board private structure
  767. */
  768. static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
  769. {
  770. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  771. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  772. struct atl1c_buffer *buffer_info;
  773. struct pci_dev *pdev = adapter->pdev;
  774. int j;
  775. for (j = 0; j < rfd_ring->count; j++) {
  776. buffer_info = &rfd_ring->buffer_info[j];
  777. atl1c_clean_buffer(pdev, buffer_info, 0);
  778. }
  779. /* zero out the descriptor ring */
  780. memset(rfd_ring->desc, 0, rfd_ring->size);
  781. rfd_ring->next_to_clean = 0;
  782. rfd_ring->next_to_use = 0;
  783. rrd_ring->next_to_use = 0;
  784. rrd_ring->next_to_clean = 0;
  785. }
  786. /*
  787. * Read / Write Ptr Initialize:
  788. */
  789. static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
  790. {
  791. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  792. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  793. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  794. struct atl1c_buffer *buffer_info;
  795. int i, j;
  796. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  797. tpd_ring[i].next_to_use = 0;
  798. atomic_set(&tpd_ring[i].next_to_clean, 0);
  799. buffer_info = tpd_ring[i].buffer_info;
  800. for (j = 0; j < tpd_ring->count; j++)
  801. ATL1C_SET_BUFFER_STATE(&buffer_info[i],
  802. ATL1C_BUFFER_FREE);
  803. }
  804. rfd_ring->next_to_use = 0;
  805. rfd_ring->next_to_clean = 0;
  806. rrd_ring->next_to_use = 0;
  807. rrd_ring->next_to_clean = 0;
  808. for (j = 0; j < rfd_ring->count; j++) {
  809. buffer_info = &rfd_ring->buffer_info[j];
  810. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_FREE);
  811. }
  812. }
  813. /**
  814. * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
  815. * @adapter: board private structure
  816. *
  817. * Free all transmit software resources
  818. */
  819. static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
  820. {
  821. struct pci_dev *pdev = adapter->pdev;
  822. pci_free_consistent(pdev, adapter->ring_header.size,
  823. adapter->ring_header.desc,
  824. adapter->ring_header.dma);
  825. adapter->ring_header.desc = NULL;
  826. /* Note: just free tdp_ring.buffer_info,
  827. * it contain rfd_ring.buffer_info, do not double free */
  828. if (adapter->tpd_ring[0].buffer_info) {
  829. kfree(adapter->tpd_ring[0].buffer_info);
  830. adapter->tpd_ring[0].buffer_info = NULL;
  831. }
  832. }
  833. /**
  834. * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
  835. * @adapter: board private structure
  836. *
  837. * Return 0 on success, negative on failure
  838. */
  839. static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
  840. {
  841. struct pci_dev *pdev = adapter->pdev;
  842. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  843. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  844. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  845. struct atl1c_ring_header *ring_header = &adapter->ring_header;
  846. int size;
  847. int i;
  848. int count = 0;
  849. int rx_desc_count = 0;
  850. u32 offset = 0;
  851. rrd_ring->count = rfd_ring->count;
  852. for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
  853. tpd_ring[i].count = tpd_ring[0].count;
  854. /* 2 tpd queue, one high priority queue,
  855. * another normal priority queue */
  856. size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
  857. rfd_ring->count);
  858. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  859. if (unlikely(!tpd_ring->buffer_info)) {
  860. dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
  861. size);
  862. goto err_nomem;
  863. }
  864. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  865. tpd_ring[i].buffer_info =
  866. (tpd_ring->buffer_info + count);
  867. count += tpd_ring[i].count;
  868. }
  869. rfd_ring->buffer_info =
  870. (tpd_ring->buffer_info + count);
  871. count += rfd_ring->count;
  872. rx_desc_count += rfd_ring->count;
  873. /*
  874. * real ring DMA buffer
  875. * each ring/block may need up to 8 bytes for alignment, hence the
  876. * additional bytes tacked onto the end.
  877. */
  878. ring_header->size = size =
  879. sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
  880. sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
  881. sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
  882. 8 * 4;
  883. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  884. &ring_header->dma);
  885. if (unlikely(!ring_header->desc)) {
  886. dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
  887. goto err_nomem;
  888. }
  889. memset(ring_header->desc, 0, ring_header->size);
  890. /* init TPD ring */
  891. tpd_ring[0].dma = roundup(ring_header->dma, 8);
  892. offset = tpd_ring[0].dma - ring_header->dma;
  893. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  894. tpd_ring[i].dma = ring_header->dma + offset;
  895. tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
  896. tpd_ring[i].size =
  897. sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
  898. offset += roundup(tpd_ring[i].size, 8);
  899. }
  900. /* init RFD ring */
  901. rfd_ring->dma = ring_header->dma + offset;
  902. rfd_ring->desc = (u8 *) ring_header->desc + offset;
  903. rfd_ring->size = sizeof(struct atl1c_rx_free_desc) * rfd_ring->count;
  904. offset += roundup(rfd_ring->size, 8);
  905. /* init RRD ring */
  906. rrd_ring->dma = ring_header->dma + offset;
  907. rrd_ring->desc = (u8 *) ring_header->desc + offset;
  908. rrd_ring->size = sizeof(struct atl1c_recv_ret_status) *
  909. rrd_ring->count;
  910. offset += roundup(rrd_ring->size, 8);
  911. return 0;
  912. err_nomem:
  913. kfree(tpd_ring->buffer_info);
  914. return -ENOMEM;
  915. }
  916. static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
  917. {
  918. struct atl1c_hw *hw = &adapter->hw;
  919. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  920. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  921. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  922. adapter->tpd_ring;
  923. /* TPD */
  924. AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
  925. (u32)((tpd_ring[atl1c_trans_normal].dma &
  926. AT_DMA_HI_ADDR_MASK) >> 32));
  927. /* just enable normal priority TX queue */
  928. AT_WRITE_REG(hw, REG_TPD_PRI0_ADDR_LO,
  929. (u32)(tpd_ring[atl1c_trans_normal].dma &
  930. AT_DMA_LO_ADDR_MASK));
  931. AT_WRITE_REG(hw, REG_TPD_PRI1_ADDR_LO,
  932. (u32)(tpd_ring[atl1c_trans_high].dma &
  933. AT_DMA_LO_ADDR_MASK));
  934. AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
  935. (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
  936. /* RFD */
  937. AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
  938. (u32)((rfd_ring->dma & AT_DMA_HI_ADDR_MASK) >> 32));
  939. AT_WRITE_REG(hw, REG_RFD0_HEAD_ADDR_LO,
  940. (u32)(rfd_ring->dma & AT_DMA_LO_ADDR_MASK));
  941. AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
  942. rfd_ring->count & RFD_RING_SIZE_MASK);
  943. AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
  944. adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
  945. /* RRD */
  946. AT_WRITE_REG(hw, REG_RRD0_HEAD_ADDR_LO,
  947. (u32)(rrd_ring->dma & AT_DMA_LO_ADDR_MASK));
  948. AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
  949. (rrd_ring->count & RRD_RING_SIZE_MASK));
  950. if (hw->nic_type == athr_l2c_b) {
  951. AT_WRITE_REG(hw, REG_SRAM_RXF_LEN, 0x02a0L);
  952. AT_WRITE_REG(hw, REG_SRAM_TXF_LEN, 0x0100L);
  953. AT_WRITE_REG(hw, REG_SRAM_RXF_ADDR, 0x029f0000L);
  954. AT_WRITE_REG(hw, REG_SRAM_RFD0_INFO, 0x02bf02a0L);
  955. AT_WRITE_REG(hw, REG_SRAM_TXF_ADDR, 0x03bf02c0L);
  956. AT_WRITE_REG(hw, REG_SRAM_TRD_ADDR, 0x03df03c0L);
  957. AT_WRITE_REG(hw, REG_TXF_WATER_MARK, 0); /* TX watermark, to enter l1 state.*/
  958. AT_WRITE_REG(hw, REG_RXD_DMA_CTRL, 0); /* RXD threshold.*/
  959. }
  960. /* Load all of base address above */
  961. AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
  962. }
  963. static void atl1c_configure_tx(struct atl1c_adapter *adapter)
  964. {
  965. struct atl1c_hw *hw = &adapter->hw;
  966. int max_pay_load;
  967. u16 tx_offload_thresh;
  968. u32 txq_ctrl_data;
  969. tx_offload_thresh = MAX_TSO_FRAME_SIZE;
  970. AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
  971. (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
  972. max_pay_load = pcie_get_readrq(adapter->pdev) >> 8;
  973. hw->dmar_block = min_t(u32, max_pay_load, hw->dmar_block);
  974. /*
  975. * if BIOS had changed the dam-read-max-length to an invalid value,
  976. * restore it to default value
  977. */
  978. if (hw->dmar_block < DEVICE_CTRL_MAXRRS_MIN) {
  979. pcie_set_readrq(adapter->pdev, 128 << DEVICE_CTRL_MAXRRS_MIN);
  980. hw->dmar_block = DEVICE_CTRL_MAXRRS_MIN;
  981. }
  982. txq_ctrl_data =
  983. hw->nic_type == athr_l2c_b || hw->nic_type == athr_l2c_b2 ?
  984. L2CB_TXQ_CFGV : L1C_TXQ_CFGV;
  985. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
  986. }
  987. static void atl1c_configure_rx(struct atl1c_adapter *adapter)
  988. {
  989. struct atl1c_hw *hw = &adapter->hw;
  990. u32 rxq_ctrl_data;
  991. rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
  992. RXQ_RFD_BURST_NUM_SHIFT;
  993. if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
  994. rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
  995. /* aspm for gigabit */
  996. if (hw->nic_type != athr_l1d_2 && (hw->device_id & 1) != 0)
  997. rxq_ctrl_data = FIELD_SETX(rxq_ctrl_data, ASPM_THRUPUT_LIMIT,
  998. ASPM_THRUPUT_LIMIT_100M);
  999. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
  1000. }
  1001. static void atl1c_configure_dma(struct atl1c_adapter *adapter)
  1002. {
  1003. struct atl1c_hw *hw = &adapter->hw;
  1004. u32 dma_ctrl_data;
  1005. dma_ctrl_data = FIELDX(DMA_CTRL_RORDER_MODE, DMA_CTRL_RORDER_MODE_OUT) |
  1006. DMA_CTRL_RREQ_PRI_DATA |
  1007. FIELDX(DMA_CTRL_RREQ_BLEN, hw->dmar_block) |
  1008. FIELDX(DMA_CTRL_WDLY_CNT, DMA_CTRL_WDLY_CNT_DEF) |
  1009. FIELDX(DMA_CTRL_RDLY_CNT, DMA_CTRL_RDLY_CNT_DEF);
  1010. AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
  1011. }
  1012. /*
  1013. * Stop the mac, transmit and receive units
  1014. * hw - Struct containing variables accessed by shared code
  1015. * return : 0 or idle status (if error)
  1016. */
  1017. static int atl1c_stop_mac(struct atl1c_hw *hw)
  1018. {
  1019. u32 data;
  1020. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  1021. data &= ~RXQ_CTRL_EN;
  1022. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  1023. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  1024. data &= ~TXQ_CTRL_EN;
  1025. AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
  1026. atl1c_wait_until_idle(hw, IDLE_STATUS_RXQ_BUSY | IDLE_STATUS_TXQ_BUSY);
  1027. AT_READ_REG(hw, REG_MAC_CTRL, &data);
  1028. data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
  1029. AT_WRITE_REG(hw, REG_MAC_CTRL, data);
  1030. return (int)atl1c_wait_until_idle(hw,
  1031. IDLE_STATUS_TXMAC_BUSY | IDLE_STATUS_RXMAC_BUSY);
  1032. }
  1033. static void atl1c_start_mac(struct atl1c_adapter *adapter)
  1034. {
  1035. struct atl1c_hw *hw = &adapter->hw;
  1036. u32 mac, txq, rxq;
  1037. hw->mac_duplex = adapter->link_duplex == FULL_DUPLEX ? true : false;
  1038. hw->mac_speed = adapter->link_speed == SPEED_1000 ?
  1039. atl1c_mac_speed_1000 : atl1c_mac_speed_10_100;
  1040. AT_READ_REG(hw, REG_TXQ_CTRL, &txq);
  1041. AT_READ_REG(hw, REG_RXQ_CTRL, &rxq);
  1042. AT_READ_REG(hw, REG_MAC_CTRL, &mac);
  1043. txq |= TXQ_CTRL_EN;
  1044. rxq |= RXQ_CTRL_EN;
  1045. mac |= MAC_CTRL_TX_EN | MAC_CTRL_TX_FLOW |
  1046. MAC_CTRL_RX_EN | MAC_CTRL_RX_FLOW |
  1047. MAC_CTRL_ADD_CRC | MAC_CTRL_PAD |
  1048. MAC_CTRL_BC_EN | MAC_CTRL_SINGLE_PAUSE_EN |
  1049. MAC_CTRL_HASH_ALG_CRC32;
  1050. if (hw->mac_duplex)
  1051. mac |= MAC_CTRL_DUPLX;
  1052. else
  1053. mac &= ~MAC_CTRL_DUPLX;
  1054. mac = FIELD_SETX(mac, MAC_CTRL_SPEED, hw->mac_speed);
  1055. mac = FIELD_SETX(mac, MAC_CTRL_PRMLEN, hw->preamble_len);
  1056. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq);
  1057. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq);
  1058. AT_WRITE_REG(hw, REG_MAC_CTRL, mac);
  1059. }
  1060. /*
  1061. * Reset the transmit and receive units; mask and clear all interrupts.
  1062. * hw - Struct containing variables accessed by shared code
  1063. * return : 0 or idle status (if error)
  1064. */
  1065. static int atl1c_reset_mac(struct atl1c_hw *hw)
  1066. {
  1067. struct atl1c_adapter *adapter = hw->adapter;
  1068. struct pci_dev *pdev = adapter->pdev;
  1069. u32 ctrl_data = 0;
  1070. atl1c_stop_mac(hw);
  1071. /*
  1072. * Issue Soft Reset to the MAC. This will reset the chip's
  1073. * transmit, receive, DMA. It will not effect
  1074. * the current PCI configuration. The global reset bit is self-
  1075. * clearing, and should clear within a microsecond.
  1076. */
  1077. AT_READ_REG(hw, REG_MASTER_CTRL, &ctrl_data);
  1078. ctrl_data |= MASTER_CTRL_OOB_DIS;
  1079. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data | MASTER_CTRL_SOFT_RST);
  1080. AT_WRITE_FLUSH(hw);
  1081. msleep(10);
  1082. /* Wait at least 10ms for All module to be Idle */
  1083. if (atl1c_wait_until_idle(hw, IDLE_STATUS_MASK)) {
  1084. dev_err(&pdev->dev,
  1085. "MAC state machine can't be idle since"
  1086. " disabled for 10ms second\n");
  1087. return -1;
  1088. }
  1089. AT_WRITE_REG(hw, REG_MASTER_CTRL, ctrl_data);
  1090. /* driver control speed/duplex */
  1091. AT_READ_REG(hw, REG_MAC_CTRL, &ctrl_data);
  1092. AT_WRITE_REG(hw, REG_MAC_CTRL, ctrl_data | MAC_CTRL_SPEED_MODE_SW);
  1093. /* clk switch setting */
  1094. AT_READ_REG(hw, REG_SERDES, &ctrl_data);
  1095. switch (hw->nic_type) {
  1096. case athr_l2c_b:
  1097. ctrl_data &= ~(SERDES_PHY_CLK_SLOWDOWN |
  1098. SERDES_MAC_CLK_SLOWDOWN);
  1099. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1100. break;
  1101. case athr_l2c_b2:
  1102. case athr_l1d_2:
  1103. ctrl_data |= SERDES_PHY_CLK_SLOWDOWN | SERDES_MAC_CLK_SLOWDOWN;
  1104. AT_WRITE_REG(hw, REG_SERDES, ctrl_data);
  1105. break;
  1106. default:
  1107. break;
  1108. }
  1109. return 0;
  1110. }
  1111. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
  1112. {
  1113. u16 ctrl_flags = hw->ctrl_flags;
  1114. hw->ctrl_flags &= ~(ATL1C_ASPM_L0S_SUPPORT | ATL1C_ASPM_L1_SUPPORT);
  1115. atl1c_set_aspm(hw, SPEED_0);
  1116. hw->ctrl_flags = ctrl_flags;
  1117. }
  1118. /*
  1119. * Set ASPM state.
  1120. * Enable/disable L0s/L1 depend on link state.
  1121. */
  1122. static void atl1c_set_aspm(struct atl1c_hw *hw, u16 link_speed)
  1123. {
  1124. u32 pm_ctrl_data;
  1125. u32 link_l1_timer;
  1126. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1127. pm_ctrl_data &= ~(PM_CTRL_ASPM_L1_EN |
  1128. PM_CTRL_ASPM_L0S_EN |
  1129. PM_CTRL_MAC_ASPM_CHK);
  1130. /* L1 timer */
  1131. if (hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1132. pm_ctrl_data &= ~PMCTRL_TXL1_AFTER_L0S;
  1133. link_l1_timer =
  1134. link_speed == SPEED_1000 || link_speed == SPEED_100 ?
  1135. L1D_PMCTRL_L1_ENTRY_TM_16US : 1;
  1136. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1137. L1D_PMCTRL_L1_ENTRY_TM, link_l1_timer);
  1138. } else {
  1139. link_l1_timer = hw->nic_type == athr_l2c_b ?
  1140. L2CB1_PM_CTRL_L1_ENTRY_TM : L1C_PM_CTRL_L1_ENTRY_TM;
  1141. if (link_speed != SPEED_1000 && link_speed != SPEED_100)
  1142. link_l1_timer = 1;
  1143. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1144. PM_CTRL_L1_ENTRY_TIMER, link_l1_timer);
  1145. }
  1146. /* L0S/L1 enable */
  1147. if ((hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT) && link_speed != SPEED_0)
  1148. pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN | PM_CTRL_MAC_ASPM_CHK;
  1149. if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
  1150. pm_ctrl_data |= PM_CTRL_ASPM_L1_EN | PM_CTRL_MAC_ASPM_CHK;
  1151. /* l2cb & l1d & l2cb2 & l1d2 */
  1152. if (hw->nic_type == athr_l2c_b || hw->nic_type == athr_l1d ||
  1153. hw->nic_type == athr_l2c_b2 || hw->nic_type == athr_l1d_2) {
  1154. pm_ctrl_data = FIELD_SETX(pm_ctrl_data,
  1155. PM_CTRL_PM_REQ_TIMER, PM_CTRL_PM_REQ_TO_DEF);
  1156. pm_ctrl_data |= PM_CTRL_RCVR_WT_TIMER |
  1157. PM_CTRL_SERDES_PD_EX_L1 |
  1158. PM_CTRL_CLK_SWH_L1;
  1159. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1160. PM_CTRL_SERDES_PLL_L1_EN |
  1161. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1162. PM_CTRL_SA_DLY_EN |
  1163. PM_CTRL_HOTRST);
  1164. /* disable l0s if link down or l2cb */
  1165. if (link_speed == SPEED_0 || hw->nic_type == athr_l2c_b)
  1166. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1167. } else { /* l1c */
  1168. pm_ctrl_data =
  1169. FIELD_SETX(pm_ctrl_data, PM_CTRL_L1_ENTRY_TIMER, 0);
  1170. if (link_speed != SPEED_0) {
  1171. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN |
  1172. PM_CTRL_SERDES_PLL_L1_EN |
  1173. PM_CTRL_SERDES_BUFS_RX_L1_EN;
  1174. pm_ctrl_data &= ~(PM_CTRL_SERDES_PD_EX_L1 |
  1175. PM_CTRL_CLK_SWH_L1 |
  1176. PM_CTRL_ASPM_L0S_EN |
  1177. PM_CTRL_ASPM_L1_EN);
  1178. } else { /* link down */
  1179. pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
  1180. pm_ctrl_data &= ~(PM_CTRL_SERDES_L1_EN |
  1181. PM_CTRL_SERDES_PLL_L1_EN |
  1182. PM_CTRL_SERDES_BUFS_RX_L1_EN |
  1183. PM_CTRL_ASPM_L0S_EN);
  1184. }
  1185. }
  1186. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1187. return;
  1188. }
  1189. /**
  1190. * atl1c_configure - Configure Transmit&Receive Unit after Reset
  1191. * @adapter: board private structure
  1192. *
  1193. * Configure the Tx /Rx unit of the MAC after a reset.
  1194. */
  1195. static int atl1c_configure_mac(struct atl1c_adapter *adapter)
  1196. {
  1197. struct atl1c_hw *hw = &adapter->hw;
  1198. u32 master_ctrl_data = 0;
  1199. u32 intr_modrt_data;
  1200. u32 data;
  1201. AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
  1202. master_ctrl_data &= ~(MASTER_CTRL_TX_ITIMER_EN |
  1203. MASTER_CTRL_RX_ITIMER_EN |
  1204. MASTER_CTRL_INT_RDCLR);
  1205. /* clear interrupt status */
  1206. AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
  1207. /* Clear any WOL status */
  1208. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  1209. /* set Interrupt Clear Timer
  1210. * HW will enable self to assert interrupt event to system after
  1211. * waiting x-time for software to notify it accept interrupt.
  1212. */
  1213. data = CLK_GATING_EN_ALL;
  1214. if (hw->ctrl_flags & ATL1C_CLK_GATING_EN) {
  1215. if (hw->nic_type == athr_l2c_b)
  1216. data &= ~CLK_GATING_RXMAC_EN;
  1217. } else
  1218. data = 0;
  1219. AT_WRITE_REG(hw, REG_CLK_GATING_CTRL, data);
  1220. AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
  1221. hw->ict & INT_RETRIG_TIMER_MASK);
  1222. atl1c_configure_des_ring(adapter);
  1223. if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
  1224. intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
  1225. IRQ_MODRT_TX_TIMER_SHIFT;
  1226. intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
  1227. IRQ_MODRT_RX_TIMER_SHIFT;
  1228. AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
  1229. master_ctrl_data |=
  1230. MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
  1231. }
  1232. if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
  1233. master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
  1234. master_ctrl_data |= MASTER_CTRL_SA_TIMER_EN;
  1235. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  1236. AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
  1237. hw->smb_timer & SMB_STAT_TIMER_MASK);
  1238. /* set MTU */
  1239. AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
  1240. VLAN_HLEN + ETH_FCS_LEN);
  1241. atl1c_configure_tx(adapter);
  1242. atl1c_configure_rx(adapter);
  1243. atl1c_configure_dma(adapter);
  1244. return 0;
  1245. }
  1246. static int atl1c_configure(struct atl1c_adapter *adapter)
  1247. {
  1248. struct net_device *netdev = adapter->netdev;
  1249. int num;
  1250. atl1c_init_ring_ptrs(adapter);
  1251. atl1c_set_multi(netdev);
  1252. atl1c_restore_vlan(adapter);
  1253. num = atl1c_alloc_rx_buffer(adapter);
  1254. if (unlikely(num == 0))
  1255. return -ENOMEM;
  1256. if (atl1c_configure_mac(adapter))
  1257. return -EIO;
  1258. return 0;
  1259. }
  1260. static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
  1261. {
  1262. u16 hw_reg_addr = 0;
  1263. unsigned long *stats_item = NULL;
  1264. u32 data;
  1265. /* update rx status */
  1266. hw_reg_addr = REG_MAC_RX_STATUS_BIN;
  1267. stats_item = &adapter->hw_stats.rx_ok;
  1268. while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
  1269. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1270. *stats_item += data;
  1271. stats_item++;
  1272. hw_reg_addr += 4;
  1273. }
  1274. /* update tx status */
  1275. hw_reg_addr = REG_MAC_TX_STATUS_BIN;
  1276. stats_item = &adapter->hw_stats.tx_ok;
  1277. while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
  1278. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1279. *stats_item += data;
  1280. stats_item++;
  1281. hw_reg_addr += 4;
  1282. }
  1283. }
  1284. /**
  1285. * atl1c_get_stats - Get System Network Statistics
  1286. * @netdev: network interface device structure
  1287. *
  1288. * Returns the address of the device statistics structure.
  1289. * The statistics are actually updated from the timer callback.
  1290. */
  1291. static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
  1292. {
  1293. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1294. struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
  1295. struct net_device_stats *net_stats = &netdev->stats;
  1296. atl1c_update_hw_stats(adapter);
  1297. net_stats->rx_packets = hw_stats->rx_ok;
  1298. net_stats->tx_packets = hw_stats->tx_ok;
  1299. net_stats->rx_bytes = hw_stats->rx_byte_cnt;
  1300. net_stats->tx_bytes = hw_stats->tx_byte_cnt;
  1301. net_stats->multicast = hw_stats->rx_mcast;
  1302. net_stats->collisions = hw_stats->tx_1_col +
  1303. hw_stats->tx_2_col * 2 +
  1304. hw_stats->tx_late_col + hw_stats->tx_abort_col;
  1305. net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
  1306. hw_stats->rx_len_err + hw_stats->rx_sz_ov +
  1307. hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
  1308. net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
  1309. net_stats->rx_length_errors = hw_stats->rx_len_err;
  1310. net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
  1311. net_stats->rx_frame_errors = hw_stats->rx_align_err;
  1312. net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1313. net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1314. net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
  1315. hw_stats->tx_underrun + hw_stats->tx_trunc;
  1316. net_stats->tx_fifo_errors = hw_stats->tx_underrun;
  1317. net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
  1318. net_stats->tx_window_errors = hw_stats->tx_late_col;
  1319. return net_stats;
  1320. }
  1321. static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
  1322. {
  1323. u16 phy_data;
  1324. spin_lock(&adapter->mdio_lock);
  1325. atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
  1326. spin_unlock(&adapter->mdio_lock);
  1327. }
  1328. static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
  1329. enum atl1c_trans_queue type)
  1330. {
  1331. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1332. struct atl1c_buffer *buffer_info;
  1333. struct pci_dev *pdev = adapter->pdev;
  1334. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1335. u16 hw_next_to_clean;
  1336. u16 reg;
  1337. reg = type == atl1c_trans_high ? REG_TPD_PRI1_CIDX : REG_TPD_PRI0_CIDX;
  1338. AT_READ_REGW(&adapter->hw, reg, &hw_next_to_clean);
  1339. while (next_to_clean != hw_next_to_clean) {
  1340. buffer_info = &tpd_ring->buffer_info[next_to_clean];
  1341. atl1c_clean_buffer(pdev, buffer_info, 1);
  1342. if (++next_to_clean == tpd_ring->count)
  1343. next_to_clean = 0;
  1344. atomic_set(&tpd_ring->next_to_clean, next_to_clean);
  1345. }
  1346. if (netif_queue_stopped(adapter->netdev) &&
  1347. netif_carrier_ok(adapter->netdev)) {
  1348. netif_wake_queue(adapter->netdev);
  1349. }
  1350. return true;
  1351. }
  1352. /**
  1353. * atl1c_intr - Interrupt Handler
  1354. * @irq: interrupt number
  1355. * @data: pointer to a network interface device structure
  1356. */
  1357. static irqreturn_t atl1c_intr(int irq, void *data)
  1358. {
  1359. struct net_device *netdev = data;
  1360. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1361. struct pci_dev *pdev = adapter->pdev;
  1362. struct atl1c_hw *hw = &adapter->hw;
  1363. int max_ints = AT_MAX_INT_WORK;
  1364. int handled = IRQ_NONE;
  1365. u32 status;
  1366. u32 reg_data;
  1367. do {
  1368. AT_READ_REG(hw, REG_ISR, &reg_data);
  1369. status = reg_data & hw->intr_mask;
  1370. if (status == 0 || (status & ISR_DIS_INT) != 0) {
  1371. if (max_ints != AT_MAX_INT_WORK)
  1372. handled = IRQ_HANDLED;
  1373. break;
  1374. }
  1375. /* link event */
  1376. if (status & ISR_GPHY)
  1377. atl1c_clear_phy_int(adapter);
  1378. /* Ack ISR */
  1379. AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
  1380. if (status & ISR_RX_PKT) {
  1381. if (likely(napi_schedule_prep(&adapter->napi))) {
  1382. hw->intr_mask &= ~ISR_RX_PKT;
  1383. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1384. __napi_schedule(&adapter->napi);
  1385. }
  1386. }
  1387. if (status & ISR_TX_PKT)
  1388. atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
  1389. handled = IRQ_HANDLED;
  1390. /* check if PCIE PHY Link down */
  1391. if (status & ISR_ERROR) {
  1392. if (netif_msg_hw(adapter))
  1393. dev_err(&pdev->dev,
  1394. "atl1c hardware error (status = 0x%x)\n",
  1395. status & ISR_ERROR);
  1396. /* reset MAC */
  1397. set_bit(ATL1C_WORK_EVENT_RESET, &adapter->work_event);
  1398. schedule_work(&adapter->common_task);
  1399. return IRQ_HANDLED;
  1400. }
  1401. if (status & ISR_OVER)
  1402. if (netif_msg_intr(adapter))
  1403. dev_warn(&pdev->dev,
  1404. "TX/RX overflow (status = 0x%x)\n",
  1405. status & ISR_OVER);
  1406. /* link event */
  1407. if (status & (ISR_GPHY | ISR_MANUAL)) {
  1408. netdev->stats.tx_carrier_errors++;
  1409. atl1c_link_chg_event(adapter);
  1410. break;
  1411. }
  1412. } while (--max_ints > 0);
  1413. /* re-enable Interrupt*/
  1414. AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
  1415. return handled;
  1416. }
  1417. static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
  1418. struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
  1419. {
  1420. /*
  1421. * The pid field in RRS in not correct sometimes, so we
  1422. * cannot figure out if the packet is fragmented or not,
  1423. * so we tell the KERNEL CHECKSUM_NONE
  1424. */
  1425. skb_checksum_none_assert(skb);
  1426. }
  1427. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter)
  1428. {
  1429. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1430. struct pci_dev *pdev = adapter->pdev;
  1431. struct atl1c_buffer *buffer_info, *next_info;
  1432. struct sk_buff *skb;
  1433. void *vir_addr = NULL;
  1434. u16 num_alloc = 0;
  1435. u16 rfd_next_to_use, next_next;
  1436. struct atl1c_rx_free_desc *rfd_desc;
  1437. next_next = rfd_next_to_use = rfd_ring->next_to_use;
  1438. if (++next_next == rfd_ring->count)
  1439. next_next = 0;
  1440. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1441. next_info = &rfd_ring->buffer_info[next_next];
  1442. while (next_info->flags & ATL1C_BUFFER_FREE) {
  1443. rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  1444. skb = netdev_alloc_skb(adapter->netdev, adapter->rx_buffer_len);
  1445. if (unlikely(!skb)) {
  1446. if (netif_msg_rx_err(adapter))
  1447. dev_warn(&pdev->dev, "alloc rx buffer failed\n");
  1448. break;
  1449. }
  1450. /*
  1451. * Make buffer alignment 2 beyond a 16 byte boundary
  1452. * this will result in a 16 byte aligned IP header after
  1453. * the 14 byte MAC header is removed
  1454. */
  1455. vir_addr = skb->data;
  1456. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1457. buffer_info->skb = skb;
  1458. buffer_info->length = adapter->rx_buffer_len;
  1459. buffer_info->dma = pci_map_single(pdev, vir_addr,
  1460. buffer_info->length,
  1461. PCI_DMA_FROMDEVICE);
  1462. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1463. ATL1C_PCIMAP_FROMDEVICE);
  1464. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1465. rfd_next_to_use = next_next;
  1466. if (++next_next == rfd_ring->count)
  1467. next_next = 0;
  1468. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1469. next_info = &rfd_ring->buffer_info[next_next];
  1470. num_alloc++;
  1471. }
  1472. if (num_alloc) {
  1473. /* TODO: update mailbox here */
  1474. wmb();
  1475. rfd_ring->next_to_use = rfd_next_to_use;
  1476. AT_WRITE_REG(&adapter->hw, REG_MB_RFD0_PROD_IDX,
  1477. rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
  1478. }
  1479. return num_alloc;
  1480. }
  1481. static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
  1482. struct atl1c_recv_ret_status *rrs, u16 num)
  1483. {
  1484. u16 i;
  1485. /* the relationship between rrd and rfd is one map one */
  1486. for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
  1487. rrd_ring->next_to_clean)) {
  1488. rrs->word3 &= ~RRS_RXD_UPDATED;
  1489. if (++rrd_ring->next_to_clean == rrd_ring->count)
  1490. rrd_ring->next_to_clean = 0;
  1491. }
  1492. }
  1493. static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
  1494. struct atl1c_recv_ret_status *rrs, u16 num)
  1495. {
  1496. u16 i;
  1497. u16 rfd_index;
  1498. struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
  1499. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1500. RRS_RX_RFD_INDEX_MASK;
  1501. for (i = 0; i < num; i++) {
  1502. buffer_info[rfd_index].skb = NULL;
  1503. ATL1C_SET_BUFFER_STATE(&buffer_info[rfd_index],
  1504. ATL1C_BUFFER_FREE);
  1505. if (++rfd_index == rfd_ring->count)
  1506. rfd_index = 0;
  1507. }
  1508. rfd_ring->next_to_clean = rfd_index;
  1509. }
  1510. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter,
  1511. int *work_done, int work_to_do)
  1512. {
  1513. u16 rfd_num, rfd_index;
  1514. u16 count = 0;
  1515. u16 length;
  1516. struct pci_dev *pdev = adapter->pdev;
  1517. struct net_device *netdev = adapter->netdev;
  1518. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring;
  1519. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring;
  1520. struct sk_buff *skb;
  1521. struct atl1c_recv_ret_status *rrs;
  1522. struct atl1c_buffer *buffer_info;
  1523. while (1) {
  1524. if (*work_done >= work_to_do)
  1525. break;
  1526. rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
  1527. if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
  1528. rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
  1529. RRS_RX_RFD_CNT_MASK;
  1530. if (unlikely(rfd_num != 1))
  1531. /* TODO support mul rfd*/
  1532. if (netif_msg_rx_err(adapter))
  1533. dev_warn(&pdev->dev,
  1534. "Multi rfd not support yet!\n");
  1535. goto rrs_checked;
  1536. } else {
  1537. break;
  1538. }
  1539. rrs_checked:
  1540. atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
  1541. if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
  1542. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1543. if (netif_msg_rx_err(adapter))
  1544. dev_warn(&pdev->dev,
  1545. "wrong packet! rrs word3 is %x\n",
  1546. rrs->word3);
  1547. continue;
  1548. }
  1549. length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
  1550. RRS_PKT_SIZE_MASK);
  1551. /* Good Receive */
  1552. if (likely(rfd_num == 1)) {
  1553. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1554. RRS_RX_RFD_INDEX_MASK;
  1555. buffer_info = &rfd_ring->buffer_info[rfd_index];
  1556. pci_unmap_single(pdev, buffer_info->dma,
  1557. buffer_info->length, PCI_DMA_FROMDEVICE);
  1558. skb = buffer_info->skb;
  1559. } else {
  1560. /* TODO */
  1561. if (netif_msg_rx_err(adapter))
  1562. dev_warn(&pdev->dev,
  1563. "Multi rfd not support yet!\n");
  1564. break;
  1565. }
  1566. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1567. skb_put(skb, length - ETH_FCS_LEN);
  1568. skb->protocol = eth_type_trans(skb, netdev);
  1569. atl1c_rx_checksum(adapter, skb, rrs);
  1570. if (rrs->word3 & RRS_VLAN_INS) {
  1571. u16 vlan;
  1572. AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
  1573. vlan = le16_to_cpu(vlan);
  1574. __vlan_hwaccel_put_tag(skb, vlan);
  1575. }
  1576. netif_receive_skb(skb);
  1577. (*work_done)++;
  1578. count++;
  1579. }
  1580. if (count)
  1581. atl1c_alloc_rx_buffer(adapter);
  1582. }
  1583. /**
  1584. * atl1c_clean - NAPI Rx polling callback
  1585. */
  1586. static int atl1c_clean(struct napi_struct *napi, int budget)
  1587. {
  1588. struct atl1c_adapter *adapter =
  1589. container_of(napi, struct atl1c_adapter, napi);
  1590. int work_done = 0;
  1591. /* Keep link state information with original netdev */
  1592. if (!netif_carrier_ok(adapter->netdev))
  1593. goto quit_polling;
  1594. /* just enable one RXQ */
  1595. atl1c_clean_rx_irq(adapter, &work_done, budget);
  1596. if (work_done < budget) {
  1597. quit_polling:
  1598. napi_complete(napi);
  1599. adapter->hw.intr_mask |= ISR_RX_PKT;
  1600. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  1601. }
  1602. return work_done;
  1603. }
  1604. #ifdef CONFIG_NET_POLL_CONTROLLER
  1605. /*
  1606. * Polling 'interrupt' - used by things like netconsole to send skbs
  1607. * without having to re-enable interrupts. It's not called while
  1608. * the interrupt routine is executing.
  1609. */
  1610. static void atl1c_netpoll(struct net_device *netdev)
  1611. {
  1612. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1613. disable_irq(adapter->pdev->irq);
  1614. atl1c_intr(adapter->pdev->irq, netdev);
  1615. enable_irq(adapter->pdev->irq);
  1616. }
  1617. #endif
  1618. static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
  1619. {
  1620. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1621. u16 next_to_use = 0;
  1622. u16 next_to_clean = 0;
  1623. next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1624. next_to_use = tpd_ring->next_to_use;
  1625. return (u16)(next_to_clean > next_to_use) ?
  1626. (next_to_clean - next_to_use - 1) :
  1627. (tpd_ring->count + next_to_clean - next_to_use - 1);
  1628. }
  1629. /*
  1630. * get next usable tpd
  1631. * Note: should call atl1c_tdp_avail to make sure
  1632. * there is enough tpd to use
  1633. */
  1634. static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
  1635. enum atl1c_trans_queue type)
  1636. {
  1637. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1638. struct atl1c_tpd_desc *tpd_desc;
  1639. u16 next_to_use = 0;
  1640. next_to_use = tpd_ring->next_to_use;
  1641. if (++tpd_ring->next_to_use == tpd_ring->count)
  1642. tpd_ring->next_to_use = 0;
  1643. tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
  1644. memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
  1645. return tpd_desc;
  1646. }
  1647. static struct atl1c_buffer *
  1648. atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
  1649. {
  1650. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  1651. return &tpd_ring->buffer_info[tpd -
  1652. (struct atl1c_tpd_desc *)tpd_ring->desc];
  1653. }
  1654. /* Calculate the transmit packet descript needed*/
  1655. static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
  1656. {
  1657. u16 tpd_req;
  1658. u16 proto_hdr_len = 0;
  1659. tpd_req = skb_shinfo(skb)->nr_frags + 1;
  1660. if (skb_is_gso(skb)) {
  1661. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1662. if (proto_hdr_len < skb_headlen(skb))
  1663. tpd_req++;
  1664. if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
  1665. tpd_req++;
  1666. }
  1667. return tpd_req;
  1668. }
  1669. static int atl1c_tso_csum(struct atl1c_adapter *adapter,
  1670. struct sk_buff *skb,
  1671. struct atl1c_tpd_desc **tpd,
  1672. enum atl1c_trans_queue type)
  1673. {
  1674. struct pci_dev *pdev = adapter->pdev;
  1675. u8 hdr_len;
  1676. u32 real_len;
  1677. unsigned short offload_type;
  1678. int err;
  1679. if (skb_is_gso(skb)) {
  1680. if (skb_header_cloned(skb)) {
  1681. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1682. if (unlikely(err))
  1683. return -1;
  1684. }
  1685. offload_type = skb_shinfo(skb)->gso_type;
  1686. if (offload_type & SKB_GSO_TCPV4) {
  1687. real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
  1688. + ntohs(ip_hdr(skb)->tot_len));
  1689. if (real_len < skb->len)
  1690. pskb_trim(skb, real_len);
  1691. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1692. if (unlikely(skb->len == hdr_len)) {
  1693. /* only xsum need */
  1694. if (netif_msg_tx_queued(adapter))
  1695. dev_warn(&pdev->dev,
  1696. "IPV4 tso with zero data??\n");
  1697. goto check_sum;
  1698. } else {
  1699. ip_hdr(skb)->check = 0;
  1700. tcp_hdr(skb)->check = ~csum_tcpudp_magic(
  1701. ip_hdr(skb)->saddr,
  1702. ip_hdr(skb)->daddr,
  1703. 0, IPPROTO_TCP, 0);
  1704. (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
  1705. }
  1706. }
  1707. if (offload_type & SKB_GSO_TCPV6) {
  1708. struct atl1c_tpd_ext_desc *etpd =
  1709. *(struct atl1c_tpd_ext_desc **)(tpd);
  1710. memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
  1711. *tpd = atl1c_get_tpd(adapter, type);
  1712. ipv6_hdr(skb)->payload_len = 0;
  1713. /* check payload == 0 byte ? */
  1714. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1715. if (unlikely(skb->len == hdr_len)) {
  1716. /* only xsum need */
  1717. if (netif_msg_tx_queued(adapter))
  1718. dev_warn(&pdev->dev,
  1719. "IPV6 tso with zero data??\n");
  1720. goto check_sum;
  1721. } else
  1722. tcp_hdr(skb)->check = ~csum_ipv6_magic(
  1723. &ipv6_hdr(skb)->saddr,
  1724. &ipv6_hdr(skb)->daddr,
  1725. 0, IPPROTO_TCP, 0);
  1726. etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1727. etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1728. etpd->pkt_len = cpu_to_le32(skb->len);
  1729. (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1730. }
  1731. (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1732. (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
  1733. TPD_TCPHDR_OFFSET_SHIFT;
  1734. (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
  1735. TPD_MSS_SHIFT;
  1736. return 0;
  1737. }
  1738. check_sum:
  1739. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1740. u8 css, cso;
  1741. cso = skb_checksum_start_offset(skb);
  1742. if (unlikely(cso & 0x1)) {
  1743. if (netif_msg_tx_err(adapter))
  1744. dev_err(&adapter->pdev->dev,
  1745. "payload offset should not an event number\n");
  1746. return -1;
  1747. } else {
  1748. css = cso + skb->csum_offset;
  1749. (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
  1750. TPD_PLOADOFFSET_SHIFT;
  1751. (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
  1752. TPD_CCSUM_OFFSET_SHIFT;
  1753. (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
  1754. }
  1755. }
  1756. return 0;
  1757. }
  1758. static void atl1c_tx_map(struct atl1c_adapter *adapter,
  1759. struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
  1760. enum atl1c_trans_queue type)
  1761. {
  1762. struct atl1c_tpd_desc *use_tpd = NULL;
  1763. struct atl1c_buffer *buffer_info = NULL;
  1764. u16 buf_len = skb_headlen(skb);
  1765. u16 map_len = 0;
  1766. u16 mapped_len = 0;
  1767. u16 hdr_len = 0;
  1768. u16 nr_frags;
  1769. u16 f;
  1770. int tso;
  1771. nr_frags = skb_shinfo(skb)->nr_frags;
  1772. tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
  1773. if (tso) {
  1774. /* TSO */
  1775. map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1776. use_tpd = tpd;
  1777. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1778. buffer_info->length = map_len;
  1779. buffer_info->dma = pci_map_single(adapter->pdev,
  1780. skb->data, hdr_len, PCI_DMA_TODEVICE);
  1781. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1782. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1783. ATL1C_PCIMAP_TODEVICE);
  1784. mapped_len += map_len;
  1785. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1786. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1787. }
  1788. if (mapped_len < buf_len) {
  1789. /* mapped_len == 0, means we should use the first tpd,
  1790. which is given by caller */
  1791. if (mapped_len == 0)
  1792. use_tpd = tpd;
  1793. else {
  1794. use_tpd = atl1c_get_tpd(adapter, type);
  1795. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1796. }
  1797. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1798. buffer_info->length = buf_len - mapped_len;
  1799. buffer_info->dma =
  1800. pci_map_single(adapter->pdev, skb->data + mapped_len,
  1801. buffer_info->length, PCI_DMA_TODEVICE);
  1802. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1803. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_SINGLE,
  1804. ATL1C_PCIMAP_TODEVICE);
  1805. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1806. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1807. }
  1808. for (f = 0; f < nr_frags; f++) {
  1809. struct skb_frag_struct *frag;
  1810. frag = &skb_shinfo(skb)->frags[f];
  1811. use_tpd = atl1c_get_tpd(adapter, type);
  1812. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1813. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1814. buffer_info->length = skb_frag_size(frag);
  1815. buffer_info->dma = skb_frag_dma_map(&adapter->pdev->dev,
  1816. frag, 0,
  1817. buffer_info->length,
  1818. DMA_TO_DEVICE);
  1819. ATL1C_SET_BUFFER_STATE(buffer_info, ATL1C_BUFFER_BUSY);
  1820. ATL1C_SET_PCIMAP_TYPE(buffer_info, ATL1C_PCIMAP_PAGE,
  1821. ATL1C_PCIMAP_TODEVICE);
  1822. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1823. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1824. }
  1825. /* The last tpd */
  1826. use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
  1827. /* The last buffer info contain the skb address,
  1828. so it will be free after unmap */
  1829. buffer_info->skb = skb;
  1830. }
  1831. static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
  1832. struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
  1833. {
  1834. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1835. u16 reg;
  1836. reg = type == atl1c_trans_high ? REG_TPD_PRI1_PIDX : REG_TPD_PRI0_PIDX;
  1837. AT_WRITE_REGW(&adapter->hw, reg, tpd_ring->next_to_use);
  1838. }
  1839. static netdev_tx_t atl1c_xmit_frame(struct sk_buff *skb,
  1840. struct net_device *netdev)
  1841. {
  1842. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1843. unsigned long flags;
  1844. u16 tpd_req = 1;
  1845. struct atl1c_tpd_desc *tpd;
  1846. enum atl1c_trans_queue type = atl1c_trans_normal;
  1847. if (test_bit(__AT_DOWN, &adapter->flags)) {
  1848. dev_kfree_skb_any(skb);
  1849. return NETDEV_TX_OK;
  1850. }
  1851. tpd_req = atl1c_cal_tpd_req(skb);
  1852. if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
  1853. if (netif_msg_pktdata(adapter))
  1854. dev_info(&adapter->pdev->dev, "tx locked\n");
  1855. return NETDEV_TX_LOCKED;
  1856. }
  1857. if (atl1c_tpd_avail(adapter, type) < tpd_req) {
  1858. /* no enough descriptor, just stop queue */
  1859. netif_stop_queue(netdev);
  1860. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1861. return NETDEV_TX_BUSY;
  1862. }
  1863. tpd = atl1c_get_tpd(adapter, type);
  1864. /* do TSO and check sum */
  1865. if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
  1866. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1867. dev_kfree_skb_any(skb);
  1868. return NETDEV_TX_OK;
  1869. }
  1870. if (unlikely(vlan_tx_tag_present(skb))) {
  1871. u16 vlan = vlan_tx_tag_get(skb);
  1872. __le16 tag;
  1873. vlan = cpu_to_le16(vlan);
  1874. AT_VLAN_TO_TAG(vlan, tag);
  1875. tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
  1876. tpd->vlan_tag = tag;
  1877. }
  1878. if (skb_network_offset(skb) != ETH_HLEN)
  1879. tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
  1880. atl1c_tx_map(adapter, skb, tpd, type);
  1881. atl1c_tx_queue(adapter, skb, tpd, type);
  1882. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1883. return NETDEV_TX_OK;
  1884. }
  1885. static void atl1c_free_irq(struct atl1c_adapter *adapter)
  1886. {
  1887. struct net_device *netdev = adapter->netdev;
  1888. free_irq(adapter->pdev->irq, netdev);
  1889. if (adapter->have_msi)
  1890. pci_disable_msi(adapter->pdev);
  1891. }
  1892. static int atl1c_request_irq(struct atl1c_adapter *adapter)
  1893. {
  1894. struct pci_dev *pdev = adapter->pdev;
  1895. struct net_device *netdev = adapter->netdev;
  1896. int flags = 0;
  1897. int err = 0;
  1898. adapter->have_msi = true;
  1899. err = pci_enable_msi(adapter->pdev);
  1900. if (err) {
  1901. if (netif_msg_ifup(adapter))
  1902. dev_err(&pdev->dev,
  1903. "Unable to allocate MSI interrupt Error: %d\n",
  1904. err);
  1905. adapter->have_msi = false;
  1906. }
  1907. if (!adapter->have_msi)
  1908. flags |= IRQF_SHARED;
  1909. err = request_irq(adapter->pdev->irq, atl1c_intr, flags,
  1910. netdev->name, netdev);
  1911. if (err) {
  1912. if (netif_msg_ifup(adapter))
  1913. dev_err(&pdev->dev,
  1914. "Unable to allocate interrupt Error: %d\n",
  1915. err);
  1916. if (adapter->have_msi)
  1917. pci_disable_msi(adapter->pdev);
  1918. return err;
  1919. }
  1920. if (netif_msg_ifup(adapter))
  1921. dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
  1922. return err;
  1923. }
  1924. static void atl1c_reset_dma_ring(struct atl1c_adapter *adapter)
  1925. {
  1926. /* release tx-pending skbs and reset tx/rx ring index */
  1927. atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
  1928. atl1c_clean_tx_ring(adapter, atl1c_trans_high);
  1929. atl1c_clean_rx_ring(adapter);
  1930. }
  1931. static int atl1c_up(struct atl1c_adapter *adapter)
  1932. {
  1933. struct net_device *netdev = adapter->netdev;
  1934. int err;
  1935. netif_carrier_off(netdev);
  1936. err = atl1c_configure(adapter);
  1937. if (unlikely(err))
  1938. goto err_up;
  1939. err = atl1c_request_irq(adapter);
  1940. if (unlikely(err))
  1941. goto err_up;
  1942. atl1c_check_link_status(adapter);
  1943. clear_bit(__AT_DOWN, &adapter->flags);
  1944. napi_enable(&adapter->napi);
  1945. atl1c_irq_enable(adapter);
  1946. netif_start_queue(netdev);
  1947. return err;
  1948. err_up:
  1949. atl1c_clean_rx_ring(adapter);
  1950. return err;
  1951. }
  1952. static void atl1c_down(struct atl1c_adapter *adapter)
  1953. {
  1954. struct net_device *netdev = adapter->netdev;
  1955. atl1c_del_timer(adapter);
  1956. adapter->work_event = 0; /* clear all event */
  1957. /* signal that we're down so the interrupt handler does not
  1958. * reschedule our watchdog timer */
  1959. set_bit(__AT_DOWN, &adapter->flags);
  1960. netif_carrier_off(netdev);
  1961. napi_disable(&adapter->napi);
  1962. atl1c_irq_disable(adapter);
  1963. atl1c_free_irq(adapter);
  1964. /* disable ASPM if device inactive */
  1965. atl1c_disable_l0s_l1(&adapter->hw);
  1966. /* reset MAC to disable all RX/TX */
  1967. atl1c_reset_mac(&adapter->hw);
  1968. msleep(1);
  1969. adapter->link_speed = SPEED_0;
  1970. adapter->link_duplex = -1;
  1971. atl1c_reset_dma_ring(adapter);
  1972. }
  1973. /**
  1974. * atl1c_open - Called when a network interface is made active
  1975. * @netdev: network interface device structure
  1976. *
  1977. * Returns 0 on success, negative value on failure
  1978. *
  1979. * The open entry point is called when a network interface is made
  1980. * active by the system (IFF_UP). At this point all resources needed
  1981. * for transmit and receive operations are allocated, the interrupt
  1982. * handler is registered with the OS, the watchdog timer is started,
  1983. * and the stack is notified that the interface is ready.
  1984. */
  1985. static int atl1c_open(struct net_device *netdev)
  1986. {
  1987. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1988. int err;
  1989. /* disallow open during test */
  1990. if (test_bit(__AT_TESTING, &adapter->flags))
  1991. return -EBUSY;
  1992. /* allocate rx/tx dma buffer & descriptors */
  1993. err = atl1c_setup_ring_resources(adapter);
  1994. if (unlikely(err))
  1995. return err;
  1996. err = atl1c_up(adapter);
  1997. if (unlikely(err))
  1998. goto err_up;
  1999. return 0;
  2000. err_up:
  2001. atl1c_free_irq(adapter);
  2002. atl1c_free_ring_resources(adapter);
  2003. atl1c_reset_mac(&adapter->hw);
  2004. return err;
  2005. }
  2006. /**
  2007. * atl1c_close - Disables a network interface
  2008. * @netdev: network interface device structure
  2009. *
  2010. * Returns 0, this is not allowed to fail
  2011. *
  2012. * The close entry point is called when an interface is de-activated
  2013. * by the OS. The hardware is still under the drivers control, but
  2014. * needs to be disabled. A global MAC reset is issued to stop the
  2015. * hardware, and all transmit and receive resources are freed.
  2016. */
  2017. static int atl1c_close(struct net_device *netdev)
  2018. {
  2019. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2020. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2021. set_bit(__AT_DOWN, &adapter->flags);
  2022. cancel_work_sync(&adapter->common_task);
  2023. atl1c_down(adapter);
  2024. atl1c_free_ring_resources(adapter);
  2025. return 0;
  2026. }
  2027. static int atl1c_suspend(struct device *dev)
  2028. {
  2029. struct pci_dev *pdev = to_pci_dev(dev);
  2030. struct net_device *netdev = pci_get_drvdata(pdev);
  2031. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2032. struct atl1c_hw *hw = &adapter->hw;
  2033. u32 wufc = adapter->wol;
  2034. atl1c_disable_l0s_l1(hw);
  2035. if (netif_running(netdev)) {
  2036. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2037. atl1c_down(adapter);
  2038. }
  2039. netif_device_detach(netdev);
  2040. if (wufc)
  2041. if (atl1c_phy_to_ps_link(hw) != 0)
  2042. dev_dbg(&pdev->dev, "phy power saving failed");
  2043. atl1c_power_saving(hw, wufc);
  2044. return 0;
  2045. }
  2046. #ifdef CONFIG_PM_SLEEP
  2047. static int atl1c_resume(struct device *dev)
  2048. {
  2049. struct pci_dev *pdev = to_pci_dev(dev);
  2050. struct net_device *netdev = pci_get_drvdata(pdev);
  2051. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2052. AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
  2053. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2054. atl1c_phy_reset(&adapter->hw);
  2055. atl1c_reset_mac(&adapter->hw);
  2056. atl1c_phy_init(&adapter->hw);
  2057. #if 0
  2058. AT_READ_REG(&adapter->hw, REG_PM_CTRLSTAT, &pm_data);
  2059. pm_data &= ~PM_CTRLSTAT_PME_EN;
  2060. AT_WRITE_REG(&adapter->hw, REG_PM_CTRLSTAT, pm_data);
  2061. #endif
  2062. netif_device_attach(netdev);
  2063. if (netif_running(netdev))
  2064. atl1c_up(adapter);
  2065. return 0;
  2066. }
  2067. #endif
  2068. static void atl1c_shutdown(struct pci_dev *pdev)
  2069. {
  2070. struct net_device *netdev = pci_get_drvdata(pdev);
  2071. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2072. atl1c_suspend(&pdev->dev);
  2073. pci_wake_from_d3(pdev, adapter->wol);
  2074. pci_set_power_state(pdev, PCI_D3hot);
  2075. }
  2076. static const struct net_device_ops atl1c_netdev_ops = {
  2077. .ndo_open = atl1c_open,
  2078. .ndo_stop = atl1c_close,
  2079. .ndo_validate_addr = eth_validate_addr,
  2080. .ndo_start_xmit = atl1c_xmit_frame,
  2081. .ndo_set_mac_address = atl1c_set_mac_addr,
  2082. .ndo_set_rx_mode = atl1c_set_multi,
  2083. .ndo_change_mtu = atl1c_change_mtu,
  2084. .ndo_fix_features = atl1c_fix_features,
  2085. .ndo_set_features = atl1c_set_features,
  2086. .ndo_do_ioctl = atl1c_ioctl,
  2087. .ndo_tx_timeout = atl1c_tx_timeout,
  2088. .ndo_get_stats = atl1c_get_stats,
  2089. #ifdef CONFIG_NET_POLL_CONTROLLER
  2090. .ndo_poll_controller = atl1c_netpoll,
  2091. #endif
  2092. };
  2093. static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
  2094. {
  2095. SET_NETDEV_DEV(netdev, &pdev->dev);
  2096. pci_set_drvdata(pdev, netdev);
  2097. netdev->netdev_ops = &atl1c_netdev_ops;
  2098. netdev->watchdog_timeo = AT_TX_WATCHDOG;
  2099. atl1c_set_ethtool_ops(netdev);
  2100. /* TODO: add when ready */
  2101. netdev->hw_features = NETIF_F_SG |
  2102. NETIF_F_HW_CSUM |
  2103. NETIF_F_HW_VLAN_RX |
  2104. NETIF_F_TSO |
  2105. NETIF_F_TSO6;
  2106. netdev->features = netdev->hw_features |
  2107. NETIF_F_HW_VLAN_TX;
  2108. return 0;
  2109. }
  2110. /**
  2111. * atl1c_probe - Device Initialization Routine
  2112. * @pdev: PCI device information struct
  2113. * @ent: entry in atl1c_pci_tbl
  2114. *
  2115. * Returns 0 on success, negative on failure
  2116. *
  2117. * atl1c_probe initializes an adapter identified by a pci_dev structure.
  2118. * The OS initialization, configuring of the adapter private structure,
  2119. * and a hardware reset occur.
  2120. */
  2121. static int __devinit atl1c_probe(struct pci_dev *pdev,
  2122. const struct pci_device_id *ent)
  2123. {
  2124. struct net_device *netdev;
  2125. struct atl1c_adapter *adapter;
  2126. static int cards_found;
  2127. int err = 0;
  2128. /* enable device (incl. PCI PM wakeup and hotplug setup) */
  2129. err = pci_enable_device_mem(pdev);
  2130. if (err) {
  2131. dev_err(&pdev->dev, "cannot enable PCI device\n");
  2132. return err;
  2133. }
  2134. /*
  2135. * The atl1c chip can DMA to 64-bit addresses, but it uses a single
  2136. * shared register for the high 32 bits, so only a single, aligned,
  2137. * 4 GB physical address range can be used at a time.
  2138. *
  2139. * Supporting 64-bit DMA on this hardware is more trouble than it's
  2140. * worth. It is far easier to limit to 32-bit DMA than update
  2141. * various kernel subsystems to support the mechanics required by a
  2142. * fixed-high-32-bit system.
  2143. */
  2144. if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
  2145. (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
  2146. dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
  2147. goto err_dma;
  2148. }
  2149. err = pci_request_regions(pdev, atl1c_driver_name);
  2150. if (err) {
  2151. dev_err(&pdev->dev, "cannot obtain PCI resources\n");
  2152. goto err_pci_reg;
  2153. }
  2154. pci_set_master(pdev);
  2155. netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
  2156. if (netdev == NULL) {
  2157. err = -ENOMEM;
  2158. goto err_alloc_etherdev;
  2159. }
  2160. err = atl1c_init_netdev(netdev, pdev);
  2161. if (err) {
  2162. dev_err(&pdev->dev, "init netdevice failed\n");
  2163. goto err_init_netdev;
  2164. }
  2165. adapter = netdev_priv(netdev);
  2166. adapter->bd_number = cards_found;
  2167. adapter->netdev = netdev;
  2168. adapter->pdev = pdev;
  2169. adapter->hw.adapter = adapter;
  2170. adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
  2171. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  2172. if (!adapter->hw.hw_addr) {
  2173. err = -EIO;
  2174. dev_err(&pdev->dev, "cannot map device registers\n");
  2175. goto err_ioremap;
  2176. }
  2177. /* init mii data */
  2178. adapter->mii.dev = netdev;
  2179. adapter->mii.mdio_read = atl1c_mdio_read;
  2180. adapter->mii.mdio_write = atl1c_mdio_write;
  2181. adapter->mii.phy_id_mask = 0x1f;
  2182. adapter->mii.reg_num_mask = MDIO_CTRL_REG_MASK;
  2183. netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
  2184. setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
  2185. (unsigned long)adapter);
  2186. /* setup the private structure */
  2187. err = atl1c_sw_init(adapter);
  2188. if (err) {
  2189. dev_err(&pdev->dev, "net device private data init failed\n");
  2190. goto err_sw_init;
  2191. }
  2192. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE);
  2193. /* Init GPHY as early as possible due to power saving issue */
  2194. atl1c_phy_reset(&adapter->hw);
  2195. err = atl1c_reset_mac(&adapter->hw);
  2196. if (err) {
  2197. err = -EIO;
  2198. goto err_reset;
  2199. }
  2200. /* reset the controller to
  2201. * put the device in a known good starting state */
  2202. err = atl1c_phy_init(&adapter->hw);
  2203. if (err) {
  2204. err = -EIO;
  2205. goto err_reset;
  2206. }
  2207. if (atl1c_read_mac_addr(&adapter->hw)) {
  2208. /* got a random MAC address, set NET_ADDR_RANDOM to netdev */
  2209. netdev->addr_assign_type |= NET_ADDR_RANDOM;
  2210. }
  2211. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2212. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  2213. if (netif_msg_probe(adapter))
  2214. dev_dbg(&pdev->dev, "mac address : %pM\n",
  2215. adapter->hw.mac_addr);
  2216. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.mac_addr);
  2217. INIT_WORK(&adapter->common_task, atl1c_common_task);
  2218. adapter->work_event = 0;
  2219. err = register_netdev(netdev);
  2220. if (err) {
  2221. dev_err(&pdev->dev, "register netdevice failed\n");
  2222. goto err_register;
  2223. }
  2224. if (netif_msg_probe(adapter))
  2225. dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
  2226. cards_found++;
  2227. return 0;
  2228. err_reset:
  2229. err_register:
  2230. err_sw_init:
  2231. iounmap(adapter->hw.hw_addr);
  2232. err_init_netdev:
  2233. err_ioremap:
  2234. free_netdev(netdev);
  2235. err_alloc_etherdev:
  2236. pci_release_regions(pdev);
  2237. err_pci_reg:
  2238. err_dma:
  2239. pci_disable_device(pdev);
  2240. return err;
  2241. }
  2242. /**
  2243. * atl1c_remove - Device Removal Routine
  2244. * @pdev: PCI device information struct
  2245. *
  2246. * atl1c_remove is called by the PCI subsystem to alert the driver
  2247. * that it should release a PCI device. The could be caused by a
  2248. * Hot-Plug event, or because the driver is going to be removed from
  2249. * memory.
  2250. */
  2251. static void __devexit atl1c_remove(struct pci_dev *pdev)
  2252. {
  2253. struct net_device *netdev = pci_get_drvdata(pdev);
  2254. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2255. unregister_netdev(netdev);
  2256. /* restore permanent address */
  2257. atl1c_hw_set_mac_addr(&adapter->hw, adapter->hw.perm_mac_addr);
  2258. atl1c_phy_disable(&adapter->hw);
  2259. iounmap(adapter->hw.hw_addr);
  2260. pci_release_regions(pdev);
  2261. pci_disable_device(pdev);
  2262. free_netdev(netdev);
  2263. }
  2264. /**
  2265. * atl1c_io_error_detected - called when PCI error is detected
  2266. * @pdev: Pointer to PCI device
  2267. * @state: The current pci connection state
  2268. *
  2269. * This function is called after a PCI bus error affecting
  2270. * this device has been detected.
  2271. */
  2272. static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
  2273. pci_channel_state_t state)
  2274. {
  2275. struct net_device *netdev = pci_get_drvdata(pdev);
  2276. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2277. netif_device_detach(netdev);
  2278. if (state == pci_channel_io_perm_failure)
  2279. return PCI_ERS_RESULT_DISCONNECT;
  2280. if (netif_running(netdev))
  2281. atl1c_down(adapter);
  2282. pci_disable_device(pdev);
  2283. /* Request a slot slot reset. */
  2284. return PCI_ERS_RESULT_NEED_RESET;
  2285. }
  2286. /**
  2287. * atl1c_io_slot_reset - called after the pci bus has been reset.
  2288. * @pdev: Pointer to PCI device
  2289. *
  2290. * Restart the card from scratch, as if from a cold-boot. Implementation
  2291. * resembles the first-half of the e1000_resume routine.
  2292. */
  2293. static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
  2294. {
  2295. struct net_device *netdev = pci_get_drvdata(pdev);
  2296. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2297. if (pci_enable_device(pdev)) {
  2298. if (netif_msg_hw(adapter))
  2299. dev_err(&pdev->dev,
  2300. "Cannot re-enable PCI device after reset\n");
  2301. return PCI_ERS_RESULT_DISCONNECT;
  2302. }
  2303. pci_set_master(pdev);
  2304. pci_enable_wake(pdev, PCI_D3hot, 0);
  2305. pci_enable_wake(pdev, PCI_D3cold, 0);
  2306. atl1c_reset_mac(&adapter->hw);
  2307. return PCI_ERS_RESULT_RECOVERED;
  2308. }
  2309. /**
  2310. * atl1c_io_resume - called when traffic can start flowing again.
  2311. * @pdev: Pointer to PCI device
  2312. *
  2313. * This callback is called when the error recovery driver tells us that
  2314. * its OK to resume normal operation. Implementation resembles the
  2315. * second-half of the atl1c_resume routine.
  2316. */
  2317. static void atl1c_io_resume(struct pci_dev *pdev)
  2318. {
  2319. struct net_device *netdev = pci_get_drvdata(pdev);
  2320. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2321. if (netif_running(netdev)) {
  2322. if (atl1c_up(adapter)) {
  2323. if (netif_msg_hw(adapter))
  2324. dev_err(&pdev->dev,
  2325. "Cannot bring device back up after reset\n");
  2326. return;
  2327. }
  2328. }
  2329. netif_device_attach(netdev);
  2330. }
  2331. static struct pci_error_handlers atl1c_err_handler = {
  2332. .error_detected = atl1c_io_error_detected,
  2333. .slot_reset = atl1c_io_slot_reset,
  2334. .resume = atl1c_io_resume,
  2335. };
  2336. static SIMPLE_DEV_PM_OPS(atl1c_pm_ops, atl1c_suspend, atl1c_resume);
  2337. static struct pci_driver atl1c_driver = {
  2338. .name = atl1c_driver_name,
  2339. .id_table = atl1c_pci_tbl,
  2340. .probe = atl1c_probe,
  2341. .remove = __devexit_p(atl1c_remove),
  2342. .shutdown = atl1c_shutdown,
  2343. .err_handler = &atl1c_err_handler,
  2344. .driver.pm = &atl1c_pm_ops,
  2345. };
  2346. /**
  2347. * atl1c_init_module - Driver Registration Routine
  2348. *
  2349. * atl1c_init_module is the first routine called when the driver is
  2350. * loaded. All it does is register with the PCI subsystem.
  2351. */
  2352. static int __init atl1c_init_module(void)
  2353. {
  2354. return pci_register_driver(&atl1c_driver);
  2355. }
  2356. /**
  2357. * atl1c_exit_module - Driver Exit Cleanup Routine
  2358. *
  2359. * atl1c_exit_module is called just before the driver is removed
  2360. * from memory.
  2361. */
  2362. static void __exit atl1c_exit_module(void)
  2363. {
  2364. pci_unregister_driver(&atl1c_driver);
  2365. }
  2366. module_init(atl1c_init_module);
  2367. module_exit(atl1c_exit_module);