timers.c 4.8 KB

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  1. /***************************************************************************/
  2. /*
  3. * timers.c -- generic ColdFire hardware timer support.
  4. *
  5. * Copyright (C) 1999-2008, Greg Ungerer <gerg@snapgear.com>
  6. */
  7. /***************************************************************************/
  8. #include <linux/kernel.h>
  9. #include <linux/init.h>
  10. #include <linux/sched.h>
  11. #include <linux/interrupt.h>
  12. #include <linux/irq.h>
  13. #include <linux/profile.h>
  14. #include <linux/clocksource.h>
  15. #include <asm/io.h>
  16. #include <asm/traps.h>
  17. #include <asm/machdep.h>
  18. #include <asm/coldfire.h>
  19. #include <asm/mcftimer.h>
  20. #include <asm/mcfsim.h>
  21. /***************************************************************************/
  22. /*
  23. * By default use timer1 as the system clock timer.
  24. */
  25. #define FREQ (MCF_BUSCLK / 16)
  26. #define TA(a) (MCF_MBAR + MCFTIMER_BASE1 + (a))
  27. /*
  28. * These provide the underlying interrupt vector support.
  29. * Unfortunately it is a little different on each ColdFire.
  30. */
  31. extern void mcf_settimericr(int timer, int level);
  32. void coldfire_profile_init(void);
  33. #if defined(CONFIG_M532x)
  34. #define __raw_readtrr __raw_readl
  35. #define __raw_writetrr __raw_writel
  36. #else
  37. #define __raw_readtrr __raw_readw
  38. #define __raw_writetrr __raw_writew
  39. #endif
  40. static u32 mcftmr_cycles_per_jiffy;
  41. static u32 mcftmr_cnt;
  42. /***************************************************************************/
  43. static irqreturn_t mcftmr_tick(int irq, void *dummy)
  44. {
  45. /* Reset the ColdFire timer */
  46. __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
  47. mcftmr_cnt += mcftmr_cycles_per_jiffy;
  48. return arch_timer_interrupt(irq, dummy);
  49. }
  50. /***************************************************************************/
  51. static struct irqaction mcftmr_timer_irq = {
  52. .name = "timer",
  53. .flags = IRQF_DISABLED | IRQF_TIMER,
  54. .handler = mcftmr_tick,
  55. };
  56. /***************************************************************************/
  57. static cycle_t mcftmr_read_clk(struct clocksource *cs)
  58. {
  59. unsigned long flags;
  60. u32 cycles;
  61. u16 tcn;
  62. local_irq_save(flags);
  63. tcn = __raw_readw(TA(MCFTIMER_TCN));
  64. cycles = mcftmr_cnt;
  65. local_irq_restore(flags);
  66. return cycles + tcn;
  67. }
  68. /***************************************************************************/
  69. static struct clocksource mcftmr_clk = {
  70. .name = "tmr",
  71. .rating = 250,
  72. .read = mcftmr_read_clk,
  73. .shift = 20,
  74. .mask = CLOCKSOURCE_MASK(32),
  75. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  76. };
  77. /***************************************************************************/
  78. void hw_timer_init(void)
  79. {
  80. setup_irq(MCF_IRQ_TIMER, &mcftmr_timer_irq);
  81. __raw_writew(MCFTIMER_TMR_DISABLE, TA(MCFTIMER_TMR));
  82. mcftmr_cycles_per_jiffy = FREQ / HZ;
  83. /*
  84. * The coldfire timer runs from 0 to TRR included, then 0
  85. * again and so on. It counts thus actually TRR + 1 steps
  86. * for 1 tick, not TRR. So if you want n cycles,
  87. * initialize TRR with n - 1.
  88. */
  89. __raw_writetrr(mcftmr_cycles_per_jiffy - 1, TA(MCFTIMER_TRR));
  90. __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
  91. MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, TA(MCFTIMER_TMR));
  92. mcftmr_clk.mult = clocksource_hz2mult(FREQ, mcftmr_clk.shift);
  93. clocksource_register(&mcftmr_clk);
  94. mcf_clrimr(MCFINTC_TIMER1);
  95. #ifdef CONFIG_HIGHPROFILE
  96. coldfire_profile_init();
  97. #endif
  98. }
  99. /***************************************************************************/
  100. #ifdef CONFIG_HIGHPROFILE
  101. /***************************************************************************/
  102. /*
  103. * By default use timer2 as the profiler clock timer.
  104. */
  105. #define PA(a) (MCF_MBAR + MCFTIMER_BASE2 + (a))
  106. /*
  107. * Choose a reasonably fast profile timer. Make it an odd value to
  108. * try and get good coverage of kernel operations.
  109. */
  110. #define PROFILEHZ 1013
  111. /*
  112. * Use the other timer to provide high accuracy profiling info.
  113. */
  114. irqreturn_t coldfire_profile_tick(int irq, void *dummy)
  115. {
  116. /* Reset ColdFire timer2 */
  117. __raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, PA(MCFTIMER_TER));
  118. if (current->pid)
  119. profile_tick(CPU_PROFILING);
  120. return IRQ_HANDLED;
  121. }
  122. /***************************************************************************/
  123. static struct irqaction coldfire_profile_irq = {
  124. .name = "profile timer",
  125. .flags = IRQF_DISABLED | IRQF_TIMER,
  126. .handler = coldfire_profile_tick,
  127. };
  128. void coldfire_profile_init(void)
  129. {
  130. printk(KERN_INFO "PROFILE: lodging TIMER2 @ %dHz as profile timer\n",
  131. PROFILEHZ);
  132. setup_irq(MCF_IRQ_PROFILER, &coldfire_profile_irq);
  133. /* Set up TIMER 2 as high speed profile clock */
  134. __raw_writew(MCFTIMER_TMR_DISABLE, PA(MCFTIMER_TMR));
  135. __raw_writetrr(((MCF_BUSCLK / 16) / PROFILEHZ), PA(MCFTIMER_TRR));
  136. __raw_writew(MCFTIMER_TMR_ENORI | MCFTIMER_TMR_CLK16 |
  137. MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENABLE, PA(MCFTIMER_TMR));
  138. mcf_clrimr(MCFINTC_TIMER2);
  139. }
  140. /***************************************************************************/
  141. #endif /* CONFIG_HIGHPROFILE */
  142. /***************************************************************************/