omap_crtc.c 18 KB

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  1. /*
  2. * drivers/gpu/drm/omapdrm/omap_crtc.c
  3. *
  4. * Copyright (C) 2011 Texas Instruments
  5. * Author: Rob Clark <rob@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include "omap_drv.h"
  20. #include <drm/drm_mode.h>
  21. #include "drm_crtc.h"
  22. #include "drm_crtc_helper.h"
  23. #define to_omap_crtc(x) container_of(x, struct omap_crtc, base)
  24. struct omap_crtc {
  25. struct drm_crtc base;
  26. struct drm_plane *plane;
  27. const char *name;
  28. int pipe;
  29. enum omap_channel channel;
  30. struct omap_overlay_manager_info info;
  31. /*
  32. * Temporary: eventually this will go away, but it is needed
  33. * for now to keep the output's happy. (They only need
  34. * mgr->id.) Eventually this will be replaced w/ something
  35. * more common-panel-framework-y
  36. */
  37. struct omap_overlay_manager *mgr;
  38. struct omap_video_timings timings;
  39. bool enabled;
  40. bool full_update;
  41. struct omap_drm_apply apply;
  42. struct omap_drm_irq apply_irq;
  43. struct omap_drm_irq error_irq;
  44. /* list of in-progress apply's: */
  45. struct list_head pending_applies;
  46. /* list of queued apply's: */
  47. struct list_head queued_applies;
  48. /* for handling queued and in-progress applies: */
  49. struct work_struct apply_work;
  50. /* if there is a pending flip, these will be non-null: */
  51. struct drm_pending_vblank_event *event;
  52. struct drm_framebuffer *old_fb;
  53. /* for handling page flips without caring about what
  54. * the callback is called from. Possibly we should just
  55. * make omap_gem always call the cb from the worker so
  56. * we don't have to care about this..
  57. *
  58. * XXX maybe fold into apply_work??
  59. */
  60. struct work_struct page_flip_work;
  61. };
  62. uint32_t pipe2vbl(struct drm_crtc *crtc)
  63. {
  64. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  65. return dispc_mgr_get_vsync_irq(omap_crtc->channel);
  66. }
  67. /*
  68. * Manager-ops, callbacks from output when they need to configure
  69. * the upstream part of the video pipe.
  70. *
  71. * Most of these we can ignore until we add support for command-mode
  72. * panels.. for video-mode the crtc-helpers already do an adequate
  73. * job of sequencing the setup of the video pipe in the proper order
  74. */
  75. /* ovl-mgr-id -> crtc */
  76. static struct omap_crtc *omap_crtcs[8];
  77. /* we can probably ignore these until we support command-mode panels: */
  78. static void omap_crtc_start_update(struct omap_overlay_manager *mgr)
  79. {
  80. }
  81. static int omap_crtc_enable(struct omap_overlay_manager *mgr)
  82. {
  83. return 0;
  84. }
  85. static void omap_crtc_disable(struct omap_overlay_manager *mgr)
  86. {
  87. }
  88. static void omap_crtc_set_timings(struct omap_overlay_manager *mgr,
  89. const struct omap_video_timings *timings)
  90. {
  91. struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
  92. DBG("%s", omap_crtc->name);
  93. omap_crtc->timings = *timings;
  94. omap_crtc->full_update = true;
  95. }
  96. static void omap_crtc_set_lcd_config(struct omap_overlay_manager *mgr,
  97. const struct dss_lcd_mgr_config *config)
  98. {
  99. struct omap_crtc *omap_crtc = omap_crtcs[mgr->id];
  100. DBG("%s", omap_crtc->name);
  101. dispc_mgr_set_lcd_config(omap_crtc->channel, config);
  102. }
  103. static int omap_crtc_register_framedone_handler(
  104. struct omap_overlay_manager *mgr,
  105. void (*handler)(void *), void *data)
  106. {
  107. return 0;
  108. }
  109. static void omap_crtc_unregister_framedone_handler(
  110. struct omap_overlay_manager *mgr,
  111. void (*handler)(void *), void *data)
  112. {
  113. }
  114. static const struct dss_mgr_ops mgr_ops = {
  115. .start_update = omap_crtc_start_update,
  116. .enable = omap_crtc_enable,
  117. .disable = omap_crtc_disable,
  118. .set_timings = omap_crtc_set_timings,
  119. .set_lcd_config = omap_crtc_set_lcd_config,
  120. .register_framedone_handler = omap_crtc_register_framedone_handler,
  121. .unregister_framedone_handler = omap_crtc_unregister_framedone_handler,
  122. };
  123. /*
  124. * CRTC funcs:
  125. */
  126. static void omap_crtc_destroy(struct drm_crtc *crtc)
  127. {
  128. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  129. DBG("%s", omap_crtc->name);
  130. WARN_ON(omap_crtc->apply_irq.registered);
  131. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  132. omap_crtc->plane->funcs->destroy(omap_crtc->plane);
  133. drm_crtc_cleanup(crtc);
  134. kfree(omap_crtc);
  135. }
  136. static void omap_crtc_dpms(struct drm_crtc *crtc, int mode)
  137. {
  138. struct omap_drm_private *priv = crtc->dev->dev_private;
  139. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  140. bool enabled = (mode == DRM_MODE_DPMS_ON);
  141. int i;
  142. DBG("%s: %d", omap_crtc->name, mode);
  143. if (enabled != omap_crtc->enabled) {
  144. omap_crtc->enabled = enabled;
  145. omap_crtc->full_update = true;
  146. omap_crtc_apply(crtc, &omap_crtc->apply);
  147. /* also enable our private plane: */
  148. WARN_ON(omap_plane_dpms(omap_crtc->plane, mode));
  149. /* and any attached overlay planes: */
  150. for (i = 0; i < priv->num_planes; i++) {
  151. struct drm_plane *plane = priv->planes[i];
  152. if (plane->crtc == crtc)
  153. WARN_ON(omap_plane_dpms(plane, mode));
  154. }
  155. }
  156. }
  157. static bool omap_crtc_mode_fixup(struct drm_crtc *crtc,
  158. const struct drm_display_mode *mode,
  159. struct drm_display_mode *adjusted_mode)
  160. {
  161. return true;
  162. }
  163. static int omap_crtc_mode_set(struct drm_crtc *crtc,
  164. struct drm_display_mode *mode,
  165. struct drm_display_mode *adjusted_mode,
  166. int x, int y,
  167. struct drm_framebuffer *old_fb)
  168. {
  169. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  170. mode = adjusted_mode;
  171. DBG("%s: set mode: %d:\"%s\" %d %d %d %d %d %d %d %d %d %d 0x%x 0x%x",
  172. omap_crtc->name, mode->base.id, mode->name,
  173. mode->vrefresh, mode->clock,
  174. mode->hdisplay, mode->hsync_start,
  175. mode->hsync_end, mode->htotal,
  176. mode->vdisplay, mode->vsync_start,
  177. mode->vsync_end, mode->vtotal,
  178. mode->type, mode->flags);
  179. copy_timings_drm_to_omap(&omap_crtc->timings, mode);
  180. omap_crtc->full_update = true;
  181. return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
  182. 0, 0, mode->hdisplay, mode->vdisplay,
  183. x << 16, y << 16,
  184. mode->hdisplay << 16, mode->vdisplay << 16,
  185. NULL, NULL);
  186. }
  187. static void omap_crtc_prepare(struct drm_crtc *crtc)
  188. {
  189. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  190. DBG("%s", omap_crtc->name);
  191. omap_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  192. }
  193. static void omap_crtc_commit(struct drm_crtc *crtc)
  194. {
  195. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  196. DBG("%s", omap_crtc->name);
  197. omap_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  198. }
  199. static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  200. struct drm_framebuffer *old_fb)
  201. {
  202. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  203. struct drm_plane *plane = omap_crtc->plane;
  204. struct drm_display_mode *mode = &crtc->mode;
  205. return omap_plane_mode_set(plane, crtc, crtc->fb,
  206. 0, 0, mode->hdisplay, mode->vdisplay,
  207. x << 16, y << 16,
  208. mode->hdisplay << 16, mode->vdisplay << 16,
  209. NULL, NULL);
  210. }
  211. static void omap_crtc_load_lut(struct drm_crtc *crtc)
  212. {
  213. }
  214. static void vblank_cb(void *arg)
  215. {
  216. struct drm_crtc *crtc = arg;
  217. struct drm_device *dev = crtc->dev;
  218. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  219. unsigned long flags;
  220. spin_lock_irqsave(&dev->event_lock, flags);
  221. /* wakeup userspace */
  222. if (omap_crtc->event)
  223. drm_send_vblank_event(dev, omap_crtc->pipe, omap_crtc->event);
  224. omap_crtc->event = NULL;
  225. omap_crtc->old_fb = NULL;
  226. spin_unlock_irqrestore(&dev->event_lock, flags);
  227. }
  228. static void page_flip_worker(struct work_struct *work)
  229. {
  230. struct omap_crtc *omap_crtc =
  231. container_of(work, struct omap_crtc, page_flip_work);
  232. struct drm_crtc *crtc = &omap_crtc->base;
  233. struct drm_display_mode *mode = &crtc->mode;
  234. struct drm_gem_object *bo;
  235. mutex_lock(&crtc->mutex);
  236. omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb,
  237. 0, 0, mode->hdisplay, mode->vdisplay,
  238. crtc->x << 16, crtc->y << 16,
  239. mode->hdisplay << 16, mode->vdisplay << 16,
  240. vblank_cb, crtc);
  241. mutex_unlock(&crtc->mutex);
  242. bo = omap_framebuffer_bo(crtc->fb, 0);
  243. drm_gem_object_unreference_unlocked(bo);
  244. }
  245. static void page_flip_cb(void *arg)
  246. {
  247. struct drm_crtc *crtc = arg;
  248. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  249. struct omap_drm_private *priv = crtc->dev->dev_private;
  250. /* avoid assumptions about what ctxt we are called from: */
  251. queue_work(priv->wq, &omap_crtc->page_flip_work);
  252. }
  253. static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
  254. struct drm_framebuffer *fb,
  255. struct drm_pending_vblank_event *event)
  256. {
  257. struct drm_device *dev = crtc->dev;
  258. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  259. struct drm_gem_object *bo;
  260. DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1,
  261. fb->base.id, event);
  262. if (omap_crtc->old_fb) {
  263. dev_err(dev->dev, "already a pending flip\n");
  264. return -EINVAL;
  265. }
  266. omap_crtc->event = event;
  267. crtc->fb = fb;
  268. /*
  269. * Hold a reference temporarily until the crtc is updated
  270. * and takes the reference to the bo. This avoids it
  271. * getting freed from under us:
  272. */
  273. bo = omap_framebuffer_bo(fb, 0);
  274. drm_gem_object_reference(bo);
  275. omap_gem_op_async(bo, OMAP_GEM_READ, page_flip_cb, crtc);
  276. return 0;
  277. }
  278. static int omap_crtc_set_property(struct drm_crtc *crtc,
  279. struct drm_property *property, uint64_t val)
  280. {
  281. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  282. struct omap_drm_private *priv = crtc->dev->dev_private;
  283. if (property == priv->rotation_prop) {
  284. crtc->invert_dimensions =
  285. !!(val & ((1LL << DRM_ROTATE_90) | (1LL << DRM_ROTATE_270)));
  286. }
  287. return omap_plane_set_property(omap_crtc->plane, property, val);
  288. }
  289. static const struct drm_crtc_funcs omap_crtc_funcs = {
  290. .set_config = drm_crtc_helper_set_config,
  291. .destroy = omap_crtc_destroy,
  292. .page_flip = omap_crtc_page_flip_locked,
  293. .set_property = omap_crtc_set_property,
  294. };
  295. static const struct drm_crtc_helper_funcs omap_crtc_helper_funcs = {
  296. .dpms = omap_crtc_dpms,
  297. .mode_fixup = omap_crtc_mode_fixup,
  298. .mode_set = omap_crtc_mode_set,
  299. .prepare = omap_crtc_prepare,
  300. .commit = omap_crtc_commit,
  301. .mode_set_base = omap_crtc_mode_set_base,
  302. .load_lut = omap_crtc_load_lut,
  303. };
  304. const struct omap_video_timings *omap_crtc_timings(struct drm_crtc *crtc)
  305. {
  306. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  307. return &omap_crtc->timings;
  308. }
  309. enum omap_channel omap_crtc_channel(struct drm_crtc *crtc)
  310. {
  311. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  312. return omap_crtc->channel;
  313. }
  314. static void omap_crtc_error_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
  315. {
  316. struct omap_crtc *omap_crtc =
  317. container_of(irq, struct omap_crtc, error_irq);
  318. struct drm_crtc *crtc = &omap_crtc->base;
  319. DRM_ERROR("%s: errors: %08x\n", omap_crtc->name, irqstatus);
  320. /* avoid getting in a flood, unregister the irq until next vblank */
  321. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  322. }
  323. static void omap_crtc_apply_irq(struct omap_drm_irq *irq, uint32_t irqstatus)
  324. {
  325. struct omap_crtc *omap_crtc =
  326. container_of(irq, struct omap_crtc, apply_irq);
  327. struct drm_crtc *crtc = &omap_crtc->base;
  328. if (!omap_crtc->error_irq.registered)
  329. omap_irq_register(crtc->dev, &omap_crtc->error_irq);
  330. if (!dispc_mgr_go_busy(omap_crtc->channel)) {
  331. struct omap_drm_private *priv =
  332. crtc->dev->dev_private;
  333. DBG("%s: apply done", omap_crtc->name);
  334. omap_irq_unregister(crtc->dev, &omap_crtc->apply_irq);
  335. queue_work(priv->wq, &omap_crtc->apply_work);
  336. }
  337. }
  338. static void apply_worker(struct work_struct *work)
  339. {
  340. struct omap_crtc *omap_crtc =
  341. container_of(work, struct omap_crtc, apply_work);
  342. struct drm_crtc *crtc = &omap_crtc->base;
  343. struct drm_device *dev = crtc->dev;
  344. struct omap_drm_apply *apply, *n;
  345. bool need_apply;
  346. /*
  347. * Synchronize everything on mode_config.mutex, to keep
  348. * the callbacks and list modification all serialized
  349. * with respect to modesetting ioctls from userspace.
  350. */
  351. mutex_lock(&crtc->mutex);
  352. dispc_runtime_get();
  353. /*
  354. * If we are still pending a previous update, wait.. when the
  355. * pending update completes, we get kicked again.
  356. */
  357. if (omap_crtc->apply_irq.registered)
  358. goto out;
  359. /* finish up previous apply's: */
  360. list_for_each_entry_safe(apply, n,
  361. &omap_crtc->pending_applies, pending_node) {
  362. apply->post_apply(apply);
  363. list_del(&apply->pending_node);
  364. }
  365. need_apply = !list_empty(&omap_crtc->queued_applies);
  366. /* then handle the next round of of queued apply's: */
  367. list_for_each_entry_safe(apply, n,
  368. &omap_crtc->queued_applies, queued_node) {
  369. apply->pre_apply(apply);
  370. list_del(&apply->queued_node);
  371. apply->queued = false;
  372. list_add_tail(&apply->pending_node,
  373. &omap_crtc->pending_applies);
  374. }
  375. if (need_apply) {
  376. enum omap_channel channel = omap_crtc->channel;
  377. DBG("%s: GO", omap_crtc->name);
  378. if (dispc_mgr_is_enabled(channel)) {
  379. omap_irq_register(dev, &omap_crtc->apply_irq);
  380. dispc_mgr_go(channel);
  381. } else {
  382. struct omap_drm_private *priv = dev->dev_private;
  383. queue_work(priv->wq, &omap_crtc->apply_work);
  384. }
  385. }
  386. out:
  387. dispc_runtime_put();
  388. mutex_unlock(&crtc->mutex);
  389. }
  390. int omap_crtc_apply(struct drm_crtc *crtc,
  391. struct omap_drm_apply *apply)
  392. {
  393. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  394. WARN_ON(!mutex_is_locked(&crtc->mutex));
  395. /* no need to queue it again if it is already queued: */
  396. if (apply->queued)
  397. return 0;
  398. apply->queued = true;
  399. list_add_tail(&apply->queued_node, &omap_crtc->queued_applies);
  400. /*
  401. * If there are no currently pending updates, then go ahead and
  402. * kick the worker immediately, otherwise it will run again when
  403. * the current update finishes.
  404. */
  405. if (list_empty(&omap_crtc->pending_applies)) {
  406. struct omap_drm_private *priv = crtc->dev->dev_private;
  407. queue_work(priv->wq, &omap_crtc->apply_work);
  408. }
  409. return 0;
  410. }
  411. /* called only from apply */
  412. static void set_enabled(struct drm_crtc *crtc, bool enable)
  413. {
  414. struct drm_device *dev = crtc->dev;
  415. struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
  416. enum omap_channel channel = omap_crtc->channel;
  417. struct omap_irq_wait *wait = NULL;
  418. if (dispc_mgr_is_enabled(channel) == enable)
  419. return;
  420. /* ignore sync-lost irqs during enable/disable */
  421. omap_irq_unregister(crtc->dev, &omap_crtc->error_irq);
  422. if (dispc_mgr_get_framedone_irq(channel)) {
  423. if (!enable) {
  424. wait = omap_irq_wait_init(dev,
  425. dispc_mgr_get_framedone_irq(channel), 1);
  426. }
  427. } else {
  428. /*
  429. * When we disable digit output, we need to wait until fields
  430. * are done. Otherwise the DSS is still working, and turning
  431. * off the clocks prevents DSS from going to OFF mode. And when
  432. * enabling, we need to wait for the extra sync losts
  433. */
  434. wait = omap_irq_wait_init(dev,
  435. dispc_mgr_get_vsync_irq(channel), 2);
  436. }
  437. dispc_mgr_enable(channel, enable);
  438. if (wait) {
  439. int ret = omap_irq_wait(dev, wait, msecs_to_jiffies(100));
  440. if (ret) {
  441. dev_err(dev->dev, "%s: timeout waiting for %s\n",
  442. omap_crtc->name, enable ? "enable" : "disable");
  443. }
  444. }
  445. omap_irq_register(crtc->dev, &omap_crtc->error_irq);
  446. }
  447. static void omap_crtc_pre_apply(struct omap_drm_apply *apply)
  448. {
  449. struct omap_crtc *omap_crtc =
  450. container_of(apply, struct omap_crtc, apply);
  451. struct drm_crtc *crtc = &omap_crtc->base;
  452. struct drm_encoder *encoder = NULL;
  453. DBG("%s: enabled=%d, full=%d", omap_crtc->name,
  454. omap_crtc->enabled, omap_crtc->full_update);
  455. if (omap_crtc->full_update) {
  456. struct omap_drm_private *priv = crtc->dev->dev_private;
  457. int i;
  458. for (i = 0; i < priv->num_encoders; i++) {
  459. if (priv->encoders[i]->crtc == crtc) {
  460. encoder = priv->encoders[i];
  461. break;
  462. }
  463. }
  464. }
  465. if (!omap_crtc->enabled) {
  466. set_enabled(&omap_crtc->base, false);
  467. if (encoder)
  468. omap_encoder_set_enabled(encoder, false);
  469. } else {
  470. if (encoder) {
  471. omap_encoder_set_enabled(encoder, false);
  472. omap_encoder_update(encoder, omap_crtc->mgr,
  473. &omap_crtc->timings);
  474. omap_encoder_set_enabled(encoder, true);
  475. omap_crtc->full_update = false;
  476. }
  477. dispc_mgr_setup(omap_crtc->channel, &omap_crtc->info);
  478. dispc_mgr_set_timings(omap_crtc->channel,
  479. &omap_crtc->timings);
  480. set_enabled(&omap_crtc->base, true);
  481. }
  482. omap_crtc->full_update = false;
  483. }
  484. static void omap_crtc_post_apply(struct omap_drm_apply *apply)
  485. {
  486. /* nothing needed for post-apply */
  487. }
  488. static const char *channel_names[] = {
  489. [OMAP_DSS_CHANNEL_LCD] = "lcd",
  490. [OMAP_DSS_CHANNEL_DIGIT] = "tv",
  491. [OMAP_DSS_CHANNEL_LCD2] = "lcd2",
  492. };
  493. void omap_crtc_pre_init(void)
  494. {
  495. dss_install_mgr_ops(&mgr_ops);
  496. }
  497. /* initialize crtc */
  498. struct drm_crtc *omap_crtc_init(struct drm_device *dev,
  499. struct drm_plane *plane, enum omap_channel channel, int id)
  500. {
  501. struct drm_crtc *crtc = NULL;
  502. struct omap_crtc *omap_crtc;
  503. struct omap_overlay_manager_info *info;
  504. DBG("%s", channel_names[channel]);
  505. omap_crtc = kzalloc(sizeof(*omap_crtc), GFP_KERNEL);
  506. if (!omap_crtc)
  507. goto fail;
  508. crtc = &omap_crtc->base;
  509. INIT_WORK(&omap_crtc->page_flip_work, page_flip_worker);
  510. INIT_WORK(&omap_crtc->apply_work, apply_worker);
  511. INIT_LIST_HEAD(&omap_crtc->pending_applies);
  512. INIT_LIST_HEAD(&omap_crtc->queued_applies);
  513. omap_crtc->apply.pre_apply = omap_crtc_pre_apply;
  514. omap_crtc->apply.post_apply = omap_crtc_post_apply;
  515. omap_crtc->channel = channel;
  516. omap_crtc->plane = plane;
  517. omap_crtc->plane->crtc = crtc;
  518. omap_crtc->name = channel_names[channel];
  519. omap_crtc->pipe = id;
  520. omap_crtc->apply_irq.irqmask = pipe2vbl(crtc);
  521. omap_crtc->apply_irq.irq = omap_crtc_apply_irq;
  522. omap_crtc->error_irq.irqmask =
  523. dispc_mgr_get_sync_lost_irq(channel);
  524. omap_crtc->error_irq.irq = omap_crtc_error_irq;
  525. omap_irq_register(dev, &omap_crtc->error_irq);
  526. /* temporary: */
  527. omap_crtc->mgr = omap_dss_get_overlay_manager(channel);
  528. /* TODO: fix hard-coded setup.. add properties! */
  529. info = &omap_crtc->info;
  530. info->default_color = 0x00000000;
  531. info->trans_key = 0x00000000;
  532. info->trans_key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
  533. info->trans_enabled = false;
  534. drm_crtc_init(dev, crtc, &omap_crtc_funcs);
  535. drm_crtc_helper_add(crtc, &omap_crtc_helper_funcs);
  536. omap_plane_install_properties(omap_crtc->plane, &crtc->base);
  537. omap_crtcs[channel] = omap_crtc;
  538. return crtc;
  539. fail:
  540. if (crtc)
  541. omap_crtc_destroy(crtc);
  542. return NULL;
  543. }