rtl2830.c 12 KB

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  1. /*
  2. * Realtek RTL2830 DVB-T demodulator driver
  3. *
  4. * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along
  17. * with this program; if not, write to the Free Software Foundation, Inc.,
  18. * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  19. */
  20. /*
  21. * Driver implements own I2C-adapter for tuner I2C access. That's since chip
  22. * have unusual I2C-gate control which closes gate automatically after each
  23. * I2C transfer. Using own I2C adapter we can workaround that.
  24. */
  25. #include "rtl2830_priv.h"
  26. int rtl2830_debug;
  27. module_param_named(debug, rtl2830_debug, int, 0644);
  28. MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  29. /* write multiple hardware registers */
  30. static int rtl2830_wr(struct rtl2830_priv *priv, u8 reg, u8 *val, int len)
  31. {
  32. int ret;
  33. u8 buf[1+len];
  34. struct i2c_msg msg[1] = {
  35. {
  36. .addr = priv->cfg.i2c_addr,
  37. .flags = 0,
  38. .len = 1+len,
  39. .buf = buf,
  40. }
  41. };
  42. buf[0] = reg;
  43. memcpy(&buf[1], val, len);
  44. ret = i2c_transfer(priv->i2c, msg, 1);
  45. if (ret == 1) {
  46. ret = 0;
  47. } else {
  48. warn("i2c wr failed=%d reg=%02x len=%d", ret, reg, len);
  49. ret = -EREMOTEIO;
  50. }
  51. return ret;
  52. }
  53. /* read multiple hardware registers */
  54. static int rtl2830_rd(struct rtl2830_priv *priv, u8 reg, u8 *val, int len)
  55. {
  56. int ret;
  57. struct i2c_msg msg[2] = {
  58. {
  59. .addr = priv->cfg.i2c_addr,
  60. .flags = 0,
  61. .len = 1,
  62. .buf = &reg,
  63. }, {
  64. .addr = priv->cfg.i2c_addr,
  65. .flags = I2C_M_RD,
  66. .len = len,
  67. .buf = val,
  68. }
  69. };
  70. ret = i2c_transfer(priv->i2c, msg, 2);
  71. if (ret == 2) {
  72. ret = 0;
  73. } else {
  74. warn("i2c rd failed=%d reg=%02x len=%d", ret, reg, len);
  75. ret = -EREMOTEIO;
  76. }
  77. return ret;
  78. }
  79. /* write multiple registers */
  80. static int rtl2830_wr_regs(struct rtl2830_priv *priv, u16 reg, u8 *val, int len)
  81. {
  82. int ret;
  83. u8 reg2 = (reg >> 0) & 0xff;
  84. u8 page = (reg >> 8) & 0xff;
  85. /* switch bank if needed */
  86. if (page != priv->page) {
  87. ret = rtl2830_wr(priv, 0x00, &page, 1);
  88. if (ret)
  89. return ret;
  90. priv->page = page;
  91. }
  92. return rtl2830_wr(priv, reg2, val, len);
  93. }
  94. /* read multiple registers */
  95. static int rtl2830_rd_regs(struct rtl2830_priv *priv, u16 reg, u8 *val, int len)
  96. {
  97. int ret;
  98. u8 reg2 = (reg >> 0) & 0xff;
  99. u8 page = (reg >> 8) & 0xff;
  100. /* switch bank if needed */
  101. if (page != priv->page) {
  102. ret = rtl2830_wr(priv, 0x00, &page, 1);
  103. if (ret)
  104. return ret;
  105. priv->page = page;
  106. }
  107. return rtl2830_rd(priv, reg2, val, len);
  108. }
  109. #if 0 /* currently not used */
  110. /* write single register */
  111. static int rtl2830_wr_reg(struct rtl2830_priv *priv, u16 reg, u8 val)
  112. {
  113. return rtl2830_wr_regs(priv, reg, &val, 1);
  114. }
  115. #endif
  116. /* read single register */
  117. static int rtl2830_rd_reg(struct rtl2830_priv *priv, u16 reg, u8 *val)
  118. {
  119. return rtl2830_rd_regs(priv, reg, val, 1);
  120. }
  121. /* write single register with mask */
  122. int rtl2830_wr_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 val, u8 mask)
  123. {
  124. int ret;
  125. u8 tmp;
  126. /* no need for read if whole reg is written */
  127. if (mask != 0xff) {
  128. ret = rtl2830_rd_regs(priv, reg, &tmp, 1);
  129. if (ret)
  130. return ret;
  131. val &= mask;
  132. tmp &= ~mask;
  133. val |= tmp;
  134. }
  135. return rtl2830_wr_regs(priv, reg, &val, 1);
  136. }
  137. /* read single register with mask */
  138. int rtl2830_rd_reg_mask(struct rtl2830_priv *priv, u16 reg, u8 *val, u8 mask)
  139. {
  140. int ret, i;
  141. u8 tmp;
  142. ret = rtl2830_rd_regs(priv, reg, &tmp, 1);
  143. if (ret)
  144. return ret;
  145. tmp &= mask;
  146. /* find position of the first bit */
  147. for (i = 0; i < 8; i++) {
  148. if ((mask >> i) & 0x01)
  149. break;
  150. }
  151. *val = tmp >> i;
  152. return 0;
  153. }
  154. static int rtl2830_init(struct dvb_frontend *fe)
  155. {
  156. struct rtl2830_priv *priv = fe->demodulator_priv;
  157. int ret, i;
  158. u64 num;
  159. u8 buf[3], tmp;
  160. u32 if_ctl;
  161. struct rtl2830_reg_val_mask tab[] = {
  162. { 0x00d, 0x01, 0x03 },
  163. { 0x00d, 0x10, 0x10 },
  164. { 0x104, 0x00, 0x1e },
  165. { 0x105, 0x80, 0x80 },
  166. { 0x110, 0x02, 0x03 },
  167. { 0x110, 0x08, 0x0c },
  168. { 0x17b, 0x00, 0x40 },
  169. { 0x17d, 0x05, 0x0f },
  170. { 0x17d, 0x50, 0xf0 },
  171. { 0x18c, 0x08, 0x0f },
  172. { 0x18d, 0x00, 0xc0 },
  173. { 0x188, 0x05, 0x0f },
  174. { 0x189, 0x00, 0xfc },
  175. { 0x2d5, 0x02, 0x02 },
  176. { 0x2f1, 0x02, 0x06 },
  177. { 0x2f1, 0x20, 0xf8 },
  178. { 0x16d, 0x00, 0x01 },
  179. { 0x1a6, 0x00, 0x80 },
  180. { 0x106, priv->cfg.vtop, 0x3f },
  181. { 0x107, priv->cfg.krf, 0x3f },
  182. { 0x112, 0x28, 0xff },
  183. { 0x103, priv->cfg.agc_targ_val, 0xff },
  184. { 0x00a, 0x02, 0x07 },
  185. { 0x140, 0x0c, 0x3c },
  186. { 0x140, 0x40, 0xc0 },
  187. { 0x15b, 0x05, 0x07 },
  188. { 0x15b, 0x28, 0x38 },
  189. { 0x15c, 0x05, 0x07 },
  190. { 0x15c, 0x28, 0x38 },
  191. { 0x115, priv->cfg.spec_inv, 0x01 },
  192. { 0x16f, 0x01, 0x07 },
  193. { 0x170, 0x18, 0x38 },
  194. { 0x172, 0x0f, 0x0f },
  195. { 0x173, 0x08, 0x38 },
  196. { 0x175, 0x01, 0x07 },
  197. { 0x176, 0x00, 0xc0 },
  198. };
  199. for (i = 0; i < ARRAY_SIZE(tab); i++) {
  200. ret = rtl2830_wr_reg_mask(priv, tab[i].reg, tab[i].val,
  201. tab[i].mask);
  202. if (ret)
  203. goto err;
  204. }
  205. ret = rtl2830_wr_regs(priv, 0x18f, "\x28\x00", 2);
  206. if (ret)
  207. goto err;
  208. ret = rtl2830_wr_regs(priv, 0x195,
  209. "\x04\x06\x0a\x12\x0a\x12\x1e\x28", 8);
  210. if (ret)
  211. goto err;
  212. num = priv->cfg.if_dvbt % priv->cfg.xtal;
  213. num *= 0x400000;
  214. num /= priv->cfg.xtal;
  215. num = -num;
  216. if_ctl = num & 0x3fffff;
  217. dbg("%s: if_ctl=%08x", __func__, if_ctl);
  218. ret = rtl2830_rd_reg_mask(priv, 0x119, &tmp, 0xc0); /* b[7:6] */
  219. if (ret)
  220. goto err;
  221. buf[0] = tmp << 6;
  222. buf[0] = (if_ctl >> 16) & 0x3f;
  223. buf[1] = (if_ctl >> 8) & 0xff;
  224. buf[2] = (if_ctl >> 0) & 0xff;
  225. ret = rtl2830_wr_regs(priv, 0x119, buf, 3);
  226. if (ret)
  227. goto err;
  228. /* TODO: spec init */
  229. /* soft reset */
  230. ret = rtl2830_wr_reg_mask(priv, 0x101, 0x04, 0x04);
  231. if (ret)
  232. goto err;
  233. ret = rtl2830_wr_reg_mask(priv, 0x101, 0x00, 0x04);
  234. if (ret)
  235. goto err;
  236. return ret;
  237. err:
  238. dbg("%s: failed=%d", __func__, ret);
  239. return ret;
  240. }
  241. int rtl2830_get_tune_settings(struct dvb_frontend *fe,
  242. struct dvb_frontend_tune_settings *s)
  243. {
  244. s->min_delay_ms = 500;
  245. s->step_size = fe->ops.info.frequency_stepsize * 2;
  246. s->max_drift = (fe->ops.info.frequency_stepsize * 2) + 1;
  247. return 0;
  248. }
  249. static int rtl2830_set_frontend(struct dvb_frontend *fe)
  250. {
  251. struct rtl2830_priv *priv = fe->demodulator_priv;
  252. struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  253. int ret, i;
  254. static u8 bw_params1[3][34] = {
  255. {
  256. 0x1f, 0xf0, 0x1f, 0xf0, 0x1f, 0xfa, 0x00, 0x17, 0x00, 0x41,
  257. 0x00, 0x64, 0x00, 0x67, 0x00, 0x38, 0x1f, 0xde, 0x1f, 0x7a,
  258. 0x1f, 0x47, 0x1f, 0x7c, 0x00, 0x30, 0x01, 0x4b, 0x02, 0x82,
  259. 0x03, 0x73, 0x03, 0xcf, /* 6 MHz */
  260. }, {
  261. 0x1f, 0xfa, 0x1f, 0xda, 0x1f, 0xc1, 0x1f, 0xb3, 0x1f, 0xca,
  262. 0x00, 0x07, 0x00, 0x4d, 0x00, 0x6d, 0x00, 0x40, 0x1f, 0xca,
  263. 0x1f, 0x4d, 0x1f, 0x2a, 0x1f, 0xb2, 0x00, 0xec, 0x02, 0x7e,
  264. 0x03, 0xd0, 0x04, 0x53, /* 7 MHz */
  265. }, {
  266. 0x00, 0x10, 0x00, 0x0e, 0x1f, 0xf7, 0x1f, 0xc9, 0x1f, 0xa0,
  267. 0x1f, 0xa6, 0x1f, 0xec, 0x00, 0x4e, 0x00, 0x7d, 0x00, 0x3a,
  268. 0x1f, 0x98, 0x1f, 0x10, 0x1f, 0x40, 0x00, 0x75, 0x02, 0x5f,
  269. 0x04, 0x24, 0x04, 0xdb, /* 8 MHz */
  270. },
  271. };
  272. static u8 bw_params2[3][6] = {
  273. {0xc3, 0x0c, 0x44, 0x33, 0x33, 0x30,}, /* 6 MHz */
  274. {0xb8, 0xe3, 0x93, 0x99, 0x99, 0x98,}, /* 7 MHz */
  275. {0xae, 0xba, 0xf3, 0x26, 0x66, 0x64,}, /* 8 MHz */
  276. };
  277. dbg("%s: frequency=%d bandwidth_hz=%d inversion=%d", __func__,
  278. c->frequency, c->bandwidth_hz, c->inversion);
  279. /* program tuner */
  280. if (fe->ops.tuner_ops.set_params)
  281. fe->ops.tuner_ops.set_params(fe);
  282. switch (c->bandwidth_hz) {
  283. case 6000000:
  284. i = 0;
  285. break;
  286. case 7000000:
  287. i = 1;
  288. break;
  289. case 8000000:
  290. i = 2;
  291. break;
  292. default:
  293. dbg("invalid bandwidth");
  294. return -EINVAL;
  295. }
  296. ret = rtl2830_wr_reg_mask(priv, 0x008, i << 1, 0x06);
  297. if (ret)
  298. goto err;
  299. /* 1/2 split I2C write */
  300. ret = rtl2830_wr_regs(priv, 0x11c, &bw_params1[i][0], 17);
  301. if (ret)
  302. goto err;
  303. /* 2/2 split I2C write */
  304. ret = rtl2830_wr_regs(priv, 0x12d, &bw_params1[i][17], 17);
  305. if (ret)
  306. goto err;
  307. ret = rtl2830_wr_regs(priv, 0x19d, bw_params2[i], 6);
  308. if (ret)
  309. goto err;
  310. return ret;
  311. err:
  312. dbg("%s: failed=%d", __func__, ret);
  313. return ret;
  314. }
  315. static int rtl2830_read_status(struct dvb_frontend *fe, fe_status_t *status)
  316. {
  317. struct rtl2830_priv *priv = fe->demodulator_priv;
  318. int ret;
  319. u8 tmp;
  320. *status = 0;
  321. ret = rtl2830_rd_reg_mask(priv, 0x351, &tmp, 0x78); /* [6:3] */
  322. if (ret)
  323. goto err;
  324. if (tmp == 11) {
  325. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
  326. FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
  327. } else if (tmp == 10) {
  328. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
  329. FE_HAS_VITERBI;
  330. }
  331. return ret;
  332. err:
  333. dbg("%s: failed=%d", __func__, ret);
  334. return ret;
  335. }
  336. static int rtl2830_read_snr(struct dvb_frontend *fe, u16 *snr)
  337. {
  338. *snr = 0;
  339. return 0;
  340. }
  341. static int rtl2830_read_ber(struct dvb_frontend *fe, u32 *ber)
  342. {
  343. *ber = 0;
  344. return 0;
  345. }
  346. static int rtl2830_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  347. {
  348. *ucblocks = 0;
  349. return 0;
  350. }
  351. static int rtl2830_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  352. {
  353. *strength = 0;
  354. return 0;
  355. }
  356. static struct dvb_frontend_ops rtl2830_ops;
  357. static u32 rtl2830_tuner_i2c_func(struct i2c_adapter *adapter)
  358. {
  359. return I2C_FUNC_I2C;
  360. }
  361. static int rtl2830_tuner_i2c_xfer(struct i2c_adapter *i2c_adap,
  362. struct i2c_msg msg[], int num)
  363. {
  364. struct rtl2830_priv *priv = i2c_get_adapdata(i2c_adap);
  365. int ret;
  366. /* open i2c-gate */
  367. ret = rtl2830_wr_reg_mask(priv, 0x101, 0x08, 0x08);
  368. if (ret)
  369. goto err;
  370. ret = i2c_transfer(priv->i2c, msg, num);
  371. if (ret < 0)
  372. warn("tuner i2c failed=%d", ret);
  373. return ret;
  374. err:
  375. dbg("%s: failed=%d", __func__, ret);
  376. return ret;
  377. }
  378. static struct i2c_algorithm rtl2830_tuner_i2c_algo = {
  379. .master_xfer = rtl2830_tuner_i2c_xfer,
  380. .functionality = rtl2830_tuner_i2c_func,
  381. };
  382. struct i2c_adapter *rtl2830_get_tuner_i2c_adapter(struct dvb_frontend *fe)
  383. {
  384. struct rtl2830_priv *priv = fe->demodulator_priv;
  385. return &priv->tuner_i2c_adapter;
  386. }
  387. EXPORT_SYMBOL(rtl2830_get_tuner_i2c_adapter);
  388. static void rtl2830_release(struct dvb_frontend *fe)
  389. {
  390. struct rtl2830_priv *priv = fe->demodulator_priv;
  391. i2c_del_adapter(&priv->tuner_i2c_adapter);
  392. kfree(priv);
  393. }
  394. struct dvb_frontend *rtl2830_attach(const struct rtl2830_config *cfg,
  395. struct i2c_adapter *i2c)
  396. {
  397. struct rtl2830_priv *priv = NULL;
  398. int ret = 0;
  399. u8 tmp;
  400. /* allocate memory for the internal state */
  401. priv = kzalloc(sizeof(struct rtl2830_priv), GFP_KERNEL);
  402. if (priv == NULL)
  403. goto err;
  404. /* setup the priv */
  405. priv->i2c = i2c;
  406. memcpy(&priv->cfg, cfg, sizeof(struct rtl2830_config));
  407. /* check if the demod is there */
  408. ret = rtl2830_rd_reg(priv, 0x000, &tmp);
  409. if (ret)
  410. goto err;
  411. /* create dvb_frontend */
  412. memcpy(&priv->fe.ops, &rtl2830_ops, sizeof(struct dvb_frontend_ops));
  413. priv->fe.demodulator_priv = priv;
  414. /* create tuner i2c adapter */
  415. strlcpy(priv->tuner_i2c_adapter.name, "RTL2830 tuner I2C adapter",
  416. sizeof(priv->tuner_i2c_adapter.name));
  417. priv->tuner_i2c_adapter.algo = &rtl2830_tuner_i2c_algo;
  418. priv->tuner_i2c_adapter.algo_data = NULL;
  419. i2c_set_adapdata(&priv->tuner_i2c_adapter, priv);
  420. if (i2c_add_adapter(&priv->tuner_i2c_adapter) < 0) {
  421. err("tuner I2C bus could not be initialized");
  422. goto err;
  423. }
  424. return &priv->fe;
  425. err:
  426. dbg("%s: failed=%d", __func__, ret);
  427. kfree(priv);
  428. return NULL;
  429. }
  430. EXPORT_SYMBOL(rtl2830_attach);
  431. static struct dvb_frontend_ops rtl2830_ops = {
  432. .delsys = { SYS_DVBT },
  433. .info = {
  434. .name = "Realtek RTL2830 (DVB-T)",
  435. .caps = FE_CAN_FEC_1_2 |
  436. FE_CAN_FEC_2_3 |
  437. FE_CAN_FEC_3_4 |
  438. FE_CAN_FEC_5_6 |
  439. FE_CAN_FEC_7_8 |
  440. FE_CAN_FEC_AUTO |
  441. FE_CAN_QPSK |
  442. FE_CAN_QAM_16 |
  443. FE_CAN_QAM_64 |
  444. FE_CAN_QAM_AUTO |
  445. FE_CAN_TRANSMISSION_MODE_AUTO |
  446. FE_CAN_GUARD_INTERVAL_AUTO |
  447. FE_CAN_HIERARCHY_AUTO |
  448. FE_CAN_RECOVER |
  449. FE_CAN_MUTE_TS
  450. },
  451. .release = rtl2830_release,
  452. .init = rtl2830_init,
  453. .get_tune_settings = rtl2830_get_tune_settings,
  454. .set_frontend = rtl2830_set_frontend,
  455. .read_status = rtl2830_read_status,
  456. .read_snr = rtl2830_read_snr,
  457. .read_ber = rtl2830_read_ber,
  458. .read_ucblocks = rtl2830_read_ucblocks,
  459. .read_signal_strength = rtl2830_read_signal_strength,
  460. };
  461. MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
  462. MODULE_DESCRIPTION("Realtek RTL2830 DVB-T demodulator driver");
  463. MODULE_LICENSE("GPL");