mpi_ioc.h 44 KB

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  1. /*
  2. * Copyright (c) 2000-2005 LSI Logic Corporation.
  3. *
  4. *
  5. * Name: mpi_ioc.h
  6. * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages
  7. * Creation Date: August 11, 2000
  8. *
  9. * mpi_ioc.h Version: 01.05.09
  10. *
  11. * Version History
  12. * ---------------
  13. *
  14. * Date Version Description
  15. * -------- -------- ------------------------------------------------------
  16. * 05-08-00 00.10.01 Original release for 0.10 spec dated 4/26/2000.
  17. * 05-24-00 00.10.02 Added _MSG_IOC_INIT_REPLY structure.
  18. * 06-06-00 01.00.01 Added CurReplyFrameSize field to _MSG_IOC_FACTS_REPLY.
  19. * 06-12-00 01.00.02 Added _MSG_PORT_ENABLE_REPLY structure.
  20. * Added _MSG_EVENT_ACK_REPLY structure.
  21. * Added _MSG_FW_DOWNLOAD_REPLY structure.
  22. * Added _MSG_TOOLBOX_REPLY structure.
  23. * 06-30-00 01.00.03 Added MaxLanBuckets to _PORT_FACT_REPLY structure.
  24. * 07-27-00 01.00.04 Added _EVENT_DATA structure definitions for _SCSI,
  25. * _LINK_STATUS, _LOOP_STATE and _LOGOUT.
  26. * 08-11-00 01.00.05 Switched positions of MsgLength and Function fields in
  27. * _MSG_EVENT_ACK_REPLY structure to match specification.
  28. * 11-02-00 01.01.01 Original release for post 1.0 work.
  29. * Added a value for Manufacturer to WhoInit.
  30. * 12-04-00 01.01.02 Modified IOCFacts reply, added FWUpload messages, and
  31. * removed toolbox message.
  32. * 01-09-01 01.01.03 Added event enabled and disabled defines.
  33. * Added structures for FwHeader and DataHeader.
  34. * Added ImageType to FwUpload reply.
  35. * 02-20-01 01.01.04 Started using MPI_POINTER.
  36. * 02-27-01 01.01.05 Added event for RAID status change and its event data.
  37. * Added IocNumber field to MSG_IOC_FACTS_REPLY.
  38. * 03-27-01 01.01.06 Added defines for ProductId field of MPI_FW_HEADER.
  39. * Added structure offset comments.
  40. * 04-09-01 01.01.07 Added structure EVENT_DATA_EVENT_CHANGE.
  41. * 08-08-01 01.02.01 Original release for v1.2 work.
  42. * New format for FWVersion and ProductId in
  43. * MSG_IOC_FACTS_REPLY and MPI_FW_HEADER.
  44. * 08-31-01 01.02.02 Addded event MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE and
  45. * related structure and defines.
  46. * Added event MPI_EVENT_ON_BUS_TIMER_EXPIRED.
  47. * Added MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE.
  48. * Replaced a reserved field in MSG_IOC_FACTS_REPLY with
  49. * IOCExceptions and changed DataImageSize to reserved.
  50. * Added MPI_FW_DOWNLOAD_ITYPE_NVSTORE_DATA and
  51. * MPI_FW_UPLOAD_ITYPE_NVDATA.
  52. * 09-28-01 01.02.03 Modified Event Data for Integrated RAID.
  53. * 11-01-01 01.02.04 Added defines for MPI_EXT_IMAGE_HEADER ImageType field.
  54. * 03-14-02 01.02.05 Added HeaderVersion field to MSG_IOC_FACTS_REPLY.
  55. * 05-31-02 01.02.06 Added define for
  56. * MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID.
  57. * Added AliasIndex to EVENT_DATA_LOGOUT structure.
  58. * 04-01-03 01.02.07 Added defines for MPI_FW_HEADER_SIGNATURE_.
  59. * 06-26-03 01.02.08 Added new values to the product family defines.
  60. * 04-29-04 01.02.09 Added IOCCapabilities field to MSG_IOC_FACTS_REPLY and
  61. * added related defines.
  62. * 05-11-04 01.03.01 Original release for MPI v1.3.
  63. * 08-19-04 01.05.01 Added four new fields to MSG_IOC_INIT.
  64. * Added three new fields to MSG_IOC_FACTS_REPLY.
  65. * Defined four new bits for the IOCCapabilities field of
  66. * the IOCFacts reply.
  67. * Added two new PortTypes for the PortFacts reply.
  68. * Added six new events along with their EventData
  69. * structures.
  70. * Added a new MsgFlag to the FwDownload request to
  71. * indicate last segment.
  72. * Defined a new image type of boot loader.
  73. * Added FW family codes for SAS product families.
  74. * 10-05-04 01.05.02 Added ReplyFifoHostSignalingAddr field to
  75. * MSG_IOC_FACTS_REPLY.
  76. * 12-07-04 01.05.03 Added more defines for SAS Discovery Error event.
  77. * 12-09-04 01.05.04 Added Unsupported device to SAS Device event.
  78. * 01-15-05 01.05.05 Added event data for SAS SES Event.
  79. * 02-09-05 01.05.06 Added MPI_FW_UPLOAD_ITYPE_FW_BACKUP define.
  80. * 02-22-05 01.05.07 Added Host Page Buffer Persistent flag to IOC Facts
  81. * Reply and IOC Init Request.
  82. * 03-11-05 01.05.08 Added family code for 1068E family.
  83. * Removed IOCFacts Reply EEDP Capability bit.
  84. * 06-24-05 01.05.09 Added 5 new IOCFacts Reply IOCCapabilities bits.
  85. * Added Max SATA Targets to SAS Discovery Error event.
  86. * --------------------------------------------------------------------------
  87. */
  88. #ifndef MPI_IOC_H
  89. #define MPI_IOC_H
  90. /*****************************************************************************
  91. *
  92. * I O C M e s s a g e s
  93. *
  94. *****************************************************************************/
  95. /****************************************************************************/
  96. /* IOCInit message */
  97. /****************************************************************************/
  98. typedef struct _MSG_IOC_INIT
  99. {
  100. U8 WhoInit; /* 00h */
  101. U8 Reserved; /* 01h */
  102. U8 ChainOffset; /* 02h */
  103. U8 Function; /* 03h */
  104. U8 Flags; /* 04h */
  105. U8 MaxDevices; /* 05h */
  106. U8 MaxBuses; /* 06h */
  107. U8 MsgFlags; /* 07h */
  108. U32 MsgContext; /* 08h */
  109. U16 ReplyFrameSize; /* 0Ch */
  110. U8 Reserved1[2]; /* 0Eh */
  111. U32 HostMfaHighAddr; /* 10h */
  112. U32 SenseBufferHighAddr; /* 14h */
  113. U32 ReplyFifoHostSignalingAddr; /* 18h */
  114. SGE_SIMPLE_UNION HostPageBufferSGE; /* 1Ch */
  115. U16 MsgVersion; /* 28h */
  116. U16 HeaderVersion; /* 2Ah */
  117. } MSG_IOC_INIT, MPI_POINTER PTR_MSG_IOC_INIT,
  118. IOCInit_t, MPI_POINTER pIOCInit_t;
  119. /* WhoInit values */
  120. #define MPI_WHOINIT_NO_ONE (0x00)
  121. #define MPI_WHOINIT_SYSTEM_BIOS (0x01)
  122. #define MPI_WHOINIT_ROM_BIOS (0x02)
  123. #define MPI_WHOINIT_PCI_PEER (0x03)
  124. #define MPI_WHOINIT_HOST_DRIVER (0x04)
  125. #define MPI_WHOINIT_MANUFACTURER (0x05)
  126. /* Flags values */
  127. #define MPI_IOCINIT_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  128. #define MPI_IOCINIT_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  129. #define MPI_IOCINIT_FLAGS_DISCARD_FW_IMAGE (0x01)
  130. /* MsgVersion */
  131. #define MPI_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00)
  132. #define MPI_IOCINIT_MSGVERSION_MAJOR_SHIFT (8)
  133. #define MPI_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF)
  134. #define MPI_IOCINIT_MSGVERSION_MINOR_SHIFT (0)
  135. /* HeaderVersion */
  136. #define MPI_IOCINIT_HEADERVERSION_UNIT_MASK (0xFF00)
  137. #define MPI_IOCINIT_HEADERVERSION_UNIT_SHIFT (8)
  138. #define MPI_IOCINIT_HEADERVERSION_DEV_MASK (0x00FF)
  139. #define MPI_IOCINIT_HEADERVERSION_DEV_SHIFT (0)
  140. typedef struct _MSG_IOC_INIT_REPLY
  141. {
  142. U8 WhoInit; /* 00h */
  143. U8 Reserved; /* 01h */
  144. U8 MsgLength; /* 02h */
  145. U8 Function; /* 03h */
  146. U8 Flags; /* 04h */
  147. U8 MaxDevices; /* 05h */
  148. U8 MaxBuses; /* 06h */
  149. U8 MsgFlags; /* 07h */
  150. U32 MsgContext; /* 08h */
  151. U16 Reserved2; /* 0Ch */
  152. U16 IOCStatus; /* 0Eh */
  153. U32 IOCLogInfo; /* 10h */
  154. } MSG_IOC_INIT_REPLY, MPI_POINTER PTR_MSG_IOC_INIT_REPLY,
  155. IOCInitReply_t, MPI_POINTER pIOCInitReply_t;
  156. /****************************************************************************/
  157. /* IOC Facts message */
  158. /****************************************************************************/
  159. typedef struct _MSG_IOC_FACTS
  160. {
  161. U8 Reserved[2]; /* 00h */
  162. U8 ChainOffset; /* 01h */
  163. U8 Function; /* 02h */
  164. U8 Reserved1[3]; /* 03h */
  165. U8 MsgFlags; /* 04h */
  166. U32 MsgContext; /* 08h */
  167. } MSG_IOC_FACTS, MPI_POINTER PTR_IOC_FACTS,
  168. IOCFacts_t, MPI_POINTER pIOCFacts_t;
  169. typedef struct _MPI_FW_VERSION_STRUCT
  170. {
  171. U8 Dev; /* 00h */
  172. U8 Unit; /* 01h */
  173. U8 Minor; /* 02h */
  174. U8 Major; /* 03h */
  175. } MPI_FW_VERSION_STRUCT;
  176. typedef union _MPI_FW_VERSION
  177. {
  178. MPI_FW_VERSION_STRUCT Struct;
  179. U32 Word;
  180. } MPI_FW_VERSION;
  181. /* IOC Facts Reply */
  182. typedef struct _MSG_IOC_FACTS_REPLY
  183. {
  184. U16 MsgVersion; /* 00h */
  185. U8 MsgLength; /* 02h */
  186. U8 Function; /* 03h */
  187. U16 HeaderVersion; /* 04h */
  188. U8 IOCNumber; /* 06h */
  189. U8 MsgFlags; /* 07h */
  190. U32 MsgContext; /* 08h */
  191. U16 IOCExceptions; /* 0Ch */
  192. U16 IOCStatus; /* 0Eh */
  193. U32 IOCLogInfo; /* 10h */
  194. U8 MaxChainDepth; /* 14h */
  195. U8 WhoInit; /* 15h */
  196. U8 BlockSize; /* 16h */
  197. U8 Flags; /* 17h */
  198. U16 ReplyQueueDepth; /* 18h */
  199. U16 RequestFrameSize; /* 1Ah */
  200. U16 Reserved_0101_FWVersion; /* 1Ch */ /* obsolete 16-bit FWVersion */
  201. U16 ProductID; /* 1Eh */
  202. U32 CurrentHostMfaHighAddr; /* 20h */
  203. U16 GlobalCredits; /* 24h */
  204. U8 NumberOfPorts; /* 26h */
  205. U8 EventState; /* 27h */
  206. U32 CurrentSenseBufferHighAddr; /* 28h */
  207. U16 CurReplyFrameSize; /* 2Ch */
  208. U8 MaxDevices; /* 2Eh */
  209. U8 MaxBuses; /* 2Fh */
  210. U32 FWImageSize; /* 30h */
  211. U32 IOCCapabilities; /* 34h */
  212. MPI_FW_VERSION FWVersion; /* 38h */
  213. U16 HighPriorityQueueDepth; /* 3Ch */
  214. U16 Reserved2; /* 3Eh */
  215. SGE_SIMPLE_UNION HostPageBufferSGE; /* 40h */
  216. U32 ReplyFifoHostSignalingAddr; /* 4Ch */
  217. } MSG_IOC_FACTS_REPLY, MPI_POINTER PTR_MSG_IOC_FACTS_REPLY,
  218. IOCFactsReply_t, MPI_POINTER pIOCFactsReply_t;
  219. #define MPI_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00)
  220. #define MPI_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8)
  221. #define MPI_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF)
  222. #define MPI_IOCFACTS_MSGVERSION_MINOR_SHIFT (0)
  223. #define MPI_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00)
  224. #define MPI_IOCFACTS_HDRVERSION_UNIT_SHIFT (8)
  225. #define MPI_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF)
  226. #define MPI_IOCFACTS_HDRVERSION_DEV_SHIFT (0)
  227. #define MPI_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001)
  228. #define MPI_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002)
  229. #define MPI_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004)
  230. #define MPI_IOCFACTS_EXCEPT_PERSISTENT_TABLE_FULL (0x0008)
  231. #define MPI_IOCFACTS_FLAGS_FW_DOWNLOAD_BOOT (0x01)
  232. #define MPI_IOCFACTS_FLAGS_REPLY_FIFO_HOST_SIGNAL (0x02)
  233. #define MPI_IOCFACTS_FLAGS_HOST_PAGE_BUFFER_PERSISTENT (0x04)
  234. #define MPI_IOCFACTS_EVENTSTATE_DISABLED (0x00)
  235. #define MPI_IOCFACTS_EVENTSTATE_ENABLED (0x01)
  236. #define MPI_IOCFACTS_CAPABILITY_HIGH_PRI_Q (0x00000001)
  237. #define MPI_IOCFACTS_CAPABILITY_REPLY_HOST_SIGNAL (0x00000002)
  238. #define MPI_IOCFACTS_CAPABILITY_QUEUE_FULL_HANDLING (0x00000004)
  239. #define MPI_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008)
  240. #define MPI_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010)
  241. #define MPI_IOCFACTS_CAPABILITY_EXTENDED_BUFFER (0x00000020)
  242. #define MPI_IOCFACTS_CAPABILITY_EEDP (0x00000040)
  243. #define MPI_IOCFACTS_CAPABILITY_BIDIRECTIONAL (0x00000080)
  244. #define MPI_IOCFACTS_CAPABILITY_MULTICAST (0x00000100)
  245. #define MPI_IOCFACTS_CAPABILITY_SCSIIO32 (0x00000200)
  246. #define MPI_IOCFACTS_CAPABILITY_NO_SCSIIO16 (0x00000400)
  247. /*****************************************************************************
  248. *
  249. * P o r t M e s s a g e s
  250. *
  251. *****************************************************************************/
  252. /****************************************************************************/
  253. /* Port Facts message and Reply */
  254. /****************************************************************************/
  255. typedef struct _MSG_PORT_FACTS
  256. {
  257. U8 Reserved[2]; /* 00h */
  258. U8 ChainOffset; /* 02h */
  259. U8 Function; /* 03h */
  260. U8 Reserved1[2]; /* 04h */
  261. U8 PortNumber; /* 06h */
  262. U8 MsgFlags; /* 07h */
  263. U32 MsgContext; /* 08h */
  264. } MSG_PORT_FACTS, MPI_POINTER PTR_MSG_PORT_FACTS,
  265. PortFacts_t, MPI_POINTER pPortFacts_t;
  266. typedef struct _MSG_PORT_FACTS_REPLY
  267. {
  268. U16 Reserved; /* 00h */
  269. U8 MsgLength; /* 02h */
  270. U8 Function; /* 03h */
  271. U16 Reserved1; /* 04h */
  272. U8 PortNumber; /* 06h */
  273. U8 MsgFlags; /* 07h */
  274. U32 MsgContext; /* 08h */
  275. U16 Reserved2; /* 0Ch */
  276. U16 IOCStatus; /* 0Eh */
  277. U32 IOCLogInfo; /* 10h */
  278. U8 Reserved3; /* 14h */
  279. U8 PortType; /* 15h */
  280. U16 MaxDevices; /* 16h */
  281. U16 PortSCSIID; /* 18h */
  282. U16 ProtocolFlags; /* 1Ah */
  283. U16 MaxPostedCmdBuffers; /* 1Ch */
  284. U16 MaxPersistentIDs; /* 1Eh */
  285. U16 MaxLanBuckets; /* 20h */
  286. U16 Reserved4; /* 22h */
  287. U32 Reserved5; /* 24h */
  288. } MSG_PORT_FACTS_REPLY, MPI_POINTER PTR_MSG_PORT_FACTS_REPLY,
  289. PortFactsReply_t, MPI_POINTER pPortFactsReply_t;
  290. /* PortTypes values */
  291. #define MPI_PORTFACTS_PORTTYPE_INACTIVE (0x00)
  292. #define MPI_PORTFACTS_PORTTYPE_SCSI (0x01)
  293. #define MPI_PORTFACTS_PORTTYPE_FC (0x10)
  294. #define MPI_PORTFACTS_PORTTYPE_ISCSI (0x20)
  295. #define MPI_PORTFACTS_PORTTYPE_SAS (0x30)
  296. /* ProtocolFlags values */
  297. #define MPI_PORTFACTS_PROTOCOL_LOGBUSADDR (0x01)
  298. #define MPI_PORTFACTS_PROTOCOL_LAN (0x02)
  299. #define MPI_PORTFACTS_PROTOCOL_TARGET (0x04)
  300. #define MPI_PORTFACTS_PROTOCOL_INITIATOR (0x08)
  301. /****************************************************************************/
  302. /* Port Enable Message */
  303. /****************************************************************************/
  304. typedef struct _MSG_PORT_ENABLE
  305. {
  306. U8 Reserved[2]; /* 00h */
  307. U8 ChainOffset; /* 02h */
  308. U8 Function; /* 03h */
  309. U8 Reserved1[2]; /* 04h */
  310. U8 PortNumber; /* 06h */
  311. U8 MsgFlags; /* 07h */
  312. U32 MsgContext; /* 08h */
  313. } MSG_PORT_ENABLE, MPI_POINTER PTR_MSG_PORT_ENABLE,
  314. PortEnable_t, MPI_POINTER pPortEnable_t;
  315. typedef struct _MSG_PORT_ENABLE_REPLY
  316. {
  317. U8 Reserved[2]; /* 00h */
  318. U8 MsgLength; /* 02h */
  319. U8 Function; /* 03h */
  320. U8 Reserved1[2]; /* 04h */
  321. U8 PortNumber; /* 05h */
  322. U8 MsgFlags; /* 07h */
  323. U32 MsgContext; /* 08h */
  324. U16 Reserved2; /* 0Ch */
  325. U16 IOCStatus; /* 0Eh */
  326. U32 IOCLogInfo; /* 10h */
  327. } MSG_PORT_ENABLE_REPLY, MPI_POINTER PTR_MSG_PORT_ENABLE_REPLY,
  328. PortEnableReply_t, MPI_POINTER pPortEnableReply_t;
  329. /*****************************************************************************
  330. *
  331. * E v e n t M e s s a g e s
  332. *
  333. *****************************************************************************/
  334. /****************************************************************************/
  335. /* Event Notification messages */
  336. /****************************************************************************/
  337. typedef struct _MSG_EVENT_NOTIFY
  338. {
  339. U8 Switch; /* 00h */
  340. U8 Reserved; /* 01h */
  341. U8 ChainOffset; /* 02h */
  342. U8 Function; /* 03h */
  343. U8 Reserved1[3]; /* 04h */
  344. U8 MsgFlags; /* 07h */
  345. U32 MsgContext; /* 08h */
  346. } MSG_EVENT_NOTIFY, MPI_POINTER PTR_MSG_EVENT_NOTIFY,
  347. EventNotification_t, MPI_POINTER pEventNotification_t;
  348. /* Event Notification Reply */
  349. typedef struct _MSG_EVENT_NOTIFY_REPLY
  350. {
  351. U16 EventDataLength; /* 00h */
  352. U8 MsgLength; /* 02h */
  353. U8 Function; /* 03h */
  354. U8 Reserved1[2]; /* 04h */
  355. U8 AckRequired; /* 06h */
  356. U8 MsgFlags; /* 07h */
  357. U32 MsgContext; /* 08h */
  358. U8 Reserved2[2]; /* 0Ch */
  359. U16 IOCStatus; /* 0Eh */
  360. U32 IOCLogInfo; /* 10h */
  361. U32 Event; /* 14h */
  362. U32 EventContext; /* 18h */
  363. U32 Data[1]; /* 1Ch */
  364. } MSG_EVENT_NOTIFY_REPLY, MPI_POINTER PTR_MSG_EVENT_NOTIFY_REPLY,
  365. EventNotificationReply_t, MPI_POINTER pEventNotificationReply_t;
  366. /* Event Acknowledge */
  367. typedef struct _MSG_EVENT_ACK
  368. {
  369. U8 Reserved[2]; /* 00h */
  370. U8 ChainOffset; /* 02h */
  371. U8 Function; /* 03h */
  372. U8 Reserved1[3]; /* 04h */
  373. U8 MsgFlags; /* 07h */
  374. U32 MsgContext; /* 08h */
  375. U32 Event; /* 0Ch */
  376. U32 EventContext; /* 10h */
  377. } MSG_EVENT_ACK, MPI_POINTER PTR_MSG_EVENT_ACK,
  378. EventAck_t, MPI_POINTER pEventAck_t;
  379. typedef struct _MSG_EVENT_ACK_REPLY
  380. {
  381. U8 Reserved[2]; /* 00h */
  382. U8 MsgLength; /* 02h */
  383. U8 Function; /* 03h */
  384. U8 Reserved1[3]; /* 04h */
  385. U8 MsgFlags; /* 07h */
  386. U32 MsgContext; /* 08h */
  387. U16 Reserved2; /* 0Ch */
  388. U16 IOCStatus; /* 0Eh */
  389. U32 IOCLogInfo; /* 10h */
  390. } MSG_EVENT_ACK_REPLY, MPI_POINTER PTR_MSG_EVENT_ACK_REPLY,
  391. EventAckReply_t, MPI_POINTER pEventAckReply_t;
  392. /* Switch */
  393. #define MPI_EVENT_NOTIFICATION_SWITCH_OFF (0x00)
  394. #define MPI_EVENT_NOTIFICATION_SWITCH_ON (0x01)
  395. /* Event */
  396. #define MPI_EVENT_NONE (0x00000000)
  397. #define MPI_EVENT_LOG_DATA (0x00000001)
  398. #define MPI_EVENT_STATE_CHANGE (0x00000002)
  399. #define MPI_EVENT_UNIT_ATTENTION (0x00000003)
  400. #define MPI_EVENT_IOC_BUS_RESET (0x00000004)
  401. #define MPI_EVENT_EXT_BUS_RESET (0x00000005)
  402. #define MPI_EVENT_RESCAN (0x00000006)
  403. #define MPI_EVENT_LINK_STATUS_CHANGE (0x00000007)
  404. #define MPI_EVENT_LOOP_STATE_CHANGE (0x00000008)
  405. #define MPI_EVENT_LOGOUT (0x00000009)
  406. #define MPI_EVENT_EVENT_CHANGE (0x0000000A)
  407. #define MPI_EVENT_INTEGRATED_RAID (0x0000000B)
  408. #define MPI_EVENT_SCSI_DEVICE_STATUS_CHANGE (0x0000000C)
  409. #define MPI_EVENT_ON_BUS_TIMER_EXPIRED (0x0000000D)
  410. #define MPI_EVENT_QUEUE_FULL (0x0000000E)
  411. #define MPI_EVENT_SAS_DEVICE_STATUS_CHANGE (0x0000000F)
  412. #define MPI_EVENT_SAS_SES (0x00000010)
  413. #define MPI_EVENT_PERSISTENT_TABLE_FULL (0x00000011)
  414. #define MPI_EVENT_SAS_PHY_LINK_STATUS (0x00000012)
  415. #define MPI_EVENT_SAS_DISCOVERY_ERROR (0x00000013)
  416. /* AckRequired field values */
  417. #define MPI_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00)
  418. #define MPI_EVENT_NOTIFICATION_ACK_REQUIRED (0x01)
  419. /* EventChange Event data */
  420. typedef struct _EVENT_DATA_EVENT_CHANGE
  421. {
  422. U8 EventState; /* 00h */
  423. U8 Reserved; /* 01h */
  424. U16 Reserved1; /* 02h */
  425. } EVENT_DATA_EVENT_CHANGE, MPI_POINTER PTR_EVENT_DATA_EVENT_CHANGE,
  426. EventDataEventChange_t, MPI_POINTER pEventDataEventChange_t;
  427. /* SCSI Event data for Port, Bus and Device forms */
  428. typedef struct _EVENT_DATA_SCSI
  429. {
  430. U8 TargetID; /* 00h */
  431. U8 BusPort; /* 01h */
  432. U16 Reserved; /* 02h */
  433. } EVENT_DATA_SCSI, MPI_POINTER PTR_EVENT_DATA_SCSI,
  434. EventDataScsi_t, MPI_POINTER pEventDataScsi_t;
  435. /* SCSI Device Status Change Event data */
  436. typedef struct _EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE
  437. {
  438. U8 TargetID; /* 00h */
  439. U8 Bus; /* 01h */
  440. U8 ReasonCode; /* 02h */
  441. U8 LUN; /* 03h */
  442. U8 ASC; /* 04h */
  443. U8 ASCQ; /* 05h */
  444. U16 Reserved; /* 06h */
  445. } EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  446. MPI_POINTER PTR_EVENT_DATA_SCSI_DEVICE_STATUS_CHANGE,
  447. MpiEventDataScsiDeviceStatusChange_t,
  448. MPI_POINTER pMpiEventDataScsiDeviceStatusChange_t;
  449. /* MPI SCSI Device Status Change Event data ReasonCode values */
  450. #define MPI_EVENT_SCSI_DEV_STAT_RC_ADDED (0x03)
  451. #define MPI_EVENT_SCSI_DEV_STAT_RC_NOT_RESPONDING (0x04)
  452. #define MPI_EVENT_SCSI_DEV_STAT_RC_SMART_DATA (0x05)
  453. /* SAS Device Status Change Event data */
  454. typedef struct _EVENT_DATA_SAS_DEVICE_STATUS_CHANGE
  455. {
  456. U8 TargetID; /* 00h */
  457. U8 Bus; /* 01h */
  458. U8 ReasonCode; /* 02h */
  459. U8 Reserved; /* 03h */
  460. U8 ASC; /* 04h */
  461. U8 ASCQ; /* 05h */
  462. U16 DevHandle; /* 06h */
  463. U32 DeviceInfo; /* 08h */
  464. U16 ParentDevHandle; /* 0Ch */
  465. U8 PhyNum; /* 0Eh */
  466. U8 Reserved1; /* 0Fh */
  467. U64 SASAddress; /* 10h */
  468. } EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  469. MPI_POINTER PTR_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE,
  470. MpiEventDataSasDeviceStatusChange_t,
  471. MPI_POINTER pMpiEventDataSasDeviceStatusChange_t;
  472. /* MPI SAS Device Status Change Event data ReasonCode values */
  473. #define MPI_EVENT_SAS_DEV_STAT_RC_ADDED (0x03)
  474. #define MPI_EVENT_SAS_DEV_STAT_RC_NOT_RESPONDING (0x04)
  475. #define MPI_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05)
  476. #define MPI_EVENT_SAS_DEV_STAT_RC_NO_PERSIST_ADDED (0x06)
  477. #define MPI_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07)
  478. /* SCSI Event data for Queue Full event */
  479. typedef struct _EVENT_DATA_QUEUE_FULL
  480. {
  481. U8 TargetID; /* 00h */
  482. U8 Bus; /* 01h */
  483. U16 CurrentDepth; /* 02h */
  484. } EVENT_DATA_QUEUE_FULL, MPI_POINTER PTR_EVENT_DATA_QUEUE_FULL,
  485. EventDataQueueFull_t, MPI_POINTER pEventDataQueueFull_t;
  486. /* MPI Integrated RAID Event data */
  487. typedef struct _EVENT_DATA_RAID
  488. {
  489. U8 VolumeID; /* 00h */
  490. U8 VolumeBus; /* 01h */
  491. U8 ReasonCode; /* 02h */
  492. U8 PhysDiskNum; /* 03h */
  493. U8 ASC; /* 04h */
  494. U8 ASCQ; /* 05h */
  495. U16 Reserved; /* 06h */
  496. U32 SettingsStatus; /* 08h */
  497. } EVENT_DATA_RAID, MPI_POINTER PTR_EVENT_DATA_RAID,
  498. MpiEventDataRaid_t, MPI_POINTER pMpiEventDataRaid_t;
  499. /* MPI Integrated RAID Event data ReasonCode values */
  500. #define MPI_EVENT_RAID_RC_VOLUME_CREATED (0x00)
  501. #define MPI_EVENT_RAID_RC_VOLUME_DELETED (0x01)
  502. #define MPI_EVENT_RAID_RC_VOLUME_SETTINGS_CHANGED (0x02)
  503. #define MPI_EVENT_RAID_RC_VOLUME_STATUS_CHANGED (0x03)
  504. #define MPI_EVENT_RAID_RC_VOLUME_PHYSDISK_CHANGED (0x04)
  505. #define MPI_EVENT_RAID_RC_PHYSDISK_CREATED (0x05)
  506. #define MPI_EVENT_RAID_RC_PHYSDISK_DELETED (0x06)
  507. #define MPI_EVENT_RAID_RC_PHYSDISK_SETTINGS_CHANGED (0x07)
  508. #define MPI_EVENT_RAID_RC_PHYSDISK_STATUS_CHANGED (0x08)
  509. #define MPI_EVENT_RAID_RC_DOMAIN_VAL_NEEDED (0x09)
  510. #define MPI_EVENT_RAID_RC_SMART_DATA (0x0A)
  511. #define MPI_EVENT_RAID_RC_REPLACE_ACTION_STARTED (0x0B)
  512. /* MPI Link Status Change Event data */
  513. typedef struct _EVENT_DATA_LINK_STATUS
  514. {
  515. U8 State; /* 00h */
  516. U8 Reserved; /* 01h */
  517. U16 Reserved1; /* 02h */
  518. U8 Reserved2; /* 04h */
  519. U8 Port; /* 05h */
  520. U16 Reserved3; /* 06h */
  521. } EVENT_DATA_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_LINK_STATUS,
  522. EventDataLinkStatus_t, MPI_POINTER pEventDataLinkStatus_t;
  523. #define MPI_EVENT_LINK_STATUS_FAILURE (0x00000000)
  524. #define MPI_EVENT_LINK_STATUS_ACTIVE (0x00000001)
  525. /* MPI Loop State Change Event data */
  526. typedef struct _EVENT_DATA_LOOP_STATE
  527. {
  528. U8 Character4; /* 00h */
  529. U8 Character3; /* 01h */
  530. U8 Type; /* 02h */
  531. U8 Reserved; /* 03h */
  532. U8 Reserved1; /* 04h */
  533. U8 Port; /* 05h */
  534. U16 Reserved2; /* 06h */
  535. } EVENT_DATA_LOOP_STATE, MPI_POINTER PTR_EVENT_DATA_LOOP_STATE,
  536. EventDataLoopState_t, MPI_POINTER pEventDataLoopState_t;
  537. #define MPI_EVENT_LOOP_STATE_CHANGE_LIP (0x0001)
  538. #define MPI_EVENT_LOOP_STATE_CHANGE_LPE (0x0002)
  539. #define MPI_EVENT_LOOP_STATE_CHANGE_LPB (0x0003)
  540. /* MPI LOGOUT Event data */
  541. typedef struct _EVENT_DATA_LOGOUT
  542. {
  543. U32 NPortID; /* 00h */
  544. U8 AliasIndex; /* 04h */
  545. U8 Port; /* 05h */
  546. U16 Reserved1; /* 06h */
  547. } EVENT_DATA_LOGOUT, MPI_POINTER PTR_EVENT_DATA_LOGOUT,
  548. EventDataLogout_t, MPI_POINTER pEventDataLogout_t;
  549. #define MPI_EVENT_LOGOUT_ALL_ALIASES (0xFF)
  550. /* SAS SES Event data */
  551. typedef struct _EVENT_DATA_SAS_SES
  552. {
  553. U8 PhyNum; /* 00h */
  554. U8 Port; /* 01h */
  555. U8 PortWidth; /* 02h */
  556. U8 Reserved1; /* 04h */
  557. } EVENT_DATA_SAS_SES, MPI_POINTER PTR_EVENT_DATA_SAS_SES,
  558. MpiEventDataSasSes_t, MPI_POINTER pMpiEventDataSasSes_t;
  559. /* SAS Phy Link Status Event data */
  560. typedef struct _EVENT_DATA_SAS_PHY_LINK_STATUS
  561. {
  562. U8 PhyNum; /* 00h */
  563. U8 LinkRates; /* 01h */
  564. U16 DevHandle; /* 02h */
  565. U64 SASAddress; /* 04h */
  566. } EVENT_DATA_SAS_PHY_LINK_STATUS, MPI_POINTER PTR_EVENT_DATA_SAS_PHY_LINK_STATUS,
  567. MpiEventDataSasPhyLinkStatus_t, MPI_POINTER pMpiEventDataSasPhyLinkStatus_t;
  568. /* defines for the LinkRates field of the SAS PHY Link Status event */
  569. #define MPI_EVENT_SAS_PLS_LR_CURRENT_MASK (0xF0)
  570. #define MPI_EVENT_SAS_PLS_LR_CURRENT_SHIFT (4)
  571. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_MASK (0x0F)
  572. #define MPI_EVENT_SAS_PLS_LR_PREVIOUS_SHIFT (0)
  573. #define MPI_EVENT_SAS_PLS_LR_RATE_UNKNOWN (0x00)
  574. #define MPI_EVENT_SAS_PLS_LR_RATE_PHY_DISABLED (0x01)
  575. #define MPI_EVENT_SAS_PLS_LR_RATE_FAILED_SPEED_NEGOTIATION (0x02)
  576. #define MPI_EVENT_SAS_PLS_LR_RATE_SATA_OOB_COMPLETE (0x03)
  577. #define MPI_EVENT_SAS_PLS_LR_RATE_1_5 (0x08)
  578. #define MPI_EVENT_SAS_PLS_LR_RATE_3_0 (0x09)
  579. /* SAS Discovery Errror Event data */
  580. typedef struct _EVENT_DATA_DISCOVERY_ERROR
  581. {
  582. U32 DiscoveryStatus; /* 00h */
  583. U8 Port; /* 04h */
  584. U8 Reserved1; /* 05h */
  585. U16 Reserved2; /* 06h */
  586. } EVENT_DATA_DISCOVERY_ERROR, MPI_POINTER PTR_EVENT_DATA_DISCOVERY_ERROR,
  587. EventDataDiscoveryError_t, MPI_POINTER pEventDataDiscoveryError_t;
  588. #define MPI_EVENT_DSCVRY_ERR_DS_LOOP_DETECTED (0x00000001)
  589. #define MPI_EVENT_DSCVRY_ERR_DS_UNADDRESSABLE_DEVICE (0x00000002)
  590. #define MPI_EVENT_DSCVRY_ERR_DS_MULTIPLE_PORTS (0x00000004)
  591. #define MPI_EVENT_DSCVRY_ERR_DS_EXPANDER_ERR (0x00000008)
  592. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_TIMEOUT (0x00000010)
  593. #define MPI_EVENT_DSCVRY_ERR_DS_OUT_ROUTE_ENTRIES (0x00000020)
  594. #define MPI_EVENT_DSCVRY_ERR_DS_INDEX_NOT_EXIST (0x00000040)
  595. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_FUNCTION_FAILED (0x00000080)
  596. #define MPI_EVENT_DSCVRY_ERR_DS_SMP_CRC_ERROR (0x00000100)
  597. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_SUBTRACTIVE (0x00000200)
  598. #define MPI_EVENT_DSCVRY_ERR_DS_TABLE_TO_TABLE (0x00000400)
  599. #define MPI_EVENT_DSCVRY_ERR_DS_MULTPL_PATHS (0x00000800)
  600. #define MPI_EVENT_DSCVRY_ERR_DS_MAX_SATA_TARGETS (0x00001000)
  601. /*****************************************************************************
  602. *
  603. * F i r m w a r e L o a d M e s s a g e s
  604. *
  605. *****************************************************************************/
  606. /****************************************************************************/
  607. /* Firmware Download message and associated structures */
  608. /****************************************************************************/
  609. typedef struct _MSG_FW_DOWNLOAD
  610. {
  611. U8 ImageType; /* 00h */
  612. U8 Reserved; /* 01h */
  613. U8 ChainOffset; /* 02h */
  614. U8 Function; /* 03h */
  615. U8 Reserved1[3]; /* 04h */
  616. U8 MsgFlags; /* 07h */
  617. U32 MsgContext; /* 08h */
  618. SGE_MPI_UNION SGL; /* 0Ch */
  619. } MSG_FW_DOWNLOAD, MPI_POINTER PTR_MSG_FW_DOWNLOAD,
  620. FWDownload_t, MPI_POINTER pFWDownload_t;
  621. #define MPI_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01)
  622. #define MPI_FW_DOWNLOAD_ITYPE_RESERVED (0x00)
  623. #define MPI_FW_DOWNLOAD_ITYPE_FW (0x01)
  624. #define MPI_FW_DOWNLOAD_ITYPE_BIOS (0x02)
  625. #define MPI_FW_DOWNLOAD_ITYPE_NVDATA (0x03)
  626. #define MPI_FW_DOWNLOAD_ITYPE_BOOTLOADER (0x04)
  627. typedef struct _FWDownloadTCSGE
  628. {
  629. U8 Reserved; /* 00h */
  630. U8 ContextSize; /* 01h */
  631. U8 DetailsLength; /* 02h */
  632. U8 Flags; /* 03h */
  633. U32 Reserved_0100_Checksum; /* 04h */ /* obsolete Checksum */
  634. U32 ImageOffset; /* 08h */
  635. U32 ImageSize; /* 0Ch */
  636. } FW_DOWNLOAD_TCSGE, MPI_POINTER PTR_FW_DOWNLOAD_TCSGE,
  637. FWDownloadTCSGE_t, MPI_POINTER pFWDownloadTCSGE_t;
  638. /* Firmware Download reply */
  639. typedef struct _MSG_FW_DOWNLOAD_REPLY
  640. {
  641. U8 ImageType; /* 00h */
  642. U8 Reserved; /* 01h */
  643. U8 MsgLength; /* 02h */
  644. U8 Function; /* 03h */
  645. U8 Reserved1[3]; /* 04h */
  646. U8 MsgFlags; /* 07h */
  647. U32 MsgContext; /* 08h */
  648. U16 Reserved2; /* 0Ch */
  649. U16 IOCStatus; /* 0Eh */
  650. U32 IOCLogInfo; /* 10h */
  651. } MSG_FW_DOWNLOAD_REPLY, MPI_POINTER PTR_MSG_FW_DOWNLOAD_REPLY,
  652. FWDownloadReply_t, MPI_POINTER pFWDownloadReply_t;
  653. /****************************************************************************/
  654. /* Firmware Upload message and associated structures */
  655. /****************************************************************************/
  656. typedef struct _MSG_FW_UPLOAD
  657. {
  658. U8 ImageType; /* 00h */
  659. U8 Reserved; /* 01h */
  660. U8 ChainOffset; /* 02h */
  661. U8 Function; /* 03h */
  662. U8 Reserved1[3]; /* 04h */
  663. U8 MsgFlags; /* 07h */
  664. U32 MsgContext; /* 08h */
  665. SGE_MPI_UNION SGL; /* 0Ch */
  666. } MSG_FW_UPLOAD, MPI_POINTER PTR_MSG_FW_UPLOAD,
  667. FWUpload_t, MPI_POINTER pFWUpload_t;
  668. #define MPI_FW_UPLOAD_ITYPE_FW_IOC_MEM (0x00)
  669. #define MPI_FW_UPLOAD_ITYPE_FW_FLASH (0x01)
  670. #define MPI_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02)
  671. #define MPI_FW_UPLOAD_ITYPE_NVDATA (0x03)
  672. #define MPI_FW_UPLOAD_ITYPE_BOOTLOADER (0x04)
  673. #define MPI_FW_UPLOAD_ITYPE_FW_BACKUP (0x05)
  674. typedef struct _FWUploadTCSGE
  675. {
  676. U8 Reserved; /* 00h */
  677. U8 ContextSize; /* 01h */
  678. U8 DetailsLength; /* 02h */
  679. U8 Flags; /* 03h */
  680. U32 Reserved1; /* 04h */
  681. U32 ImageOffset; /* 08h */
  682. U32 ImageSize; /* 0Ch */
  683. } FW_UPLOAD_TCSGE, MPI_POINTER PTR_FW_UPLOAD_TCSGE,
  684. FWUploadTCSGE_t, MPI_POINTER pFWUploadTCSGE_t;
  685. /* Firmware Upload reply */
  686. typedef struct _MSG_FW_UPLOAD_REPLY
  687. {
  688. U8 ImageType; /* 00h */
  689. U8 Reserved; /* 01h */
  690. U8 MsgLength; /* 02h */
  691. U8 Function; /* 03h */
  692. U8 Reserved1[3]; /* 04h */
  693. U8 MsgFlags; /* 07h */
  694. U32 MsgContext; /* 08h */
  695. U16 Reserved2; /* 0Ch */
  696. U16 IOCStatus; /* 0Eh */
  697. U32 IOCLogInfo; /* 10h */
  698. U32 ActualImageSize; /* 14h */
  699. } MSG_FW_UPLOAD_REPLY, MPI_POINTER PTR_MSG_FW_UPLOAD_REPLY,
  700. FWUploadReply_t, MPI_POINTER pFWUploadReply_t;
  701. typedef struct _MPI_FW_HEADER
  702. {
  703. U32 ArmBranchInstruction0; /* 00h */
  704. U32 Signature0; /* 04h */
  705. U32 Signature1; /* 08h */
  706. U32 Signature2; /* 0Ch */
  707. U32 ArmBranchInstruction1; /* 10h */
  708. U32 ArmBranchInstruction2; /* 14h */
  709. U32 Reserved; /* 18h */
  710. U32 Checksum; /* 1Ch */
  711. U16 VendorId; /* 20h */
  712. U16 ProductId; /* 22h */
  713. MPI_FW_VERSION FWVersion; /* 24h */
  714. U32 SeqCodeVersion; /* 28h */
  715. U32 ImageSize; /* 2Ch */
  716. U32 NextImageHeaderOffset; /* 30h */
  717. U32 LoadStartAddress; /* 34h */
  718. U32 IopResetVectorValue; /* 38h */
  719. U32 IopResetRegAddr; /* 3Ch */
  720. U32 VersionNameWhat; /* 40h */
  721. U8 VersionName[32]; /* 44h */
  722. U32 VendorNameWhat; /* 64h */
  723. U8 VendorName[32]; /* 68h */
  724. } MPI_FW_HEADER, MPI_POINTER PTR_MPI_FW_HEADER,
  725. MpiFwHeader_t, MPI_POINTER pMpiFwHeader_t;
  726. #define MPI_FW_HEADER_WHAT_SIGNATURE (0x29232840)
  727. /* defines for using the ProductId field */
  728. #define MPI_FW_HEADER_PID_TYPE_MASK (0xF000)
  729. #define MPI_FW_HEADER_PID_TYPE_SCSI (0x0000)
  730. #define MPI_FW_HEADER_PID_TYPE_FC (0x1000)
  731. #define MPI_FW_HEADER_PID_TYPE_SAS (0x2000)
  732. #define MPI_FW_HEADER_SIGNATURE_0 (0x5AEAA55A)
  733. #define MPI_FW_HEADER_SIGNATURE_1 (0xA55AEAA5)
  734. #define MPI_FW_HEADER_SIGNATURE_2 (0x5AA55AEA)
  735. #define MPI_FW_HEADER_PID_PROD_MASK (0x0F00)
  736. #define MPI_FW_HEADER_PID_PROD_INITIATOR_SCSI (0x0100)
  737. #define MPI_FW_HEADER_PID_PROD_TARGET_INITIATOR_SCSI (0x0200)
  738. #define MPI_FW_HEADER_PID_PROD_TARGET_SCSI (0x0300)
  739. #define MPI_FW_HEADER_PID_PROD_IM_SCSI (0x0400)
  740. #define MPI_FW_HEADER_PID_PROD_IS_SCSI (0x0500)
  741. #define MPI_FW_HEADER_PID_PROD_CTX_SCSI (0x0600)
  742. #define MPI_FW_HEADER_PID_PROD_IR_SCSI (0x0700)
  743. #define MPI_FW_HEADER_PID_FAMILY_MASK (0x00FF)
  744. /* SCSI */
  745. #define MPI_FW_HEADER_PID_FAMILY_1030A0_SCSI (0x0001)
  746. #define MPI_FW_HEADER_PID_FAMILY_1030B0_SCSI (0x0002)
  747. #define MPI_FW_HEADER_PID_FAMILY_1030B1_SCSI (0x0003)
  748. #define MPI_FW_HEADER_PID_FAMILY_1030C0_SCSI (0x0004)
  749. #define MPI_FW_HEADER_PID_FAMILY_1020A0_SCSI (0x0005)
  750. #define MPI_FW_HEADER_PID_FAMILY_1020B0_SCSI (0x0006)
  751. #define MPI_FW_HEADER_PID_FAMILY_1020B1_SCSI (0x0007)
  752. #define MPI_FW_HEADER_PID_FAMILY_1020C0_SCSI (0x0008)
  753. #define MPI_FW_HEADER_PID_FAMILY_1035A0_SCSI (0x0009)
  754. #define MPI_FW_HEADER_PID_FAMILY_1035B0_SCSI (0x000A)
  755. #define MPI_FW_HEADER_PID_FAMILY_1030TA0_SCSI (0x000B)
  756. #define MPI_FW_HEADER_PID_FAMILY_1020TA0_SCSI (0x000C)
  757. /* Fibre Channel */
  758. #define MPI_FW_HEADER_PID_FAMILY_909_FC (0x0000)
  759. #define MPI_FW_HEADER_PID_FAMILY_919_FC (0x0001) /* 919 and 929 */
  760. #define MPI_FW_HEADER_PID_FAMILY_919X_FC (0x0002) /* 919X and 929X */
  761. #define MPI_FW_HEADER_PID_FAMILY_919XL_FC (0x0003) /* 919XL and 929XL */
  762. #define MPI_FW_HEADER_PID_FAMILY_939X_FC (0x0004) /* 939X and 949X */
  763. #define MPI_FW_HEADER_PID_FAMILY_959_FC (0x0005)
  764. /* SAS */
  765. #define MPI_FW_HEADER_PID_FAMILY_1064_SAS (0x0001)
  766. #define MPI_FW_HEADER_PID_FAMILY_1068_SAS (0x0002)
  767. #define MPI_FW_HEADER_PID_FAMILY_1078_SAS (0x0003)
  768. #define MPI_FW_HEADER_PID_FAMILY_106xE_SAS (0x0004) /* 1068E, 1066E, and 1064E */
  769. typedef struct _MPI_EXT_IMAGE_HEADER
  770. {
  771. U8 ImageType; /* 00h */
  772. U8 Reserved; /* 01h */
  773. U16 Reserved1; /* 02h */
  774. U32 Checksum; /* 04h */
  775. U32 ImageSize; /* 08h */
  776. U32 NextImageHeaderOffset; /* 0Ch */
  777. U32 LoadStartAddress; /* 10h */
  778. U32 Reserved2; /* 14h */
  779. } MPI_EXT_IMAGE_HEADER, MPI_POINTER PTR_MPI_EXT_IMAGE_HEADER,
  780. MpiExtImageHeader_t, MPI_POINTER pMpiExtImageHeader_t;
  781. /* defines for the ImageType field */
  782. #define MPI_EXT_IMAGE_TYPE_UNSPECIFIED (0x00)
  783. #define MPI_EXT_IMAGE_TYPE_FW (0x01)
  784. #define MPI_EXT_IMAGE_TYPE_NVDATA (0x03)
  785. #define MPI_EXT_IMAGE_TYPE_BOOTLOADER (0x04)
  786. #endif