setup-r8a7779.c 8.4 KB

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  1. /*
  2. * r8a7779 processor support
  3. *
  4. * Copyright (C) 2011 Renesas Solutions Corp.
  5. * Copyright (C) 2011 Magnus Damm
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; version 2 of the License.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/init.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/irq.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/delay.h>
  26. #include <linux/input.h>
  27. #include <linux/io.h>
  28. #include <linux/serial_sci.h>
  29. #include <linux/sh_intc.h>
  30. #include <linux/sh_timer.h>
  31. #include <mach/hardware.h>
  32. #include <mach/irqs.h>
  33. #include <mach/r8a7779.h>
  34. #include <mach/common.h>
  35. #include <asm/mach-types.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/time.h>
  38. #include <asm/mach/map.h>
  39. #include <asm/hardware/cache-l2x0.h>
  40. static struct map_desc r8a7779_io_desc[] __initdata = {
  41. /* 2M entity map for 0xf0000000 (MPCORE) */
  42. {
  43. .virtual = 0xf0000000,
  44. .pfn = __phys_to_pfn(0xf0000000),
  45. .length = SZ_2M,
  46. .type = MT_DEVICE_NONSHARED
  47. },
  48. /* 16M entity map for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */
  49. {
  50. .virtual = 0xfe000000,
  51. .pfn = __phys_to_pfn(0xfe000000),
  52. .length = SZ_16M,
  53. .type = MT_DEVICE_NONSHARED
  54. },
  55. };
  56. void __init r8a7779_map_io(void)
  57. {
  58. iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc));
  59. }
  60. static struct plat_sci_port scif0_platform_data = {
  61. .mapbase = 0xffe40000,
  62. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  63. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  64. .scbrr_algo_id = SCBRR_ALGO_2,
  65. .type = PORT_SCIF,
  66. .irqs = SCIx_IRQ_MUXED(gic_spi(88)),
  67. };
  68. static struct platform_device scif0_device = {
  69. .name = "sh-sci",
  70. .id = 0,
  71. .dev = {
  72. .platform_data = &scif0_platform_data,
  73. },
  74. };
  75. static struct plat_sci_port scif1_platform_data = {
  76. .mapbase = 0xffe41000,
  77. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  78. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  79. .scbrr_algo_id = SCBRR_ALGO_2,
  80. .type = PORT_SCIF,
  81. .irqs = SCIx_IRQ_MUXED(gic_spi(89)),
  82. };
  83. static struct platform_device scif1_device = {
  84. .name = "sh-sci",
  85. .id = 1,
  86. .dev = {
  87. .platform_data = &scif1_platform_data,
  88. },
  89. };
  90. static struct plat_sci_port scif2_platform_data = {
  91. .mapbase = 0xffe42000,
  92. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  93. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  94. .scbrr_algo_id = SCBRR_ALGO_2,
  95. .type = PORT_SCIF,
  96. .irqs = SCIx_IRQ_MUXED(gic_spi(90)),
  97. };
  98. static struct platform_device scif2_device = {
  99. .name = "sh-sci",
  100. .id = 2,
  101. .dev = {
  102. .platform_data = &scif2_platform_data,
  103. },
  104. };
  105. static struct plat_sci_port scif3_platform_data = {
  106. .mapbase = 0xffe43000,
  107. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  108. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  109. .scbrr_algo_id = SCBRR_ALGO_2,
  110. .type = PORT_SCIF,
  111. .irqs = SCIx_IRQ_MUXED(gic_spi(91)),
  112. };
  113. static struct platform_device scif3_device = {
  114. .name = "sh-sci",
  115. .id = 3,
  116. .dev = {
  117. .platform_data = &scif3_platform_data,
  118. },
  119. };
  120. static struct plat_sci_port scif4_platform_data = {
  121. .mapbase = 0xffe44000,
  122. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  123. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  124. .scbrr_algo_id = SCBRR_ALGO_2,
  125. .type = PORT_SCIF,
  126. .irqs = SCIx_IRQ_MUXED(gic_spi(92)),
  127. };
  128. static struct platform_device scif4_device = {
  129. .name = "sh-sci",
  130. .id = 4,
  131. .dev = {
  132. .platform_data = &scif4_platform_data,
  133. },
  134. };
  135. static struct plat_sci_port scif5_platform_data = {
  136. .mapbase = 0xffe45000,
  137. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP,
  138. .scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
  139. .scbrr_algo_id = SCBRR_ALGO_2,
  140. .type = PORT_SCIF,
  141. .irqs = SCIx_IRQ_MUXED(gic_spi(93)),
  142. };
  143. static struct platform_device scif5_device = {
  144. .name = "sh-sci",
  145. .id = 5,
  146. .dev = {
  147. .platform_data = &scif5_platform_data,
  148. },
  149. };
  150. /* TMU */
  151. static struct sh_timer_config tmu00_platform_data = {
  152. .name = "TMU00",
  153. .channel_offset = 0x4,
  154. .timer_bit = 0,
  155. .clockevent_rating = 200,
  156. };
  157. static struct resource tmu00_resources[] = {
  158. [0] = {
  159. .name = "TMU00",
  160. .start = 0xffd80008,
  161. .end = 0xffd80013,
  162. .flags = IORESOURCE_MEM,
  163. },
  164. [1] = {
  165. .start = gic_spi(32),
  166. .flags = IORESOURCE_IRQ,
  167. },
  168. };
  169. static struct platform_device tmu00_device = {
  170. .name = "sh_tmu",
  171. .id = 0,
  172. .dev = {
  173. .platform_data = &tmu00_platform_data,
  174. },
  175. .resource = tmu00_resources,
  176. .num_resources = ARRAY_SIZE(tmu00_resources),
  177. };
  178. static struct sh_timer_config tmu01_platform_data = {
  179. .name = "TMU01",
  180. .channel_offset = 0x10,
  181. .timer_bit = 1,
  182. .clocksource_rating = 200,
  183. };
  184. static struct resource tmu01_resources[] = {
  185. [0] = {
  186. .name = "TMU01",
  187. .start = 0xffd80014,
  188. .end = 0xffd8001f,
  189. .flags = IORESOURCE_MEM,
  190. },
  191. [1] = {
  192. .start = gic_spi(33),
  193. .flags = IORESOURCE_IRQ,
  194. },
  195. };
  196. static struct platform_device tmu01_device = {
  197. .name = "sh_tmu",
  198. .id = 1,
  199. .dev = {
  200. .platform_data = &tmu01_platform_data,
  201. },
  202. .resource = tmu01_resources,
  203. .num_resources = ARRAY_SIZE(tmu01_resources),
  204. };
  205. /* I2C */
  206. static struct resource rcar_i2c0_res[] = {
  207. {
  208. .start = 0xffc70000,
  209. .end = 0xffc70fff,
  210. .flags = IORESOURCE_MEM,
  211. }, {
  212. .start = gic_spi(79),
  213. .flags = IORESOURCE_IRQ,
  214. },
  215. };
  216. static struct platform_device i2c0_device = {
  217. .name = "i2c-rcar",
  218. .id = 0,
  219. .resource = rcar_i2c0_res,
  220. .num_resources = ARRAY_SIZE(rcar_i2c0_res),
  221. };
  222. static struct resource rcar_i2c1_res[] = {
  223. {
  224. .start = 0xffc71000,
  225. .end = 0xffc71fff,
  226. .flags = IORESOURCE_MEM,
  227. }, {
  228. .start = gic_spi(82),
  229. .flags = IORESOURCE_IRQ,
  230. },
  231. };
  232. static struct platform_device i2c1_device = {
  233. .name = "i2c-rcar",
  234. .id = 1,
  235. .resource = rcar_i2c1_res,
  236. .num_resources = ARRAY_SIZE(rcar_i2c1_res),
  237. };
  238. static struct resource rcar_i2c2_res[] = {
  239. {
  240. .start = 0xffc72000,
  241. .end = 0xffc72fff,
  242. .flags = IORESOURCE_MEM,
  243. }, {
  244. .start = gic_spi(80),
  245. .flags = IORESOURCE_IRQ,
  246. },
  247. };
  248. static struct platform_device i2c2_device = {
  249. .name = "i2c-rcar",
  250. .id = 2,
  251. .resource = rcar_i2c2_res,
  252. .num_resources = ARRAY_SIZE(rcar_i2c2_res),
  253. };
  254. static struct resource rcar_i2c3_res[] = {
  255. {
  256. .start = 0xffc73000,
  257. .end = 0xffc73fff,
  258. .flags = IORESOURCE_MEM,
  259. }, {
  260. .start = gic_spi(81),
  261. .flags = IORESOURCE_IRQ,
  262. },
  263. };
  264. static struct platform_device i2c3_device = {
  265. .name = "i2c-rcar",
  266. .id = 3,
  267. .resource = rcar_i2c3_res,
  268. .num_resources = ARRAY_SIZE(rcar_i2c3_res),
  269. };
  270. static struct platform_device *r8a7779_early_devices[] __initdata = {
  271. &scif0_device,
  272. &scif1_device,
  273. &scif2_device,
  274. &scif3_device,
  275. &scif4_device,
  276. &scif5_device,
  277. &tmu00_device,
  278. &tmu01_device,
  279. &i2c0_device,
  280. &i2c1_device,
  281. &i2c2_device,
  282. &i2c3_device,
  283. };
  284. static struct platform_device *r8a7779_late_devices[] __initdata = {
  285. };
  286. void __init r8a7779_add_standard_devices(void)
  287. {
  288. #ifdef CONFIG_CACHE_L2X0
  289. /* Early BRESP enable, Shared attribute override enable, 64K*16way */
  290. l2x0_init(IOMEM(0xf0100000), 0x40470000, 0x82000fff);
  291. #endif
  292. r8a7779_pm_init();
  293. r8a7779_init_pm_domains();
  294. platform_add_devices(r8a7779_early_devices,
  295. ARRAY_SIZE(r8a7779_early_devices));
  296. platform_add_devices(r8a7779_late_devices,
  297. ARRAY_SIZE(r8a7779_late_devices));
  298. }
  299. /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
  300. void __init __weak r8a7779_register_twd(void) { }
  301. void __init r8a7779_earlytimer_init(void)
  302. {
  303. r8a7779_clock_init();
  304. shmobile_earlytimer_init();
  305. r8a7779_register_twd();
  306. }
  307. void __init r8a7779_add_early_devices(void)
  308. {
  309. early_platform_add_devices(r8a7779_early_devices,
  310. ARRAY_SIZE(r8a7779_early_devices));
  311. /* Early serial console setup is not included here due to
  312. * memory map collisions. The SCIF serial ports in r8a7779
  313. * are difficult to entity map 1:1 due to collision with the
  314. * virtual memory range used by the coherent DMA code on ARM.
  315. *
  316. * Anyone wanting to debug early can remove UPF_IOREMAP from
  317. * the sh-sci serial console platform data, adjust mapbase
  318. * to a static M:N virt:phys mapping that needs to be added to
  319. * the mappings passed with iotable_init() above.
  320. *
  321. * Then add a call to shmobile_setup_console() from this function.
  322. *
  323. * As a final step pass earlyprint=sh-sci.2,115200 on the kernel
  324. * command line in case of the marzen board.
  325. */
  326. }