setup.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616
  1. /*
  2. * linux/arch/ppc/kernel/setup.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Adapted from 'alpha' version by Gary Thomas
  6. * Modified by Cort Dougan (cort@cs.nmt.edu)
  7. * Modified by PPC64 Team, IBM Corp
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. /*
  15. * bootup setup stuff..
  16. */
  17. #undef DEBUG
  18. #include <linux/config.h>
  19. #include <linux/cpu.h>
  20. #include <linux/errno.h>
  21. #include <linux/sched.h>
  22. #include <linux/kernel.h>
  23. #include <linux/mm.h>
  24. #include <linux/stddef.h>
  25. #include <linux/unistd.h>
  26. #include <linux/slab.h>
  27. #include <linux/user.h>
  28. #include <linux/a.out.h>
  29. #include <linux/tty.h>
  30. #include <linux/major.h>
  31. #include <linux/interrupt.h>
  32. #include <linux/reboot.h>
  33. #include <linux/init.h>
  34. #include <linux/ioport.h>
  35. #include <linux/console.h>
  36. #include <linux/pci.h>
  37. #include <linux/utsname.h>
  38. #include <linux/adb.h>
  39. #include <linux/module.h>
  40. #include <linux/delay.h>
  41. #include <linux/irq.h>
  42. #include <linux/seq_file.h>
  43. #include <linux/root_dev.h>
  44. #include <asm/mmu.h>
  45. #include <asm/processor.h>
  46. #include <asm/io.h>
  47. #include <asm/pgtable.h>
  48. #include <asm/prom.h>
  49. #include <asm/rtas.h>
  50. #include <asm/pci-bridge.h>
  51. #include <asm/iommu.h>
  52. #include <asm/dma.h>
  53. #include <asm/machdep.h>
  54. #include <asm/irq.h>
  55. #include <asm/time.h>
  56. #include <asm/nvram.h>
  57. #include <asm/plpar_wrappers.h>
  58. #include <asm/xics.h>
  59. #include <asm/firmware.h>
  60. #include <asm/pmc.h>
  61. #include <asm/mpic.h>
  62. #include <asm/ppc-pci.h>
  63. #include <asm/i8259.h>
  64. #include <asm/udbg.h>
  65. #ifdef DEBUG
  66. #define DBG(fmt...) udbg_printf(fmt)
  67. #else
  68. #define DBG(fmt...)
  69. #endif
  70. extern void find_udbg_vterm(void);
  71. extern void system_reset_fwnmi(void); /* from head.S */
  72. extern void machine_check_fwnmi(void); /* from head.S */
  73. extern void generic_find_legacy_serial_ports(u64 *physport,
  74. unsigned int *default_speed);
  75. int fwnmi_active; /* TRUE if an FWNMI handler is present */
  76. extern void pSeries_system_reset_exception(struct pt_regs *regs);
  77. extern int pSeries_machine_check_exception(struct pt_regs *regs);
  78. static void pseries_shared_idle(void);
  79. static void pseries_dedicated_idle(void);
  80. static volatile void __iomem * chrp_int_ack_special;
  81. struct mpic *pSeries_mpic;
  82. void pSeries_show_cpuinfo(struct seq_file *m)
  83. {
  84. struct device_node *root;
  85. const char *model = "";
  86. root = of_find_node_by_path("/");
  87. if (root)
  88. model = get_property(root, "model", NULL);
  89. seq_printf(m, "machine\t\t: CHRP %s\n", model);
  90. of_node_put(root);
  91. }
  92. /* Initialize firmware assisted non-maskable interrupts if
  93. * the firmware supports this feature.
  94. *
  95. */
  96. static void __init fwnmi_init(void)
  97. {
  98. int ret;
  99. int ibm_nmi_register = rtas_token("ibm,nmi-register");
  100. if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE)
  101. return;
  102. ret = rtas_call(ibm_nmi_register, 2, 1, NULL,
  103. __pa((unsigned long)system_reset_fwnmi),
  104. __pa((unsigned long)machine_check_fwnmi));
  105. if (ret == 0)
  106. fwnmi_active = 1;
  107. }
  108. static int pSeries_irq_cascade(struct pt_regs *regs, void *data)
  109. {
  110. if (chrp_int_ack_special)
  111. return readb(chrp_int_ack_special);
  112. else
  113. return i8259_irq(regs);
  114. }
  115. static void __init pSeries_init_mpic(void)
  116. {
  117. unsigned int *addrp;
  118. struct device_node *np;
  119. int i;
  120. /* All ISUs are setup, complete initialization */
  121. mpic_init(pSeries_mpic);
  122. /* Check what kind of cascade ACK we have */
  123. if (!(np = of_find_node_by_name(NULL, "pci"))
  124. || !(addrp = (unsigned int *)
  125. get_property(np, "8259-interrupt-acknowledge", NULL)))
  126. printk(KERN_ERR "Cannot find pci to get ack address\n");
  127. else
  128. chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1);
  129. of_node_put(np);
  130. /* Setup the legacy interrupts & controller */
  131. for (i = 0; i < NUM_ISA_INTERRUPTS; i++)
  132. irq_desc[i].handler = &i8259_pic;
  133. i8259_init(0);
  134. /* Hook cascade to mpic */
  135. mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL);
  136. }
  137. static void __init pSeries_setup_mpic(void)
  138. {
  139. unsigned int *opprop;
  140. unsigned long openpic_addr = 0;
  141. unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS];
  142. struct device_node *root;
  143. int irq_count;
  144. /* Find the Open PIC if present */
  145. root = of_find_node_by_path("/");
  146. opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL);
  147. if (opprop != 0) {
  148. int n = prom_n_addr_cells(root);
  149. for (openpic_addr = 0; n > 0; --n)
  150. openpic_addr = (openpic_addr << 32) + *opprop++;
  151. printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr);
  152. }
  153. of_node_put(root);
  154. BUG_ON(openpic_addr == 0);
  155. /* Get the sense values from OF */
  156. prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS);
  157. /* Setup the openpic driver */
  158. irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */
  159. pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY,
  160. 16, 16, irq_count, /* isu size, irq offset, irq count */
  161. NR_IRQS - 4, /* ipi offset */
  162. senses, irq_count, /* sense & sense size */
  163. " MPIC ");
  164. }
  165. static void pseries_lpar_enable_pmcs(void)
  166. {
  167. unsigned long set, reset;
  168. power4_enable_pmcs();
  169. set = 1UL << 63;
  170. reset = 0;
  171. plpar_hcall_norets(H_PERFMON, set, reset);
  172. /* instruct hypervisor to maintain PMCs */
  173. if (firmware_has_feature(FW_FEATURE_SPLPAR))
  174. get_paca()->lppaca.pmcregs_in_use = 1;
  175. }
  176. static void __init pSeries_setup_arch(void)
  177. {
  178. /* Fixup ppc_md depending on the type of interrupt controller */
  179. if (ppc64_interrupt_controller == IC_OPEN_PIC) {
  180. ppc_md.init_IRQ = pSeries_init_mpic;
  181. ppc_md.get_irq = mpic_get_irq;
  182. ppc_md.cpu_irq_down = mpic_teardown_this_cpu;
  183. /* Allocate the mpic now, so that find_and_init_phbs() can
  184. * fill the ISUs */
  185. pSeries_setup_mpic();
  186. } else {
  187. ppc_md.init_IRQ = xics_init_IRQ;
  188. ppc_md.get_irq = xics_get_irq;
  189. ppc_md.cpu_irq_down = xics_teardown_cpu;
  190. }
  191. #ifdef CONFIG_SMP
  192. smp_init_pSeries();
  193. #endif
  194. /* openpic global configuration register (64-bit format). */
  195. /* openpic Interrupt Source Unit pointer (64-bit format). */
  196. /* python0 facility area (mmio) (64-bit format) REAL address. */
  197. /* init to some ~sane value until calibrate_delay() runs */
  198. loops_per_jiffy = 50000000;
  199. if (ROOT_DEV == 0) {
  200. printk("No ramdisk, default root is /dev/sda2\n");
  201. ROOT_DEV = Root_SDA2;
  202. }
  203. fwnmi_init();
  204. /* Find and initialize PCI host bridges */
  205. init_pci_config_tokens();
  206. find_and_init_phbs();
  207. eeh_init();
  208. pSeries_nvram_init();
  209. /* Choose an idle loop */
  210. if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
  211. vpa_init(boot_cpuid);
  212. if (get_paca()->lppaca.shared_proc) {
  213. printk(KERN_INFO "Using shared processor idle loop\n");
  214. ppc_md.idle_loop = pseries_shared_idle;
  215. } else {
  216. printk(KERN_INFO "Using dedicated idle loop\n");
  217. ppc_md.idle_loop = pseries_dedicated_idle;
  218. }
  219. } else {
  220. printk(KERN_INFO "Using default idle loop\n");
  221. ppc_md.idle_loop = default_idle;
  222. }
  223. if (systemcfg->platform & PLATFORM_LPAR)
  224. ppc_md.enable_pmcs = pseries_lpar_enable_pmcs;
  225. else
  226. ppc_md.enable_pmcs = power4_enable_pmcs;
  227. }
  228. static int __init pSeries_init_panel(void)
  229. {
  230. /* Manually leave the kernel version on the panel. */
  231. ppc_md.progress("Linux ppc64\n", 0);
  232. ppc_md.progress(system_utsname.version, 0);
  233. return 0;
  234. }
  235. arch_initcall(pSeries_init_panel);
  236. /* Build up the ppc64_firmware_features bitmask field
  237. * using contents of device-tree/ibm,hypertas-functions.
  238. * Ultimately this functionality may be moved into prom.c prom_init().
  239. */
  240. static void __init fw_feature_init(void)
  241. {
  242. struct device_node * dn;
  243. char * hypertas;
  244. unsigned int len;
  245. DBG(" -> fw_feature_init()\n");
  246. ppc64_firmware_features = 0;
  247. dn = of_find_node_by_path("/rtas");
  248. if (dn == NULL) {
  249. printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n");
  250. goto no_rtas;
  251. }
  252. hypertas = get_property(dn, "ibm,hypertas-functions", &len);
  253. if (hypertas) {
  254. while (len > 0){
  255. int i, hypertas_len;
  256. /* check value against table of strings */
  257. for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) {
  258. if ((firmware_features_table[i].name) &&
  259. (strcmp(firmware_features_table[i].name,hypertas))==0) {
  260. /* we have a match */
  261. ppc64_firmware_features |=
  262. (firmware_features_table[i].val);
  263. break;
  264. }
  265. }
  266. hypertas_len = strlen(hypertas);
  267. len -= hypertas_len +1;
  268. hypertas+= hypertas_len +1;
  269. }
  270. }
  271. of_node_put(dn);
  272. no_rtas:
  273. printk(KERN_INFO "firmware_features = 0x%lx\n",
  274. ppc64_firmware_features);
  275. DBG(" <- fw_feature_init()\n");
  276. }
  277. static void __init pSeries_discover_pic(void)
  278. {
  279. struct device_node *np;
  280. char *typep;
  281. /*
  282. * Setup interrupt mapping options that are needed for finish_device_tree
  283. * to properly parse the OF interrupt tree & do the virtual irq mapping
  284. */
  285. __irq_offset_value = NUM_ISA_INTERRUPTS;
  286. ppc64_interrupt_controller = IC_INVALID;
  287. for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) {
  288. typep = (char *)get_property(np, "compatible", NULL);
  289. if (strstr(typep, "open-pic"))
  290. ppc64_interrupt_controller = IC_OPEN_PIC;
  291. else if (strstr(typep, "ppc-xicp"))
  292. ppc64_interrupt_controller = IC_PPC_XIC;
  293. else
  294. printk("pSeries_discover_pic: failed to recognize"
  295. " interrupt-controller\n");
  296. break;
  297. }
  298. }
  299. static void pSeries_mach_cpu_die(void)
  300. {
  301. local_irq_disable();
  302. idle_task_exit();
  303. /* Some hardware requires clearing the CPPR, while other hardware does not
  304. * it is safe either way
  305. */
  306. pSeriesLP_cppr_info(0, 0);
  307. rtas_stop_self();
  308. /* Should never get here... */
  309. BUG();
  310. for(;;);
  311. }
  312. /*
  313. * Early initialization. Relocation is on but do not reference unbolted pages
  314. */
  315. static void __init pSeries_init_early(void)
  316. {
  317. void *comport;
  318. int iommu_off = 0;
  319. unsigned int default_speed;
  320. u64 physport;
  321. DBG(" -> pSeries_init_early()\n");
  322. fw_feature_init();
  323. if (systemcfg->platform & PLATFORM_LPAR)
  324. hpte_init_lpar();
  325. else {
  326. hpte_init_native();
  327. iommu_off = (of_chosen &&
  328. get_property(of_chosen, "linux,iommu-off", NULL));
  329. }
  330. generic_find_legacy_serial_ports(&physport, &default_speed);
  331. if (systemcfg->platform & PLATFORM_LPAR)
  332. find_udbg_vterm();
  333. else if (physport) {
  334. /* Map the uart for udbg. */
  335. comport = (void *)ioremap(physport, 16);
  336. udbg_init_uart(comport, default_speed);
  337. DBG("Hello World !\n");
  338. }
  339. iommu_init_early_pSeries();
  340. pSeries_discover_pic();
  341. DBG(" <- pSeries_init_early()\n");
  342. }
  343. static int pSeries_check_legacy_ioport(unsigned int baseport)
  344. {
  345. struct device_node *np;
  346. #define I8042_DATA_REG 0x60
  347. #define FDC_BASE 0x3f0
  348. switch(baseport) {
  349. case I8042_DATA_REG:
  350. np = of_find_node_by_type(NULL, "8042");
  351. if (np == NULL)
  352. return -ENODEV;
  353. of_node_put(np);
  354. break;
  355. case FDC_BASE:
  356. np = of_find_node_by_type(NULL, "fdc");
  357. if (np == NULL)
  358. return -ENODEV;
  359. of_node_put(np);
  360. break;
  361. }
  362. return 0;
  363. }
  364. /*
  365. * Called very early, MMU is off, device-tree isn't unflattened
  366. */
  367. extern struct machdep_calls pSeries_md;
  368. static int __init pSeries_probe(int platform)
  369. {
  370. if (platform != PLATFORM_PSERIES &&
  371. platform != PLATFORM_PSERIES_LPAR)
  372. return 0;
  373. /* if we have some ppc_md fixups for LPAR to do, do
  374. * it here ...
  375. */
  376. return 1;
  377. }
  378. DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
  379. static inline void dedicated_idle_sleep(unsigned int cpu)
  380. {
  381. struct paca_struct *ppaca = &paca[cpu ^ 1];
  382. /* Only sleep if the other thread is not idle */
  383. if (!(ppaca->lppaca.idle)) {
  384. local_irq_disable();
  385. /*
  386. * We are about to sleep the thread and so wont be polling any
  387. * more.
  388. */
  389. clear_thread_flag(TIF_POLLING_NRFLAG);
  390. /*
  391. * SMT dynamic mode. Cede will result in this thread going
  392. * dormant, if the partner thread is still doing work. Thread
  393. * wakes up if partner goes idle, an interrupt is presented, or
  394. * a prod occurs. Returning from the cede enables external
  395. * interrupts.
  396. */
  397. if (!need_resched())
  398. cede_processor();
  399. else
  400. local_irq_enable();
  401. } else {
  402. /*
  403. * Give the HV an opportunity at the processor, since we are
  404. * not doing any work.
  405. */
  406. poll_pending();
  407. }
  408. }
  409. static void pseries_dedicated_idle(void)
  410. {
  411. long oldval;
  412. struct paca_struct *lpaca = get_paca();
  413. unsigned int cpu = smp_processor_id();
  414. unsigned long start_snooze;
  415. unsigned long *smt_snooze_delay = &__get_cpu_var(smt_snooze_delay);
  416. while (1) {
  417. /*
  418. * Indicate to the HV that we are idle. Now would be
  419. * a good time to find other work to dispatch.
  420. */
  421. lpaca->lppaca.idle = 1;
  422. oldval = test_and_clear_thread_flag(TIF_NEED_RESCHED);
  423. if (!oldval) {
  424. set_thread_flag(TIF_POLLING_NRFLAG);
  425. start_snooze = __get_tb() +
  426. *smt_snooze_delay * tb_ticks_per_usec;
  427. while (!need_resched() && !cpu_is_offline(cpu)) {
  428. ppc64_runlatch_off();
  429. /*
  430. * Go into low thread priority and possibly
  431. * low power mode.
  432. */
  433. HMT_low();
  434. HMT_very_low();
  435. if (*smt_snooze_delay != 0 &&
  436. __get_tb() > start_snooze) {
  437. HMT_medium();
  438. dedicated_idle_sleep(cpu);
  439. }
  440. }
  441. HMT_medium();
  442. clear_thread_flag(TIF_POLLING_NRFLAG);
  443. } else {
  444. set_need_resched();
  445. }
  446. lpaca->lppaca.idle = 0;
  447. ppc64_runlatch_on();
  448. schedule();
  449. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  450. cpu_die();
  451. }
  452. }
  453. static void pseries_shared_idle(void)
  454. {
  455. struct paca_struct *lpaca = get_paca();
  456. unsigned int cpu = smp_processor_id();
  457. while (1) {
  458. /*
  459. * Indicate to the HV that we are idle. Now would be
  460. * a good time to find other work to dispatch.
  461. */
  462. lpaca->lppaca.idle = 1;
  463. while (!need_resched() && !cpu_is_offline(cpu)) {
  464. local_irq_disable();
  465. ppc64_runlatch_off();
  466. /*
  467. * Yield the processor to the hypervisor. We return if
  468. * an external interrupt occurs (which are driven prior
  469. * to returning here) or if a prod occurs from another
  470. * processor. When returning here, external interrupts
  471. * are enabled.
  472. *
  473. * Check need_resched() again with interrupts disabled
  474. * to avoid a race.
  475. */
  476. if (!need_resched())
  477. cede_processor();
  478. else
  479. local_irq_enable();
  480. HMT_medium();
  481. }
  482. lpaca->lppaca.idle = 0;
  483. ppc64_runlatch_on();
  484. schedule();
  485. if (cpu_is_offline(cpu) && system_state == SYSTEM_RUNNING)
  486. cpu_die();
  487. }
  488. }
  489. static int pSeries_pci_probe_mode(struct pci_bus *bus)
  490. {
  491. if (systemcfg->platform & PLATFORM_LPAR)
  492. return PCI_PROBE_DEVTREE;
  493. return PCI_PROBE_NORMAL;
  494. }
  495. struct machdep_calls __initdata pSeries_md = {
  496. .probe = pSeries_probe,
  497. .setup_arch = pSeries_setup_arch,
  498. .init_early = pSeries_init_early,
  499. .show_cpuinfo = pSeries_show_cpuinfo,
  500. .log_error = pSeries_log_error,
  501. .pcibios_fixup = pSeries_final_fixup,
  502. .pci_probe_mode = pSeries_pci_probe_mode,
  503. .irq_bus_setup = pSeries_irq_bus_setup,
  504. .restart = rtas_restart,
  505. .power_off = rtas_power_off,
  506. .halt = rtas_halt,
  507. .panic = rtas_os_term,
  508. .cpu_die = pSeries_mach_cpu_die,
  509. .get_boot_time = rtas_get_boot_time,
  510. .get_rtc_time = rtas_get_rtc_time,
  511. .set_rtc_time = rtas_set_rtc_time,
  512. .calibrate_decr = generic_calibrate_decr,
  513. .progress = rtas_progress,
  514. .check_legacy_ioport = pSeries_check_legacy_ioport,
  515. .system_reset_exception = pSeries_system_reset_exception,
  516. .machine_check_exception = pSeries_machine_check_exception,
  517. };