mwl8k.c 87 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c
  3. * Driver for Marvell TOPDOG 802.11 Wireless cards
  4. *
  5. * Copyright (C) 2008 Marvell Semiconductor Inc.
  6. *
  7. * This file is licensed under the terms of the GNU General Public
  8. * License version 2. This program is licensed "as is" without any
  9. * warranty of any kind, whether express or implied.
  10. */
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/kernel.h>
  14. #include <linux/spinlock.h>
  15. #include <linux/list.h>
  16. #include <linux/pci.h>
  17. #include <linux/delay.h>
  18. #include <linux/completion.h>
  19. #include <linux/etherdevice.h>
  20. #include <net/mac80211.h>
  21. #include <linux/moduleparam.h>
  22. #include <linux/firmware.h>
  23. #include <linux/workqueue.h>
  24. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  25. #define MWL8K_NAME KBUILD_MODNAME
  26. #define MWL8K_VERSION "0.9.1"
  27. MODULE_DESCRIPTION(MWL8K_DESC);
  28. MODULE_VERSION(MWL8K_VERSION);
  29. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  30. MODULE_LICENSE("GPL");
  31. static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
  32. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
  33. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
  34. { }
  35. };
  36. MODULE_DEVICE_TABLE(pci, mwl8k_table);
  37. /* Register definitions */
  38. #define MWL8K_HIU_GEN_PTR 0x00000c10
  39. #define MWL8K_MODE_STA 0x0000005a
  40. #define MWL8K_MODE_AP 0x000000a5
  41. #define MWL8K_HIU_INT_CODE 0x00000c14
  42. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  43. #define MWL8K_FWAP_READY 0xf1f2f4a5
  44. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  45. #define MWL8K_HIU_SCRATCH 0x00000c40
  46. /* Host->device communications */
  47. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  49. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  50. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  51. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  52. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  53. #define MWL8K_H2A_INT_RESET (1 << 15)
  54. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  55. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  56. /* Device->host communications */
  57. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  58. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  59. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  60. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  61. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  62. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  63. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  64. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  65. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  66. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  67. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  68. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  69. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  70. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  71. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  72. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  73. MWL8K_A2H_INT_CHNL_SWITCHED | \
  74. MWL8K_A2H_INT_QUEUE_EMPTY | \
  75. MWL8K_A2H_INT_RADAR_DETECT | \
  76. MWL8K_A2H_INT_RADIO_ON | \
  77. MWL8K_A2H_INT_RADIO_OFF | \
  78. MWL8K_A2H_INT_MAC_EVENT | \
  79. MWL8K_A2H_INT_OPC_DONE | \
  80. MWL8K_A2H_INT_RX_READY | \
  81. MWL8K_A2H_INT_TX_DONE)
  82. /* WME stream classes */
  83. #define WME_AC_BE 0 /* best effort */
  84. #define WME_AC_BK 1 /* background */
  85. #define WME_AC_VI 2 /* video */
  86. #define WME_AC_VO 3 /* voice */
  87. #define MWL8K_RX_QUEUES 1
  88. #define MWL8K_TX_QUEUES 4
  89. struct mwl8k_rx_queue {
  90. int rx_desc_count;
  91. /* hw receives here */
  92. int rx_head;
  93. /* refill descs here */
  94. int rx_tail;
  95. struct mwl8k_rx_desc *rx_desc_area;
  96. dma_addr_t rx_desc_dma;
  97. struct sk_buff **rx_skb;
  98. };
  99. struct mwl8k_skb {
  100. /*
  101. * The DMA engine requires a modification to the payload.
  102. * If the skbuff is shared/cloned, it needs to be unshared.
  103. * This method is used to ensure the stack always gets back
  104. * the skbuff it sent for transmission.
  105. */
  106. struct sk_buff *clone;
  107. struct sk_buff *skb;
  108. };
  109. struct mwl8k_tx_queue {
  110. /* hw transmits here */
  111. int tx_head;
  112. /* sw appends here */
  113. int tx_tail;
  114. struct ieee80211_tx_queue_stats tx_stats;
  115. struct mwl8k_tx_desc *tx_desc_area;
  116. dma_addr_t tx_desc_dma;
  117. struct mwl8k_skb *tx_skb;
  118. };
  119. /* Pointers to the firmware data and meta information about it. */
  120. struct mwl8k_firmware {
  121. /* Microcode */
  122. struct firmware *ucode;
  123. /* Boot helper code */
  124. struct firmware *helper;
  125. };
  126. struct mwl8k_priv {
  127. void __iomem *regs;
  128. struct ieee80211_hw *hw;
  129. struct pci_dev *pdev;
  130. u8 name[16];
  131. /* firmware access lock */
  132. spinlock_t fw_lock;
  133. /* firmware files and meta data */
  134. struct mwl8k_firmware fw;
  135. u32 part_num;
  136. /* lock held over TX and TX reap */
  137. spinlock_t tx_lock;
  138. struct ieee80211_vif *vif;
  139. struct ieee80211_channel *current_channel;
  140. /* power management status cookie from firmware */
  141. u32 *cookie;
  142. dma_addr_t cookie_dma;
  143. u16 num_mcaddrs;
  144. u8 hw_rev;
  145. __le32 fw_rev;
  146. /*
  147. * Running count of TX packets in flight, to avoid
  148. * iterating over the transmit rings each time.
  149. */
  150. int pending_tx_pkts;
  151. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  152. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  153. /* PHY parameters */
  154. struct ieee80211_supported_band band;
  155. struct ieee80211_channel channels[14];
  156. struct ieee80211_rate rates[12];
  157. bool radio_on;
  158. bool radio_short_preamble;
  159. bool wmm_enabled;
  160. /* Set if PHY config is in progress */
  161. bool inconfig;
  162. /* XXX need to convert this to handle multiple interfaces */
  163. bool capture_beacon;
  164. u8 capture_bssid[ETH_ALEN];
  165. struct sk_buff *beacon_skb;
  166. /*
  167. * This FJ worker has to be global as it is scheduled from the
  168. * RX handler. At this point we don't know which interface it
  169. * belongs to until the list of bssids waiting to complete join
  170. * is checked.
  171. */
  172. struct work_struct finalize_join_worker;
  173. /* Tasklet to reclaim TX descriptors and buffers after tx */
  174. struct tasklet_struct tx_reclaim_task;
  175. /* Work thread to serialize configuration requests */
  176. struct workqueue_struct *config_wq;
  177. struct completion *hostcmd_wait;
  178. struct completion *tx_wait;
  179. };
  180. /* Per interface specific private data */
  181. struct mwl8k_vif {
  182. /* backpointer to parent config block */
  183. struct mwl8k_priv *priv;
  184. /* BSS config of AP or IBSS from mac80211*/
  185. struct ieee80211_bss_conf bss_info;
  186. /* BSSID of AP or IBSS */
  187. u8 bssid[ETH_ALEN];
  188. u8 mac_addr[ETH_ALEN];
  189. /*
  190. * Subset of supported legacy rates.
  191. * Intersection of AP and STA supported rates.
  192. */
  193. struct ieee80211_rate legacy_rates[12];
  194. /* number of supported legacy rates */
  195. u8 legacy_nrates;
  196. /* Index into station database.Returned by update_sta_db call */
  197. u8 peer_id;
  198. /* Non AMPDU sequence number assigned by driver */
  199. u16 seqno;
  200. };
  201. #define MWL8K_VIF(_vif) ((struct mwl8k_vif *)&((_vif)->drv_priv))
  202. static const struct ieee80211_channel mwl8k_channels[] = {
  203. { .center_freq = 2412, .hw_value = 1, },
  204. { .center_freq = 2417, .hw_value = 2, },
  205. { .center_freq = 2422, .hw_value = 3, },
  206. { .center_freq = 2427, .hw_value = 4, },
  207. { .center_freq = 2432, .hw_value = 5, },
  208. { .center_freq = 2437, .hw_value = 6, },
  209. { .center_freq = 2442, .hw_value = 7, },
  210. { .center_freq = 2447, .hw_value = 8, },
  211. { .center_freq = 2452, .hw_value = 9, },
  212. { .center_freq = 2457, .hw_value = 10, },
  213. { .center_freq = 2462, .hw_value = 11, },
  214. };
  215. static const struct ieee80211_rate mwl8k_rates[] = {
  216. { .bitrate = 10, .hw_value = 2, },
  217. { .bitrate = 20, .hw_value = 4, },
  218. { .bitrate = 55, .hw_value = 11, },
  219. { .bitrate = 60, .hw_value = 12, },
  220. { .bitrate = 90, .hw_value = 18, },
  221. { .bitrate = 110, .hw_value = 22, },
  222. { .bitrate = 120, .hw_value = 24, },
  223. { .bitrate = 180, .hw_value = 36, },
  224. { .bitrate = 240, .hw_value = 48, },
  225. { .bitrate = 360, .hw_value = 72, },
  226. { .bitrate = 480, .hw_value = 96, },
  227. { .bitrate = 540, .hw_value = 108, },
  228. };
  229. /* Slot time */
  230. /* Short Slot: 9us slot time */
  231. #define MWL8K_SHORT_SLOTTIME 1
  232. /* Long slot: 20us slot time */
  233. #define MWL8K_LONG_SLOTTIME 0
  234. /* Set or get info from Firmware */
  235. #define MWL8K_CMD_SET 0x0001
  236. #define MWL8K_CMD_GET 0x0000
  237. /* Firmware command codes */
  238. #define MWL8K_CMD_CODE_DNLD 0x0001
  239. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  240. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  241. #define MWL8K_CMD_GET_STAT 0x0014
  242. #define MWL8K_CMD_RADIO_CONTROL 0x001c
  243. #define MWL8K_CMD_RF_TX_POWER 0x001e
  244. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  245. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  246. #define MWL8K_CMD_SET_RF_CHANNEL 0x010a
  247. #define MWL8K_CMD_SET_AID 0x010d
  248. #define MWL8K_CMD_SET_RATE 0x0110
  249. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  250. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  251. #define MWL8K_CMD_SET_SLOT 0x0114
  252. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  253. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  254. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  255. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  256. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  257. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  258. #define MWL8K_CMD_UPDATE_STADB 0x1123
  259. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  260. {
  261. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  262. snprintf(buf, bufsize, "%s", #x);\
  263. return buf;\
  264. } while (0)
  265. switch (cmd & ~0x8000) {
  266. MWL8K_CMDNAME(CODE_DNLD);
  267. MWL8K_CMDNAME(GET_HW_SPEC);
  268. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  269. MWL8K_CMDNAME(GET_STAT);
  270. MWL8K_CMDNAME(RADIO_CONTROL);
  271. MWL8K_CMDNAME(RF_TX_POWER);
  272. MWL8K_CMDNAME(SET_PRE_SCAN);
  273. MWL8K_CMDNAME(SET_POST_SCAN);
  274. MWL8K_CMDNAME(SET_RF_CHANNEL);
  275. MWL8K_CMDNAME(SET_AID);
  276. MWL8K_CMDNAME(SET_RATE);
  277. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  278. MWL8K_CMDNAME(RTS_THRESHOLD);
  279. MWL8K_CMDNAME(SET_SLOT);
  280. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  281. MWL8K_CMDNAME(SET_WMM_MODE);
  282. MWL8K_CMDNAME(MIMO_CONFIG);
  283. MWL8K_CMDNAME(USE_FIXED_RATE);
  284. MWL8K_CMDNAME(ENABLE_SNIFFER);
  285. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  286. MWL8K_CMDNAME(UPDATE_STADB);
  287. default:
  288. snprintf(buf, bufsize, "0x%x", cmd);
  289. }
  290. #undef MWL8K_CMDNAME
  291. return buf;
  292. }
  293. /* Hardware and firmware reset */
  294. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  295. {
  296. iowrite32(MWL8K_H2A_INT_RESET,
  297. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  298. iowrite32(MWL8K_H2A_INT_RESET,
  299. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  300. msleep(20);
  301. }
  302. /* Release fw image */
  303. static void mwl8k_release_fw(struct firmware **fw)
  304. {
  305. if (*fw == NULL)
  306. return;
  307. release_firmware(*fw);
  308. *fw = NULL;
  309. }
  310. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  311. {
  312. mwl8k_release_fw(&priv->fw.ucode);
  313. mwl8k_release_fw(&priv->fw.helper);
  314. }
  315. /* Request fw image */
  316. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  317. const char *fname, struct firmware **fw)
  318. {
  319. /* release current image */
  320. if (*fw != NULL)
  321. mwl8k_release_fw(fw);
  322. return request_firmware((const struct firmware **)fw,
  323. fname, &priv->pdev->dev);
  324. }
  325. static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
  326. {
  327. u8 filename[64];
  328. int rc;
  329. priv->part_num = part_num;
  330. snprintf(filename, sizeof(filename),
  331. "mwl8k/helper_%u.fw", priv->part_num);
  332. rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
  333. if (rc) {
  334. printk(KERN_ERR
  335. "%s Error requesting helper firmware file %s\n",
  336. pci_name(priv->pdev), filename);
  337. return rc;
  338. }
  339. snprintf(filename, sizeof(filename),
  340. "mwl8k/fmimage_%u.fw", priv->part_num);
  341. rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
  342. if (rc) {
  343. printk(KERN_ERR "%s Error requesting firmware file %s\n",
  344. pci_name(priv->pdev), filename);
  345. mwl8k_release_fw(&priv->fw.helper);
  346. return rc;
  347. }
  348. return 0;
  349. }
  350. struct mwl8k_cmd_pkt {
  351. __le16 code;
  352. __le16 length;
  353. __le16 seq_num;
  354. __le16 result;
  355. char payload[0];
  356. } __attribute__((packed));
  357. /*
  358. * Firmware loading.
  359. */
  360. static int
  361. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  362. {
  363. void __iomem *regs = priv->regs;
  364. dma_addr_t dma_addr;
  365. int rc;
  366. int loops;
  367. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  368. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  369. return -ENOMEM;
  370. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  371. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  372. iowrite32(MWL8K_H2A_INT_DOORBELL,
  373. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  374. iowrite32(MWL8K_H2A_INT_DUMMY,
  375. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  376. rc = -ETIMEDOUT;
  377. loops = 1000;
  378. do {
  379. u32 int_code;
  380. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  381. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  382. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  383. rc = 0;
  384. break;
  385. }
  386. udelay(1);
  387. } while (--loops);
  388. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  389. /*
  390. * Clear 'command done' interrupt bit.
  391. */
  392. loops = 1000;
  393. do {
  394. u32 status;
  395. status = ioread32(priv->regs +
  396. MWL8K_HIU_A2H_INTERRUPT_STATUS);
  397. if (status & MWL8K_A2H_INT_OPC_DONE) {
  398. iowrite32(~MWL8K_A2H_INT_OPC_DONE,
  399. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  400. ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  401. break;
  402. }
  403. udelay(1);
  404. } while (--loops);
  405. return rc;
  406. }
  407. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  408. const u8 *data, size_t length)
  409. {
  410. struct mwl8k_cmd_pkt *cmd;
  411. int done;
  412. int rc = 0;
  413. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  414. if (cmd == NULL)
  415. return -ENOMEM;
  416. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  417. cmd->seq_num = 0;
  418. cmd->result = 0;
  419. done = 0;
  420. while (length) {
  421. int block_size = length > 256 ? 256 : length;
  422. memcpy(cmd->payload, data + done, block_size);
  423. cmd->length = cpu_to_le16(block_size);
  424. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  425. sizeof(*cmd) + block_size);
  426. if (rc)
  427. break;
  428. done += block_size;
  429. length -= block_size;
  430. }
  431. if (!rc) {
  432. cmd->length = 0;
  433. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  434. }
  435. kfree(cmd);
  436. return rc;
  437. }
  438. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  439. const u8 *data, size_t length)
  440. {
  441. unsigned char *buffer;
  442. int may_continue, rc = 0;
  443. u32 done, prev_block_size;
  444. buffer = kmalloc(1024, GFP_KERNEL);
  445. if (buffer == NULL)
  446. return -ENOMEM;
  447. done = 0;
  448. prev_block_size = 0;
  449. may_continue = 1000;
  450. while (may_continue > 0) {
  451. u32 block_size;
  452. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  453. if (block_size & 1) {
  454. block_size &= ~1;
  455. may_continue--;
  456. } else {
  457. done += prev_block_size;
  458. length -= prev_block_size;
  459. }
  460. if (block_size > 1024 || block_size > length) {
  461. rc = -EOVERFLOW;
  462. break;
  463. }
  464. if (length == 0) {
  465. rc = 0;
  466. break;
  467. }
  468. if (block_size == 0) {
  469. rc = -EPROTO;
  470. may_continue--;
  471. udelay(1);
  472. continue;
  473. }
  474. prev_block_size = block_size;
  475. memcpy(buffer, data + done, block_size);
  476. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  477. if (rc)
  478. break;
  479. }
  480. if (!rc && length != 0)
  481. rc = -EREMOTEIO;
  482. kfree(buffer);
  483. return rc;
  484. }
  485. static int mwl8k_load_firmware(struct mwl8k_priv *priv)
  486. {
  487. int loops, rc;
  488. const u8 *ucode = priv->fw.ucode->data;
  489. size_t ucode_len = priv->fw.ucode->size;
  490. const u8 *helper = priv->fw.helper->data;
  491. size_t helper_len = priv->fw.helper->size;
  492. if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
  493. rc = mwl8k_load_fw_image(priv, helper, helper_len);
  494. if (rc) {
  495. printk(KERN_ERR "%s: unable to load firmware "
  496. "helper image\n", pci_name(priv->pdev));
  497. return rc;
  498. }
  499. msleep(1);
  500. rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
  501. } else {
  502. rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
  503. }
  504. if (rc) {
  505. printk(KERN_ERR "%s: unable to load firmware data\n",
  506. pci_name(priv->pdev));
  507. return rc;
  508. }
  509. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  510. msleep(1);
  511. loops = 200000;
  512. do {
  513. if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
  514. == MWL8K_FWSTA_READY)
  515. break;
  516. udelay(1);
  517. } while (--loops);
  518. return loops ? 0 : -ETIMEDOUT;
  519. }
  520. /*
  521. * Defines shared between transmission and reception.
  522. */
  523. /* HT control fields for firmware */
  524. struct ewc_ht_info {
  525. __le16 control1;
  526. __le16 control2;
  527. __le16 control3;
  528. } __attribute__((packed));
  529. /* Firmware Station database operations */
  530. #define MWL8K_STA_DB_ADD_ENTRY 0
  531. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  532. #define MWL8K_STA_DB_DEL_ENTRY 2
  533. #define MWL8K_STA_DB_FLUSH 3
  534. /* Peer Entry flags - used to define the type of the peer node */
  535. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  536. #define MWL8K_IEEE_LEGACY_DATA_RATES 12
  537. #define MWL8K_MCS_BITMAP_SIZE 16
  538. struct peer_capability_info {
  539. /* Peer type - AP vs. STA. */
  540. __u8 peer_type;
  541. /* Basic 802.11 capabilities from assoc resp. */
  542. __le16 basic_caps;
  543. /* Set if peer supports 802.11n high throughput (HT). */
  544. __u8 ht_support;
  545. /* Valid if HT is supported. */
  546. __le16 ht_caps;
  547. __u8 extended_ht_caps;
  548. struct ewc_ht_info ewc_info;
  549. /* Legacy rate table. Intersection of our rates and peer rates. */
  550. __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
  551. /* HT rate table. Intersection of our rates and peer rates. */
  552. __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
  553. __u8 pad[16];
  554. /* If set, interoperability mode, no proprietary extensions. */
  555. __u8 interop;
  556. __u8 pad2;
  557. __u8 station_id;
  558. __le16 amsdu_enabled;
  559. } __attribute__((packed));
  560. /* Inline functions to manipulate QoS field in data descriptor. */
  561. static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
  562. {
  563. u16 val_mask = 1 << 4;
  564. /* End of Service Period Bit 4 */
  565. return qos | val_mask;
  566. }
  567. static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
  568. {
  569. u16 val_mask = 0x3;
  570. u8 shift = 5;
  571. u16 qos_mask = ~(val_mask << shift);
  572. /* Ack Policy Bit 5-6 */
  573. return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
  574. }
  575. static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
  576. {
  577. u16 val_mask = 1 << 7;
  578. /* AMSDU present Bit 7 */
  579. return qos | val_mask;
  580. }
  581. static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
  582. {
  583. u16 val_mask = 0xff;
  584. u8 shift = 8;
  585. u16 qos_mask = ~(val_mask << shift);
  586. /* Queue Length Bits 8-15 */
  587. return (qos & qos_mask) | ((len & val_mask) << shift);
  588. }
  589. /* DMA header used by firmware and hardware. */
  590. struct mwl8k_dma_data {
  591. __le16 fwlen;
  592. struct ieee80211_hdr wh;
  593. } __attribute__((packed));
  594. /* Routines to add/remove DMA header from skb. */
  595. static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
  596. {
  597. struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
  598. void *dst, *src = &tr->wh;
  599. __le16 fc = tr->wh.frame_control;
  600. int hdrlen = ieee80211_hdrlen(fc);
  601. u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
  602. dst = (void *)tr + space;
  603. if (dst != src) {
  604. memmove(dst, src, hdrlen);
  605. skb_pull(skb, space);
  606. }
  607. return 0;
  608. }
  609. static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
  610. {
  611. struct ieee80211_hdr *wh;
  612. u32 hdrlen, pktlen;
  613. struct mwl8k_dma_data *tr;
  614. wh = (struct ieee80211_hdr *)skb->data;
  615. hdrlen = ieee80211_hdrlen(wh->frame_control);
  616. pktlen = skb->len;
  617. /*
  618. * Copy up/down the 802.11 header; the firmware requires
  619. * we present a 2-byte payload length followed by a
  620. * 4-address header (w/o QoS), followed (optionally) by
  621. * any WEP/ExtIV header (but only filled in for CCMP).
  622. */
  623. if (hdrlen != sizeof(struct mwl8k_dma_data))
  624. skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
  625. tr = (struct mwl8k_dma_data *)skb->data;
  626. if (wh != &tr->wh)
  627. memmove(&tr->wh, wh, hdrlen);
  628. /* Clear addr4 */
  629. memset(tr->wh.addr4, 0, ETH_ALEN);
  630. /*
  631. * Firmware length is the length of the fully formed "802.11
  632. * payload". That is, everything except for the 802.11 header.
  633. * This includes all crypto material including the MIC.
  634. */
  635. tr->fwlen = cpu_to_le16(pktlen - hdrlen);
  636. return skb;
  637. }
  638. /*
  639. * Packet reception.
  640. */
  641. #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
  642. struct mwl8k_rx_desc {
  643. __le16 pkt_len;
  644. __u8 link_quality;
  645. __u8 noise_level;
  646. __le32 pkt_phys_addr;
  647. __le32 next_rx_desc_phys_addr;
  648. __le16 qos_control;
  649. __le16 rate_info;
  650. __le32 pad0[4];
  651. __u8 rssi;
  652. __u8 channel;
  653. __le16 pad1;
  654. __u8 rx_ctrl;
  655. __u8 rx_status;
  656. __u8 pad2[2];
  657. } __attribute__((packed));
  658. #define MWL8K_RX_DESCS 256
  659. #define MWL8K_RX_MAXSZ 3800
  660. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  661. {
  662. struct mwl8k_priv *priv = hw->priv;
  663. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  664. int size;
  665. int i;
  666. rxq->rx_desc_count = 0;
  667. rxq->rx_head = 0;
  668. rxq->rx_tail = 0;
  669. size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
  670. rxq->rx_desc_area =
  671. pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
  672. if (rxq->rx_desc_area == NULL) {
  673. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  674. priv->name);
  675. return -ENOMEM;
  676. }
  677. memset(rxq->rx_desc_area, 0, size);
  678. rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
  679. sizeof(*rxq->rx_skb), GFP_KERNEL);
  680. if (rxq->rx_skb == NULL) {
  681. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  682. priv->name);
  683. pci_free_consistent(priv->pdev, size,
  684. rxq->rx_desc_area, rxq->rx_desc_dma);
  685. return -ENOMEM;
  686. }
  687. memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
  688. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  689. struct mwl8k_rx_desc *rx_desc;
  690. int nexti;
  691. rx_desc = rxq->rx_desc_area + i;
  692. nexti = (i + 1) % MWL8K_RX_DESCS;
  693. rx_desc->next_rx_desc_phys_addr =
  694. cpu_to_le32(rxq->rx_desc_dma
  695. + nexti * sizeof(*rx_desc));
  696. rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
  697. }
  698. return 0;
  699. }
  700. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  701. {
  702. struct mwl8k_priv *priv = hw->priv;
  703. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  704. int refilled;
  705. refilled = 0;
  706. while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
  707. struct sk_buff *skb;
  708. int rx;
  709. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  710. if (skb == NULL)
  711. break;
  712. rxq->rx_desc_count++;
  713. rx = rxq->rx_tail;
  714. rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
  715. rxq->rx_desc_area[rx].pkt_phys_addr =
  716. cpu_to_le32(pci_map_single(priv->pdev, skb->data,
  717. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
  718. rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
  719. rxq->rx_skb[rx] = skb;
  720. wmb();
  721. rxq->rx_desc_area[rx].rx_ctrl = 0;
  722. refilled++;
  723. }
  724. return refilled;
  725. }
  726. /* Must be called only when the card's reception is completely halted */
  727. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  728. {
  729. struct mwl8k_priv *priv = hw->priv;
  730. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  731. int i;
  732. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  733. if (rxq->rx_skb[i] != NULL) {
  734. unsigned long addr;
  735. addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
  736. pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
  737. PCI_DMA_FROMDEVICE);
  738. kfree_skb(rxq->rx_skb[i]);
  739. rxq->rx_skb[i] = NULL;
  740. }
  741. }
  742. kfree(rxq->rx_skb);
  743. rxq->rx_skb = NULL;
  744. pci_free_consistent(priv->pdev,
  745. MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
  746. rxq->rx_desc_area, rxq->rx_desc_dma);
  747. rxq->rx_desc_area = NULL;
  748. }
  749. /*
  750. * Scan a list of BSSIDs to process for finalize join.
  751. * Allows for extension to process multiple BSSIDs.
  752. */
  753. static inline int
  754. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  755. {
  756. return priv->capture_beacon &&
  757. ieee80211_is_beacon(wh->frame_control) &&
  758. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  759. }
  760. static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
  761. struct sk_buff *skb)
  762. {
  763. priv->capture_beacon = false;
  764. memset(priv->capture_bssid, 0, ETH_ALEN);
  765. /*
  766. * Use GFP_ATOMIC as rxq_process is called from
  767. * the primary interrupt handler, memory allocation call
  768. * must not sleep.
  769. */
  770. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  771. if (priv->beacon_skb != NULL)
  772. queue_work(priv->config_wq,
  773. &priv->finalize_join_worker);
  774. }
  775. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  776. {
  777. struct mwl8k_priv *priv = hw->priv;
  778. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  779. int processed;
  780. processed = 0;
  781. while (rxq->rx_desc_count && limit--) {
  782. struct mwl8k_rx_desc *rx_desc;
  783. struct sk_buff *skb;
  784. struct ieee80211_rx_status status;
  785. unsigned long addr;
  786. struct ieee80211_hdr *wh;
  787. rx_desc = rxq->rx_desc_area + rxq->rx_head;
  788. if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
  789. break;
  790. rmb();
  791. skb = rxq->rx_skb[rxq->rx_head];
  792. if (skb == NULL)
  793. break;
  794. rxq->rx_skb[rxq->rx_head] = NULL;
  795. rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
  796. rxq->rx_desc_count--;
  797. addr = le32_to_cpu(rx_desc->pkt_phys_addr);
  798. pci_unmap_single(priv->pdev, addr,
  799. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  800. skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
  801. if (mwl8k_remove_dma_header(skb)) {
  802. dev_kfree_skb(skb);
  803. continue;
  804. }
  805. wh = (struct ieee80211_hdr *)skb->data;
  806. /*
  807. * Check for pending join operation. save a copy of
  808. * the beacon and schedule a tasklet to send finalize
  809. * join command to the firmware.
  810. */
  811. if (mwl8k_capture_bssid(priv, wh))
  812. mwl8k_save_beacon(priv, skb);
  813. memset(&status, 0, sizeof(status));
  814. status.mactime = 0;
  815. status.signal = -rx_desc->rssi;
  816. status.noise = -rx_desc->noise_level;
  817. status.qual = rx_desc->link_quality;
  818. status.antenna = 1;
  819. status.rate_idx = 1;
  820. status.flag = 0;
  821. status.band = IEEE80211_BAND_2GHZ;
  822. status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
  823. memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
  824. ieee80211_rx_irqsafe(hw, skb);
  825. processed++;
  826. }
  827. return processed;
  828. }
  829. /*
  830. * Packet transmission.
  831. */
  832. /* Transmit queue assignment. */
  833. enum {
  834. MWL8K_WME_AC_BK = 0, /* background access */
  835. MWL8K_WME_AC_BE = 1, /* best effort access */
  836. MWL8K_WME_AC_VI = 2, /* video access */
  837. MWL8K_WME_AC_VO = 3, /* voice access */
  838. };
  839. /* Transmit packet ACK policy */
  840. #define MWL8K_TXD_ACK_POLICY_NORMAL 0
  841. #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
  842. #define GET_TXQ(_ac) (\
  843. ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
  844. ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
  845. ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
  846. MWL8K_WME_AC_BE)
  847. #define MWL8K_TXD_STATUS_OK 0x00000001
  848. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  849. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  850. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  851. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  852. struct mwl8k_tx_desc {
  853. __le32 status;
  854. __u8 data_rate;
  855. __u8 tx_priority;
  856. __le16 qos_control;
  857. __le32 pkt_phys_addr;
  858. __le16 pkt_len;
  859. __u8 dest_MAC_addr[ETH_ALEN];
  860. __le32 next_tx_desc_phys_addr;
  861. __le32 reserved;
  862. __le16 rate_info;
  863. __u8 peer_id;
  864. __u8 tx_frag_cnt;
  865. } __attribute__((packed));
  866. #define MWL8K_TX_DESCS 128
  867. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  868. {
  869. struct mwl8k_priv *priv = hw->priv;
  870. struct mwl8k_tx_queue *txq = priv->txq + index;
  871. int size;
  872. int i;
  873. memset(&txq->tx_stats, 0, sizeof(struct ieee80211_tx_queue_stats));
  874. txq->tx_stats.limit = MWL8K_TX_DESCS;
  875. txq->tx_head = 0;
  876. txq->tx_tail = 0;
  877. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  878. txq->tx_desc_area =
  879. pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
  880. if (txq->tx_desc_area == NULL) {
  881. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  882. priv->name);
  883. return -ENOMEM;
  884. }
  885. memset(txq->tx_desc_area, 0, size);
  886. txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
  887. GFP_KERNEL);
  888. if (txq->tx_skb == NULL) {
  889. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  890. priv->name);
  891. pci_free_consistent(priv->pdev, size,
  892. txq->tx_desc_area, txq->tx_desc_dma);
  893. return -ENOMEM;
  894. }
  895. memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
  896. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  897. struct mwl8k_tx_desc *tx_desc;
  898. int nexti;
  899. tx_desc = txq->tx_desc_area + i;
  900. nexti = (i + 1) % MWL8K_TX_DESCS;
  901. tx_desc->status = 0;
  902. tx_desc->next_tx_desc_phys_addr =
  903. cpu_to_le32(txq->tx_desc_dma +
  904. nexti * sizeof(*tx_desc));
  905. }
  906. return 0;
  907. }
  908. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  909. {
  910. iowrite32(MWL8K_H2A_INT_PPA_READY,
  911. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  912. iowrite32(MWL8K_H2A_INT_DUMMY,
  913. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  914. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  915. }
  916. static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
  917. {
  918. return priv->pending_tx_pkts;
  919. }
  920. struct mwl8k_txq_info {
  921. u32 fw_owned;
  922. u32 drv_owned;
  923. u32 unused;
  924. u32 len;
  925. u32 head;
  926. u32 tail;
  927. };
  928. static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
  929. struct mwl8k_txq_info txinfo[],
  930. u32 num_queues)
  931. {
  932. int count, desc, status;
  933. struct mwl8k_tx_queue *txq;
  934. struct mwl8k_tx_desc *tx_desc;
  935. int ndescs = 0;
  936. memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
  937. spin_lock_bh(&priv->tx_lock);
  938. for (count = 0; count < num_queues; count++) {
  939. txq = priv->txq + count;
  940. txinfo[count].len = txq->tx_stats.len;
  941. txinfo[count].head = txq->tx_head;
  942. txinfo[count].tail = txq->tx_tail;
  943. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  944. tx_desc = txq->tx_desc_area + desc;
  945. status = le32_to_cpu(tx_desc->status);
  946. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  947. txinfo[count].fw_owned++;
  948. else
  949. txinfo[count].drv_owned++;
  950. if (tx_desc->pkt_len == 0)
  951. txinfo[count].unused++;
  952. }
  953. }
  954. spin_unlock_bh(&priv->tx_lock);
  955. return ndescs;
  956. }
  957. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
  958. {
  959. struct mwl8k_priv *priv = hw->priv;
  960. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  961. u32 count;
  962. unsigned long timeout;
  963. might_sleep();
  964. if (priv->tx_wait != NULL)
  965. printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
  966. spin_lock_bh(&priv->tx_lock);
  967. count = mwl8k_txq_busy(priv);
  968. if (count) {
  969. priv->tx_wait = &cmd_wait;
  970. if (priv->radio_on)
  971. mwl8k_tx_start(priv);
  972. }
  973. spin_unlock_bh(&priv->tx_lock);
  974. if (count) {
  975. struct mwl8k_txq_info txinfo[4];
  976. int index;
  977. int newcount;
  978. timeout = wait_for_completion_timeout(&cmd_wait,
  979. msecs_to_jiffies(delay_ms));
  980. if (timeout)
  981. return 0;
  982. spin_lock_bh(&priv->tx_lock);
  983. priv->tx_wait = NULL;
  984. newcount = mwl8k_txq_busy(priv);
  985. spin_unlock_bh(&priv->tx_lock);
  986. printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
  987. __func__, __LINE__, delay_ms, count, newcount);
  988. mwl8k_scan_tx_ring(priv, txinfo, 4);
  989. for (index = 0; index < 4; index++)
  990. printk(KERN_ERR
  991. "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
  992. index,
  993. txinfo[index].len,
  994. txinfo[index].head,
  995. txinfo[index].tail,
  996. txinfo[index].fw_owned,
  997. txinfo[index].drv_owned,
  998. txinfo[index].unused);
  999. return -ETIMEDOUT;
  1000. }
  1001. return 0;
  1002. }
  1003. #define MWL8K_TXD_SUCCESS(status) \
  1004. ((status) & (MWL8K_TXD_STATUS_OK | \
  1005. MWL8K_TXD_STATUS_OK_RETRY | \
  1006. MWL8K_TXD_STATUS_OK_MORE_RETRY))
  1007. static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
  1008. {
  1009. struct mwl8k_priv *priv = hw->priv;
  1010. struct mwl8k_tx_queue *txq = priv->txq + index;
  1011. int wake = 0;
  1012. while (txq->tx_stats.len > 0) {
  1013. int tx;
  1014. int rc;
  1015. struct mwl8k_tx_desc *tx_desc;
  1016. unsigned long addr;
  1017. int size;
  1018. struct sk_buff *skb;
  1019. struct ieee80211_tx_info *info;
  1020. u32 status;
  1021. rc = 0;
  1022. tx = txq->tx_head;
  1023. tx_desc = txq->tx_desc_area + tx;
  1024. status = le32_to_cpu(tx_desc->status);
  1025. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1026. if (!force)
  1027. break;
  1028. tx_desc->status &=
  1029. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1030. }
  1031. txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
  1032. BUG_ON(txq->tx_stats.len == 0);
  1033. txq->tx_stats.len--;
  1034. priv->pending_tx_pkts--;
  1035. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1036. size = le16_to_cpu(tx_desc->pkt_len);
  1037. skb = txq->tx_skb[tx].skb;
  1038. txq->tx_skb[tx].skb = NULL;
  1039. BUG_ON(skb == NULL);
  1040. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1041. rc = mwl8k_remove_dma_header(skb);
  1042. /* Mark descriptor as unused */
  1043. tx_desc->pkt_phys_addr = 0;
  1044. tx_desc->pkt_len = 0;
  1045. if (txq->tx_skb[tx].clone) {
  1046. /* Replace with original skb
  1047. * before returning to stack
  1048. * as buffer has been cloned
  1049. */
  1050. dev_kfree_skb(skb);
  1051. skb = txq->tx_skb[tx].clone;
  1052. txq->tx_skb[tx].clone = NULL;
  1053. }
  1054. if (rc) {
  1055. /* Something has gone wrong here.
  1056. * Failed to remove DMA header.
  1057. * Print error message and drop packet.
  1058. */
  1059. printk(KERN_ERR "%s: Error removing DMA header from "
  1060. "tx skb 0x%p.\n", priv->name, skb);
  1061. dev_kfree_skb(skb);
  1062. continue;
  1063. }
  1064. info = IEEE80211_SKB_CB(skb);
  1065. ieee80211_tx_info_clear_status(info);
  1066. if (MWL8K_TXD_SUCCESS(status))
  1067. info->flags |= IEEE80211_TX_STAT_ACK;
  1068. ieee80211_tx_status_irqsafe(hw, skb);
  1069. wake = !priv->inconfig && priv->radio_on;
  1070. }
  1071. if (wake)
  1072. ieee80211_wake_queue(hw, index);
  1073. }
  1074. /* must be called only when the card's transmit is completely halted */
  1075. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1076. {
  1077. struct mwl8k_priv *priv = hw->priv;
  1078. struct mwl8k_tx_queue *txq = priv->txq + index;
  1079. mwl8k_txq_reclaim(hw, index, 1);
  1080. kfree(txq->tx_skb);
  1081. txq->tx_skb = NULL;
  1082. pci_free_consistent(priv->pdev,
  1083. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1084. txq->tx_desc_area, txq->tx_desc_dma);
  1085. txq->tx_desc_area = NULL;
  1086. }
  1087. static int
  1088. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1089. {
  1090. struct mwl8k_priv *priv = hw->priv;
  1091. struct ieee80211_tx_info *tx_info;
  1092. struct ieee80211_hdr *wh;
  1093. struct mwl8k_tx_queue *txq;
  1094. struct mwl8k_tx_desc *tx;
  1095. struct mwl8k_dma_data *tr;
  1096. struct mwl8k_vif *mwl8k_vif;
  1097. struct sk_buff *org_skb = skb;
  1098. dma_addr_t dma;
  1099. u16 qos = 0;
  1100. bool qosframe = false, ampduframe = false;
  1101. bool mcframe = false, eapolframe = false;
  1102. bool amsduframe = false;
  1103. __le16 fc;
  1104. txq = priv->txq + index;
  1105. tx = txq->tx_desc_area + txq->tx_tail;
  1106. BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
  1107. /*
  1108. * Append HW DMA header to start of packet. Drop packet if
  1109. * there is not enough space or a failure to unshare/unclone
  1110. * the skb.
  1111. */
  1112. skb = mwl8k_add_dma_header(skb);
  1113. if (skb == NULL) {
  1114. printk(KERN_DEBUG "%s: failed to prepend HW DMA "
  1115. "header, dropping TX frame.\n", priv->name);
  1116. dev_kfree_skb(org_skb);
  1117. return NETDEV_TX_OK;
  1118. }
  1119. tx_info = IEEE80211_SKB_CB(skb);
  1120. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1121. tr = (struct mwl8k_dma_data *)skb->data;
  1122. wh = &tr->wh;
  1123. fc = wh->frame_control;
  1124. qosframe = ieee80211_is_data_qos(fc);
  1125. mcframe = is_multicast_ether_addr(wh->addr1);
  1126. ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
  1127. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1128. u16 seqno = mwl8k_vif->seqno;
  1129. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1130. wh->seq_ctrl |= cpu_to_le16(seqno << 4);
  1131. mwl8k_vif->seqno = seqno++ % 4096;
  1132. }
  1133. if (qosframe)
  1134. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1135. dma = pci_map_single(priv->pdev, skb->data,
  1136. skb->len, PCI_DMA_TODEVICE);
  1137. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1138. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1139. "dropping TX frame.\n", priv->name);
  1140. if (org_skb != NULL)
  1141. dev_kfree_skb(org_skb);
  1142. if (skb != NULL)
  1143. dev_kfree_skb(skb);
  1144. return NETDEV_TX_OK;
  1145. }
  1146. /* Set desc header, cpu bit order. */
  1147. tx->status = 0;
  1148. tx->data_rate = 0;
  1149. tx->tx_priority = index;
  1150. tx->qos_control = 0;
  1151. tx->rate_info = 0;
  1152. tx->peer_id = mwl8k_vif->peer_id;
  1153. amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
  1154. /* Setup firmware control bit fields for each frame type. */
  1155. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
  1156. tx->data_rate = 0;
  1157. qos = mwl8k_qos_setbit_eosp(qos);
  1158. /* Set Queue size to unspecified */
  1159. qos = mwl8k_qos_setbit_qlen(qos, 0xff);
  1160. } else if (ieee80211_is_data(fc)) {
  1161. tx->data_rate = 1;
  1162. if (mcframe)
  1163. tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1164. /*
  1165. * Tell firmware to not send EAPOL pkts in an
  1166. * aggregate. Verify against mac80211 tx path. If
  1167. * stack turns off AMPDU for an EAPOL frame this
  1168. * check will be removed.
  1169. */
  1170. if (eapolframe) {
  1171. qos = mwl8k_qos_setbit_ack(qos,
  1172. MWL8K_TXD_ACK_POLICY_NORMAL);
  1173. } else {
  1174. /* Send pkt in an aggregate if AMPDU frame. */
  1175. if (ampduframe)
  1176. qos = mwl8k_qos_setbit_ack(qos,
  1177. MWL8K_TXD_ACK_POLICY_BLOCKACK);
  1178. else
  1179. qos = mwl8k_qos_setbit_ack(qos,
  1180. MWL8K_TXD_ACK_POLICY_NORMAL);
  1181. if (amsduframe)
  1182. qos = mwl8k_qos_setbit_amsdu(qos);
  1183. }
  1184. }
  1185. /* Convert to little endian */
  1186. tx->qos_control = cpu_to_le16(qos);
  1187. tx->status = cpu_to_le32(tx->status);
  1188. tx->pkt_phys_addr = cpu_to_le32(dma);
  1189. tx->pkt_len = cpu_to_le16(skb->len);
  1190. txq->tx_skb[txq->tx_tail].skb = skb;
  1191. txq->tx_skb[txq->tx_tail].clone =
  1192. skb == org_skb ? NULL : org_skb;
  1193. spin_lock_bh(&priv->tx_lock);
  1194. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
  1195. MWL8K_TXD_STATUS_FW_OWNED);
  1196. wmb();
  1197. txq->tx_stats.len++;
  1198. priv->pending_tx_pkts++;
  1199. txq->tx_stats.count++;
  1200. txq->tx_tail++;
  1201. if (txq->tx_tail == MWL8K_TX_DESCS)
  1202. txq->tx_tail = 0;
  1203. if (txq->tx_head == txq->tx_tail)
  1204. ieee80211_stop_queue(hw, index);
  1205. if (priv->inconfig) {
  1206. /*
  1207. * Silently queue packet when we are in the middle of
  1208. * a config cycle. Notify firmware only if we are
  1209. * waiting for TXQs to empty. If a packet is sent
  1210. * before .config() is complete, perhaps it is better
  1211. * to drop the packet, as the channel is being changed
  1212. * and the packet will end up on the wrong channel.
  1213. */
  1214. printk(KERN_ERR "%s(): WARNING TX activity while "
  1215. "in config\n", __func__);
  1216. if (priv->tx_wait != NULL)
  1217. mwl8k_tx_start(priv);
  1218. } else
  1219. mwl8k_tx_start(priv);
  1220. spin_unlock_bh(&priv->tx_lock);
  1221. return NETDEV_TX_OK;
  1222. }
  1223. /*
  1224. * Command processing.
  1225. */
  1226. /* Timeout firmware commands after 2000ms */
  1227. #define MWL8K_CMD_TIMEOUT_MS 2000
  1228. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1229. {
  1230. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1231. struct mwl8k_priv *priv = hw->priv;
  1232. void __iomem *regs = priv->regs;
  1233. dma_addr_t dma_addr;
  1234. unsigned int dma_size;
  1235. int rc;
  1236. unsigned long timeout = 0;
  1237. u8 buf[32];
  1238. cmd->result = 0xFFFF;
  1239. dma_size = le16_to_cpu(cmd->length);
  1240. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1241. PCI_DMA_BIDIRECTIONAL);
  1242. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1243. return -ENOMEM;
  1244. if (priv->hostcmd_wait != NULL)
  1245. printk(KERN_ERR "WARNING host command in progress\n");
  1246. spin_lock_irq(&priv->fw_lock);
  1247. priv->hostcmd_wait = &cmd_wait;
  1248. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1249. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1250. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1251. iowrite32(MWL8K_H2A_INT_DUMMY,
  1252. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1253. spin_unlock_irq(&priv->fw_lock);
  1254. timeout = wait_for_completion_timeout(&cmd_wait,
  1255. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1256. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1257. PCI_DMA_BIDIRECTIONAL);
  1258. if (!timeout) {
  1259. spin_lock_irq(&priv->fw_lock);
  1260. priv->hostcmd_wait = NULL;
  1261. spin_unlock_irq(&priv->fw_lock);
  1262. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1263. priv->name,
  1264. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1265. MWL8K_CMD_TIMEOUT_MS);
  1266. rc = -ETIMEDOUT;
  1267. } else {
  1268. rc = cmd->result ? -EINVAL : 0;
  1269. if (rc)
  1270. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1271. priv->name,
  1272. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1273. cmd->result);
  1274. }
  1275. return rc;
  1276. }
  1277. /*
  1278. * GET_HW_SPEC.
  1279. */
  1280. struct mwl8k_cmd_get_hw_spec {
  1281. struct mwl8k_cmd_pkt header;
  1282. __u8 hw_rev;
  1283. __u8 host_interface;
  1284. __le16 num_mcaddrs;
  1285. __u8 perm_addr[ETH_ALEN];
  1286. __le16 region_code;
  1287. __le32 fw_rev;
  1288. __le32 ps_cookie;
  1289. __le32 caps;
  1290. __u8 mcs_bitmap[16];
  1291. __le32 rx_queue_ptr;
  1292. __le32 num_tx_queues;
  1293. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1294. __le32 caps2;
  1295. __le32 num_tx_desc_per_queue;
  1296. __le32 total_rx_desc;
  1297. } __attribute__((packed));
  1298. static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
  1299. {
  1300. struct mwl8k_priv *priv = hw->priv;
  1301. struct mwl8k_cmd_get_hw_spec *cmd;
  1302. int rc;
  1303. int i;
  1304. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1305. if (cmd == NULL)
  1306. return -ENOMEM;
  1307. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1308. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1309. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1310. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1311. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
  1312. cmd->num_tx_queues = cpu_to_le32(MWL8K_TX_QUEUES);
  1313. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1314. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
  1315. cmd->num_tx_desc_per_queue = cpu_to_le32(MWL8K_TX_DESCS);
  1316. cmd->total_rx_desc = cpu_to_le32(MWL8K_RX_DESCS);
  1317. rc = mwl8k_post_cmd(hw, &cmd->header);
  1318. if (!rc) {
  1319. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1320. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1321. priv->fw_rev = le32_to_cpu(cmd->fw_rev);
  1322. priv->hw_rev = cmd->hw_rev;
  1323. }
  1324. kfree(cmd);
  1325. return rc;
  1326. }
  1327. /*
  1328. * CMD_MAC_MULTICAST_ADR.
  1329. */
  1330. struct mwl8k_cmd_mac_multicast_adr {
  1331. struct mwl8k_cmd_pkt header;
  1332. __le16 action;
  1333. __le16 numaddr;
  1334. __u8 addr[0][ETH_ALEN];
  1335. };
  1336. #define MWL8K_ENABLE_RX_MULTICAST 0x000F
  1337. static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
  1338. int mc_count,
  1339. struct dev_addr_list *mclist)
  1340. {
  1341. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1342. int index = 0;
  1343. int rc;
  1344. int size = sizeof(*cmd) + mc_count * ETH_ALEN;
  1345. cmd = kzalloc(size, GFP_KERNEL);
  1346. if (cmd == NULL)
  1347. return -ENOMEM;
  1348. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1349. cmd->header.length = cpu_to_le16(size);
  1350. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1351. cmd->numaddr = cpu_to_le16(mc_count);
  1352. while (index < mc_count && mclist) {
  1353. if (mclist->da_addrlen != ETH_ALEN) {
  1354. rc = -EINVAL;
  1355. goto mwl8k_cmd_mac_multicast_adr_exit;
  1356. }
  1357. memcpy(cmd->addr[index++], mclist->da_addr, ETH_ALEN);
  1358. mclist = mclist->next;
  1359. }
  1360. rc = mwl8k_post_cmd(hw, &cmd->header);
  1361. mwl8k_cmd_mac_multicast_adr_exit:
  1362. kfree(cmd);
  1363. return rc;
  1364. }
  1365. /*
  1366. * CMD_802_11_GET_STAT.
  1367. */
  1368. struct mwl8k_cmd_802_11_get_stat {
  1369. struct mwl8k_cmd_pkt header;
  1370. __le16 action;
  1371. __le32 stats[64];
  1372. } __attribute__((packed));
  1373. #define MWL8K_STAT_ACK_FAILURE 9
  1374. #define MWL8K_STAT_RTS_FAILURE 12
  1375. #define MWL8K_STAT_FCS_ERROR 24
  1376. #define MWL8K_STAT_RTS_SUCCESS 11
  1377. static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
  1378. struct ieee80211_low_level_stats *stats)
  1379. {
  1380. struct mwl8k_cmd_802_11_get_stat *cmd;
  1381. int rc;
  1382. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1383. if (cmd == NULL)
  1384. return -ENOMEM;
  1385. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1386. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1387. cmd->action = cpu_to_le16(MWL8K_CMD_GET);
  1388. rc = mwl8k_post_cmd(hw, &cmd->header);
  1389. if (!rc) {
  1390. stats->dot11ACKFailureCount =
  1391. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1392. stats->dot11RTSFailureCount =
  1393. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1394. stats->dot11FCSErrorCount =
  1395. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1396. stats->dot11RTSSuccessCount =
  1397. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1398. }
  1399. kfree(cmd);
  1400. return rc;
  1401. }
  1402. /*
  1403. * CMD_802_11_RADIO_CONTROL.
  1404. */
  1405. struct mwl8k_cmd_802_11_radio_control {
  1406. struct mwl8k_cmd_pkt header;
  1407. __le16 action;
  1408. __le16 control;
  1409. __le16 radio_on;
  1410. } __attribute__((packed));
  1411. static int
  1412. mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, bool enable, bool force)
  1413. {
  1414. struct mwl8k_priv *priv = hw->priv;
  1415. struct mwl8k_cmd_802_11_radio_control *cmd;
  1416. int rc;
  1417. if (enable == priv->radio_on && !force)
  1418. return 0;
  1419. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1420. if (cmd == NULL)
  1421. return -ENOMEM;
  1422. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1423. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1424. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1425. cmd->control = cpu_to_le16(priv->radio_short_preamble ? 3 : 1);
  1426. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1427. rc = mwl8k_post_cmd(hw, &cmd->header);
  1428. kfree(cmd);
  1429. if (!rc)
  1430. priv->radio_on = enable;
  1431. return rc;
  1432. }
  1433. static int mwl8k_cmd_802_11_radio_disable(struct ieee80211_hw *hw)
  1434. {
  1435. return mwl8k_cmd_802_11_radio_control(hw, 0, 0);
  1436. }
  1437. static int mwl8k_cmd_802_11_radio_enable(struct ieee80211_hw *hw)
  1438. {
  1439. return mwl8k_cmd_802_11_radio_control(hw, 1, 0);
  1440. }
  1441. static int
  1442. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1443. {
  1444. struct mwl8k_priv *priv;
  1445. if (hw == NULL || hw->priv == NULL)
  1446. return -EINVAL;
  1447. priv = hw->priv;
  1448. priv->radio_short_preamble = short_preamble;
  1449. return mwl8k_cmd_802_11_radio_control(hw, 1, 1);
  1450. }
  1451. /*
  1452. * CMD_802_11_RF_TX_POWER.
  1453. */
  1454. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1455. struct mwl8k_cmd_802_11_rf_tx_power {
  1456. struct mwl8k_cmd_pkt header;
  1457. __le16 action;
  1458. __le16 support_level;
  1459. __le16 current_level;
  1460. __le16 reserved;
  1461. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1462. } __attribute__((packed));
  1463. static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1464. {
  1465. struct mwl8k_cmd_802_11_rf_tx_power *cmd;
  1466. int rc;
  1467. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1468. if (cmd == NULL)
  1469. return -ENOMEM;
  1470. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1471. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1472. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1473. cmd->support_level = cpu_to_le16(dBm);
  1474. rc = mwl8k_post_cmd(hw, &cmd->header);
  1475. kfree(cmd);
  1476. return rc;
  1477. }
  1478. /*
  1479. * CMD_SET_PRE_SCAN.
  1480. */
  1481. struct mwl8k_cmd_set_pre_scan {
  1482. struct mwl8k_cmd_pkt header;
  1483. } __attribute__((packed));
  1484. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1485. {
  1486. struct mwl8k_cmd_set_pre_scan *cmd;
  1487. int rc;
  1488. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1489. if (cmd == NULL)
  1490. return -ENOMEM;
  1491. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1492. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1493. rc = mwl8k_post_cmd(hw, &cmd->header);
  1494. kfree(cmd);
  1495. return rc;
  1496. }
  1497. /*
  1498. * CMD_SET_POST_SCAN.
  1499. */
  1500. struct mwl8k_cmd_set_post_scan {
  1501. struct mwl8k_cmd_pkt header;
  1502. __le32 isibss;
  1503. __u8 bssid[ETH_ALEN];
  1504. } __attribute__((packed));
  1505. static int
  1506. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 *mac)
  1507. {
  1508. struct mwl8k_cmd_set_post_scan *cmd;
  1509. int rc;
  1510. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1511. if (cmd == NULL)
  1512. return -ENOMEM;
  1513. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1514. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1515. cmd->isibss = 0;
  1516. memcpy(cmd->bssid, mac, ETH_ALEN);
  1517. rc = mwl8k_post_cmd(hw, &cmd->header);
  1518. kfree(cmd);
  1519. return rc;
  1520. }
  1521. /*
  1522. * CMD_SET_RF_CHANNEL.
  1523. */
  1524. struct mwl8k_cmd_set_rf_channel {
  1525. struct mwl8k_cmd_pkt header;
  1526. __le16 action;
  1527. __u8 current_channel;
  1528. __le32 channel_flags;
  1529. } __attribute__((packed));
  1530. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1531. struct ieee80211_channel *channel)
  1532. {
  1533. struct mwl8k_cmd_set_rf_channel *cmd;
  1534. int rc;
  1535. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1536. if (cmd == NULL)
  1537. return -ENOMEM;
  1538. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1539. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1540. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1541. cmd->current_channel = channel->hw_value;
  1542. if (channel->band == IEEE80211_BAND_2GHZ)
  1543. cmd->channel_flags = cpu_to_le32(0x00000081);
  1544. else
  1545. cmd->channel_flags = cpu_to_le32(0x00000000);
  1546. rc = mwl8k_post_cmd(hw, &cmd->header);
  1547. kfree(cmd);
  1548. return rc;
  1549. }
  1550. /*
  1551. * CMD_SET_SLOT.
  1552. */
  1553. struct mwl8k_cmd_set_slot {
  1554. struct mwl8k_cmd_pkt header;
  1555. __le16 action;
  1556. __u8 short_slot;
  1557. } __attribute__((packed));
  1558. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
  1559. {
  1560. struct mwl8k_cmd_set_slot *cmd;
  1561. int rc;
  1562. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1563. if (cmd == NULL)
  1564. return -ENOMEM;
  1565. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  1566. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1567. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1568. cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
  1569. rc = mwl8k_post_cmd(hw, &cmd->header);
  1570. kfree(cmd);
  1571. return rc;
  1572. }
  1573. /*
  1574. * CMD_MIMO_CONFIG.
  1575. */
  1576. struct mwl8k_cmd_mimo_config {
  1577. struct mwl8k_cmd_pkt header;
  1578. __le32 action;
  1579. __u8 rx_antenna_map;
  1580. __u8 tx_antenna_map;
  1581. } __attribute__((packed));
  1582. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  1583. {
  1584. struct mwl8k_cmd_mimo_config *cmd;
  1585. int rc;
  1586. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1587. if (cmd == NULL)
  1588. return -ENOMEM;
  1589. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  1590. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1591. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  1592. cmd->rx_antenna_map = rx;
  1593. cmd->tx_antenna_map = tx;
  1594. rc = mwl8k_post_cmd(hw, &cmd->header);
  1595. kfree(cmd);
  1596. return rc;
  1597. }
  1598. /*
  1599. * CMD_ENABLE_SNIFFER.
  1600. */
  1601. struct mwl8k_cmd_enable_sniffer {
  1602. struct mwl8k_cmd_pkt header;
  1603. __le32 action;
  1604. } __attribute__((packed));
  1605. static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  1606. {
  1607. struct mwl8k_cmd_enable_sniffer *cmd;
  1608. int rc;
  1609. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1610. if (cmd == NULL)
  1611. return -ENOMEM;
  1612. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  1613. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1614. cmd->action = cpu_to_le32(!!enable);
  1615. rc = mwl8k_post_cmd(hw, &cmd->header);
  1616. kfree(cmd);
  1617. return rc;
  1618. }
  1619. /*
  1620. * CMD_SET_RATEADAPT_MODE.
  1621. */
  1622. struct mwl8k_cmd_set_rate_adapt_mode {
  1623. struct mwl8k_cmd_pkt header;
  1624. __le16 action;
  1625. __le16 mode;
  1626. } __attribute__((packed));
  1627. static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
  1628. {
  1629. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  1630. int rc;
  1631. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1632. if (cmd == NULL)
  1633. return -ENOMEM;
  1634. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  1635. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1636. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1637. cmd->mode = cpu_to_le16(mode);
  1638. rc = mwl8k_post_cmd(hw, &cmd->header);
  1639. kfree(cmd);
  1640. return rc;
  1641. }
  1642. /*
  1643. * CMD_SET_WMM_MODE.
  1644. */
  1645. struct mwl8k_cmd_set_wmm {
  1646. struct mwl8k_cmd_pkt header;
  1647. __le16 action;
  1648. } __attribute__((packed));
  1649. static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
  1650. {
  1651. struct mwl8k_priv *priv = hw->priv;
  1652. struct mwl8k_cmd_set_wmm *cmd;
  1653. int rc;
  1654. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1655. if (cmd == NULL)
  1656. return -ENOMEM;
  1657. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  1658. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1659. cmd->action = cpu_to_le16(!!enable);
  1660. rc = mwl8k_post_cmd(hw, &cmd->header);
  1661. kfree(cmd);
  1662. if (!rc)
  1663. priv->wmm_enabled = enable;
  1664. return rc;
  1665. }
  1666. /*
  1667. * CMD_SET_RTS_THRESHOLD.
  1668. */
  1669. struct mwl8k_cmd_rts_threshold {
  1670. struct mwl8k_cmd_pkt header;
  1671. __le16 action;
  1672. __le16 threshold;
  1673. } __attribute__((packed));
  1674. static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
  1675. u16 action, u16 *threshold)
  1676. {
  1677. struct mwl8k_cmd_rts_threshold *cmd;
  1678. int rc;
  1679. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1680. if (cmd == NULL)
  1681. return -ENOMEM;
  1682. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  1683. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1684. cmd->action = cpu_to_le16(action);
  1685. cmd->threshold = cpu_to_le16(*threshold);
  1686. rc = mwl8k_post_cmd(hw, &cmd->header);
  1687. kfree(cmd);
  1688. return rc;
  1689. }
  1690. /*
  1691. * CMD_SET_EDCA_PARAMS.
  1692. */
  1693. struct mwl8k_cmd_set_edca_params {
  1694. struct mwl8k_cmd_pkt header;
  1695. /* See MWL8K_SET_EDCA_XXX below */
  1696. __le16 action;
  1697. /* TX opportunity in units of 32 us */
  1698. __le16 txop;
  1699. /* Log exponent of max contention period: 0...15*/
  1700. __u8 log_cw_max;
  1701. /* Log exponent of min contention period: 0...15 */
  1702. __u8 log_cw_min;
  1703. /* Adaptive interframe spacing in units of 32us */
  1704. __u8 aifs;
  1705. /* TX queue to configure */
  1706. __u8 txq;
  1707. } __attribute__((packed));
  1708. #define MWL8K_SET_EDCA_CW 0x01
  1709. #define MWL8K_SET_EDCA_TXOP 0x02
  1710. #define MWL8K_SET_EDCA_AIFS 0x04
  1711. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  1712. MWL8K_SET_EDCA_TXOP | \
  1713. MWL8K_SET_EDCA_AIFS)
  1714. static int
  1715. mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  1716. __u16 cw_min, __u16 cw_max,
  1717. __u8 aifs, __u16 txop)
  1718. {
  1719. struct mwl8k_cmd_set_edca_params *cmd;
  1720. int rc;
  1721. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1722. if (cmd == NULL)
  1723. return -ENOMEM;
  1724. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  1725. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1726. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  1727. cmd->txop = cpu_to_le16(txop);
  1728. cmd->log_cw_max = (u8)ilog2(cw_max + 1);
  1729. cmd->log_cw_min = (u8)ilog2(cw_min + 1);
  1730. cmd->aifs = aifs;
  1731. cmd->txq = qnum;
  1732. rc = mwl8k_post_cmd(hw, &cmd->header);
  1733. kfree(cmd);
  1734. return rc;
  1735. }
  1736. /*
  1737. * CMD_FINALIZE_JOIN.
  1738. */
  1739. /* FJ beacon buffer size is compiled into the firmware. */
  1740. #define MWL8K_FJ_BEACON_MAXLEN 128
  1741. struct mwl8k_cmd_finalize_join {
  1742. struct mwl8k_cmd_pkt header;
  1743. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1744. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1745. } __attribute__((packed));
  1746. static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
  1747. __u16 framelen, __u16 dtim)
  1748. {
  1749. struct mwl8k_cmd_finalize_join *cmd;
  1750. struct ieee80211_mgmt *payload = frame;
  1751. u16 hdrlen;
  1752. u32 payload_len;
  1753. int rc;
  1754. if (frame == NULL)
  1755. return -EINVAL;
  1756. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1757. if (cmd == NULL)
  1758. return -ENOMEM;
  1759. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1760. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1761. cmd->sleep_interval = cpu_to_le32(dtim ? dtim : 1);
  1762. hdrlen = ieee80211_hdrlen(payload->frame_control);
  1763. payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
  1764. /* XXX TBD Might just have to abort and return an error */
  1765. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1766. printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
  1767. "sent to firmware. Sz=%u MAX=%u\n", __func__,
  1768. payload_len, MWL8K_FJ_BEACON_MAXLEN);
  1769. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1770. payload_len = MWL8K_FJ_BEACON_MAXLEN;
  1771. if (payload && payload_len)
  1772. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1773. rc = mwl8k_post_cmd(hw, &cmd->header);
  1774. kfree(cmd);
  1775. return rc;
  1776. }
  1777. /*
  1778. * CMD_UPDATE_STADB.
  1779. */
  1780. struct mwl8k_cmd_update_sta_db {
  1781. struct mwl8k_cmd_pkt header;
  1782. /* See STADB_ACTION_TYPE */
  1783. __le32 action;
  1784. /* Peer MAC address */
  1785. __u8 peer_addr[ETH_ALEN];
  1786. __le32 reserved;
  1787. /* Peer info - valid during add/update. */
  1788. struct peer_capability_info peer_info;
  1789. } __attribute__((packed));
  1790. static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
  1791. struct ieee80211_vif *vif, __u32 action)
  1792. {
  1793. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1794. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1795. struct mwl8k_cmd_update_sta_db *cmd;
  1796. struct peer_capability_info *peer_info;
  1797. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1798. int rc;
  1799. __u8 count, *rates;
  1800. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1801. if (cmd == NULL)
  1802. return -ENOMEM;
  1803. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  1804. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1805. cmd->action = cpu_to_le32(action);
  1806. peer_info = &cmd->peer_info;
  1807. memcpy(cmd->peer_addr, mv_vif->bssid, ETH_ALEN);
  1808. switch (action) {
  1809. case MWL8K_STA_DB_ADD_ENTRY:
  1810. case MWL8K_STA_DB_MODIFY_ENTRY:
  1811. /* Build peer_info block */
  1812. peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  1813. peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
  1814. peer_info->interop = 1;
  1815. peer_info->amsdu_enabled = 0;
  1816. rates = peer_info->legacy_rates;
  1817. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1818. rates[count] = bitrates[count].hw_value;
  1819. rc = mwl8k_post_cmd(hw, &cmd->header);
  1820. if (rc == 0)
  1821. mv_vif->peer_id = peer_info->station_id;
  1822. break;
  1823. case MWL8K_STA_DB_DEL_ENTRY:
  1824. case MWL8K_STA_DB_FLUSH:
  1825. default:
  1826. rc = mwl8k_post_cmd(hw, &cmd->header);
  1827. if (rc == 0)
  1828. mv_vif->peer_id = 0;
  1829. break;
  1830. }
  1831. kfree(cmd);
  1832. return rc;
  1833. }
  1834. /*
  1835. * CMD_SET_AID.
  1836. */
  1837. #define MWL8K_RATE_INDEX_MAX_ARRAY 14
  1838. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1839. #define MWL8K_FRAME_PROT_11G 0x07
  1840. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1841. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1842. struct mwl8k_cmd_update_set_aid {
  1843. struct mwl8k_cmd_pkt header;
  1844. __le16 aid;
  1845. /* AP's MAC address (BSSID) */
  1846. __u8 bssid[ETH_ALEN];
  1847. __le16 protection_mode;
  1848. __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1849. } __attribute__((packed));
  1850. static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1851. struct ieee80211_vif *vif)
  1852. {
  1853. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1854. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1855. struct mwl8k_cmd_update_set_aid *cmd;
  1856. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1857. int count;
  1858. u16 prot_mode;
  1859. int rc;
  1860. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1861. if (cmd == NULL)
  1862. return -ENOMEM;
  1863. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1864. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1865. cmd->aid = cpu_to_le16(info->aid);
  1866. memcpy(cmd->bssid, mv_vif->bssid, ETH_ALEN);
  1867. if (info->use_cts_prot) {
  1868. prot_mode = MWL8K_FRAME_PROT_11G;
  1869. } else {
  1870. switch (info->ht_operation_mode &
  1871. IEEE80211_HT_OP_MODE_PROTECTION) {
  1872. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1873. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1874. break;
  1875. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1876. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1877. break;
  1878. default:
  1879. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1880. break;
  1881. }
  1882. }
  1883. cmd->protection_mode = cpu_to_le16(prot_mode);
  1884. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1885. cmd->supp_rates[count] = bitrates[count].hw_value;
  1886. rc = mwl8k_post_cmd(hw, &cmd->header);
  1887. kfree(cmd);
  1888. return rc;
  1889. }
  1890. /*
  1891. * CMD_SET_RATE.
  1892. */
  1893. struct mwl8k_cmd_update_rateset {
  1894. struct mwl8k_cmd_pkt header;
  1895. __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1896. /* Bitmap for supported MCS codes. */
  1897. __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
  1898. __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
  1899. } __attribute__((packed));
  1900. static int mwl8k_update_rateset(struct ieee80211_hw *hw,
  1901. struct ieee80211_vif *vif)
  1902. {
  1903. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1904. struct mwl8k_cmd_update_rateset *cmd;
  1905. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1906. int count;
  1907. int rc;
  1908. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1909. if (cmd == NULL)
  1910. return -ENOMEM;
  1911. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1912. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1913. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1914. cmd->legacy_rates[count] = bitrates[count].hw_value;
  1915. rc = mwl8k_post_cmd(hw, &cmd->header);
  1916. kfree(cmd);
  1917. return rc;
  1918. }
  1919. /*
  1920. * CMD_USE_FIXED_RATE.
  1921. */
  1922. #define MWL8K_RATE_TABLE_SIZE 8
  1923. #define MWL8K_UCAST_RATE 0
  1924. #define MWL8K_USE_AUTO_RATE 0x0002
  1925. struct mwl8k_rate_entry {
  1926. /* Set to 1 if HT rate, 0 if legacy. */
  1927. __le32 is_ht_rate;
  1928. /* Set to 1 to use retry_count field. */
  1929. __le32 enable_retry;
  1930. /* Specified legacy rate or MCS. */
  1931. __le32 rate;
  1932. /* Number of allowed retries. */
  1933. __le32 retry_count;
  1934. } __attribute__((packed));
  1935. struct mwl8k_rate_table {
  1936. /* 1 to allow specified rate and below */
  1937. __le32 allow_rate_drop;
  1938. __le32 num_rates;
  1939. struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
  1940. } __attribute__((packed));
  1941. struct mwl8k_cmd_use_fixed_rate {
  1942. struct mwl8k_cmd_pkt header;
  1943. __le32 action;
  1944. struct mwl8k_rate_table rate_table;
  1945. /* Unicast, Broadcast or Multicast */
  1946. __le32 rate_type;
  1947. __le32 reserved1;
  1948. __le32 reserved2;
  1949. } __attribute__((packed));
  1950. static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
  1951. u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
  1952. {
  1953. struct mwl8k_cmd_use_fixed_rate *cmd;
  1954. int count;
  1955. int rc;
  1956. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1957. if (cmd == NULL)
  1958. return -ENOMEM;
  1959. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  1960. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1961. cmd->action = cpu_to_le32(action);
  1962. cmd->rate_type = cpu_to_le32(rate_type);
  1963. if (rate_table != NULL) {
  1964. /* Copy over each field manually so
  1965. * that bitflipping can be done
  1966. */
  1967. cmd->rate_table.allow_rate_drop =
  1968. cpu_to_le32(rate_table->allow_rate_drop);
  1969. cmd->rate_table.num_rates =
  1970. cpu_to_le32(rate_table->num_rates);
  1971. for (count = 0; count < rate_table->num_rates; count++) {
  1972. struct mwl8k_rate_entry *dst =
  1973. &cmd->rate_table.rate_entry[count];
  1974. struct mwl8k_rate_entry *src =
  1975. &rate_table->rate_entry[count];
  1976. dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
  1977. dst->enable_retry = cpu_to_le32(src->enable_retry);
  1978. dst->rate = cpu_to_le32(src->rate);
  1979. dst->retry_count = cpu_to_le32(src->retry_count);
  1980. }
  1981. }
  1982. rc = mwl8k_post_cmd(hw, &cmd->header);
  1983. kfree(cmd);
  1984. return rc;
  1985. }
  1986. /*
  1987. * Interrupt handling.
  1988. */
  1989. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  1990. {
  1991. struct ieee80211_hw *hw = dev_id;
  1992. struct mwl8k_priv *priv = hw->priv;
  1993. u32 status;
  1994. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  1995. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  1996. if (!status)
  1997. return IRQ_NONE;
  1998. if (status & MWL8K_A2H_INT_TX_DONE)
  1999. tasklet_schedule(&priv->tx_reclaim_task);
  2000. if (status & MWL8K_A2H_INT_RX_READY) {
  2001. while (rxq_process(hw, 0, 1))
  2002. rxq_refill(hw, 0, 1);
  2003. }
  2004. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2005. if (priv->hostcmd_wait != NULL) {
  2006. complete(priv->hostcmd_wait);
  2007. priv->hostcmd_wait = NULL;
  2008. }
  2009. }
  2010. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2011. if (!priv->inconfig &&
  2012. priv->radio_on &&
  2013. mwl8k_txq_busy(priv))
  2014. mwl8k_tx_start(priv);
  2015. }
  2016. return IRQ_HANDLED;
  2017. }
  2018. /*
  2019. * Core driver operations.
  2020. */
  2021. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2022. {
  2023. struct mwl8k_priv *priv = hw->priv;
  2024. int index = skb_get_queue_mapping(skb);
  2025. int rc;
  2026. if (priv->current_channel == NULL) {
  2027. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2028. "disabled\n", priv->name);
  2029. dev_kfree_skb(skb);
  2030. return NETDEV_TX_OK;
  2031. }
  2032. rc = mwl8k_txq_xmit(hw, index, skb);
  2033. return rc;
  2034. }
  2035. struct mwl8k_work_struct {
  2036. /* Initialized by mwl8k_queue_work(). */
  2037. struct work_struct wt;
  2038. /* Required field passed in to mwl8k_queue_work(). */
  2039. struct ieee80211_hw *hw;
  2040. /* Required field passed in to mwl8k_queue_work(). */
  2041. int (*wfunc)(struct work_struct *w);
  2042. /* Initialized by mwl8k_queue_work(). */
  2043. struct completion *cmd_wait;
  2044. /* Result code. */
  2045. int rc;
  2046. /*
  2047. * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
  2048. * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
  2049. */
  2050. u32 options;
  2051. /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
  2052. unsigned long timeout_ms;
  2053. /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
  2054. u32 txwait_attempts;
  2055. /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
  2056. u32 tx_timeout_ms;
  2057. u32 step;
  2058. };
  2059. /* Flags controlling behavior of config queue requests */
  2060. /* Caller spins while waiting for completion. */
  2061. #define MWL8K_WQ_SPIN 0x00000001
  2062. /* Wait for TX queues to empty before proceeding with configuration. */
  2063. #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
  2064. /* Queue request and return immediately. */
  2065. #define MWL8K_WQ_POST_REQUEST 0x00000004
  2066. /*
  2067. * Caller sleeps and waits for task complete notification.
  2068. * Do not use in atomic context.
  2069. */
  2070. #define MWL8K_WQ_SLEEP 0x00000008
  2071. /* Free work struct when task is done. */
  2072. #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
  2073. /*
  2074. * Config request is queued and returns to caller imediately. Use
  2075. * this in atomic context. Work struct is freed by mwl8k_queue_work()
  2076. * when this flag is set.
  2077. */
  2078. #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
  2079. MWL8K_WQ_FREE_WORKSTRUCT)
  2080. /* Default work queue behavior is to sleep and wait for tx completion. */
  2081. #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
  2082. /*
  2083. * Default config request timeout. Add adjustments to make sure the
  2084. * config thread waits long enough for both tx wait and cmd wait before
  2085. * timing out.
  2086. */
  2087. /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
  2088. #define MWL8K_TXWAIT_TIMEOUT_MS 1000
  2089. /* Default number of TX wait attempts. */
  2090. #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
  2091. /* Total time to wait for TXQ to drain. */
  2092. #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
  2093. MWL8K_WQ_TXWAIT_ATTEMPTS)
  2094. /* Scheduling slop. */
  2095. #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
  2096. #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
  2097. MWL8K_TXWAIT_MS + \
  2098. MWL8K_OS_SCHEDULE_OVERHEAD_MS)
  2099. static void mwl8k_config_thread(struct work_struct *wt)
  2100. {
  2101. struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
  2102. struct ieee80211_hw *hw = worker->hw;
  2103. struct mwl8k_priv *priv = hw->priv;
  2104. int rc = 0;
  2105. spin_lock_irq(&priv->tx_lock);
  2106. priv->inconfig = true;
  2107. spin_unlock_irq(&priv->tx_lock);
  2108. ieee80211_stop_queues(hw);
  2109. /*
  2110. * Wait for host queues to drain before doing PHY
  2111. * reconfiguration. This avoids interrupting any in-flight
  2112. * DMA transfers to the hardware.
  2113. */
  2114. if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
  2115. u32 timeout;
  2116. u32 time_remaining;
  2117. u32 iter;
  2118. u32 tx_wait_attempts = worker->txwait_attempts;
  2119. time_remaining = worker->tx_timeout_ms;
  2120. if (!tx_wait_attempts)
  2121. tx_wait_attempts = 1;
  2122. timeout = worker->tx_timeout_ms/tx_wait_attempts;
  2123. if (!timeout)
  2124. timeout = 1;
  2125. iter = tx_wait_attempts;
  2126. do {
  2127. int wait_time;
  2128. if (time_remaining > timeout) {
  2129. time_remaining -= timeout;
  2130. wait_time = timeout;
  2131. } else
  2132. wait_time = time_remaining;
  2133. if (!wait_time)
  2134. wait_time = 1;
  2135. rc = mwl8k_tx_wait_empty(hw, wait_time);
  2136. if (rc)
  2137. printk(KERN_ERR "%s() txwait timeout=%ums "
  2138. "Retry:%u/%u\n", __func__, timeout,
  2139. tx_wait_attempts - iter + 1,
  2140. tx_wait_attempts);
  2141. } while (rc && --iter);
  2142. rc = iter ? 0 : -ETIMEDOUT;
  2143. }
  2144. if (!rc)
  2145. rc = worker->wfunc(wt);
  2146. spin_lock_irq(&priv->tx_lock);
  2147. priv->inconfig = false;
  2148. if (priv->pending_tx_pkts && priv->radio_on)
  2149. mwl8k_tx_start(priv);
  2150. spin_unlock_irq(&priv->tx_lock);
  2151. ieee80211_wake_queues(hw);
  2152. worker->rc = rc;
  2153. if (worker->options & MWL8K_WQ_SLEEP)
  2154. complete(worker->cmd_wait);
  2155. if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
  2156. kfree(wt);
  2157. }
  2158. static int mwl8k_queue_work(struct ieee80211_hw *hw,
  2159. struct mwl8k_work_struct *worker,
  2160. struct workqueue_struct *wqueue,
  2161. int (*wfunc)(struct work_struct *w))
  2162. {
  2163. unsigned long timeout = 0;
  2164. int rc = 0;
  2165. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  2166. if (!worker->timeout_ms)
  2167. worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
  2168. if (!worker->options)
  2169. worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
  2170. if (!worker->txwait_attempts)
  2171. worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
  2172. if (!worker->tx_timeout_ms)
  2173. worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
  2174. worker->hw = hw;
  2175. worker->cmd_wait = &cmd_wait;
  2176. worker->rc = 1;
  2177. worker->wfunc = wfunc;
  2178. INIT_WORK(&worker->wt, mwl8k_config_thread);
  2179. queue_work(wqueue, &worker->wt);
  2180. if (worker->options & MWL8K_WQ_POST_REQUEST) {
  2181. rc = 0;
  2182. } else {
  2183. if (worker->options & MWL8K_WQ_SPIN) {
  2184. timeout = worker->timeout_ms;
  2185. while (timeout && (worker->rc > 0)) {
  2186. mdelay(1);
  2187. timeout--;
  2188. }
  2189. } else if (worker->options & MWL8K_WQ_SLEEP)
  2190. timeout = wait_for_completion_timeout(&cmd_wait,
  2191. msecs_to_jiffies(worker->timeout_ms));
  2192. if (timeout)
  2193. rc = worker->rc;
  2194. else {
  2195. cancel_work_sync(&worker->wt);
  2196. rc = -ETIMEDOUT;
  2197. }
  2198. }
  2199. return rc;
  2200. }
  2201. struct mwl8k_start_worker {
  2202. struct mwl8k_work_struct header;
  2203. };
  2204. static int mwl8k_start_wt(struct work_struct *wt)
  2205. {
  2206. struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
  2207. struct ieee80211_hw *hw = worker->header.hw;
  2208. struct mwl8k_priv *priv = hw->priv;
  2209. int rc = 0;
  2210. if (priv->vif != NULL) {
  2211. rc = -EIO;
  2212. goto mwl8k_start_exit;
  2213. }
  2214. /* Turn on radio */
  2215. if (mwl8k_cmd_802_11_radio_enable(hw)) {
  2216. rc = -EIO;
  2217. goto mwl8k_start_exit;
  2218. }
  2219. /* Purge TX/RX HW queues */
  2220. if (mwl8k_cmd_set_pre_scan(hw)) {
  2221. rc = -EIO;
  2222. goto mwl8k_start_exit;
  2223. }
  2224. if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
  2225. rc = -EIO;
  2226. goto mwl8k_start_exit;
  2227. }
  2228. /* Enable firmware rate adaptation */
  2229. if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
  2230. rc = -EIO;
  2231. goto mwl8k_start_exit;
  2232. }
  2233. /* Disable WMM. WMM gets enabled when stack sends WMM parms */
  2234. if (mwl8k_set_wmm(hw, 0)) {
  2235. rc = -EIO;
  2236. goto mwl8k_start_exit;
  2237. }
  2238. /* Disable sniffer mode */
  2239. if (mwl8k_enable_sniffer(hw, 0))
  2240. rc = -EIO;
  2241. mwl8k_start_exit:
  2242. return rc;
  2243. }
  2244. static int mwl8k_start(struct ieee80211_hw *hw)
  2245. {
  2246. struct mwl8k_start_worker *worker;
  2247. struct mwl8k_priv *priv = hw->priv;
  2248. int rc;
  2249. /* Enable tx reclaim tasklet */
  2250. tasklet_enable(&priv->tx_reclaim_task);
  2251. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2252. IRQF_SHARED, MWL8K_NAME, hw);
  2253. if (rc) {
  2254. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2255. priv->name);
  2256. rc = -EIO;
  2257. goto mwl8k_start_disable_tasklet;
  2258. }
  2259. /* Enable interrupts */
  2260. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2261. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2262. if (worker == NULL) {
  2263. rc = -ENOMEM;
  2264. goto mwl8k_start_disable_irq;
  2265. }
  2266. rc = mwl8k_queue_work(hw, &worker->header,
  2267. priv->config_wq, mwl8k_start_wt);
  2268. kfree(worker);
  2269. if (!rc)
  2270. return rc;
  2271. if (rc == -ETIMEDOUT)
  2272. printk(KERN_ERR "%s() timed out\n", __func__);
  2273. rc = -EIO;
  2274. mwl8k_start_disable_irq:
  2275. spin_lock_irq(&priv->tx_lock);
  2276. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2277. spin_unlock_irq(&priv->tx_lock);
  2278. free_irq(priv->pdev->irq, hw);
  2279. mwl8k_start_disable_tasklet:
  2280. tasklet_disable(&priv->tx_reclaim_task);
  2281. return rc;
  2282. }
  2283. struct mwl8k_stop_worker {
  2284. struct mwl8k_work_struct header;
  2285. };
  2286. static int mwl8k_stop_wt(struct work_struct *wt)
  2287. {
  2288. struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
  2289. struct ieee80211_hw *hw = worker->header.hw;
  2290. return mwl8k_cmd_802_11_radio_disable(hw);
  2291. }
  2292. static void mwl8k_stop(struct ieee80211_hw *hw)
  2293. {
  2294. int rc;
  2295. struct mwl8k_stop_worker *worker;
  2296. struct mwl8k_priv *priv = hw->priv;
  2297. int i;
  2298. if (priv->vif != NULL)
  2299. return;
  2300. ieee80211_stop_queues(hw);
  2301. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2302. if (worker == NULL)
  2303. return;
  2304. rc = mwl8k_queue_work(hw, &worker->header,
  2305. priv->config_wq, mwl8k_stop_wt);
  2306. kfree(worker);
  2307. if (rc == -ETIMEDOUT)
  2308. printk(KERN_ERR "%s() timed out\n", __func__);
  2309. /* Disable interrupts */
  2310. spin_lock_irq(&priv->tx_lock);
  2311. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2312. spin_unlock_irq(&priv->tx_lock);
  2313. free_irq(priv->pdev->irq, hw);
  2314. /* Stop finalize join worker */
  2315. cancel_work_sync(&priv->finalize_join_worker);
  2316. if (priv->beacon_skb != NULL)
  2317. dev_kfree_skb(priv->beacon_skb);
  2318. /* Stop tx reclaim tasklet */
  2319. tasklet_disable(&priv->tx_reclaim_task);
  2320. /* Stop config thread */
  2321. flush_workqueue(priv->config_wq);
  2322. /* Return all skbs to mac80211 */
  2323. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2324. mwl8k_txq_reclaim(hw, i, 1);
  2325. }
  2326. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2327. struct ieee80211_if_init_conf *conf)
  2328. {
  2329. struct mwl8k_priv *priv = hw->priv;
  2330. struct mwl8k_vif *mwl8k_vif;
  2331. /*
  2332. * We only support one active interface at a time.
  2333. */
  2334. if (priv->vif != NULL)
  2335. return -EBUSY;
  2336. /*
  2337. * We only support managed interfaces for now.
  2338. */
  2339. if (conf->type != NL80211_IFTYPE_STATION &&
  2340. conf->type != NL80211_IFTYPE_MONITOR)
  2341. return -EINVAL;
  2342. /* Clean out driver private area */
  2343. mwl8k_vif = MWL8K_VIF(conf->vif);
  2344. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2345. /* Save the mac address */
  2346. memcpy(mwl8k_vif->mac_addr, conf->mac_addr, ETH_ALEN);
  2347. /* Back pointer to parent config block */
  2348. mwl8k_vif->priv = priv;
  2349. /* Setup initial PHY parameters */
  2350. memcpy(mwl8k_vif->legacy_rates,
  2351. priv->rates, sizeof(mwl8k_vif->legacy_rates));
  2352. mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
  2353. /* Set Initial sequence number to zero */
  2354. mwl8k_vif->seqno = 0;
  2355. priv->vif = conf->vif;
  2356. priv->current_channel = NULL;
  2357. return 0;
  2358. }
  2359. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2360. struct ieee80211_if_init_conf *conf)
  2361. {
  2362. struct mwl8k_priv *priv = hw->priv;
  2363. if (priv->vif == NULL)
  2364. return;
  2365. priv->vif = NULL;
  2366. }
  2367. struct mwl8k_config_worker {
  2368. struct mwl8k_work_struct header;
  2369. u32 changed;
  2370. };
  2371. static int mwl8k_config_wt(struct work_struct *wt)
  2372. {
  2373. struct mwl8k_config_worker *worker =
  2374. (struct mwl8k_config_worker *)wt;
  2375. struct ieee80211_hw *hw = worker->header.hw;
  2376. struct ieee80211_conf *conf = &hw->conf;
  2377. struct mwl8k_priv *priv = hw->priv;
  2378. int rc = 0;
  2379. if (mwl8k_cmd_802_11_radio_enable(hw)) {
  2380. rc = -EINVAL;
  2381. goto mwl8k_config_exit;
  2382. }
  2383. priv->current_channel = conf->channel;
  2384. if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
  2385. rc = -EINVAL;
  2386. goto mwl8k_config_exit;
  2387. }
  2388. if (conf->power_level > 18)
  2389. conf->power_level = 18;
  2390. if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
  2391. rc = -EINVAL;
  2392. goto mwl8k_config_exit;
  2393. }
  2394. if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
  2395. rc = -EINVAL;
  2396. mwl8k_config_exit:
  2397. return rc;
  2398. }
  2399. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2400. {
  2401. int rc = 0;
  2402. struct mwl8k_config_worker *worker;
  2403. struct mwl8k_priv *priv = hw->priv;
  2404. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2405. if (worker == NULL)
  2406. return -ENOMEM;
  2407. worker->changed = changed;
  2408. rc = mwl8k_queue_work(hw, &worker->header,
  2409. priv->config_wq, mwl8k_config_wt);
  2410. if (rc == -ETIMEDOUT) {
  2411. printk(KERN_ERR "%s() timed out.\n", __func__);
  2412. rc = -EINVAL;
  2413. }
  2414. kfree(worker);
  2415. /*
  2416. * mac80211 will crash on anything other than -EINVAL on
  2417. * error. Looks like wireless extensions which calls mac80211
  2418. * may be the actual culprit...
  2419. */
  2420. return rc ? -EINVAL : 0;
  2421. }
  2422. struct mwl8k_bss_info_changed_worker {
  2423. struct mwl8k_work_struct header;
  2424. struct ieee80211_vif *vif;
  2425. struct ieee80211_bss_conf *info;
  2426. u32 changed;
  2427. };
  2428. static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
  2429. {
  2430. struct mwl8k_bss_info_changed_worker *worker =
  2431. (struct mwl8k_bss_info_changed_worker *)wt;
  2432. struct ieee80211_hw *hw = worker->header.hw;
  2433. struct ieee80211_vif *vif = worker->vif;
  2434. struct ieee80211_bss_conf *info = worker->info;
  2435. u32 changed;
  2436. int rc;
  2437. struct mwl8k_priv *priv = hw->priv;
  2438. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2439. changed = worker->changed;
  2440. priv->capture_beacon = false;
  2441. if (info->assoc) {
  2442. memcpy(&mwl8k_vif->bss_info, info,
  2443. sizeof(struct ieee80211_bss_conf));
  2444. /* Install rates */
  2445. if (mwl8k_update_rateset(hw, vif))
  2446. goto mwl8k_bss_info_changed_exit;
  2447. /* Turn on rate adaptation */
  2448. if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
  2449. MWL8K_UCAST_RATE, NULL))
  2450. goto mwl8k_bss_info_changed_exit;
  2451. /* Set radio preamble */
  2452. if (mwl8k_set_radio_preamble(hw, info->use_short_preamble))
  2453. goto mwl8k_bss_info_changed_exit;
  2454. /* Set slot time */
  2455. if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
  2456. MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
  2457. goto mwl8k_bss_info_changed_exit;
  2458. /* Update peer rate info */
  2459. if (mwl8k_cmd_update_sta_db(hw, vif,
  2460. MWL8K_STA_DB_MODIFY_ENTRY))
  2461. goto mwl8k_bss_info_changed_exit;
  2462. /* Set AID */
  2463. if (mwl8k_cmd_set_aid(hw, vif))
  2464. goto mwl8k_bss_info_changed_exit;
  2465. /*
  2466. * Finalize the join. Tell rx handler to process
  2467. * next beacon from our BSSID.
  2468. */
  2469. memcpy(priv->capture_bssid, mwl8k_vif->bssid, ETH_ALEN);
  2470. priv->capture_beacon = true;
  2471. } else {
  2472. mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
  2473. memset(&mwl8k_vif->bss_info, 0,
  2474. sizeof(struct ieee80211_bss_conf));
  2475. memset(mwl8k_vif->bssid, 0, ETH_ALEN);
  2476. }
  2477. mwl8k_bss_info_changed_exit:
  2478. rc = 0;
  2479. return rc;
  2480. }
  2481. static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
  2482. struct ieee80211_vif *vif,
  2483. struct ieee80211_bss_conf *info,
  2484. u32 changed)
  2485. {
  2486. struct mwl8k_bss_info_changed_worker *worker;
  2487. struct mwl8k_priv *priv = hw->priv;
  2488. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  2489. int rc;
  2490. if (changed & BSS_CHANGED_BSSID)
  2491. memcpy(mv_vif->bssid, info->bssid, ETH_ALEN);
  2492. if ((changed & BSS_CHANGED_ASSOC) == 0)
  2493. return;
  2494. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2495. if (worker == NULL)
  2496. return;
  2497. worker->vif = vif;
  2498. worker->info = info;
  2499. worker->changed = changed;
  2500. rc = mwl8k_queue_work(hw, &worker->header,
  2501. priv->config_wq,
  2502. mwl8k_bss_info_changed_wt);
  2503. kfree(worker);
  2504. if (rc == -ETIMEDOUT)
  2505. printk(KERN_ERR "%s() timed out\n", __func__);
  2506. }
  2507. struct mwl8k_configure_filter_worker {
  2508. struct mwl8k_work_struct header;
  2509. unsigned int changed_flags;
  2510. unsigned int *total_flags;
  2511. int mc_count;
  2512. struct dev_addr_list *mclist;
  2513. };
  2514. #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
  2515. static int mwl8k_configure_filter_wt(struct work_struct *wt)
  2516. {
  2517. struct mwl8k_configure_filter_worker *worker =
  2518. (struct mwl8k_configure_filter_worker *)wt;
  2519. struct ieee80211_hw *hw = worker->header.hw;
  2520. unsigned int changed_flags = worker->changed_flags;
  2521. unsigned int *total_flags = worker->total_flags;
  2522. int mc_count = worker->mc_count;
  2523. struct dev_addr_list *mclist = worker->mclist;
  2524. struct mwl8k_priv *priv = hw->priv;
  2525. int rc = 0;
  2526. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2527. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  2528. rc = mwl8k_cmd_set_pre_scan(hw);
  2529. else {
  2530. u8 *bssid;
  2531. bssid = "\x00\x00\x00\x00\x00\x00";
  2532. if (priv->vif != NULL)
  2533. bssid = MWL8K_VIF(priv->vif)->bssid;
  2534. rc = mwl8k_cmd_set_post_scan(hw, bssid);
  2535. }
  2536. }
  2537. if (rc)
  2538. goto mwl8k_configure_filter_exit;
  2539. if (mc_count) {
  2540. if (mc_count > priv->num_mcaddrs)
  2541. mc_count = priv->num_mcaddrs;
  2542. rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
  2543. if (rc)
  2544. printk(KERN_ERR
  2545. "%s()Error setting multicast addresses\n",
  2546. __func__);
  2547. }
  2548. mwl8k_configure_filter_exit:
  2549. return rc;
  2550. }
  2551. static u64 mwl8k_prepare_multicast(struct ieee80211_hw *hw,
  2552. int mc_count, struct dev_addr_list *mclist)
  2553. {
  2554. struct mwl8k_configure_filter_worker *worker;
  2555. worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
  2556. if (!worker)
  2557. return 0;
  2558. /*
  2559. * XXX: This is _HORRIBLY_ broken!!
  2560. *
  2561. * No locking, the mclist pointer might be invalid as soon as this
  2562. * function returns, something in the list might be invalidated
  2563. * once we get to the worker, etc...
  2564. */
  2565. worker->mc_count = mc_count;
  2566. worker->mclist = mclist;
  2567. return (u64)worker;
  2568. }
  2569. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2570. unsigned int changed_flags,
  2571. unsigned int *total_flags,
  2572. u64 multicast)
  2573. {
  2574. struct mwl8k_configure_filter_worker *worker = (void *)multicast;
  2575. struct mwl8k_priv *priv = hw->priv;
  2576. /* Clear unsupported feature flags */
  2577. *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
  2578. if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS))
  2579. return;
  2580. if (worker == NULL)
  2581. return;
  2582. worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
  2583. worker->changed_flags = changed_flags;
  2584. worker->total_flags = total_flags;
  2585. mwl8k_queue_work(hw, &worker->header, priv->config_wq,
  2586. mwl8k_configure_filter_wt);
  2587. }
  2588. struct mwl8k_set_rts_threshold_worker {
  2589. struct mwl8k_work_struct header;
  2590. u32 value;
  2591. };
  2592. static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
  2593. {
  2594. struct mwl8k_set_rts_threshold_worker *worker =
  2595. (struct mwl8k_set_rts_threshold_worker *)wt;
  2596. struct ieee80211_hw *hw = worker->header.hw;
  2597. u16 threshold = (u16)(worker->value);
  2598. int rc;
  2599. rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
  2600. return rc;
  2601. }
  2602. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2603. {
  2604. int rc;
  2605. struct mwl8k_set_rts_threshold_worker *worker;
  2606. struct mwl8k_priv *priv = hw->priv;
  2607. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2608. if (worker == NULL)
  2609. return -ENOMEM;
  2610. worker->value = value;
  2611. rc = mwl8k_queue_work(hw, &worker->header,
  2612. priv->config_wq,
  2613. mwl8k_set_rts_threshold_wt);
  2614. kfree(worker);
  2615. if (rc == -ETIMEDOUT) {
  2616. printk(KERN_ERR "%s() timed out\n", __func__);
  2617. rc = -EINVAL;
  2618. }
  2619. return rc;
  2620. }
  2621. struct mwl8k_conf_tx_worker {
  2622. struct mwl8k_work_struct header;
  2623. u16 queue;
  2624. const struct ieee80211_tx_queue_params *params;
  2625. };
  2626. static int mwl8k_conf_tx_wt(struct work_struct *wt)
  2627. {
  2628. struct mwl8k_conf_tx_worker *worker =
  2629. (struct mwl8k_conf_tx_worker *)wt;
  2630. struct ieee80211_hw *hw = worker->header.hw;
  2631. u16 queue = worker->queue;
  2632. const struct ieee80211_tx_queue_params *params = worker->params;
  2633. struct mwl8k_priv *priv = hw->priv;
  2634. int rc = 0;
  2635. if (!priv->wmm_enabled) {
  2636. if (mwl8k_set_wmm(hw, 1)) {
  2637. rc = -EINVAL;
  2638. goto mwl8k_conf_tx_exit;
  2639. }
  2640. }
  2641. if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
  2642. params->cw_max, params->aifs, params->txop))
  2643. rc = -EINVAL;
  2644. mwl8k_conf_tx_exit:
  2645. return rc;
  2646. }
  2647. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  2648. const struct ieee80211_tx_queue_params *params)
  2649. {
  2650. int rc;
  2651. struct mwl8k_conf_tx_worker *worker;
  2652. struct mwl8k_priv *priv = hw->priv;
  2653. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2654. if (worker == NULL)
  2655. return -ENOMEM;
  2656. worker->queue = queue;
  2657. worker->params = params;
  2658. rc = mwl8k_queue_work(hw, &worker->header,
  2659. priv->config_wq, mwl8k_conf_tx_wt);
  2660. kfree(worker);
  2661. if (rc == -ETIMEDOUT) {
  2662. printk(KERN_ERR "%s() timed out\n", __func__);
  2663. rc = -EINVAL;
  2664. }
  2665. return rc;
  2666. }
  2667. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  2668. struct ieee80211_tx_queue_stats *stats)
  2669. {
  2670. struct mwl8k_priv *priv = hw->priv;
  2671. struct mwl8k_tx_queue *txq;
  2672. int index;
  2673. spin_lock_bh(&priv->tx_lock);
  2674. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  2675. txq = priv->txq + index;
  2676. memcpy(&stats[index], &txq->tx_stats,
  2677. sizeof(struct ieee80211_tx_queue_stats));
  2678. }
  2679. spin_unlock_bh(&priv->tx_lock);
  2680. return 0;
  2681. }
  2682. struct mwl8k_get_stats_worker {
  2683. struct mwl8k_work_struct header;
  2684. struct ieee80211_low_level_stats *stats;
  2685. };
  2686. static int mwl8k_get_stats_wt(struct work_struct *wt)
  2687. {
  2688. struct mwl8k_get_stats_worker *worker =
  2689. (struct mwl8k_get_stats_worker *)wt;
  2690. return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
  2691. }
  2692. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  2693. struct ieee80211_low_level_stats *stats)
  2694. {
  2695. int rc;
  2696. struct mwl8k_get_stats_worker *worker;
  2697. struct mwl8k_priv *priv = hw->priv;
  2698. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2699. if (worker == NULL)
  2700. return -ENOMEM;
  2701. worker->stats = stats;
  2702. rc = mwl8k_queue_work(hw, &worker->header,
  2703. priv->config_wq, mwl8k_get_stats_wt);
  2704. kfree(worker);
  2705. if (rc == -ETIMEDOUT) {
  2706. printk(KERN_ERR "%s() timed out\n", __func__);
  2707. rc = -EINVAL;
  2708. }
  2709. return rc;
  2710. }
  2711. static const struct ieee80211_ops mwl8k_ops = {
  2712. .tx = mwl8k_tx,
  2713. .start = mwl8k_start,
  2714. .stop = mwl8k_stop,
  2715. .add_interface = mwl8k_add_interface,
  2716. .remove_interface = mwl8k_remove_interface,
  2717. .config = mwl8k_config,
  2718. .bss_info_changed = mwl8k_bss_info_changed,
  2719. .prepare_multicast = mwl8k_prepare_multicast,
  2720. .configure_filter = mwl8k_configure_filter,
  2721. .set_rts_threshold = mwl8k_set_rts_threshold,
  2722. .conf_tx = mwl8k_conf_tx,
  2723. .get_tx_stats = mwl8k_get_tx_stats,
  2724. .get_stats = mwl8k_get_stats,
  2725. };
  2726. static void mwl8k_tx_reclaim_handler(unsigned long data)
  2727. {
  2728. int i;
  2729. struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
  2730. struct mwl8k_priv *priv = hw->priv;
  2731. spin_lock_bh(&priv->tx_lock);
  2732. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2733. mwl8k_txq_reclaim(hw, i, 0);
  2734. if (priv->tx_wait != NULL && mwl8k_txq_busy(priv) == 0) {
  2735. complete(priv->tx_wait);
  2736. priv->tx_wait = NULL;
  2737. }
  2738. spin_unlock_bh(&priv->tx_lock);
  2739. }
  2740. static void mwl8k_finalize_join_worker(struct work_struct *work)
  2741. {
  2742. struct mwl8k_priv *priv =
  2743. container_of(work, struct mwl8k_priv, finalize_join_worker);
  2744. struct sk_buff *skb = priv->beacon_skb;
  2745. u8 dtim = MWL8K_VIF(priv->vif)->bss_info.dtim_period;
  2746. mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
  2747. dev_kfree_skb(skb);
  2748. priv->beacon_skb = NULL;
  2749. }
  2750. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  2751. const struct pci_device_id *id)
  2752. {
  2753. struct ieee80211_hw *hw;
  2754. struct mwl8k_priv *priv;
  2755. int rc;
  2756. int i;
  2757. u8 *fw;
  2758. rc = pci_enable_device(pdev);
  2759. if (rc) {
  2760. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  2761. MWL8K_NAME);
  2762. return rc;
  2763. }
  2764. rc = pci_request_regions(pdev, MWL8K_NAME);
  2765. if (rc) {
  2766. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  2767. MWL8K_NAME);
  2768. return rc;
  2769. }
  2770. pci_set_master(pdev);
  2771. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  2772. if (hw == NULL) {
  2773. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  2774. rc = -ENOMEM;
  2775. goto err_free_reg;
  2776. }
  2777. priv = hw->priv;
  2778. priv->hw = hw;
  2779. priv->pdev = pdev;
  2780. priv->hostcmd_wait = NULL;
  2781. priv->tx_wait = NULL;
  2782. priv->inconfig = false;
  2783. priv->wmm_enabled = false;
  2784. priv->pending_tx_pkts = 0;
  2785. strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
  2786. spin_lock_init(&priv->fw_lock);
  2787. SET_IEEE80211_DEV(hw, &pdev->dev);
  2788. pci_set_drvdata(pdev, hw);
  2789. priv->regs = pci_iomap(pdev, 1, 0x10000);
  2790. if (priv->regs == NULL) {
  2791. printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
  2792. goto err_iounmap;
  2793. }
  2794. memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
  2795. priv->band.band = IEEE80211_BAND_2GHZ;
  2796. priv->band.channels = priv->channels;
  2797. priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
  2798. priv->band.bitrates = priv->rates;
  2799. priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
  2800. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  2801. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
  2802. memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
  2803. /*
  2804. * Extra headroom is the size of the required DMA header
  2805. * minus the size of the smallest 802.11 frame (CTS frame).
  2806. */
  2807. hw->extra_tx_headroom =
  2808. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  2809. hw->channel_change_time = 10;
  2810. hw->queues = MWL8K_TX_QUEUES;
  2811. hw->wiphy->interface_modes =
  2812. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
  2813. /* Set rssi and noise values to dBm */
  2814. hw->flags |= IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM;
  2815. hw->vif_data_size = sizeof(struct mwl8k_vif);
  2816. priv->vif = NULL;
  2817. /* Set default radio state and preamble */
  2818. priv->radio_on = 0;
  2819. priv->radio_short_preamble = 0;
  2820. /* Finalize join worker */
  2821. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  2822. /* TX reclaim tasklet */
  2823. tasklet_init(&priv->tx_reclaim_task,
  2824. mwl8k_tx_reclaim_handler, (unsigned long)hw);
  2825. tasklet_disable(&priv->tx_reclaim_task);
  2826. /* Config workthread */
  2827. priv->config_wq = create_singlethread_workqueue("mwl8k_config");
  2828. if (priv->config_wq == NULL)
  2829. goto err_iounmap;
  2830. /* Power management cookie */
  2831. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  2832. if (priv->cookie == NULL)
  2833. goto err_iounmap;
  2834. rc = mwl8k_rxq_init(hw, 0);
  2835. if (rc)
  2836. goto err_iounmap;
  2837. rxq_refill(hw, 0, INT_MAX);
  2838. spin_lock_init(&priv->tx_lock);
  2839. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  2840. rc = mwl8k_txq_init(hw, i);
  2841. if (rc)
  2842. goto err_free_queues;
  2843. }
  2844. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2845. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2846. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  2847. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  2848. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2849. IRQF_SHARED, MWL8K_NAME, hw);
  2850. if (rc) {
  2851. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2852. priv->name);
  2853. goto err_free_queues;
  2854. }
  2855. /* Reset firmware and hardware */
  2856. mwl8k_hw_reset(priv);
  2857. /* Ask userland hotplug daemon for the device firmware */
  2858. rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
  2859. if (rc) {
  2860. printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
  2861. goto err_free_irq;
  2862. }
  2863. /* Load firmware into hardware */
  2864. rc = mwl8k_load_firmware(priv);
  2865. if (rc) {
  2866. printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
  2867. goto err_stop_firmware;
  2868. }
  2869. /* Reclaim memory once firmware is successfully loaded */
  2870. mwl8k_release_firmware(priv);
  2871. /*
  2872. * Temporarily enable interrupts. Initial firmware host
  2873. * commands use interrupts and avoids polling. Disable
  2874. * interrupts when done.
  2875. */
  2876. iowrite32(MWL8K_A2H_EVENTS, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2877. /* Get config data, mac addrs etc */
  2878. rc = mwl8k_cmd_get_hw_spec(hw);
  2879. if (rc) {
  2880. printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
  2881. goto err_stop_firmware;
  2882. }
  2883. /* Turn radio off */
  2884. rc = mwl8k_cmd_802_11_radio_disable(hw);
  2885. if (rc) {
  2886. printk(KERN_ERR "%s: Cannot disable\n", priv->name);
  2887. goto err_stop_firmware;
  2888. }
  2889. /* Disable interrupts */
  2890. spin_lock_irq(&priv->tx_lock);
  2891. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2892. spin_unlock_irq(&priv->tx_lock);
  2893. free_irq(priv->pdev->irq, hw);
  2894. rc = ieee80211_register_hw(hw);
  2895. if (rc) {
  2896. printk(KERN_ERR "%s: Cannot register device\n", priv->name);
  2897. goto err_stop_firmware;
  2898. }
  2899. fw = (u8 *)&priv->fw_rev;
  2900. printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
  2901. MWL8K_DESC);
  2902. printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
  2903. priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
  2904. printk(KERN_INFO "%s: MAC Address: %pM\n", priv->name,
  2905. hw->wiphy->perm_addr);
  2906. return 0;
  2907. err_stop_firmware:
  2908. mwl8k_hw_reset(priv);
  2909. mwl8k_release_firmware(priv);
  2910. err_free_irq:
  2911. spin_lock_irq(&priv->tx_lock);
  2912. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2913. spin_unlock_irq(&priv->tx_lock);
  2914. free_irq(priv->pdev->irq, hw);
  2915. err_free_queues:
  2916. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2917. mwl8k_txq_deinit(hw, i);
  2918. mwl8k_rxq_deinit(hw, 0);
  2919. err_iounmap:
  2920. if (priv->cookie != NULL)
  2921. pci_free_consistent(priv->pdev, 4,
  2922. priv->cookie, priv->cookie_dma);
  2923. if (priv->regs != NULL)
  2924. pci_iounmap(pdev, priv->regs);
  2925. if (priv->config_wq != NULL)
  2926. destroy_workqueue(priv->config_wq);
  2927. pci_set_drvdata(pdev, NULL);
  2928. ieee80211_free_hw(hw);
  2929. err_free_reg:
  2930. pci_release_regions(pdev);
  2931. pci_disable_device(pdev);
  2932. return rc;
  2933. }
  2934. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  2935. {
  2936. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  2937. }
  2938. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  2939. {
  2940. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  2941. struct mwl8k_priv *priv;
  2942. int i;
  2943. if (hw == NULL)
  2944. return;
  2945. priv = hw->priv;
  2946. ieee80211_stop_queues(hw);
  2947. ieee80211_unregister_hw(hw);
  2948. /* Remove tx reclaim tasklet */
  2949. tasklet_kill(&priv->tx_reclaim_task);
  2950. /* Stop config thread */
  2951. destroy_workqueue(priv->config_wq);
  2952. /* Stop hardware */
  2953. mwl8k_hw_reset(priv);
  2954. /* Return all skbs to mac80211 */
  2955. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2956. mwl8k_txq_reclaim(hw, i, 1);
  2957. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2958. mwl8k_txq_deinit(hw, i);
  2959. mwl8k_rxq_deinit(hw, 0);
  2960. pci_free_consistent(priv->pdev, 4,
  2961. priv->cookie, priv->cookie_dma);
  2962. pci_iounmap(pdev, priv->regs);
  2963. pci_set_drvdata(pdev, NULL);
  2964. ieee80211_free_hw(hw);
  2965. pci_release_regions(pdev);
  2966. pci_disable_device(pdev);
  2967. }
  2968. static struct pci_driver mwl8k_driver = {
  2969. .name = MWL8K_NAME,
  2970. .id_table = mwl8k_table,
  2971. .probe = mwl8k_probe,
  2972. .remove = __devexit_p(mwl8k_remove),
  2973. .shutdown = __devexit_p(mwl8k_shutdown),
  2974. };
  2975. static int __init mwl8k_init(void)
  2976. {
  2977. return pci_register_driver(&mwl8k_driver);
  2978. }
  2979. static void __exit mwl8k_exit(void)
  2980. {
  2981. pci_unregister_driver(&mwl8k_driver);
  2982. }
  2983. module_init(mwl8k_init);
  2984. module_exit(mwl8k_exit);