init.c 34 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/mmc/sdio_func.h>
  17. #include "core.h"
  18. #include "cfg80211.h"
  19. #include "target.h"
  20. #include "debug.h"
  21. #include "hif-ops.h"
  22. unsigned int debug_mask;
  23. module_param(debug_mask, uint, 0644);
  24. /*
  25. * Include definitions here that can be used to tune the WLAN module
  26. * behavior. Different customers can tune the behavior as per their needs,
  27. * here.
  28. */
  29. /*
  30. * This configuration item enable/disable keepalive support.
  31. * Keepalive support: In the absence of any data traffic to AP, null
  32. * frames will be sent to the AP at periodic interval, to keep the association
  33. * active. This configuration item defines the periodic interval.
  34. * Use value of zero to disable keepalive support
  35. * Default: 60 seconds
  36. */
  37. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  38. /*
  39. * This configuration item sets the value of disconnect timeout
  40. * Firmware delays sending the disconnec event to the host for this
  41. * timeout after is gets disconnected from the current AP.
  42. * If the firmware successly roams within the disconnect timeout
  43. * it sends a new connect event
  44. */
  45. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  46. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  47. enum addr_type {
  48. DATASET_PATCH_ADDR,
  49. APP_LOAD_ADDR,
  50. APP_START_OVERRIDE_ADDR,
  51. };
  52. #define ATH6KL_DATA_OFFSET 64
  53. struct sk_buff *ath6kl_buf_alloc(int size)
  54. {
  55. struct sk_buff *skb;
  56. u16 reserved;
  57. /* Add chacheline space at front and back of buffer */
  58. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  59. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  60. skb = dev_alloc_skb(size + reserved);
  61. if (skb)
  62. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  63. return skb;
  64. }
  65. void ath6kl_init_profile_info(struct ath6kl *ar)
  66. {
  67. ar->ssid_len = 0;
  68. memset(ar->ssid, 0, sizeof(ar->ssid));
  69. ar->dot11_auth_mode = OPEN_AUTH;
  70. ar->auth_mode = NONE_AUTH;
  71. ar->prwise_crypto = NONE_CRYPT;
  72. ar->prwise_crypto_len = 0;
  73. ar->grp_crypto = NONE_CRYPT;
  74. ar->grp_crpto_len = 0;
  75. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  76. memset(ar->req_bssid, 0, sizeof(ar->req_bssid));
  77. memset(ar->bssid, 0, sizeof(ar->bssid));
  78. ar->bss_ch = 0;
  79. ar->nw_type = ar->next_mode = INFRA_NETWORK;
  80. }
  81. static u8 ath6kl_get_fw_iftype(struct ath6kl *ar)
  82. {
  83. switch (ar->nw_type) {
  84. case INFRA_NETWORK:
  85. return HI_OPTION_FW_MODE_BSS_STA;
  86. case ADHOC_NETWORK:
  87. return HI_OPTION_FW_MODE_IBSS;
  88. case AP_NETWORK:
  89. return HI_OPTION_FW_MODE_AP;
  90. default:
  91. ath6kl_err("Unsupported interface type :%d\n", ar->nw_type);
  92. return 0xff;
  93. }
  94. }
  95. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  96. u32 item_offset)
  97. {
  98. u32 addr = 0;
  99. if (ar->target_type == TARGET_TYPE_AR6003)
  100. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  101. else if (ar->target_type == TARGET_TYPE_AR6004)
  102. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  103. return addr;
  104. }
  105. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  106. {
  107. u32 address, data;
  108. struct host_app_area host_app_area;
  109. /* Fetch the address of the host_app_area_s
  110. * instance in the host interest area */
  111. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  112. address = TARG_VTOP(ar->target_type, address);
  113. if (ath6kl_read_reg_diag(ar, &address, &data))
  114. return -EIO;
  115. address = TARG_VTOP(ar->target_type, data);
  116. host_app_area.wmi_protocol_ver = WMI_PROTOCOL_VERSION;
  117. if (ath6kl_access_datadiag(ar, address,
  118. (u8 *)&host_app_area,
  119. sizeof(struct host_app_area), false))
  120. return -EIO;
  121. return 0;
  122. }
  123. static inline void set_ac2_ep_map(struct ath6kl *ar,
  124. u8 ac,
  125. enum htc_endpoint_id ep)
  126. {
  127. ar->ac2ep_map[ac] = ep;
  128. ar->ep2ac_map[ep] = ac;
  129. }
  130. /* connect to a service */
  131. static int ath6kl_connectservice(struct ath6kl *ar,
  132. struct htc_service_connect_req *con_req,
  133. char *desc)
  134. {
  135. int status;
  136. struct htc_service_connect_resp response;
  137. memset(&response, 0, sizeof(response));
  138. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  139. if (status) {
  140. ath6kl_err("failed to connect to %s service status:%d\n",
  141. desc, status);
  142. return status;
  143. }
  144. switch (con_req->svc_id) {
  145. case WMI_CONTROL_SVC:
  146. if (test_bit(WMI_ENABLED, &ar->flag))
  147. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  148. ar->ctrl_ep = response.endpoint;
  149. break;
  150. case WMI_DATA_BE_SVC:
  151. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  152. break;
  153. case WMI_DATA_BK_SVC:
  154. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  155. break;
  156. case WMI_DATA_VI_SVC:
  157. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  158. break;
  159. case WMI_DATA_VO_SVC:
  160. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  161. break;
  162. default:
  163. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  164. return -EINVAL;
  165. }
  166. return 0;
  167. }
  168. static int ath6kl_init_service_ep(struct ath6kl *ar)
  169. {
  170. struct htc_service_connect_req connect;
  171. memset(&connect, 0, sizeof(connect));
  172. /* these fields are the same for all service endpoints */
  173. connect.ep_cb.rx = ath6kl_rx;
  174. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  175. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  176. /*
  177. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  178. * gets called.
  179. */
  180. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  181. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  182. if (!connect.ep_cb.rx_refill_thresh)
  183. connect.ep_cb.rx_refill_thresh++;
  184. /* connect to control service */
  185. connect.svc_id = WMI_CONTROL_SVC;
  186. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  187. return -EIO;
  188. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  189. /*
  190. * Limit the HTC message size on the send path, although e can
  191. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  192. * (802.3) frames on the send path.
  193. */
  194. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  195. /*
  196. * To reduce the amount of committed memory for larger A_MSDU
  197. * frames, use the recv-alloc threshold mechanism for larger
  198. * packets.
  199. */
  200. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  201. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  202. /*
  203. * For the remaining data services set the connection flag to
  204. * reduce dribbling, if configured to do so.
  205. */
  206. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  207. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  208. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  209. connect.svc_id = WMI_DATA_BE_SVC;
  210. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  211. return -EIO;
  212. /* connect to back-ground map this to WMI LOW_PRI */
  213. connect.svc_id = WMI_DATA_BK_SVC;
  214. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  215. return -EIO;
  216. /* connect to Video service, map this to to HI PRI */
  217. connect.svc_id = WMI_DATA_VI_SVC;
  218. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  219. return -EIO;
  220. /*
  221. * Connect to VO service, this is currently not mapped to a WMI
  222. * priority stream due to historical reasons. WMI originally
  223. * defined 3 priorities over 3 mailboxes We can change this when
  224. * WMI is reworked so that priorities are not dependent on
  225. * mailboxes.
  226. */
  227. connect.svc_id = WMI_DATA_VO_SVC;
  228. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  229. return -EIO;
  230. return 0;
  231. }
  232. static void ath6kl_init_control_info(struct ath6kl *ar)
  233. {
  234. u8 ctr;
  235. clear_bit(WMI_ENABLED, &ar->flag);
  236. ath6kl_init_profile_info(ar);
  237. ar->def_txkey_index = 0;
  238. memset(ar->wep_key_list, 0, sizeof(ar->wep_key_list));
  239. ar->ch_hint = 0;
  240. ar->listen_intvl_t = A_DEFAULT_LISTEN_INTERVAL;
  241. ar->listen_intvl_b = 0;
  242. ar->tx_pwr = 0;
  243. clear_bit(SKIP_SCAN, &ar->flag);
  244. set_bit(WMM_ENABLED, &ar->flag);
  245. ar->intra_bss = 1;
  246. memset(&ar->sc_params, 0, sizeof(ar->sc_params));
  247. ar->sc_params.short_scan_ratio = WMI_SHORTSCANRATIO_DEFAULT;
  248. ar->sc_params.scan_ctrl_flags = DEFAULT_SCAN_CTRL_FLAGS;
  249. memset((u8 *)ar->sta_list, 0,
  250. AP_MAX_NUM_STA * sizeof(struct ath6kl_sta));
  251. spin_lock_init(&ar->mcastpsq_lock);
  252. /* Init the PS queues */
  253. for (ctr = 0; ctr < AP_MAX_NUM_STA; ctr++) {
  254. spin_lock_init(&ar->sta_list[ctr].psq_lock);
  255. skb_queue_head_init(&ar->sta_list[ctr].psq);
  256. }
  257. skb_queue_head_init(&ar->mcastpsq);
  258. memcpy(ar->ap_country_code, DEF_AP_COUNTRY_CODE, 3);
  259. }
  260. /*
  261. * Set HTC/Mbox operational parameters, this can only be called when the
  262. * target is in the BMI phase.
  263. */
  264. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  265. u8 htc_ctrl_buf)
  266. {
  267. int status;
  268. u32 blk_size;
  269. blk_size = ar->mbox_info.block_size;
  270. if (htc_ctrl_buf)
  271. blk_size |= ((u32)htc_ctrl_buf) << 16;
  272. /* set the host interest area for the block size */
  273. status = ath6kl_bmi_write(ar,
  274. ath6kl_get_hi_item_addr(ar,
  275. HI_ITEM(hi_mbox_io_block_sz)),
  276. (u8 *)&blk_size,
  277. 4);
  278. if (status) {
  279. ath6kl_err("bmi_write_memory for IO block size failed\n");
  280. goto out;
  281. }
  282. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  283. blk_size,
  284. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  285. if (mbox_isr_yield_val) {
  286. /* set the host interest area for the mbox ISR yield limit */
  287. status = ath6kl_bmi_write(ar,
  288. ath6kl_get_hi_item_addr(ar,
  289. HI_ITEM(hi_mbox_isr_yield_limit)),
  290. (u8 *)&mbox_isr_yield_val,
  291. 4);
  292. if (status) {
  293. ath6kl_err("bmi_write_memory for yield limit failed\n");
  294. goto out;
  295. }
  296. }
  297. out:
  298. return status;
  299. }
  300. #define REG_DUMP_COUNT_AR6003 60
  301. #define REGISTER_DUMP_LEN_MAX 60
  302. static void ath6kl_dump_target_assert_info(struct ath6kl *ar)
  303. {
  304. u32 address;
  305. u32 regdump_loc = 0;
  306. int status;
  307. u32 regdump_val[REGISTER_DUMP_LEN_MAX];
  308. u32 i;
  309. if (ar->target_type != TARGET_TYPE_AR6003)
  310. return;
  311. /* the reg dump pointer is copied to the host interest area */
  312. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_failure_state));
  313. address = TARG_VTOP(ar->target_type, address);
  314. /* read RAM location through diagnostic window */
  315. status = ath6kl_read_reg_diag(ar, &address, &regdump_loc);
  316. if (status || !regdump_loc) {
  317. ath6kl_err("failed to get ptr to register dump area\n");
  318. return;
  319. }
  320. ath6kl_dbg(ATH6KL_DBG_TRC, "location of register dump data: 0x%X\n",
  321. regdump_loc);
  322. regdump_loc = TARG_VTOP(ar->target_type, regdump_loc);
  323. /* fetch register dump data */
  324. status = ath6kl_access_datadiag(ar,
  325. regdump_loc,
  326. (u8 *)&regdump_val[0],
  327. REG_DUMP_COUNT_AR6003 * (sizeof(u32)),
  328. true);
  329. if (status) {
  330. ath6kl_err("failed to get register dump\n");
  331. return;
  332. }
  333. ath6kl_dbg(ATH6KL_DBG_TRC, "Register Dump:\n");
  334. for (i = 0; i < REG_DUMP_COUNT_AR6003; i++)
  335. ath6kl_dbg(ATH6KL_DBG_TRC, " %d : 0x%8.8X\n",
  336. i, regdump_val[i]);
  337. }
  338. void ath6kl_target_failure(struct ath6kl *ar)
  339. {
  340. ath6kl_err("target asserted\n");
  341. /* try dumping target assertion information (if any) */
  342. ath6kl_dump_target_assert_info(ar);
  343. }
  344. static int ath6kl_target_config_wlan_params(struct ath6kl *ar)
  345. {
  346. int status = 0;
  347. /*
  348. * Configure the device for rx dot11 header rules. "0,0" are the
  349. * default values. Required if checksum offload is needed. Set
  350. * RxMetaVersion to 2.
  351. */
  352. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi,
  353. ar->rx_meta_ver, 0, 0)) {
  354. ath6kl_err("unable to set the rx frame format\n");
  355. status = -EIO;
  356. }
  357. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  358. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, 0, 1, 0, 0, 1,
  359. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  360. ath6kl_err("unable to set power save fail event policy\n");
  361. status = -EIO;
  362. }
  363. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  364. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, 0,
  365. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  366. ath6kl_err("unable to set barker preamble policy\n");
  367. status = -EIO;
  368. }
  369. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi,
  370. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  371. ath6kl_err("unable to set keep alive interval\n");
  372. status = -EIO;
  373. }
  374. if (ath6kl_wmi_disctimeout_cmd(ar->wmi,
  375. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  376. ath6kl_err("unable to set disconnect timeout\n");
  377. status = -EIO;
  378. }
  379. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  380. if (ath6kl_wmi_set_wmm_txop(ar->wmi, WMI_TXOP_DISABLED)) {
  381. ath6kl_err("unable to set txop bursting\n");
  382. status = -EIO;
  383. }
  384. return status;
  385. }
  386. int ath6kl_configure_target(struct ath6kl *ar)
  387. {
  388. u32 param, ram_reserved_size;
  389. u8 fw_iftype;
  390. fw_iftype = ath6kl_get_fw_iftype(ar);
  391. if (fw_iftype == 0xff)
  392. return -EINVAL;
  393. /* Tell target which HTC version it is used*/
  394. param = HTC_PROTOCOL_VERSION;
  395. if (ath6kl_bmi_write(ar,
  396. ath6kl_get_hi_item_addr(ar,
  397. HI_ITEM(hi_app_host_interest)),
  398. (u8 *)&param, 4) != 0) {
  399. ath6kl_err("bmi_write_memory for htc version failed\n");
  400. return -EIO;
  401. }
  402. /* set the firmware mode to STA/IBSS/AP */
  403. param = 0;
  404. if (ath6kl_bmi_read(ar,
  405. ath6kl_get_hi_item_addr(ar,
  406. HI_ITEM(hi_option_flag)),
  407. (u8 *)&param, 4) != 0) {
  408. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  409. return -EIO;
  410. }
  411. param |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  412. param |= (fw_iftype << HI_OPTION_FW_MODE_SHIFT);
  413. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  414. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  415. if (ath6kl_bmi_write(ar,
  416. ath6kl_get_hi_item_addr(ar,
  417. HI_ITEM(hi_option_flag)),
  418. (u8 *)&param,
  419. 4) != 0) {
  420. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  421. return -EIO;
  422. }
  423. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  424. /*
  425. * Hardcode the address use for the extended board data
  426. * Ideally this should be pre-allocate by the OS at boot time
  427. * But since it is a new feature and board data is loaded
  428. * at init time, we have to workaround this from host.
  429. * It is difficult to patch the firmware boot code,
  430. * but possible in theory.
  431. */
  432. if (ar->target_type == TARGET_TYPE_AR6003 ||
  433. ar->target_type == TARGET_TYPE_AR6004) {
  434. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  435. param = AR6003_REV2_BOARD_EXT_DATA_ADDRESS;
  436. ram_reserved_size = AR6003_REV2_RAM_RESERVE_SIZE;
  437. } else if (ar->version.target_ver == AR6004_REV1_VERSION) {
  438. param = AR6004_REV1_BOARD_EXT_DATA_ADDRESS;
  439. ram_reserved_size = AR6004_REV1_RAM_RESERVE_SIZE;
  440. } else {
  441. param = AR6003_REV3_BOARD_EXT_DATA_ADDRESS;
  442. ram_reserved_size = AR6003_REV3_RAM_RESERVE_SIZE;
  443. }
  444. if (ath6kl_bmi_write(ar,
  445. ath6kl_get_hi_item_addr(ar,
  446. HI_ITEM(hi_board_ext_data)),
  447. (u8 *)&param, 4) != 0) {
  448. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  449. return -EIO;
  450. }
  451. if (ath6kl_bmi_write(ar,
  452. ath6kl_get_hi_item_addr(ar,
  453. HI_ITEM(hi_end_ram_reserve_sz)),
  454. (u8 *)&ram_reserved_size, 4) != 0) {
  455. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  456. return -EIO;
  457. }
  458. }
  459. /* set the block size for the target */
  460. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  461. /* use default number of control buffers */
  462. return -EIO;
  463. return 0;
  464. }
  465. struct ath6kl *ath6kl_core_alloc(struct device *sdev)
  466. {
  467. struct net_device *dev;
  468. struct ath6kl *ar;
  469. struct wireless_dev *wdev;
  470. wdev = ath6kl_cfg80211_init(sdev);
  471. if (!wdev) {
  472. ath6kl_err("ath6kl_cfg80211_init failed\n");
  473. return NULL;
  474. }
  475. ar = wdev_priv(wdev);
  476. ar->dev = sdev;
  477. ar->wdev = wdev;
  478. wdev->iftype = NL80211_IFTYPE_STATION;
  479. if (ath6kl_debug_init(ar)) {
  480. ath6kl_err("Failed to initialize debugfs\n");
  481. ath6kl_cfg80211_deinit(ar);
  482. return NULL;
  483. }
  484. dev = alloc_netdev(0, "wlan%d", ether_setup);
  485. if (!dev) {
  486. ath6kl_err("no memory for network device instance\n");
  487. ath6kl_cfg80211_deinit(ar);
  488. return NULL;
  489. }
  490. dev->ieee80211_ptr = wdev;
  491. SET_NETDEV_DEV(dev, wiphy_dev(wdev->wiphy));
  492. wdev->netdev = dev;
  493. ar->sme_state = SME_DISCONNECTED;
  494. ar->auto_auth_stage = AUTH_IDLE;
  495. init_netdev(dev);
  496. ar->net_dev = dev;
  497. set_bit(WLAN_ENABLED, &ar->flag);
  498. ar->wlan_pwr_state = WLAN_POWER_STATE_ON;
  499. spin_lock_init(&ar->lock);
  500. ath6kl_init_control_info(ar);
  501. init_waitqueue_head(&ar->event_wq);
  502. sema_init(&ar->sem, 1);
  503. clear_bit(DESTROY_IN_PROGRESS, &ar->flag);
  504. INIT_LIST_HEAD(&ar->amsdu_rx_buffer_queue);
  505. setup_timer(&ar->disconnect_timer, disconnect_timer_handler,
  506. (unsigned long) dev);
  507. return ar;
  508. }
  509. int ath6kl_unavail_ev(struct ath6kl *ar)
  510. {
  511. ath6kl_destroy(ar->net_dev, 1);
  512. return 0;
  513. }
  514. /* firmware upload */
  515. static u32 ath6kl_get_load_address(u32 target_ver, enum addr_type type)
  516. {
  517. WARN_ON(target_ver != AR6003_REV2_VERSION &&
  518. target_ver != AR6003_REV3_VERSION &&
  519. target_ver != AR6004_REV1_VERSION);
  520. switch (type) {
  521. case DATASET_PATCH_ADDR:
  522. return (target_ver == AR6003_REV2_VERSION) ?
  523. AR6003_REV2_DATASET_PATCH_ADDRESS :
  524. AR6003_REV3_DATASET_PATCH_ADDRESS;
  525. case APP_LOAD_ADDR:
  526. return (target_ver == AR6003_REV2_VERSION) ?
  527. AR6003_REV2_APP_LOAD_ADDRESS :
  528. 0x1234;
  529. case APP_START_OVERRIDE_ADDR:
  530. return (target_ver == AR6003_REV2_VERSION) ?
  531. AR6003_REV2_APP_START_OVERRIDE :
  532. AR6003_REV3_APP_START_OVERRIDE;
  533. default:
  534. return 0;
  535. }
  536. }
  537. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  538. u8 **fw, size_t *fw_len)
  539. {
  540. const struct firmware *fw_entry;
  541. int ret;
  542. ret = request_firmware(&fw_entry, filename, ar->dev);
  543. if (ret)
  544. return ret;
  545. *fw_len = fw_entry->size;
  546. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  547. if (*fw == NULL)
  548. ret = -ENOMEM;
  549. release_firmware(fw_entry);
  550. return ret;
  551. }
  552. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  553. {
  554. const char *filename;
  555. int ret;
  556. switch (ar->version.target_ver) {
  557. case AR6003_REV2_VERSION:
  558. filename = AR6003_REV2_BOARD_DATA_FILE;
  559. break;
  560. case AR6004_REV1_VERSION:
  561. filename = AR6004_REV1_BOARD_DATA_FILE;
  562. break;
  563. default:
  564. filename = AR6003_REV3_BOARD_DATA_FILE;
  565. break;
  566. }
  567. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  568. &ar->fw_board_len);
  569. if (ret == 0) {
  570. /* managed to get proper board file */
  571. return 0;
  572. }
  573. /* there was no proper board file, try to use default instead */
  574. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  575. filename, ret);
  576. switch (ar->version.target_ver) {
  577. case AR6003_REV2_VERSION:
  578. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  579. break;
  580. case AR6004_REV1_VERSION:
  581. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  582. break;
  583. default:
  584. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  585. break;
  586. }
  587. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  588. &ar->fw_board_len);
  589. if (ret) {
  590. ath6kl_err("Failed to get default board file %s: %d\n",
  591. filename, ret);
  592. return ret;
  593. }
  594. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  595. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  596. return 0;
  597. }
  598. static int ath6kl_upload_board_file(struct ath6kl *ar)
  599. {
  600. u32 board_address, board_ext_address, param;
  601. u32 board_data_size, board_ext_data_size;
  602. int ret;
  603. if (ar->fw_board == NULL) {
  604. ret = ath6kl_fetch_board_file(ar);
  605. if (ret)
  606. return ret;
  607. }
  608. /*
  609. * Determine where in Target RAM to write Board Data.
  610. * For AR6004, host determine Target RAM address for
  611. * writing board data.
  612. */
  613. if (ar->target_type == TARGET_TYPE_AR6004) {
  614. board_address = AR6004_REV1_BOARD_DATA_ADDRESS;
  615. ath6kl_bmi_write(ar,
  616. ath6kl_get_hi_item_addr(ar,
  617. HI_ITEM(hi_board_data)),
  618. (u8 *) &board_address, 4);
  619. } else {
  620. ath6kl_bmi_read(ar,
  621. ath6kl_get_hi_item_addr(ar,
  622. HI_ITEM(hi_board_data)),
  623. (u8 *) &board_address, 4);
  624. }
  625. ath6kl_dbg(ATH6KL_DBG_TRC, "board data download addr: 0x%x\n",
  626. board_address);
  627. /* determine where in target ram to write extended board data */
  628. ath6kl_bmi_read(ar,
  629. ath6kl_get_hi_item_addr(ar,
  630. HI_ITEM(hi_board_ext_data)),
  631. (u8 *) &board_ext_address, 4);
  632. ath6kl_dbg(ATH6KL_DBG_TRC, "board file download addr: 0x%x\n",
  633. board_ext_address);
  634. if (board_ext_address == 0) {
  635. ath6kl_err("Failed to get board file target address.\n");
  636. return -EINVAL;
  637. }
  638. switch (ar->target_type) {
  639. case TARGET_TYPE_AR6003:
  640. board_data_size = AR6003_BOARD_DATA_SZ;
  641. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  642. break;
  643. case TARGET_TYPE_AR6004:
  644. board_data_size = AR6004_BOARD_DATA_SZ;
  645. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  646. break;
  647. default:
  648. WARN_ON(1);
  649. return -EINVAL;
  650. break;
  651. }
  652. if (ar->fw_board_len == (board_data_size +
  653. board_ext_data_size)) {
  654. /* write extended board data */
  655. ret = ath6kl_bmi_write(ar, board_ext_address,
  656. ar->fw_board + board_data_size,
  657. board_ext_data_size);
  658. if (ret) {
  659. ath6kl_err("Failed to write extended board data: %d\n",
  660. ret);
  661. return ret;
  662. }
  663. /* record that extended board data is initialized */
  664. param = (board_ext_data_size << 16) | 1;
  665. ath6kl_bmi_write(ar,
  666. ath6kl_get_hi_item_addr(ar,
  667. HI_ITEM(hi_board_ext_data_config)),
  668. (unsigned char *) &param, 4);
  669. }
  670. if (ar->fw_board_len < board_data_size) {
  671. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  672. ret = -EINVAL;
  673. return ret;
  674. }
  675. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  676. board_data_size);
  677. if (ret) {
  678. ath6kl_err("Board file bmi write failed: %d\n", ret);
  679. return ret;
  680. }
  681. /* record the fact that Board Data IS initialized */
  682. param = 1;
  683. ath6kl_bmi_write(ar,
  684. ath6kl_get_hi_item_addr(ar,
  685. HI_ITEM(hi_board_data_initialized)),
  686. (u8 *)&param, 4);
  687. return ret;
  688. }
  689. static int ath6kl_upload_otp(struct ath6kl *ar)
  690. {
  691. const char *filename;
  692. u32 address, param;
  693. int ret;
  694. switch (ar->version.target_ver) {
  695. case AR6003_REV2_VERSION:
  696. filename = AR6003_REV2_OTP_FILE;
  697. break;
  698. case AR6004_REV1_VERSION:
  699. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  700. return 0;
  701. break;
  702. default:
  703. filename = AR6003_REV3_OTP_FILE;
  704. break;
  705. }
  706. if (ar->fw_otp == NULL) {
  707. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  708. &ar->fw_otp_len);
  709. if (ret) {
  710. ath6kl_err("Failed to get OTP file %s: %d\n",
  711. filename, ret);
  712. return ret;
  713. }
  714. }
  715. address = ath6kl_get_load_address(ar->version.target_ver,
  716. APP_LOAD_ADDR);
  717. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  718. ar->fw_otp_len);
  719. if (ret) {
  720. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  721. return ret;
  722. }
  723. /* execute the OTP code */
  724. param = 0;
  725. address = ath6kl_get_load_address(ar->version.target_ver,
  726. APP_START_OVERRIDE_ADDR);
  727. ath6kl_bmi_execute(ar, address, &param);
  728. return ret;
  729. }
  730. static int ath6kl_upload_firmware(struct ath6kl *ar)
  731. {
  732. const char *filename;
  733. u32 address;
  734. int ret;
  735. switch (ar->version.target_ver) {
  736. case AR6003_REV2_VERSION:
  737. filename = AR6003_REV2_FIRMWARE_FILE;
  738. break;
  739. case AR6004_REV1_VERSION:
  740. filename = AR6004_REV1_FIRMWARE_FILE;
  741. break;
  742. default:
  743. filename = AR6003_REV3_FIRMWARE_FILE;
  744. break;
  745. }
  746. if (ar->fw == NULL) {
  747. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  748. if (ret) {
  749. ath6kl_err("Failed to get firmware file %s: %d\n",
  750. filename, ret);
  751. return ret;
  752. }
  753. }
  754. address = ath6kl_get_load_address(ar->version.target_ver,
  755. APP_LOAD_ADDR);
  756. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  757. if (ret) {
  758. ath6kl_err("Failed to write firmware: %d\n", ret);
  759. return ret;
  760. }
  761. /*
  762. * Set starting address for firmware
  763. * Don't need to setup app_start override addr on AR6004
  764. */
  765. if (ar->target_type != TARGET_TYPE_AR6004) {
  766. address = ath6kl_get_load_address(ar->version.target_ver,
  767. APP_START_OVERRIDE_ADDR);
  768. ath6kl_bmi_set_app_start(ar, address);
  769. }
  770. return ret;
  771. }
  772. static int ath6kl_upload_patch(struct ath6kl *ar)
  773. {
  774. const char *filename;
  775. u32 address, param;
  776. int ret;
  777. switch (ar->version.target_ver) {
  778. case AR6003_REV2_VERSION:
  779. filename = AR6003_REV2_PATCH_FILE;
  780. break;
  781. case AR6004_REV1_VERSION:
  782. /* FIXME: implement for AR6004 */
  783. return 0;
  784. break;
  785. default:
  786. filename = AR6003_REV3_PATCH_FILE;
  787. break;
  788. }
  789. if (ar->fw_patch == NULL) {
  790. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  791. &ar->fw_patch_len);
  792. if (ret) {
  793. ath6kl_err("Failed to get patch file %s: %d\n",
  794. filename, ret);
  795. return ret;
  796. }
  797. }
  798. address = ath6kl_get_load_address(ar->version.target_ver,
  799. DATASET_PATCH_ADDR);
  800. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  801. if (ret) {
  802. ath6kl_err("Failed to write patch file: %d\n", ret);
  803. return ret;
  804. }
  805. param = address;
  806. ath6kl_bmi_write(ar,
  807. ath6kl_get_hi_item_addr(ar,
  808. HI_ITEM(hi_dset_list_head)),
  809. (unsigned char *) &param, 4);
  810. return 0;
  811. }
  812. static int ath6kl_init_upload(struct ath6kl *ar)
  813. {
  814. u32 param, options, sleep, address;
  815. int status = 0;
  816. if (ar->target_type != TARGET_TYPE_AR6003 &&
  817. ar->target_type != TARGET_TYPE_AR6004)
  818. return -EINVAL;
  819. /* temporarily disable system sleep */
  820. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  821. status = ath6kl_bmi_reg_read(ar, address, &param);
  822. if (status)
  823. return status;
  824. options = param;
  825. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  826. status = ath6kl_bmi_reg_write(ar, address, param);
  827. if (status)
  828. return status;
  829. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  830. status = ath6kl_bmi_reg_read(ar, address, &param);
  831. if (status)
  832. return status;
  833. sleep = param;
  834. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  835. status = ath6kl_bmi_reg_write(ar, address, param);
  836. if (status)
  837. return status;
  838. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  839. options, sleep);
  840. /* program analog PLL register */
  841. /* no need to control 40/44MHz clock on AR6004 */
  842. if (ar->target_type != TARGET_TYPE_AR6004) {
  843. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  844. 0xF9104001);
  845. if (status)
  846. return status;
  847. /* Run at 80/88MHz by default */
  848. param = SM(CPU_CLOCK_STANDARD, 1);
  849. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  850. status = ath6kl_bmi_reg_write(ar, address, param);
  851. if (status)
  852. return status;
  853. }
  854. param = 0;
  855. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  856. param = SM(LPO_CAL_ENABLE, 1);
  857. status = ath6kl_bmi_reg_write(ar, address, param);
  858. if (status)
  859. return status;
  860. /* WAR to avoid SDIO CRC err */
  861. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  862. ath6kl_err("temporary war to avoid sdio crc error\n");
  863. param = 0x20;
  864. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  865. status = ath6kl_bmi_reg_write(ar, address, param);
  866. if (status)
  867. return status;
  868. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  869. status = ath6kl_bmi_reg_write(ar, address, param);
  870. if (status)
  871. return status;
  872. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  873. status = ath6kl_bmi_reg_write(ar, address, param);
  874. if (status)
  875. return status;
  876. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  877. status = ath6kl_bmi_reg_write(ar, address, param);
  878. if (status)
  879. return status;
  880. }
  881. /* write EEPROM data to Target RAM */
  882. status = ath6kl_upload_board_file(ar);
  883. if (status)
  884. return status;
  885. /* transfer One time Programmable data */
  886. status = ath6kl_upload_otp(ar);
  887. if (status)
  888. return status;
  889. /* Download Target firmware */
  890. status = ath6kl_upload_firmware(ar);
  891. if (status)
  892. return status;
  893. status = ath6kl_upload_patch(ar);
  894. if (status)
  895. return status;
  896. /* Restore system sleep */
  897. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  898. status = ath6kl_bmi_reg_write(ar, address, sleep);
  899. if (status)
  900. return status;
  901. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  902. param = options | 0x20;
  903. status = ath6kl_bmi_reg_write(ar, address, param);
  904. if (status)
  905. return status;
  906. /* Configure GPIO AR6003 UART */
  907. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  908. status = ath6kl_bmi_write(ar,
  909. ath6kl_get_hi_item_addr(ar,
  910. HI_ITEM(hi_dbg_uart_txpin)),
  911. (u8 *)&param, 4);
  912. return status;
  913. }
  914. static int ath6kl_init(struct net_device *dev)
  915. {
  916. struct ath6kl *ar = ath6kl_priv(dev);
  917. int status = 0;
  918. s32 timeleft;
  919. if (!ar)
  920. return -EIO;
  921. /* Do we need to finish the BMI phase */
  922. if (ath6kl_bmi_done(ar)) {
  923. status = -EIO;
  924. goto ath6kl_init_done;
  925. }
  926. /* Indicate that WMI is enabled (although not ready yet) */
  927. set_bit(WMI_ENABLED, &ar->flag);
  928. ar->wmi = ath6kl_wmi_init(ar);
  929. if (!ar->wmi) {
  930. ath6kl_err("failed to initialize wmi\n");
  931. status = -EIO;
  932. goto ath6kl_init_done;
  933. }
  934. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  935. wlan_node_table_init(&ar->scan_table);
  936. /*
  937. * The reason we have to wait for the target here is that the
  938. * driver layer has to init BMI in order to set the host block
  939. * size.
  940. */
  941. if (ath6kl_htc_wait_target(ar->htc_target)) {
  942. status = -EIO;
  943. goto err_node_cleanup;
  944. }
  945. if (ath6kl_init_service_ep(ar)) {
  946. status = -EIO;
  947. goto err_cleanup_scatter;
  948. }
  949. /* setup access class priority mappings */
  950. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  951. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  952. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  953. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  954. /* give our connected endpoints some buffers */
  955. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  956. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  957. /* allocate some buffers that handle larger AMSDU frames */
  958. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  959. /* setup credit distribution */
  960. ath6k_setup_credit_dist(ar->htc_target, &ar->credit_state_info);
  961. ath6kl_cookie_init(ar);
  962. /* start HTC */
  963. status = ath6kl_htc_start(ar->htc_target);
  964. if (status) {
  965. ath6kl_cookie_cleanup(ar);
  966. goto err_rxbuf_cleanup;
  967. }
  968. /* Wait for Wmi event to be ready */
  969. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  970. test_bit(WMI_READY,
  971. &ar->flag),
  972. WMI_TIMEOUT);
  973. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  974. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  975. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  976. status = -EIO;
  977. goto err_htc_stop;
  978. }
  979. if (!timeleft || signal_pending(current)) {
  980. ath6kl_err("wmi is not ready or wait was interrupted\n");
  981. status = -EIO;
  982. goto err_htc_stop;
  983. }
  984. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  985. /* communicate the wmi protocol verision to the target */
  986. if ((ath6kl_set_host_app_area(ar)) != 0)
  987. ath6kl_err("unable to set the host app area\n");
  988. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  989. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  990. status = ath6kl_target_config_wlan_params(ar);
  991. if (!status)
  992. goto ath6kl_init_done;
  993. err_htc_stop:
  994. ath6kl_htc_stop(ar->htc_target);
  995. err_rxbuf_cleanup:
  996. ath6kl_htc_flush_rx_buf(ar->htc_target);
  997. ath6kl_cleanup_amsdu_rxbufs(ar);
  998. err_cleanup_scatter:
  999. ath6kl_hif_cleanup_scatter(ar);
  1000. err_node_cleanup:
  1001. wlan_node_table_cleanup(&ar->scan_table);
  1002. ath6kl_wmi_shutdown(ar->wmi);
  1003. clear_bit(WMI_ENABLED, &ar->flag);
  1004. ar->wmi = NULL;
  1005. ath6kl_init_done:
  1006. return status;
  1007. }
  1008. int ath6kl_core_init(struct ath6kl *ar)
  1009. {
  1010. int ret = 0;
  1011. struct ath6kl_bmi_target_info targ_info;
  1012. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1013. if (!ar->ath6kl_wq)
  1014. return -ENOMEM;
  1015. ret = ath6kl_bmi_init(ar);
  1016. if (ret)
  1017. goto err_wq;
  1018. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1019. if (ret)
  1020. goto err_bmi_cleanup;
  1021. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1022. ar->target_type = le32_to_cpu(targ_info.type);
  1023. ar->wdev->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1024. ret = ath6kl_configure_target(ar);
  1025. if (ret)
  1026. goto err_bmi_cleanup;
  1027. ar->htc_target = ath6kl_htc_create(ar);
  1028. if (!ar->htc_target) {
  1029. ret = -ENOMEM;
  1030. goto err_bmi_cleanup;
  1031. }
  1032. ar->aggr_cntxt = aggr_init(ar->net_dev);
  1033. if (!ar->aggr_cntxt) {
  1034. ath6kl_err("failed to initialize aggr\n");
  1035. ret = -ENOMEM;
  1036. goto err_htc_cleanup;
  1037. }
  1038. ret = ath6kl_init_upload(ar);
  1039. if (ret)
  1040. goto err_htc_cleanup;
  1041. ret = ath6kl_init(ar->net_dev);
  1042. if (ret)
  1043. goto err_htc_cleanup;
  1044. /* This runs the init function if registered */
  1045. ret = register_netdev(ar->net_dev);
  1046. if (ret) {
  1047. ath6kl_err("register_netdev failed\n");
  1048. ath6kl_destroy(ar->net_dev, 0);
  1049. return ret;
  1050. }
  1051. set_bit(NETDEV_REGISTERED, &ar->flag);
  1052. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1053. __func__, ar->net_dev->name, ar->net_dev, ar);
  1054. return ret;
  1055. err_htc_cleanup:
  1056. ath6kl_htc_cleanup(ar->htc_target);
  1057. err_bmi_cleanup:
  1058. ath6kl_bmi_cleanup(ar);
  1059. err_wq:
  1060. destroy_workqueue(ar->ath6kl_wq);
  1061. return ret;
  1062. }
  1063. void ath6kl_stop_txrx(struct ath6kl *ar)
  1064. {
  1065. struct net_device *ndev = ar->net_dev;
  1066. if (!ndev)
  1067. return;
  1068. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1069. if (down_interruptible(&ar->sem)) {
  1070. ath6kl_err("down_interruptible failed\n");
  1071. return;
  1072. }
  1073. if (ar->wlan_pwr_state != WLAN_POWER_STATE_CUT_PWR)
  1074. ath6kl_stop_endpoint(ndev, false, true);
  1075. clear_bit(WLAN_ENABLED, &ar->flag);
  1076. }
  1077. /*
  1078. * We need to differentiate between the surprise and planned removal of the
  1079. * device because of the following consideration:
  1080. *
  1081. * - In case of surprise removal, the hcd already frees up the pending
  1082. * for the device and hence there is no need to unregister the function
  1083. * driver inorder to get these requests. For planned removal, the function
  1084. * driver has to explicitly unregister itself to have the hcd return all the
  1085. * pending requests before the data structures for the devices are freed up.
  1086. * Note that as per the current implementation, the function driver will
  1087. * end up releasing all the devices since there is no API to selectively
  1088. * release a particular device.
  1089. *
  1090. * - Certain commands issued to the target can be skipped for surprise
  1091. * removal since they will anyway not go through.
  1092. */
  1093. void ath6kl_destroy(struct net_device *dev, unsigned int unregister)
  1094. {
  1095. struct ath6kl *ar;
  1096. if (!dev || !ath6kl_priv(dev)) {
  1097. ath6kl_err("failed to get device structure\n");
  1098. return;
  1099. }
  1100. ar = ath6kl_priv(dev);
  1101. destroy_workqueue(ar->ath6kl_wq);
  1102. if (ar->htc_target)
  1103. ath6kl_htc_cleanup(ar->htc_target);
  1104. aggr_module_destroy(ar->aggr_cntxt);
  1105. ath6kl_cookie_cleanup(ar);
  1106. ath6kl_cleanup_amsdu_rxbufs(ar);
  1107. ath6kl_bmi_cleanup(ar);
  1108. if (unregister && test_bit(NETDEV_REGISTERED, &ar->flag)) {
  1109. unregister_netdev(dev);
  1110. clear_bit(NETDEV_REGISTERED, &ar->flag);
  1111. }
  1112. free_netdev(dev);
  1113. wlan_node_table_cleanup(&ar->scan_table);
  1114. kfree(ar->fw_board);
  1115. kfree(ar->fw_otp);
  1116. kfree(ar->fw);
  1117. kfree(ar->fw_patch);
  1118. ath6kl_cfg80211_deinit(ar);
  1119. }