init.c 42 KB

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  1. /*
  2. * Copyright (c) 2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/moduleparam.h>
  17. #include <linux/errno.h>
  18. #include <linux/of.h>
  19. #include <linux/mmc/sdio_func.h>
  20. #include "core.h"
  21. #include "cfg80211.h"
  22. #include "target.h"
  23. #include "debug.h"
  24. #include "hif-ops.h"
  25. unsigned int debug_mask;
  26. static unsigned int testmode;
  27. static bool suspend_cutpower;
  28. module_param(debug_mask, uint, 0644);
  29. module_param(testmode, uint, 0644);
  30. module_param(suspend_cutpower, bool, 0444);
  31. static const struct ath6kl_hw hw_list[] = {
  32. {
  33. .id = AR6003_REV2_VERSION,
  34. .dataset_patch_addr = 0x57e884,
  35. .app_load_addr = 0x543180,
  36. .board_ext_data_addr = 0x57e500,
  37. .reserved_ram_size = 6912,
  38. /* hw2.0 needs override address hardcoded */
  39. .app_start_override_addr = 0x944C00,
  40. },
  41. {
  42. .id = AR6003_REV3_VERSION,
  43. .dataset_patch_addr = 0x57ff74,
  44. .app_load_addr = 0x1234,
  45. .board_ext_data_addr = 0x542330,
  46. .reserved_ram_size = 512,
  47. },
  48. {
  49. .id = AR6004_REV1_VERSION,
  50. .dataset_patch_addr = 0x57e884,
  51. .app_load_addr = 0x1234,
  52. .board_ext_data_addr = 0x437000,
  53. .reserved_ram_size = 19456,
  54. .board_addr = 0x433900,
  55. },
  56. {
  57. .id = AR6004_REV2_VERSION,
  58. .dataset_patch_addr = 0x57e884,
  59. .app_load_addr = 0x1234,
  60. .board_ext_data_addr = 0x437000,
  61. .reserved_ram_size = 11264,
  62. .board_addr = 0x43d400,
  63. },
  64. };
  65. /*
  66. * Include definitions here that can be used to tune the WLAN module
  67. * behavior. Different customers can tune the behavior as per their needs,
  68. * here.
  69. */
  70. /*
  71. * This configuration item enable/disable keepalive support.
  72. * Keepalive support: In the absence of any data traffic to AP, null
  73. * frames will be sent to the AP at periodic interval, to keep the association
  74. * active. This configuration item defines the periodic interval.
  75. * Use value of zero to disable keepalive support
  76. * Default: 60 seconds
  77. */
  78. #define WLAN_CONFIG_KEEP_ALIVE_INTERVAL 60
  79. /*
  80. * This configuration item sets the value of disconnect timeout
  81. * Firmware delays sending the disconnec event to the host for this
  82. * timeout after is gets disconnected from the current AP.
  83. * If the firmware successly roams within the disconnect timeout
  84. * it sends a new connect event
  85. */
  86. #define WLAN_CONFIG_DISCONNECT_TIMEOUT 10
  87. #define CONFIG_AR600x_DEBUG_UART_TX_PIN 8
  88. #define ATH6KL_DATA_OFFSET 64
  89. struct sk_buff *ath6kl_buf_alloc(int size)
  90. {
  91. struct sk_buff *skb;
  92. u16 reserved;
  93. /* Add chacheline space at front and back of buffer */
  94. reserved = (2 * L1_CACHE_BYTES) + ATH6KL_DATA_OFFSET +
  95. sizeof(struct htc_packet) + ATH6KL_HTC_ALIGN_BYTES;
  96. skb = dev_alloc_skb(size + reserved);
  97. if (skb)
  98. skb_reserve(skb, reserved - L1_CACHE_BYTES);
  99. return skb;
  100. }
  101. void ath6kl_init_profile_info(struct ath6kl_vif *vif)
  102. {
  103. vif->ssid_len = 0;
  104. memset(vif->ssid, 0, sizeof(vif->ssid));
  105. vif->dot11_auth_mode = OPEN_AUTH;
  106. vif->auth_mode = NONE_AUTH;
  107. vif->prwise_crypto = NONE_CRYPT;
  108. vif->prwise_crypto_len = 0;
  109. vif->grp_crypto = NONE_CRYPT;
  110. vif->grp_crypto_len = 0;
  111. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  112. memset(vif->req_bssid, 0, sizeof(vif->req_bssid));
  113. memset(vif->bssid, 0, sizeof(vif->bssid));
  114. vif->bss_ch = 0;
  115. }
  116. static int ath6kl_set_host_app_area(struct ath6kl *ar)
  117. {
  118. u32 address, data;
  119. struct host_app_area host_app_area;
  120. /* Fetch the address of the host_app_area_s
  121. * instance in the host interest area */
  122. address = ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_app_host_interest));
  123. address = TARG_VTOP(ar->target_type, address);
  124. if (ath6kl_diag_read32(ar, address, &data))
  125. return -EIO;
  126. address = TARG_VTOP(ar->target_type, data);
  127. host_app_area.wmi_protocol_ver = cpu_to_le32(WMI_PROTOCOL_VERSION);
  128. if (ath6kl_diag_write(ar, address, (u8 *) &host_app_area,
  129. sizeof(struct host_app_area)))
  130. return -EIO;
  131. return 0;
  132. }
  133. static inline void set_ac2_ep_map(struct ath6kl *ar,
  134. u8 ac,
  135. enum htc_endpoint_id ep)
  136. {
  137. ar->ac2ep_map[ac] = ep;
  138. ar->ep2ac_map[ep] = ac;
  139. }
  140. /* connect to a service */
  141. static int ath6kl_connectservice(struct ath6kl *ar,
  142. struct htc_service_connect_req *con_req,
  143. char *desc)
  144. {
  145. int status;
  146. struct htc_service_connect_resp response;
  147. memset(&response, 0, sizeof(response));
  148. status = ath6kl_htc_conn_service(ar->htc_target, con_req, &response);
  149. if (status) {
  150. ath6kl_err("failed to connect to %s service status:%d\n",
  151. desc, status);
  152. return status;
  153. }
  154. switch (con_req->svc_id) {
  155. case WMI_CONTROL_SVC:
  156. if (test_bit(WMI_ENABLED, &ar->flag))
  157. ath6kl_wmi_set_control_ep(ar->wmi, response.endpoint);
  158. ar->ctrl_ep = response.endpoint;
  159. break;
  160. case WMI_DATA_BE_SVC:
  161. set_ac2_ep_map(ar, WMM_AC_BE, response.endpoint);
  162. break;
  163. case WMI_DATA_BK_SVC:
  164. set_ac2_ep_map(ar, WMM_AC_BK, response.endpoint);
  165. break;
  166. case WMI_DATA_VI_SVC:
  167. set_ac2_ep_map(ar, WMM_AC_VI, response.endpoint);
  168. break;
  169. case WMI_DATA_VO_SVC:
  170. set_ac2_ep_map(ar, WMM_AC_VO, response.endpoint);
  171. break;
  172. default:
  173. ath6kl_err("service id is not mapped %d\n", con_req->svc_id);
  174. return -EINVAL;
  175. }
  176. return 0;
  177. }
  178. static int ath6kl_init_service_ep(struct ath6kl *ar)
  179. {
  180. struct htc_service_connect_req connect;
  181. memset(&connect, 0, sizeof(connect));
  182. /* these fields are the same for all service endpoints */
  183. connect.ep_cb.rx = ath6kl_rx;
  184. connect.ep_cb.rx_refill = ath6kl_rx_refill;
  185. connect.ep_cb.tx_full = ath6kl_tx_queue_full;
  186. /*
  187. * Set the max queue depth so that our ath6kl_tx_queue_full handler
  188. * gets called.
  189. */
  190. connect.max_txq_depth = MAX_DEFAULT_SEND_QUEUE_DEPTH;
  191. connect.ep_cb.rx_refill_thresh = ATH6KL_MAX_RX_BUFFERS / 4;
  192. if (!connect.ep_cb.rx_refill_thresh)
  193. connect.ep_cb.rx_refill_thresh++;
  194. /* connect to control service */
  195. connect.svc_id = WMI_CONTROL_SVC;
  196. if (ath6kl_connectservice(ar, &connect, "WMI CONTROL"))
  197. return -EIO;
  198. connect.flags |= HTC_FLGS_TX_BNDL_PAD_EN;
  199. /*
  200. * Limit the HTC message size on the send path, although e can
  201. * receive A-MSDU frames of 4K, we will only send ethernet-sized
  202. * (802.3) frames on the send path.
  203. */
  204. connect.max_rxmsg_sz = WMI_MAX_TX_DATA_FRAME_LENGTH;
  205. /*
  206. * To reduce the amount of committed memory for larger A_MSDU
  207. * frames, use the recv-alloc threshold mechanism for larger
  208. * packets.
  209. */
  210. connect.ep_cb.rx_alloc_thresh = ATH6KL_BUFFER_SIZE;
  211. connect.ep_cb.rx_allocthresh = ath6kl_alloc_amsdu_rxbuf;
  212. /*
  213. * For the remaining data services set the connection flag to
  214. * reduce dribbling, if configured to do so.
  215. */
  216. connect.conn_flags |= HTC_CONN_FLGS_REDUCE_CRED_DRIB;
  217. connect.conn_flags &= ~HTC_CONN_FLGS_THRESH_MASK;
  218. connect.conn_flags |= HTC_CONN_FLGS_THRESH_LVL_HALF;
  219. connect.svc_id = WMI_DATA_BE_SVC;
  220. if (ath6kl_connectservice(ar, &connect, "WMI DATA BE"))
  221. return -EIO;
  222. /* connect to back-ground map this to WMI LOW_PRI */
  223. connect.svc_id = WMI_DATA_BK_SVC;
  224. if (ath6kl_connectservice(ar, &connect, "WMI DATA BK"))
  225. return -EIO;
  226. /* connect to Video service, map this to to HI PRI */
  227. connect.svc_id = WMI_DATA_VI_SVC;
  228. if (ath6kl_connectservice(ar, &connect, "WMI DATA VI"))
  229. return -EIO;
  230. /*
  231. * Connect to VO service, this is currently not mapped to a WMI
  232. * priority stream due to historical reasons. WMI originally
  233. * defined 3 priorities over 3 mailboxes We can change this when
  234. * WMI is reworked so that priorities are not dependent on
  235. * mailboxes.
  236. */
  237. connect.svc_id = WMI_DATA_VO_SVC;
  238. if (ath6kl_connectservice(ar, &connect, "WMI DATA VO"))
  239. return -EIO;
  240. return 0;
  241. }
  242. void ath6kl_init_control_info(struct ath6kl_vif *vif)
  243. {
  244. ath6kl_init_profile_info(vif);
  245. vif->def_txkey_index = 0;
  246. memset(vif->wep_key_list, 0, sizeof(vif->wep_key_list));
  247. vif->ch_hint = 0;
  248. }
  249. /*
  250. * Set HTC/Mbox operational parameters, this can only be called when the
  251. * target is in the BMI phase.
  252. */
  253. static int ath6kl_set_htc_params(struct ath6kl *ar, u32 mbox_isr_yield_val,
  254. u8 htc_ctrl_buf)
  255. {
  256. int status;
  257. u32 blk_size;
  258. blk_size = ar->mbox_info.block_size;
  259. if (htc_ctrl_buf)
  260. blk_size |= ((u32)htc_ctrl_buf) << 16;
  261. /* set the host interest area for the block size */
  262. status = ath6kl_bmi_write(ar,
  263. ath6kl_get_hi_item_addr(ar,
  264. HI_ITEM(hi_mbox_io_block_sz)),
  265. (u8 *)&blk_size,
  266. 4);
  267. if (status) {
  268. ath6kl_err("bmi_write_memory for IO block size failed\n");
  269. goto out;
  270. }
  271. ath6kl_dbg(ATH6KL_DBG_TRC, "block size set: %d (target addr:0x%X)\n",
  272. blk_size,
  273. ath6kl_get_hi_item_addr(ar, HI_ITEM(hi_mbox_io_block_sz)));
  274. if (mbox_isr_yield_val) {
  275. /* set the host interest area for the mbox ISR yield limit */
  276. status = ath6kl_bmi_write(ar,
  277. ath6kl_get_hi_item_addr(ar,
  278. HI_ITEM(hi_mbox_isr_yield_limit)),
  279. (u8 *)&mbox_isr_yield_val,
  280. 4);
  281. if (status) {
  282. ath6kl_err("bmi_write_memory for yield limit failed\n");
  283. goto out;
  284. }
  285. }
  286. out:
  287. return status;
  288. }
  289. static int ath6kl_target_config_wlan_params(struct ath6kl *ar, int idx)
  290. {
  291. int status = 0;
  292. int ret;
  293. /*
  294. * Configure the device for rx dot11 header rules. "0,0" are the
  295. * default values. Required if checksum offload is needed. Set
  296. * RxMetaVersion to 2.
  297. */
  298. if (ath6kl_wmi_set_rx_frame_format_cmd(ar->wmi, idx,
  299. ar->rx_meta_ver, 0, 0)) {
  300. ath6kl_err("unable to set the rx frame format\n");
  301. status = -EIO;
  302. }
  303. if (ar->conf_flags & ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN)
  304. if ((ath6kl_wmi_pmparams_cmd(ar->wmi, idx, 0, 1, 0, 0, 1,
  305. IGNORE_POWER_SAVE_FAIL_EVENT_DURING_SCAN)) != 0) {
  306. ath6kl_err("unable to set power save fail event policy\n");
  307. status = -EIO;
  308. }
  309. if (!(ar->conf_flags & ATH6KL_CONF_IGNORE_ERP_BARKER))
  310. if ((ath6kl_wmi_set_lpreamble_cmd(ar->wmi, idx, 0,
  311. WMI_DONOT_IGNORE_BARKER_IN_ERP)) != 0) {
  312. ath6kl_err("unable to set barker preamble policy\n");
  313. status = -EIO;
  314. }
  315. if (ath6kl_wmi_set_keepalive_cmd(ar->wmi, idx,
  316. WLAN_CONFIG_KEEP_ALIVE_INTERVAL)) {
  317. ath6kl_err("unable to set keep alive interval\n");
  318. status = -EIO;
  319. }
  320. if (ath6kl_wmi_disctimeout_cmd(ar->wmi, idx,
  321. WLAN_CONFIG_DISCONNECT_TIMEOUT)) {
  322. ath6kl_err("unable to set disconnect timeout\n");
  323. status = -EIO;
  324. }
  325. if (!(ar->conf_flags & ATH6KL_CONF_ENABLE_TX_BURST))
  326. if (ath6kl_wmi_set_wmm_txop(ar->wmi, idx, WMI_TXOP_DISABLED)) {
  327. ath6kl_err("unable to set txop bursting\n");
  328. status = -EIO;
  329. }
  330. /*
  331. * FIXME: Make sure p2p configurations are not applied to
  332. * non-p2p capable interfaces when multivif support is enabled.
  333. */
  334. if (ar->p2p) {
  335. ret = ath6kl_wmi_info_req_cmd(ar->wmi, idx,
  336. P2P_FLAG_CAPABILITIES_REQ |
  337. P2P_FLAG_MACADDR_REQ |
  338. P2P_FLAG_HMODEL_REQ);
  339. if (ret) {
  340. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to request P2P "
  341. "capabilities (%d) - assuming P2P not "
  342. "supported\n", ret);
  343. ar->p2p = 0;
  344. }
  345. }
  346. /*
  347. * FIXME: Make sure p2p configurations are not applied to
  348. * non-p2p capable interfaces when multivif support is enabled.
  349. */
  350. if (ar->p2p) {
  351. /* Enable Probe Request reporting for P2P */
  352. ret = ath6kl_wmi_probe_report_req_cmd(ar->wmi, idx, true);
  353. if (ret) {
  354. ath6kl_dbg(ATH6KL_DBG_TRC, "failed to enable Probe "
  355. "Request reporting (%d)\n", ret);
  356. }
  357. }
  358. return status;
  359. }
  360. int ath6kl_configure_target(struct ath6kl *ar)
  361. {
  362. u32 param, ram_reserved_size;
  363. u8 fw_iftype, fw_mode = 0, fw_submode = 0;
  364. int i;
  365. /*
  366. * Note: Even though the firmware interface type is
  367. * chosen as BSS_STA for all three interfaces, can
  368. * be configured to IBSS/AP as long as the fw submode
  369. * remains normal mode (0 - AP, STA and IBSS). But
  370. * due to an target assert in firmware only one interface is
  371. * configured for now.
  372. */
  373. fw_iftype = HI_OPTION_FW_MODE_BSS_STA;
  374. for (i = 0; i < MAX_NUM_VIF; i++)
  375. fw_mode |= fw_iftype << (i * HI_OPTION_FW_MODE_BITS);
  376. /*
  377. * By default, submodes :
  378. * vif[0] - AP/STA/IBSS
  379. * vif[1] - "P2P dev"/"P2P GO"/"P2P Client"
  380. * vif[2] - "P2P dev"/"P2P GO"/"P2P Client"
  381. */
  382. for (i = 0; i < ar->max_norm_iface; i++)
  383. fw_submode |= HI_OPTION_FW_SUBMODE_NONE <<
  384. (i * HI_OPTION_FW_SUBMODE_BITS);
  385. for (i = ar->max_norm_iface; i < MAX_NUM_VIF; i++)
  386. fw_submode |= HI_OPTION_FW_SUBMODE_P2PDEV <<
  387. (i * HI_OPTION_FW_SUBMODE_BITS);
  388. /*
  389. * FIXME: This needs to be removed once the multivif
  390. * support is enabled.
  391. */
  392. if (ar->p2p)
  393. fw_submode = HI_OPTION_FW_SUBMODE_P2PDEV;
  394. param = HTC_PROTOCOL_VERSION;
  395. if (ath6kl_bmi_write(ar,
  396. ath6kl_get_hi_item_addr(ar,
  397. HI_ITEM(hi_app_host_interest)),
  398. (u8 *)&param, 4) != 0) {
  399. ath6kl_err("bmi_write_memory for htc version failed\n");
  400. return -EIO;
  401. }
  402. /* set the firmware mode to STA/IBSS/AP */
  403. param = 0;
  404. if (ath6kl_bmi_read(ar,
  405. ath6kl_get_hi_item_addr(ar,
  406. HI_ITEM(hi_option_flag)),
  407. (u8 *)&param, 4) != 0) {
  408. ath6kl_err("bmi_read_memory for setting fwmode failed\n");
  409. return -EIO;
  410. }
  411. param |= (MAX_NUM_VIF << HI_OPTION_NUM_DEV_SHIFT);
  412. param |= fw_mode << HI_OPTION_FW_MODE_SHIFT;
  413. param |= fw_submode << HI_OPTION_FW_SUBMODE_SHIFT;
  414. param |= (0 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  415. param |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  416. if (ath6kl_bmi_write(ar,
  417. ath6kl_get_hi_item_addr(ar,
  418. HI_ITEM(hi_option_flag)),
  419. (u8 *)&param,
  420. 4) != 0) {
  421. ath6kl_err("bmi_write_memory for setting fwmode failed\n");
  422. return -EIO;
  423. }
  424. ath6kl_dbg(ATH6KL_DBG_TRC, "firmware mode set\n");
  425. /*
  426. * Hardcode the address use for the extended board data
  427. * Ideally this should be pre-allocate by the OS at boot time
  428. * But since it is a new feature and board data is loaded
  429. * at init time, we have to workaround this from host.
  430. * It is difficult to patch the firmware boot code,
  431. * but possible in theory.
  432. */
  433. param = ar->hw.board_ext_data_addr;
  434. ram_reserved_size = ar->hw.reserved_ram_size;
  435. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  436. HI_ITEM(hi_board_ext_data)),
  437. (u8 *)&param, 4) != 0) {
  438. ath6kl_err("bmi_write_memory for hi_board_ext_data failed\n");
  439. return -EIO;
  440. }
  441. if (ath6kl_bmi_write(ar, ath6kl_get_hi_item_addr(ar,
  442. HI_ITEM(hi_end_ram_reserve_sz)),
  443. (u8 *)&ram_reserved_size, 4) != 0) {
  444. ath6kl_err("bmi_write_memory for hi_end_ram_reserve_sz failed\n");
  445. return -EIO;
  446. }
  447. /* set the block size for the target */
  448. if (ath6kl_set_htc_params(ar, MBOX_YIELD_LIMIT, 0))
  449. /* use default number of control buffers */
  450. return -EIO;
  451. return 0;
  452. }
  453. void ath6kl_core_free(struct ath6kl *ar)
  454. {
  455. wiphy_free(ar->wiphy);
  456. }
  457. void ath6kl_core_cleanup(struct ath6kl *ar)
  458. {
  459. ath6kl_hif_power_off(ar);
  460. destroy_workqueue(ar->ath6kl_wq);
  461. if (ar->htc_target)
  462. ath6kl_htc_cleanup(ar->htc_target);
  463. ath6kl_cookie_cleanup(ar);
  464. ath6kl_cleanup_amsdu_rxbufs(ar);
  465. ath6kl_bmi_cleanup(ar);
  466. ath6kl_debug_cleanup(ar);
  467. kfree(ar->fw_board);
  468. kfree(ar->fw_otp);
  469. kfree(ar->fw);
  470. kfree(ar->fw_patch);
  471. ath6kl_deinit_ieee80211_hw(ar);
  472. }
  473. /* firmware upload */
  474. static int ath6kl_get_fw(struct ath6kl *ar, const char *filename,
  475. u8 **fw, size_t *fw_len)
  476. {
  477. const struct firmware *fw_entry;
  478. int ret;
  479. ret = request_firmware(&fw_entry, filename, ar->dev);
  480. if (ret)
  481. return ret;
  482. *fw_len = fw_entry->size;
  483. *fw = kmemdup(fw_entry->data, fw_entry->size, GFP_KERNEL);
  484. if (*fw == NULL)
  485. ret = -ENOMEM;
  486. release_firmware(fw_entry);
  487. return ret;
  488. }
  489. #ifdef CONFIG_OF
  490. static const char *get_target_ver_dir(const struct ath6kl *ar)
  491. {
  492. switch (ar->version.target_ver) {
  493. case AR6003_REV1_VERSION:
  494. return "ath6k/AR6003/hw1.0";
  495. case AR6003_REV2_VERSION:
  496. return "ath6k/AR6003/hw2.0";
  497. case AR6003_REV3_VERSION:
  498. return "ath6k/AR6003/hw2.1.1";
  499. }
  500. ath6kl_warn("%s: unsupported target version 0x%x.\n", __func__,
  501. ar->version.target_ver);
  502. return NULL;
  503. }
  504. /*
  505. * Check the device tree for a board-id and use it to construct
  506. * the pathname to the firmware file. Used (for now) to find a
  507. * fallback to the "bdata.bin" file--typically a symlink to the
  508. * appropriate board-specific file.
  509. */
  510. static bool check_device_tree(struct ath6kl *ar)
  511. {
  512. static const char *board_id_prop = "atheros,board-id";
  513. struct device_node *node;
  514. char board_filename[64];
  515. const char *board_id;
  516. int ret;
  517. for_each_compatible_node(node, NULL, "atheros,ath6kl") {
  518. board_id = of_get_property(node, board_id_prop, NULL);
  519. if (board_id == NULL) {
  520. ath6kl_warn("No \"%s\" property on %s node.\n",
  521. board_id_prop, node->name);
  522. continue;
  523. }
  524. snprintf(board_filename, sizeof(board_filename),
  525. "%s/bdata.%s.bin", get_target_ver_dir(ar), board_id);
  526. ret = ath6kl_get_fw(ar, board_filename, &ar->fw_board,
  527. &ar->fw_board_len);
  528. if (ret) {
  529. ath6kl_err("Failed to get DT board file %s: %d\n",
  530. board_filename, ret);
  531. continue;
  532. }
  533. return true;
  534. }
  535. return false;
  536. }
  537. #else
  538. static bool check_device_tree(struct ath6kl *ar)
  539. {
  540. return false;
  541. }
  542. #endif /* CONFIG_OF */
  543. static int ath6kl_fetch_board_file(struct ath6kl *ar)
  544. {
  545. const char *filename;
  546. int ret;
  547. if (ar->fw_board != NULL)
  548. return 0;
  549. switch (ar->version.target_ver) {
  550. case AR6003_REV2_VERSION:
  551. filename = AR6003_REV2_BOARD_DATA_FILE;
  552. break;
  553. case AR6004_REV1_VERSION:
  554. filename = AR6004_REV1_BOARD_DATA_FILE;
  555. break;
  556. default:
  557. filename = AR6003_REV3_BOARD_DATA_FILE;
  558. break;
  559. }
  560. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  561. &ar->fw_board_len);
  562. if (ret == 0) {
  563. /* managed to get proper board file */
  564. return 0;
  565. }
  566. if (check_device_tree(ar)) {
  567. /* got board file from device tree */
  568. return 0;
  569. }
  570. /* there was no proper board file, try to use default instead */
  571. ath6kl_warn("Failed to get board file %s (%d), trying to find default board file.\n",
  572. filename, ret);
  573. switch (ar->version.target_ver) {
  574. case AR6003_REV2_VERSION:
  575. filename = AR6003_REV2_DEFAULT_BOARD_DATA_FILE;
  576. break;
  577. case AR6004_REV1_VERSION:
  578. filename = AR6004_REV1_DEFAULT_BOARD_DATA_FILE;
  579. break;
  580. default:
  581. filename = AR6003_REV3_DEFAULT_BOARD_DATA_FILE;
  582. break;
  583. }
  584. ret = ath6kl_get_fw(ar, filename, &ar->fw_board,
  585. &ar->fw_board_len);
  586. if (ret) {
  587. ath6kl_err("Failed to get default board file %s: %d\n",
  588. filename, ret);
  589. return ret;
  590. }
  591. ath6kl_warn("WARNING! No proper board file was not found, instead using a default board file.\n");
  592. ath6kl_warn("Most likely your hardware won't work as specified. Install correct board file!\n");
  593. return 0;
  594. }
  595. static int ath6kl_fetch_otp_file(struct ath6kl *ar)
  596. {
  597. const char *filename;
  598. int ret;
  599. if (ar->fw_otp != NULL)
  600. return 0;
  601. switch (ar->version.target_ver) {
  602. case AR6003_REV2_VERSION:
  603. filename = AR6003_REV2_OTP_FILE;
  604. break;
  605. case AR6004_REV1_VERSION:
  606. ath6kl_dbg(ATH6KL_DBG_TRC, "AR6004 doesn't need OTP file\n");
  607. return 0;
  608. break;
  609. default:
  610. filename = AR6003_REV3_OTP_FILE;
  611. break;
  612. }
  613. ret = ath6kl_get_fw(ar, filename, &ar->fw_otp,
  614. &ar->fw_otp_len);
  615. if (ret) {
  616. ath6kl_err("Failed to get OTP file %s: %d\n",
  617. filename, ret);
  618. return ret;
  619. }
  620. return 0;
  621. }
  622. static int ath6kl_fetch_fw_file(struct ath6kl *ar)
  623. {
  624. const char *filename;
  625. int ret;
  626. if (ar->fw != NULL)
  627. return 0;
  628. if (testmode) {
  629. switch (ar->version.target_ver) {
  630. case AR6003_REV2_VERSION:
  631. filename = AR6003_REV2_TCMD_FIRMWARE_FILE;
  632. break;
  633. case AR6003_REV3_VERSION:
  634. filename = AR6003_REV3_TCMD_FIRMWARE_FILE;
  635. break;
  636. case AR6004_REV1_VERSION:
  637. ath6kl_warn("testmode not supported with ar6004\n");
  638. return -EOPNOTSUPP;
  639. default:
  640. ath6kl_warn("unknown target version: 0x%x\n",
  641. ar->version.target_ver);
  642. return -EINVAL;
  643. }
  644. set_bit(TESTMODE, &ar->flag);
  645. goto get_fw;
  646. }
  647. switch (ar->version.target_ver) {
  648. case AR6003_REV2_VERSION:
  649. filename = AR6003_REV2_FIRMWARE_FILE;
  650. break;
  651. case AR6004_REV1_VERSION:
  652. filename = AR6004_REV1_FIRMWARE_FILE;
  653. break;
  654. default:
  655. filename = AR6003_REV3_FIRMWARE_FILE;
  656. break;
  657. }
  658. get_fw:
  659. ret = ath6kl_get_fw(ar, filename, &ar->fw, &ar->fw_len);
  660. if (ret) {
  661. ath6kl_err("Failed to get firmware file %s: %d\n",
  662. filename, ret);
  663. return ret;
  664. }
  665. return 0;
  666. }
  667. static int ath6kl_fetch_patch_file(struct ath6kl *ar)
  668. {
  669. const char *filename;
  670. int ret;
  671. switch (ar->version.target_ver) {
  672. case AR6003_REV2_VERSION:
  673. filename = AR6003_REV2_PATCH_FILE;
  674. break;
  675. case AR6004_REV1_VERSION:
  676. /* FIXME: implement for AR6004 */
  677. return 0;
  678. break;
  679. default:
  680. filename = AR6003_REV3_PATCH_FILE;
  681. break;
  682. }
  683. if (ar->fw_patch == NULL) {
  684. ret = ath6kl_get_fw(ar, filename, &ar->fw_patch,
  685. &ar->fw_patch_len);
  686. if (ret) {
  687. ath6kl_err("Failed to get patch file %s: %d\n",
  688. filename, ret);
  689. return ret;
  690. }
  691. }
  692. return 0;
  693. }
  694. static int ath6kl_fetch_fw_api1(struct ath6kl *ar)
  695. {
  696. int ret;
  697. ret = ath6kl_fetch_otp_file(ar);
  698. if (ret)
  699. return ret;
  700. ret = ath6kl_fetch_fw_file(ar);
  701. if (ret)
  702. return ret;
  703. ret = ath6kl_fetch_patch_file(ar);
  704. if (ret)
  705. return ret;
  706. return 0;
  707. }
  708. static int ath6kl_fetch_fw_api2(struct ath6kl *ar)
  709. {
  710. size_t magic_len, len, ie_len;
  711. const struct firmware *fw;
  712. struct ath6kl_fw_ie *hdr;
  713. const char *filename;
  714. const u8 *data;
  715. int ret, ie_id, i, index, bit;
  716. __le32 *val;
  717. switch (ar->version.target_ver) {
  718. case AR6003_REV2_VERSION:
  719. filename = AR6003_REV2_FIRMWARE_2_FILE;
  720. break;
  721. case AR6003_REV3_VERSION:
  722. filename = AR6003_REV3_FIRMWARE_2_FILE;
  723. break;
  724. case AR6004_REV1_VERSION:
  725. filename = AR6004_REV1_FIRMWARE_2_FILE;
  726. break;
  727. case AR6004_REV2_VERSION:
  728. filename = AR6004_REV2_FIRMWARE_2_FILE;
  729. break;
  730. default:
  731. return -EOPNOTSUPP;
  732. }
  733. ret = request_firmware(&fw, filename, ar->dev);
  734. if (ret)
  735. return ret;
  736. data = fw->data;
  737. len = fw->size;
  738. /* magic also includes the null byte, check that as well */
  739. magic_len = strlen(ATH6KL_FIRMWARE_MAGIC) + 1;
  740. if (len < magic_len) {
  741. ret = -EINVAL;
  742. goto out;
  743. }
  744. if (memcmp(data, ATH6KL_FIRMWARE_MAGIC, magic_len) != 0) {
  745. ret = -EINVAL;
  746. goto out;
  747. }
  748. len -= magic_len;
  749. data += magic_len;
  750. /* loop elements */
  751. while (len > sizeof(struct ath6kl_fw_ie)) {
  752. /* hdr is unaligned! */
  753. hdr = (struct ath6kl_fw_ie *) data;
  754. ie_id = le32_to_cpup(&hdr->id);
  755. ie_len = le32_to_cpup(&hdr->len);
  756. len -= sizeof(*hdr);
  757. data += sizeof(*hdr);
  758. if (len < ie_len) {
  759. ret = -EINVAL;
  760. goto out;
  761. }
  762. switch (ie_id) {
  763. case ATH6KL_FW_IE_OTP_IMAGE:
  764. ath6kl_dbg(ATH6KL_DBG_BOOT, "found otp image ie (%zd B)\n",
  765. ie_len);
  766. ar->fw_otp = kmemdup(data, ie_len, GFP_KERNEL);
  767. if (ar->fw_otp == NULL) {
  768. ret = -ENOMEM;
  769. goto out;
  770. }
  771. ar->fw_otp_len = ie_len;
  772. break;
  773. case ATH6KL_FW_IE_FW_IMAGE:
  774. ath6kl_dbg(ATH6KL_DBG_BOOT, "found fw image ie (%zd B)\n",
  775. ie_len);
  776. ar->fw = kmemdup(data, ie_len, GFP_KERNEL);
  777. if (ar->fw == NULL) {
  778. ret = -ENOMEM;
  779. goto out;
  780. }
  781. ar->fw_len = ie_len;
  782. break;
  783. case ATH6KL_FW_IE_PATCH_IMAGE:
  784. ath6kl_dbg(ATH6KL_DBG_BOOT, "found patch image ie (%zd B)\n",
  785. ie_len);
  786. ar->fw_patch = kmemdup(data, ie_len, GFP_KERNEL);
  787. if (ar->fw_patch == NULL) {
  788. ret = -ENOMEM;
  789. goto out;
  790. }
  791. ar->fw_patch_len = ie_len;
  792. break;
  793. case ATH6KL_FW_IE_RESERVED_RAM_SIZE:
  794. val = (__le32 *) data;
  795. ar->hw.reserved_ram_size = le32_to_cpup(val);
  796. ath6kl_dbg(ATH6KL_DBG_BOOT,
  797. "found reserved ram size ie 0x%d\n",
  798. ar->hw.reserved_ram_size);
  799. break;
  800. case ATH6KL_FW_IE_CAPABILITIES:
  801. ath6kl_dbg(ATH6KL_DBG_BOOT,
  802. "found firmware capabilities ie (%zd B)\n",
  803. ie_len);
  804. for (i = 0; i < ATH6KL_FW_CAPABILITY_MAX; i++) {
  805. index = ALIGN(i, 8) / 8;
  806. bit = i % 8;
  807. if (data[index] & (1 << bit))
  808. __set_bit(i, ar->fw_capabilities);
  809. }
  810. ath6kl_dbg_dump(ATH6KL_DBG_BOOT, "capabilities", "",
  811. ar->fw_capabilities,
  812. sizeof(ar->fw_capabilities));
  813. break;
  814. case ATH6KL_FW_IE_PATCH_ADDR:
  815. if (ie_len != sizeof(*val))
  816. break;
  817. val = (__le32 *) data;
  818. ar->hw.dataset_patch_addr = le32_to_cpup(val);
  819. ath6kl_dbg(ATH6KL_DBG_BOOT,
  820. "found patch address ie 0x%x\n",
  821. ar->hw.dataset_patch_addr);
  822. break;
  823. case ATH6KL_FW_IE_BOARD_ADDR:
  824. if (ie_len != sizeof(*val))
  825. break;
  826. val = (__le32 *) data;
  827. ar->hw.board_addr = le32_to_cpup(val);
  828. ath6kl_dbg(ATH6KL_DBG_BOOT,
  829. "found board address ie 0x%x\n",
  830. ar->hw.board_addr);
  831. break;
  832. default:
  833. ath6kl_dbg(ATH6KL_DBG_BOOT, "Unknown fw ie: %u\n",
  834. le32_to_cpup(&hdr->id));
  835. break;
  836. }
  837. len -= ie_len;
  838. data += ie_len;
  839. };
  840. ret = 0;
  841. out:
  842. release_firmware(fw);
  843. return ret;
  844. }
  845. static int ath6kl_fetch_firmwares(struct ath6kl *ar)
  846. {
  847. int ret;
  848. ret = ath6kl_fetch_board_file(ar);
  849. if (ret)
  850. return ret;
  851. ret = ath6kl_fetch_fw_api2(ar);
  852. if (ret == 0) {
  853. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 2\n");
  854. return 0;
  855. }
  856. ret = ath6kl_fetch_fw_api1(ar);
  857. if (ret)
  858. return ret;
  859. ath6kl_dbg(ATH6KL_DBG_BOOT, "using fw api 1\n");
  860. return 0;
  861. }
  862. static int ath6kl_upload_board_file(struct ath6kl *ar)
  863. {
  864. u32 board_address, board_ext_address, param;
  865. u32 board_data_size, board_ext_data_size;
  866. int ret;
  867. if (WARN_ON(ar->fw_board == NULL))
  868. return -ENOENT;
  869. /*
  870. * Determine where in Target RAM to write Board Data.
  871. * For AR6004, host determine Target RAM address for
  872. * writing board data.
  873. */
  874. if (ar->hw.board_addr != 0) {
  875. board_address = ar->hw.board_addr;
  876. ath6kl_bmi_write(ar,
  877. ath6kl_get_hi_item_addr(ar,
  878. HI_ITEM(hi_board_data)),
  879. (u8 *) &board_address, 4);
  880. } else {
  881. ath6kl_bmi_read(ar,
  882. ath6kl_get_hi_item_addr(ar,
  883. HI_ITEM(hi_board_data)),
  884. (u8 *) &board_address, 4);
  885. }
  886. /* determine where in target ram to write extended board data */
  887. ath6kl_bmi_read(ar,
  888. ath6kl_get_hi_item_addr(ar,
  889. HI_ITEM(hi_board_ext_data)),
  890. (u8 *) &board_ext_address, 4);
  891. if (ar->target_type == TARGET_TYPE_AR6003 &&
  892. board_ext_address == 0) {
  893. ath6kl_err("Failed to get board file target address.\n");
  894. return -EINVAL;
  895. }
  896. switch (ar->target_type) {
  897. case TARGET_TYPE_AR6003:
  898. board_data_size = AR6003_BOARD_DATA_SZ;
  899. board_ext_data_size = AR6003_BOARD_EXT_DATA_SZ;
  900. break;
  901. case TARGET_TYPE_AR6004:
  902. board_data_size = AR6004_BOARD_DATA_SZ;
  903. board_ext_data_size = AR6004_BOARD_EXT_DATA_SZ;
  904. break;
  905. default:
  906. WARN_ON(1);
  907. return -EINVAL;
  908. break;
  909. }
  910. if (board_ext_address &&
  911. ar->fw_board_len == (board_data_size + board_ext_data_size)) {
  912. /* write extended board data */
  913. ath6kl_dbg(ATH6KL_DBG_BOOT,
  914. "writing extended board data to 0x%x (%d B)\n",
  915. board_ext_address, board_ext_data_size);
  916. ret = ath6kl_bmi_write(ar, board_ext_address,
  917. ar->fw_board + board_data_size,
  918. board_ext_data_size);
  919. if (ret) {
  920. ath6kl_err("Failed to write extended board data: %d\n",
  921. ret);
  922. return ret;
  923. }
  924. /* record that extended board data is initialized */
  925. param = (board_ext_data_size << 16) | 1;
  926. ath6kl_bmi_write(ar,
  927. ath6kl_get_hi_item_addr(ar,
  928. HI_ITEM(hi_board_ext_data_config)),
  929. (unsigned char *) &param, 4);
  930. }
  931. if (ar->fw_board_len < board_data_size) {
  932. ath6kl_err("Too small board file: %zu\n", ar->fw_board_len);
  933. ret = -EINVAL;
  934. return ret;
  935. }
  936. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing board file to 0x%x (%d B)\n",
  937. board_address, board_data_size);
  938. ret = ath6kl_bmi_write(ar, board_address, ar->fw_board,
  939. board_data_size);
  940. if (ret) {
  941. ath6kl_err("Board file bmi write failed: %d\n", ret);
  942. return ret;
  943. }
  944. /* record the fact that Board Data IS initialized */
  945. param = 1;
  946. ath6kl_bmi_write(ar,
  947. ath6kl_get_hi_item_addr(ar,
  948. HI_ITEM(hi_board_data_initialized)),
  949. (u8 *)&param, 4);
  950. return ret;
  951. }
  952. static int ath6kl_upload_otp(struct ath6kl *ar)
  953. {
  954. u32 address, param;
  955. bool from_hw = false;
  956. int ret;
  957. if (ar->fw_otp == NULL)
  958. return 0;
  959. address = ar->hw.app_load_addr;
  960. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing otp to 0x%x (%zd B)\n", address,
  961. ar->fw_otp_len);
  962. ret = ath6kl_bmi_fast_download(ar, address, ar->fw_otp,
  963. ar->fw_otp_len);
  964. if (ret) {
  965. ath6kl_err("Failed to upload OTP file: %d\n", ret);
  966. return ret;
  967. }
  968. /* read firmware start address */
  969. ret = ath6kl_bmi_read(ar,
  970. ath6kl_get_hi_item_addr(ar,
  971. HI_ITEM(hi_app_start)),
  972. (u8 *) &address, sizeof(address));
  973. if (ret) {
  974. ath6kl_err("Failed to read hi_app_start: %d\n", ret);
  975. return ret;
  976. }
  977. if (ar->hw.app_start_override_addr == 0) {
  978. ar->hw.app_start_override_addr = address;
  979. from_hw = true;
  980. }
  981. ath6kl_dbg(ATH6KL_DBG_BOOT, "app_start_override_addr%s 0x%x\n",
  982. from_hw ? " (from hw)" : "",
  983. ar->hw.app_start_override_addr);
  984. /* execute the OTP code */
  985. ath6kl_dbg(ATH6KL_DBG_BOOT, "executing OTP at 0x%x\n",
  986. ar->hw.app_start_override_addr);
  987. param = 0;
  988. ath6kl_bmi_execute(ar, ar->hw.app_start_override_addr, &param);
  989. return ret;
  990. }
  991. static int ath6kl_upload_firmware(struct ath6kl *ar)
  992. {
  993. u32 address;
  994. int ret;
  995. if (WARN_ON(ar->fw == NULL))
  996. return 0;
  997. address = ar->hw.app_load_addr;
  998. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing firmware to 0x%x (%zd B)\n",
  999. address, ar->fw_len);
  1000. ret = ath6kl_bmi_fast_download(ar, address, ar->fw, ar->fw_len);
  1001. if (ret) {
  1002. ath6kl_err("Failed to write firmware: %d\n", ret);
  1003. return ret;
  1004. }
  1005. /*
  1006. * Set starting address for firmware
  1007. * Don't need to setup app_start override addr on AR6004
  1008. */
  1009. if (ar->target_type != TARGET_TYPE_AR6004) {
  1010. address = ar->hw.app_start_override_addr;
  1011. ath6kl_bmi_set_app_start(ar, address);
  1012. }
  1013. return ret;
  1014. }
  1015. static int ath6kl_upload_patch(struct ath6kl *ar)
  1016. {
  1017. u32 address, param;
  1018. int ret;
  1019. if (ar->fw_patch == NULL)
  1020. return 0;
  1021. address = ar->hw.dataset_patch_addr;
  1022. ath6kl_dbg(ATH6KL_DBG_BOOT, "writing patch to 0x%x (%zd B)\n",
  1023. address, ar->fw_patch_len);
  1024. ret = ath6kl_bmi_write(ar, address, ar->fw_patch, ar->fw_patch_len);
  1025. if (ret) {
  1026. ath6kl_err("Failed to write patch file: %d\n", ret);
  1027. return ret;
  1028. }
  1029. param = address;
  1030. ath6kl_bmi_write(ar,
  1031. ath6kl_get_hi_item_addr(ar,
  1032. HI_ITEM(hi_dset_list_head)),
  1033. (unsigned char *) &param, 4);
  1034. return 0;
  1035. }
  1036. static int ath6kl_init_upload(struct ath6kl *ar)
  1037. {
  1038. u32 param, options, sleep, address;
  1039. int status = 0;
  1040. if (ar->target_type != TARGET_TYPE_AR6003 &&
  1041. ar->target_type != TARGET_TYPE_AR6004)
  1042. return -EINVAL;
  1043. /* temporarily disable system sleep */
  1044. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1045. status = ath6kl_bmi_reg_read(ar, address, &param);
  1046. if (status)
  1047. return status;
  1048. options = param;
  1049. param |= ATH6KL_OPTION_SLEEP_DISABLE;
  1050. status = ath6kl_bmi_reg_write(ar, address, param);
  1051. if (status)
  1052. return status;
  1053. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1054. status = ath6kl_bmi_reg_read(ar, address, &param);
  1055. if (status)
  1056. return status;
  1057. sleep = param;
  1058. param |= SM(SYSTEM_SLEEP_DISABLE, 1);
  1059. status = ath6kl_bmi_reg_write(ar, address, param);
  1060. if (status)
  1061. return status;
  1062. ath6kl_dbg(ATH6KL_DBG_TRC, "old options: %d, old sleep: %d\n",
  1063. options, sleep);
  1064. /* program analog PLL register */
  1065. /* no need to control 40/44MHz clock on AR6004 */
  1066. if (ar->target_type != TARGET_TYPE_AR6004) {
  1067. status = ath6kl_bmi_reg_write(ar, ATH6KL_ANALOG_PLL_REGISTER,
  1068. 0xF9104001);
  1069. if (status)
  1070. return status;
  1071. /* Run at 80/88MHz by default */
  1072. param = SM(CPU_CLOCK_STANDARD, 1);
  1073. address = RTC_BASE_ADDRESS + CPU_CLOCK_ADDRESS;
  1074. status = ath6kl_bmi_reg_write(ar, address, param);
  1075. if (status)
  1076. return status;
  1077. }
  1078. param = 0;
  1079. address = RTC_BASE_ADDRESS + LPO_CAL_ADDRESS;
  1080. param = SM(LPO_CAL_ENABLE, 1);
  1081. status = ath6kl_bmi_reg_write(ar, address, param);
  1082. if (status)
  1083. return status;
  1084. /* WAR to avoid SDIO CRC err */
  1085. if (ar->version.target_ver == AR6003_REV2_VERSION) {
  1086. ath6kl_err("temporary war to avoid sdio crc error\n");
  1087. param = 0x20;
  1088. address = GPIO_BASE_ADDRESS + GPIO_PIN10_ADDRESS;
  1089. status = ath6kl_bmi_reg_write(ar, address, param);
  1090. if (status)
  1091. return status;
  1092. address = GPIO_BASE_ADDRESS + GPIO_PIN11_ADDRESS;
  1093. status = ath6kl_bmi_reg_write(ar, address, param);
  1094. if (status)
  1095. return status;
  1096. address = GPIO_BASE_ADDRESS + GPIO_PIN12_ADDRESS;
  1097. status = ath6kl_bmi_reg_write(ar, address, param);
  1098. if (status)
  1099. return status;
  1100. address = GPIO_BASE_ADDRESS + GPIO_PIN13_ADDRESS;
  1101. status = ath6kl_bmi_reg_write(ar, address, param);
  1102. if (status)
  1103. return status;
  1104. }
  1105. /* write EEPROM data to Target RAM */
  1106. status = ath6kl_upload_board_file(ar);
  1107. if (status)
  1108. return status;
  1109. /* transfer One time Programmable data */
  1110. status = ath6kl_upload_otp(ar);
  1111. if (status)
  1112. return status;
  1113. /* Download Target firmware */
  1114. status = ath6kl_upload_firmware(ar);
  1115. if (status)
  1116. return status;
  1117. status = ath6kl_upload_patch(ar);
  1118. if (status)
  1119. return status;
  1120. /* Restore system sleep */
  1121. address = RTC_BASE_ADDRESS + SYSTEM_SLEEP_ADDRESS;
  1122. status = ath6kl_bmi_reg_write(ar, address, sleep);
  1123. if (status)
  1124. return status;
  1125. address = MBOX_BASE_ADDRESS + LOCAL_SCRATCH_ADDRESS;
  1126. param = options | 0x20;
  1127. status = ath6kl_bmi_reg_write(ar, address, param);
  1128. if (status)
  1129. return status;
  1130. /* Configure GPIO AR6003 UART */
  1131. param = CONFIG_AR600x_DEBUG_UART_TX_PIN;
  1132. status = ath6kl_bmi_write(ar,
  1133. ath6kl_get_hi_item_addr(ar,
  1134. HI_ITEM(hi_dbg_uart_txpin)),
  1135. (u8 *)&param, 4);
  1136. return status;
  1137. }
  1138. static int ath6kl_init_hw_params(struct ath6kl *ar)
  1139. {
  1140. const struct ath6kl_hw *hw;
  1141. int i;
  1142. for (i = 0; i < ARRAY_SIZE(hw_list); i++) {
  1143. hw = &hw_list[i];
  1144. if (hw->id == ar->version.target_ver)
  1145. break;
  1146. }
  1147. if (i == ARRAY_SIZE(hw_list)) {
  1148. ath6kl_err("Unsupported hardware version: 0x%x\n",
  1149. ar->version.target_ver);
  1150. return -EINVAL;
  1151. }
  1152. ar->hw = *hw;
  1153. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1154. "target_ver 0x%x target_type 0x%x dataset_patch 0x%x app_load_addr 0x%x\n",
  1155. ar->version.target_ver, ar->target_type,
  1156. ar->hw.dataset_patch_addr, ar->hw.app_load_addr);
  1157. ath6kl_dbg(ATH6KL_DBG_BOOT,
  1158. "app_start_override_addr 0x%x board_ext_data_addr 0x%x reserved_ram_size 0x%x",
  1159. ar->hw.app_start_override_addr, ar->hw.board_ext_data_addr,
  1160. ar->hw.reserved_ram_size);
  1161. return 0;
  1162. }
  1163. int ath6kl_init_hw_start(struct ath6kl *ar)
  1164. {
  1165. long timeleft;
  1166. int ret, i;
  1167. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw start\n");
  1168. ret = ath6kl_hif_power_on(ar);
  1169. if (ret)
  1170. return ret;
  1171. ret = ath6kl_configure_target(ar);
  1172. if (ret)
  1173. goto err_power_off;
  1174. ret = ath6kl_init_upload(ar);
  1175. if (ret)
  1176. goto err_power_off;
  1177. /* Do we need to finish the BMI phase */
  1178. /* FIXME: return error from ath6kl_bmi_done() */
  1179. if (ath6kl_bmi_done(ar)) {
  1180. ret = -EIO;
  1181. goto err_power_off;
  1182. }
  1183. /*
  1184. * The reason we have to wait for the target here is that the
  1185. * driver layer has to init BMI in order to set the host block
  1186. * size.
  1187. */
  1188. if (ath6kl_htc_wait_target(ar->htc_target)) {
  1189. ret = -EIO;
  1190. goto err_power_off;
  1191. }
  1192. if (ath6kl_init_service_ep(ar)) {
  1193. ret = -EIO;
  1194. goto err_cleanup_scatter;
  1195. }
  1196. /* setup credit distribution */
  1197. ath6kl_credit_setup(ar->htc_target, &ar->credit_state_info);
  1198. /* start HTC */
  1199. ret = ath6kl_htc_start(ar->htc_target);
  1200. if (ret) {
  1201. /* FIXME: call this */
  1202. ath6kl_cookie_cleanup(ar);
  1203. goto err_cleanup_scatter;
  1204. }
  1205. /* Wait for Wmi event to be ready */
  1206. timeleft = wait_event_interruptible_timeout(ar->event_wq,
  1207. test_bit(WMI_READY,
  1208. &ar->flag),
  1209. WMI_TIMEOUT);
  1210. ath6kl_dbg(ATH6KL_DBG_BOOT, "firmware booted\n");
  1211. if (ar->version.abi_ver != ATH6KL_ABI_VERSION) {
  1212. ath6kl_err("abi version mismatch: host(0x%x), target(0x%x)\n",
  1213. ATH6KL_ABI_VERSION, ar->version.abi_ver);
  1214. ret = -EIO;
  1215. goto err_htc_stop;
  1216. }
  1217. if (!timeleft || signal_pending(current)) {
  1218. ath6kl_err("wmi is not ready or wait was interrupted\n");
  1219. ret = -EIO;
  1220. goto err_htc_stop;
  1221. }
  1222. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: wmi is ready\n", __func__);
  1223. /* communicate the wmi protocol verision to the target */
  1224. /* FIXME: return error */
  1225. if ((ath6kl_set_host_app_area(ar)) != 0)
  1226. ath6kl_err("unable to set the host app area\n");
  1227. for (i = 0; i < MAX_NUM_VIF; i++) {
  1228. ret = ath6kl_target_config_wlan_params(ar, i);
  1229. if (ret)
  1230. goto err_htc_stop;
  1231. }
  1232. ar->state = ATH6KL_STATE_ON;
  1233. return 0;
  1234. err_htc_stop:
  1235. ath6kl_htc_stop(ar->htc_target);
  1236. err_cleanup_scatter:
  1237. ath6kl_hif_cleanup_scatter(ar);
  1238. err_power_off:
  1239. ath6kl_hif_power_off(ar);
  1240. return ret;
  1241. }
  1242. int ath6kl_init_hw_stop(struct ath6kl *ar)
  1243. {
  1244. int ret;
  1245. ath6kl_dbg(ATH6KL_DBG_BOOT, "hw stop\n");
  1246. ath6kl_htc_stop(ar->htc_target);
  1247. ath6kl_hif_stop(ar);
  1248. ath6kl_bmi_reset(ar);
  1249. ret = ath6kl_hif_power_off(ar);
  1250. if (ret)
  1251. ath6kl_warn("failed to power off hif: %d\n", ret);
  1252. ar->state = ATH6KL_STATE_OFF;
  1253. return 0;
  1254. }
  1255. int ath6kl_core_init(struct ath6kl *ar)
  1256. {
  1257. struct ath6kl_bmi_target_info targ_info;
  1258. struct net_device *ndev;
  1259. int ret = 0, i;
  1260. ar->ath6kl_wq = create_singlethread_workqueue("ath6kl");
  1261. if (!ar->ath6kl_wq)
  1262. return -ENOMEM;
  1263. ret = ath6kl_bmi_init(ar);
  1264. if (ret)
  1265. goto err_wq;
  1266. /*
  1267. * Turn on power to get hardware (target) version and leave power
  1268. * on delibrately as we will boot the hardware anyway within few
  1269. * seconds.
  1270. */
  1271. ret = ath6kl_hif_power_on(ar);
  1272. if (ret)
  1273. goto err_bmi_cleanup;
  1274. ret = ath6kl_bmi_get_target_info(ar, &targ_info);
  1275. if (ret)
  1276. goto err_power_off;
  1277. ar->version.target_ver = le32_to_cpu(targ_info.version);
  1278. ar->target_type = le32_to_cpu(targ_info.type);
  1279. ar->wiphy->hw_version = le32_to_cpu(targ_info.version);
  1280. ret = ath6kl_init_hw_params(ar);
  1281. if (ret)
  1282. goto err_power_off;
  1283. ar->htc_target = ath6kl_htc_create(ar);
  1284. if (!ar->htc_target) {
  1285. ret = -ENOMEM;
  1286. goto err_power_off;
  1287. }
  1288. ret = ath6kl_fetch_firmwares(ar);
  1289. if (ret)
  1290. goto err_htc_cleanup;
  1291. /* FIXME: we should free all firmwares in the error cases below */
  1292. /* Indicate that WMI is enabled (although not ready yet) */
  1293. set_bit(WMI_ENABLED, &ar->flag);
  1294. ar->wmi = ath6kl_wmi_init(ar);
  1295. if (!ar->wmi) {
  1296. ath6kl_err("failed to initialize wmi\n");
  1297. ret = -EIO;
  1298. goto err_htc_cleanup;
  1299. }
  1300. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: got wmi @ 0x%p.\n", __func__, ar->wmi);
  1301. ret = ath6kl_register_ieee80211_hw(ar);
  1302. if (ret)
  1303. goto err_node_cleanup;
  1304. ret = ath6kl_debug_init(ar);
  1305. if (ret) {
  1306. wiphy_unregister(ar->wiphy);
  1307. goto err_node_cleanup;
  1308. }
  1309. for (i = 0; i < MAX_NUM_VIF; i++)
  1310. ar->avail_idx_map |= BIT(i);
  1311. rtnl_lock();
  1312. /* Add an initial station interface */
  1313. ndev = ath6kl_interface_add(ar, "wlan%d", NL80211_IFTYPE_STATION, 0,
  1314. INFRA_NETWORK);
  1315. rtnl_unlock();
  1316. if (!ndev) {
  1317. ath6kl_err("Failed to instantiate a network device\n");
  1318. ret = -ENOMEM;
  1319. wiphy_unregister(ar->wiphy);
  1320. goto err_debug_init;
  1321. }
  1322. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: name=%s dev=0x%p, ar=0x%p\n",
  1323. __func__, ndev->name, ndev, ar);
  1324. /* setup access class priority mappings */
  1325. ar->ac_stream_pri_map[WMM_AC_BK] = 0; /* lowest */
  1326. ar->ac_stream_pri_map[WMM_AC_BE] = 1;
  1327. ar->ac_stream_pri_map[WMM_AC_VI] = 2;
  1328. ar->ac_stream_pri_map[WMM_AC_VO] = 3; /* highest */
  1329. /* give our connected endpoints some buffers */
  1330. ath6kl_rx_refill(ar->htc_target, ar->ctrl_ep);
  1331. ath6kl_rx_refill(ar->htc_target, ar->ac2ep_map[WMM_AC_BE]);
  1332. /* allocate some buffers that handle larger AMSDU frames */
  1333. ath6kl_refill_amsdu_rxbufs(ar, ATH6KL_MAX_AMSDU_RX_BUFFERS);
  1334. ath6kl_cookie_init(ar);
  1335. ar->conf_flags = ATH6KL_CONF_IGNORE_ERP_BARKER |
  1336. ATH6KL_CONF_ENABLE_11N | ATH6KL_CONF_ENABLE_TX_BURST;
  1337. if (suspend_cutpower)
  1338. ar->conf_flags |= ATH6KL_CONF_SUSPEND_CUTPOWER;
  1339. ar->wiphy->flags |= WIPHY_FLAG_SUPPORTS_FW_ROAM |
  1340. WIPHY_FLAG_HAVE_AP_SME;
  1341. set_bit(FIRST_BOOT, &ar->flag);
  1342. ret = ath6kl_init_hw_start(ar);
  1343. if (ret) {
  1344. ath6kl_err("Failed to start hardware: %d\n", ret);
  1345. goto err_rxbuf_cleanup;
  1346. }
  1347. /*
  1348. * Set mac address which is received in ready event
  1349. * FIXME: Move to ath6kl_interface_add()
  1350. */
  1351. memcpy(ndev->dev_addr, ar->mac_addr, ETH_ALEN);
  1352. return ret;
  1353. err_rxbuf_cleanup:
  1354. ath6kl_htc_flush_rx_buf(ar->htc_target);
  1355. ath6kl_cleanup_amsdu_rxbufs(ar);
  1356. rtnl_lock();
  1357. ath6kl_deinit_if_data(netdev_priv(ndev));
  1358. rtnl_unlock();
  1359. wiphy_unregister(ar->wiphy);
  1360. err_debug_init:
  1361. ath6kl_debug_cleanup(ar);
  1362. err_node_cleanup:
  1363. ath6kl_wmi_shutdown(ar->wmi);
  1364. clear_bit(WMI_ENABLED, &ar->flag);
  1365. ar->wmi = NULL;
  1366. err_htc_cleanup:
  1367. ath6kl_htc_cleanup(ar->htc_target);
  1368. err_power_off:
  1369. ath6kl_hif_power_off(ar);
  1370. err_bmi_cleanup:
  1371. ath6kl_bmi_cleanup(ar);
  1372. err_wq:
  1373. destroy_workqueue(ar->ath6kl_wq);
  1374. return ret;
  1375. }
  1376. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready)
  1377. {
  1378. static u8 bcast_mac[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
  1379. bool discon_issued;
  1380. netif_stop_queue(vif->ndev);
  1381. clear_bit(WLAN_ENABLED, &vif->flags);
  1382. if (wmi_ready) {
  1383. discon_issued = test_bit(CONNECTED, &vif->flags) ||
  1384. test_bit(CONNECT_PEND, &vif->flags);
  1385. ath6kl_disconnect(vif);
  1386. del_timer(&vif->disconnect_timer);
  1387. if (discon_issued)
  1388. ath6kl_disconnect_event(vif, DISCONNECT_CMD,
  1389. (vif->nw_type & AP_NETWORK) ?
  1390. bcast_mac : vif->bssid,
  1391. 0, NULL, 0);
  1392. }
  1393. if (vif->scan_req) {
  1394. cfg80211_scan_done(vif->scan_req, true);
  1395. vif->scan_req = NULL;
  1396. }
  1397. }
  1398. void ath6kl_stop_txrx(struct ath6kl *ar)
  1399. {
  1400. struct ath6kl_vif *vif, *tmp_vif;
  1401. set_bit(DESTROY_IN_PROGRESS, &ar->flag);
  1402. if (down_interruptible(&ar->sem)) {
  1403. ath6kl_err("down_interruptible failed\n");
  1404. return;
  1405. }
  1406. spin_lock_bh(&ar->list_lock);
  1407. list_for_each_entry_safe(vif, tmp_vif, &ar->vif_list, list) {
  1408. list_del(&vif->list);
  1409. spin_unlock_bh(&ar->list_lock);
  1410. ath6kl_cleanup_vif(vif, test_bit(WMI_READY, &ar->flag));
  1411. rtnl_lock();
  1412. ath6kl_deinit_if_data(vif);
  1413. rtnl_unlock();
  1414. spin_lock_bh(&ar->list_lock);
  1415. }
  1416. spin_unlock_bh(&ar->list_lock);
  1417. clear_bit(WMI_READY, &ar->flag);
  1418. /*
  1419. * After wmi_shudown all WMI events will be dropped. We
  1420. * need to cleanup the buffers allocated in AP mode and
  1421. * give disconnect notification to stack, which usually
  1422. * happens in the disconnect_event. Simulate the disconnect
  1423. * event by calling the function directly. Sometimes
  1424. * disconnect_event will be received when the debug logs
  1425. * are collected.
  1426. */
  1427. ath6kl_wmi_shutdown(ar->wmi);
  1428. clear_bit(WMI_ENABLED, &ar->flag);
  1429. if (ar->htc_target) {
  1430. ath6kl_dbg(ATH6KL_DBG_TRC, "%s: shut down htc\n", __func__);
  1431. ath6kl_htc_stop(ar->htc_target);
  1432. }
  1433. /*
  1434. * Try to reset the device if we can. The driver may have been
  1435. * configure NOT to reset the target during a debug session.
  1436. */
  1437. ath6kl_dbg(ATH6KL_DBG_TRC,
  1438. "attempting to reset target on instance destroy\n");
  1439. ath6kl_reset_device(ar, ar->target_type, true, true);
  1440. clear_bit(WLAN_ENABLED, &ar->flag);
  1441. }