qla_iocb.c 75 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2013 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_target.h"
  9. #include <linux/blkdev.h>
  10. #include <linux/delay.h>
  11. #include <scsi/scsi_tcq.h>
  12. static void qla25xx_set_que(srb_t *, struct rsp_que **);
  13. /**
  14. * qla2x00_get_cmd_direction() - Determine control_flag data direction.
  15. * @cmd: SCSI command
  16. *
  17. * Returns the proper CF_* direction based on CDB.
  18. */
  19. static inline uint16_t
  20. qla2x00_get_cmd_direction(srb_t *sp)
  21. {
  22. uint16_t cflags;
  23. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  24. struct scsi_qla_host *vha = sp->fcport->vha;
  25. cflags = 0;
  26. /* Set transfer direction */
  27. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  28. cflags = CF_WRITE;
  29. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  30. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  31. cflags = CF_READ;
  32. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  33. }
  34. return (cflags);
  35. }
  36. /**
  37. * qla2x00_calc_iocbs_32() - Determine number of Command Type 2 and
  38. * Continuation Type 0 IOCBs to allocate.
  39. *
  40. * @dsds: number of data segment decriptors needed
  41. *
  42. * Returns the number of IOCB entries needed to store @dsds.
  43. */
  44. uint16_t
  45. qla2x00_calc_iocbs_32(uint16_t dsds)
  46. {
  47. uint16_t iocbs;
  48. iocbs = 1;
  49. if (dsds > 3) {
  50. iocbs += (dsds - 3) / 7;
  51. if ((dsds - 3) % 7)
  52. iocbs++;
  53. }
  54. return (iocbs);
  55. }
  56. /**
  57. * qla2x00_calc_iocbs_64() - Determine number of Command Type 3 and
  58. * Continuation Type 1 IOCBs to allocate.
  59. *
  60. * @dsds: number of data segment decriptors needed
  61. *
  62. * Returns the number of IOCB entries needed to store @dsds.
  63. */
  64. uint16_t
  65. qla2x00_calc_iocbs_64(uint16_t dsds)
  66. {
  67. uint16_t iocbs;
  68. iocbs = 1;
  69. if (dsds > 2) {
  70. iocbs += (dsds - 2) / 5;
  71. if ((dsds - 2) % 5)
  72. iocbs++;
  73. }
  74. return (iocbs);
  75. }
  76. /**
  77. * qla2x00_prep_cont_type0_iocb() - Initialize a Continuation Type 0 IOCB.
  78. * @ha: HA context
  79. *
  80. * Returns a pointer to the Continuation Type 0 IOCB packet.
  81. */
  82. static inline cont_entry_t *
  83. qla2x00_prep_cont_type0_iocb(struct scsi_qla_host *vha)
  84. {
  85. cont_entry_t *cont_pkt;
  86. struct req_que *req = vha->req;
  87. /* Adjust ring index. */
  88. req->ring_index++;
  89. if (req->ring_index == req->length) {
  90. req->ring_index = 0;
  91. req->ring_ptr = req->ring;
  92. } else {
  93. req->ring_ptr++;
  94. }
  95. cont_pkt = (cont_entry_t *)req->ring_ptr;
  96. /* Load packet defaults. */
  97. *((uint32_t *)(&cont_pkt->entry_type)) =
  98. __constant_cpu_to_le32(CONTINUE_TYPE);
  99. return (cont_pkt);
  100. }
  101. /**
  102. * qla2x00_prep_cont_type1_iocb() - Initialize a Continuation Type 1 IOCB.
  103. * @ha: HA context
  104. *
  105. * Returns a pointer to the continuation type 1 IOCB packet.
  106. */
  107. static inline cont_a64_entry_t *
  108. qla2x00_prep_cont_type1_iocb(scsi_qla_host_t *vha, struct req_que *req)
  109. {
  110. cont_a64_entry_t *cont_pkt;
  111. /* Adjust ring index. */
  112. req->ring_index++;
  113. if (req->ring_index == req->length) {
  114. req->ring_index = 0;
  115. req->ring_ptr = req->ring;
  116. } else {
  117. req->ring_ptr++;
  118. }
  119. cont_pkt = (cont_a64_entry_t *)req->ring_ptr;
  120. /* Load packet defaults. */
  121. *((uint32_t *)(&cont_pkt->entry_type)) = IS_QLAFX00(vha->hw) ?
  122. __constant_cpu_to_le32(CONTINUE_A64_TYPE_FX00) :
  123. __constant_cpu_to_le32(CONTINUE_A64_TYPE);
  124. return (cont_pkt);
  125. }
  126. static inline int
  127. qla24xx_configure_prot_mode(srb_t *sp, uint16_t *fw_prot_opts)
  128. {
  129. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  130. uint8_t guard = scsi_host_get_guard(cmd->device->host);
  131. /* We always use DIFF Bundling for best performance */
  132. *fw_prot_opts = 0;
  133. /* Translate SCSI opcode to a protection opcode */
  134. switch (scsi_get_prot_op(cmd)) {
  135. case SCSI_PROT_READ_STRIP:
  136. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  137. break;
  138. case SCSI_PROT_WRITE_INSERT:
  139. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  140. break;
  141. case SCSI_PROT_READ_INSERT:
  142. *fw_prot_opts |= PO_MODE_DIF_INSERT;
  143. break;
  144. case SCSI_PROT_WRITE_STRIP:
  145. *fw_prot_opts |= PO_MODE_DIF_REMOVE;
  146. break;
  147. case SCSI_PROT_READ_PASS:
  148. case SCSI_PROT_WRITE_PASS:
  149. if (guard & SHOST_DIX_GUARD_IP)
  150. *fw_prot_opts |= PO_MODE_DIF_TCP_CKSUM;
  151. else
  152. *fw_prot_opts |= PO_MODE_DIF_PASS;
  153. break;
  154. default: /* Normal Request */
  155. *fw_prot_opts |= PO_MODE_DIF_PASS;
  156. break;
  157. }
  158. return scsi_prot_sg_count(cmd);
  159. }
  160. /*
  161. * qla2x00_build_scsi_iocbs_32() - Build IOCB command utilizing 32bit
  162. * capable IOCB types.
  163. *
  164. * @sp: SRB command to process
  165. * @cmd_pkt: Command type 2 IOCB
  166. * @tot_dsds: Total number of segments to transfer
  167. */
  168. void qla2x00_build_scsi_iocbs_32(srb_t *sp, cmd_entry_t *cmd_pkt,
  169. uint16_t tot_dsds)
  170. {
  171. uint16_t avail_dsds;
  172. uint32_t *cur_dsd;
  173. scsi_qla_host_t *vha;
  174. struct scsi_cmnd *cmd;
  175. struct scatterlist *sg;
  176. int i;
  177. cmd = GET_CMD_SP(sp);
  178. /* Update entry type to indicate Command Type 2 IOCB */
  179. *((uint32_t *)(&cmd_pkt->entry_type)) =
  180. __constant_cpu_to_le32(COMMAND_TYPE);
  181. /* No data transfer */
  182. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  183. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  184. return;
  185. }
  186. vha = sp->fcport->vha;
  187. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  188. /* Three DSDs are available in the Command Type 2 IOCB */
  189. avail_dsds = 3;
  190. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  191. /* Load data segments */
  192. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  193. cont_entry_t *cont_pkt;
  194. /* Allocate additional continuation packets? */
  195. if (avail_dsds == 0) {
  196. /*
  197. * Seven DSDs are available in the Continuation
  198. * Type 0 IOCB.
  199. */
  200. cont_pkt = qla2x00_prep_cont_type0_iocb(vha);
  201. cur_dsd = (uint32_t *)&cont_pkt->dseg_0_address;
  202. avail_dsds = 7;
  203. }
  204. *cur_dsd++ = cpu_to_le32(sg_dma_address(sg));
  205. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  206. avail_dsds--;
  207. }
  208. }
  209. /**
  210. * qla2x00_build_scsi_iocbs_64() - Build IOCB command utilizing 64bit
  211. * capable IOCB types.
  212. *
  213. * @sp: SRB command to process
  214. * @cmd_pkt: Command type 3 IOCB
  215. * @tot_dsds: Total number of segments to transfer
  216. */
  217. void qla2x00_build_scsi_iocbs_64(srb_t *sp, cmd_entry_t *cmd_pkt,
  218. uint16_t tot_dsds)
  219. {
  220. uint16_t avail_dsds;
  221. uint32_t *cur_dsd;
  222. scsi_qla_host_t *vha;
  223. struct scsi_cmnd *cmd;
  224. struct scatterlist *sg;
  225. int i;
  226. cmd = GET_CMD_SP(sp);
  227. /* Update entry type to indicate Command Type 3 IOCB */
  228. *((uint32_t *)(&cmd_pkt->entry_type)) =
  229. __constant_cpu_to_le32(COMMAND_A64_TYPE);
  230. /* No data transfer */
  231. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  232. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  233. return;
  234. }
  235. vha = sp->fcport->vha;
  236. cmd_pkt->control_flags |= cpu_to_le16(qla2x00_get_cmd_direction(sp));
  237. /* Two DSDs are available in the Command Type 3 IOCB */
  238. avail_dsds = 2;
  239. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  240. /* Load data segments */
  241. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  242. dma_addr_t sle_dma;
  243. cont_a64_entry_t *cont_pkt;
  244. /* Allocate additional continuation packets? */
  245. if (avail_dsds == 0) {
  246. /*
  247. * Five DSDs are available in the Continuation
  248. * Type 1 IOCB.
  249. */
  250. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  251. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  252. avail_dsds = 5;
  253. }
  254. sle_dma = sg_dma_address(sg);
  255. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  256. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  257. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  258. avail_dsds--;
  259. }
  260. }
  261. /**
  262. * qla2x00_start_scsi() - Send a SCSI command to the ISP
  263. * @sp: command to send to the ISP
  264. *
  265. * Returns non-zero if a failure occurred, else zero.
  266. */
  267. int
  268. qla2x00_start_scsi(srb_t *sp)
  269. {
  270. int ret, nseg;
  271. unsigned long flags;
  272. scsi_qla_host_t *vha;
  273. struct scsi_cmnd *cmd;
  274. uint32_t *clr_ptr;
  275. uint32_t index;
  276. uint32_t handle;
  277. cmd_entry_t *cmd_pkt;
  278. uint16_t cnt;
  279. uint16_t req_cnt;
  280. uint16_t tot_dsds;
  281. struct device_reg_2xxx __iomem *reg;
  282. struct qla_hw_data *ha;
  283. struct req_que *req;
  284. struct rsp_que *rsp;
  285. char tag[2];
  286. /* Setup device pointers. */
  287. ret = 0;
  288. vha = sp->fcport->vha;
  289. ha = vha->hw;
  290. reg = &ha->iobase->isp;
  291. cmd = GET_CMD_SP(sp);
  292. req = ha->req_q_map[0];
  293. rsp = ha->rsp_q_map[0];
  294. /* So we know we haven't pci_map'ed anything yet */
  295. tot_dsds = 0;
  296. /* Send marker if required */
  297. if (vha->marker_needed != 0) {
  298. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  299. QLA_SUCCESS) {
  300. return (QLA_FUNCTION_FAILED);
  301. }
  302. vha->marker_needed = 0;
  303. }
  304. /* Acquire ring specific lock */
  305. spin_lock_irqsave(&ha->hardware_lock, flags);
  306. /* Check for room in outstanding command list. */
  307. handle = req->current_outstanding_cmd;
  308. for (index = 1; index < req->num_outstanding_cmds; index++) {
  309. handle++;
  310. if (handle == req->num_outstanding_cmds)
  311. handle = 1;
  312. if (!req->outstanding_cmds[handle])
  313. break;
  314. }
  315. if (index == req->num_outstanding_cmds)
  316. goto queuing_error;
  317. /* Map the sg table so we have an accurate count of sg entries needed */
  318. if (scsi_sg_count(cmd)) {
  319. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  320. scsi_sg_count(cmd), cmd->sc_data_direction);
  321. if (unlikely(!nseg))
  322. goto queuing_error;
  323. } else
  324. nseg = 0;
  325. tot_dsds = nseg;
  326. /* Calculate the number of request entries needed. */
  327. req_cnt = ha->isp_ops->calc_req_entries(tot_dsds);
  328. if (req->cnt < (req_cnt + 2)) {
  329. cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg));
  330. if (req->ring_index < cnt)
  331. req->cnt = cnt - req->ring_index;
  332. else
  333. req->cnt = req->length -
  334. (req->ring_index - cnt);
  335. /* If still no head room then bail out */
  336. if (req->cnt < (req_cnt + 2))
  337. goto queuing_error;
  338. }
  339. /* Build command packet */
  340. req->current_outstanding_cmd = handle;
  341. req->outstanding_cmds[handle] = sp;
  342. sp->handle = handle;
  343. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  344. req->cnt -= req_cnt;
  345. cmd_pkt = (cmd_entry_t *)req->ring_ptr;
  346. cmd_pkt->handle = handle;
  347. /* Zero out remaining portion of packet. */
  348. clr_ptr = (uint32_t *)cmd_pkt + 2;
  349. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  350. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  351. /* Set target ID and LUN number*/
  352. SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id);
  353. cmd_pkt->lun = cpu_to_le16(cmd->device->lun);
  354. /* Update tagged queuing modifier */
  355. if (scsi_populate_tag_msg(cmd, tag)) {
  356. switch (tag[0]) {
  357. case HEAD_OF_QUEUE_TAG:
  358. cmd_pkt->control_flags =
  359. __constant_cpu_to_le16(CF_HEAD_TAG);
  360. break;
  361. case ORDERED_QUEUE_TAG:
  362. cmd_pkt->control_flags =
  363. __constant_cpu_to_le16(CF_ORDERED_TAG);
  364. break;
  365. default:
  366. cmd_pkt->control_flags =
  367. __constant_cpu_to_le16(CF_SIMPLE_TAG);
  368. break;
  369. }
  370. }
  371. /* Load SCSI command packet. */
  372. memcpy(cmd_pkt->scsi_cdb, cmd->cmnd, cmd->cmd_len);
  373. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  374. /* Build IOCB segments */
  375. ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds);
  376. /* Set total data segment count. */
  377. cmd_pkt->entry_count = (uint8_t)req_cnt;
  378. wmb();
  379. /* Adjust ring index. */
  380. req->ring_index++;
  381. if (req->ring_index == req->length) {
  382. req->ring_index = 0;
  383. req->ring_ptr = req->ring;
  384. } else
  385. req->ring_ptr++;
  386. sp->flags |= SRB_DMA_VALID;
  387. /* Set chip new ring index. */
  388. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index);
  389. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */
  390. /* Manage unprocessed RIO/ZIO commands in response queue. */
  391. if (vha->flags.process_response_queue &&
  392. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  393. qla2x00_process_response_queue(rsp);
  394. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  395. return (QLA_SUCCESS);
  396. queuing_error:
  397. if (tot_dsds)
  398. scsi_dma_unmap(cmd);
  399. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  400. return (QLA_FUNCTION_FAILED);
  401. }
  402. /**
  403. * qla2x00_start_iocbs() - Execute the IOCB command
  404. */
  405. void
  406. qla2x00_start_iocbs(struct scsi_qla_host *vha, struct req_que *req)
  407. {
  408. struct qla_hw_data *ha = vha->hw;
  409. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  410. if (IS_QLA82XX(ha)) {
  411. qla82xx_start_iocbs(vha);
  412. } else {
  413. /* Adjust ring index. */
  414. req->ring_index++;
  415. if (req->ring_index == req->length) {
  416. req->ring_index = 0;
  417. req->ring_ptr = req->ring;
  418. } else
  419. req->ring_ptr++;
  420. /* Set chip new ring index. */
  421. if (ha->mqenable || IS_QLA83XX(ha)) {
  422. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  423. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  424. } else if (IS_QLAFX00(ha)) {
  425. WRT_REG_DWORD(&reg->ispfx00.req_q_in, req->ring_index);
  426. RD_REG_DWORD_RELAXED(&reg->ispfx00.req_q_in);
  427. QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code);
  428. } else if (IS_FWI2_CAPABLE(ha)) {
  429. WRT_REG_DWORD(&reg->isp24.req_q_in, req->ring_index);
  430. RD_REG_DWORD_RELAXED(&reg->isp24.req_q_in);
  431. } else {
  432. WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp),
  433. req->ring_index);
  434. RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp));
  435. }
  436. }
  437. }
  438. /**
  439. * qla2x00_marker() - Send a marker IOCB to the firmware.
  440. * @ha: HA context
  441. * @loop_id: loop ID
  442. * @lun: LUN
  443. * @type: marker modifier
  444. *
  445. * Can be called from both normal and interrupt context.
  446. *
  447. * Returns non-zero if a failure occurred, else zero.
  448. */
  449. static int
  450. __qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  451. struct rsp_que *rsp, uint16_t loop_id,
  452. uint16_t lun, uint8_t type)
  453. {
  454. mrk_entry_t *mrk;
  455. struct mrk_entry_24xx *mrk24 = NULL;
  456. struct mrk_entry_fx00 *mrkfx = NULL;
  457. struct qla_hw_data *ha = vha->hw;
  458. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  459. req = ha->req_q_map[0];
  460. mrk = (mrk_entry_t *)qla2x00_alloc_iocbs(vha, NULL);
  461. if (mrk == NULL) {
  462. ql_log(ql_log_warn, base_vha, 0x3026,
  463. "Failed to allocate Marker IOCB.\n");
  464. return (QLA_FUNCTION_FAILED);
  465. }
  466. mrk->entry_type = MARKER_TYPE;
  467. mrk->modifier = type;
  468. if (type != MK_SYNC_ALL) {
  469. if (IS_QLAFX00(ha)) {
  470. mrkfx = (struct mrk_entry_fx00 *) mrk;
  471. mrkfx->handle = MAKE_HANDLE(req->id, mrkfx->handle);
  472. mrkfx->handle_hi = 0;
  473. mrkfx->tgt_id = cpu_to_le16(loop_id);
  474. mrkfx->lun[1] = LSB(lun);
  475. mrkfx->lun[2] = MSB(lun);
  476. host_to_fcp_swap(mrkfx->lun, sizeof(mrkfx->lun));
  477. } else if (IS_FWI2_CAPABLE(ha)) {
  478. mrk24 = (struct mrk_entry_24xx *) mrk;
  479. mrk24->nport_handle = cpu_to_le16(loop_id);
  480. mrk24->lun[1] = LSB(lun);
  481. mrk24->lun[2] = MSB(lun);
  482. host_to_fcp_swap(mrk24->lun, sizeof(mrk24->lun));
  483. mrk24->vp_index = vha->vp_idx;
  484. mrk24->handle = MAKE_HANDLE(req->id, mrk24->handle);
  485. } else {
  486. SET_TARGET_ID(ha, mrk->target, loop_id);
  487. mrk->lun = cpu_to_le16(lun);
  488. }
  489. }
  490. wmb();
  491. qla2x00_start_iocbs(vha, req);
  492. return (QLA_SUCCESS);
  493. }
  494. int
  495. qla2x00_marker(struct scsi_qla_host *vha, struct req_que *req,
  496. struct rsp_que *rsp, uint16_t loop_id, uint16_t lun,
  497. uint8_t type)
  498. {
  499. int ret;
  500. unsigned long flags = 0;
  501. spin_lock_irqsave(&vha->hw->hardware_lock, flags);
  502. ret = __qla2x00_marker(vha, req, rsp, loop_id, lun, type);
  503. spin_unlock_irqrestore(&vha->hw->hardware_lock, flags);
  504. return (ret);
  505. }
  506. /*
  507. * qla2x00_issue_marker
  508. *
  509. * Issue marker
  510. * Caller CAN have hardware lock held as specified by ha_locked parameter.
  511. * Might release it, then reaquire.
  512. */
  513. int qla2x00_issue_marker(scsi_qla_host_t *vha, int ha_locked)
  514. {
  515. if (ha_locked) {
  516. if (__qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  517. MK_SYNC_ALL) != QLA_SUCCESS)
  518. return QLA_FUNCTION_FAILED;
  519. } else {
  520. if (qla2x00_marker(vha, vha->req, vha->req->rsp, 0, 0,
  521. MK_SYNC_ALL) != QLA_SUCCESS)
  522. return QLA_FUNCTION_FAILED;
  523. }
  524. vha->marker_needed = 0;
  525. return QLA_SUCCESS;
  526. }
  527. static inline int
  528. qla24xx_build_scsi_type_6_iocbs(srb_t *sp, struct cmd_type_6 *cmd_pkt,
  529. uint16_t tot_dsds)
  530. {
  531. uint32_t *cur_dsd = NULL;
  532. scsi_qla_host_t *vha;
  533. struct qla_hw_data *ha;
  534. struct scsi_cmnd *cmd;
  535. struct scatterlist *cur_seg;
  536. uint32_t *dsd_seg;
  537. void *next_dsd;
  538. uint8_t avail_dsds;
  539. uint8_t first_iocb = 1;
  540. uint32_t dsd_list_len;
  541. struct dsd_dma *dsd_ptr;
  542. struct ct6_dsd *ctx;
  543. cmd = GET_CMD_SP(sp);
  544. /* Update entry type to indicate Command Type 3 IOCB */
  545. *((uint32_t *)(&cmd_pkt->entry_type)) =
  546. __constant_cpu_to_le32(COMMAND_TYPE_6);
  547. /* No data transfer */
  548. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  549. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  550. return 0;
  551. }
  552. vha = sp->fcport->vha;
  553. ha = vha->hw;
  554. /* Set transfer direction */
  555. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  556. cmd_pkt->control_flags =
  557. __constant_cpu_to_le16(CF_WRITE_DATA);
  558. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  559. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  560. cmd_pkt->control_flags =
  561. __constant_cpu_to_le16(CF_READ_DATA);
  562. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  563. }
  564. cur_seg = scsi_sglist(cmd);
  565. ctx = GET_CMD_CTX_SP(sp);
  566. while (tot_dsds) {
  567. avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ?
  568. QLA_DSDS_PER_IOCB : tot_dsds;
  569. tot_dsds -= avail_dsds;
  570. dsd_list_len = (avail_dsds + 1) * QLA_DSD_SIZE;
  571. dsd_ptr = list_first_entry(&ha->gbl_dsd_list,
  572. struct dsd_dma, list);
  573. next_dsd = dsd_ptr->dsd_addr;
  574. list_del(&dsd_ptr->list);
  575. ha->gbl_dsd_avail--;
  576. list_add_tail(&dsd_ptr->list, &ctx->dsd_list);
  577. ctx->dsd_use_cnt++;
  578. ha->gbl_dsd_inuse++;
  579. if (first_iocb) {
  580. first_iocb = 0;
  581. dsd_seg = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  582. *dsd_seg++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  583. *dsd_seg++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  584. cmd_pkt->fcp_data_dseg_len = cpu_to_le32(dsd_list_len);
  585. } else {
  586. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  587. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  588. *cur_dsd++ = cpu_to_le32(dsd_list_len);
  589. }
  590. cur_dsd = (uint32_t *)next_dsd;
  591. while (avail_dsds) {
  592. dma_addr_t sle_dma;
  593. sle_dma = sg_dma_address(cur_seg);
  594. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  595. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  596. *cur_dsd++ = cpu_to_le32(sg_dma_len(cur_seg));
  597. cur_seg = sg_next(cur_seg);
  598. avail_dsds--;
  599. }
  600. }
  601. /* Null termination */
  602. *cur_dsd++ = 0;
  603. *cur_dsd++ = 0;
  604. *cur_dsd++ = 0;
  605. cmd_pkt->control_flags |= CF_DATA_SEG_DESCR_ENABLE;
  606. return 0;
  607. }
  608. /*
  609. * qla24xx_calc_dsd_lists() - Determine number of DSD list required
  610. * for Command Type 6.
  611. *
  612. * @dsds: number of data segment decriptors needed
  613. *
  614. * Returns the number of dsd list needed to store @dsds.
  615. */
  616. inline uint16_t
  617. qla24xx_calc_dsd_lists(uint16_t dsds)
  618. {
  619. uint16_t dsd_lists = 0;
  620. dsd_lists = (dsds/QLA_DSDS_PER_IOCB);
  621. if (dsds % QLA_DSDS_PER_IOCB)
  622. dsd_lists++;
  623. return dsd_lists;
  624. }
  625. /**
  626. * qla24xx_build_scsi_iocbs() - Build IOCB command utilizing Command Type 7
  627. * IOCB types.
  628. *
  629. * @sp: SRB command to process
  630. * @cmd_pkt: Command type 3 IOCB
  631. * @tot_dsds: Total number of segments to transfer
  632. */
  633. inline void
  634. qla24xx_build_scsi_iocbs(srb_t *sp, struct cmd_type_7 *cmd_pkt,
  635. uint16_t tot_dsds)
  636. {
  637. uint16_t avail_dsds;
  638. uint32_t *cur_dsd;
  639. scsi_qla_host_t *vha;
  640. struct scsi_cmnd *cmd;
  641. struct scatterlist *sg;
  642. int i;
  643. struct req_que *req;
  644. cmd = GET_CMD_SP(sp);
  645. /* Update entry type to indicate Command Type 3 IOCB */
  646. *((uint32_t *)(&cmd_pkt->entry_type)) =
  647. __constant_cpu_to_le32(COMMAND_TYPE_7);
  648. /* No data transfer */
  649. if (!scsi_bufflen(cmd) || cmd->sc_data_direction == DMA_NONE) {
  650. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  651. return;
  652. }
  653. vha = sp->fcport->vha;
  654. req = vha->req;
  655. /* Set transfer direction */
  656. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  657. cmd_pkt->task_mgmt_flags =
  658. __constant_cpu_to_le16(TMF_WRITE_DATA);
  659. vha->qla_stats.output_bytes += scsi_bufflen(cmd);
  660. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  661. cmd_pkt->task_mgmt_flags =
  662. __constant_cpu_to_le16(TMF_READ_DATA);
  663. vha->qla_stats.input_bytes += scsi_bufflen(cmd);
  664. }
  665. /* One DSD is available in the Command Type 3 IOCB */
  666. avail_dsds = 1;
  667. cur_dsd = (uint32_t *)&cmd_pkt->dseg_0_address;
  668. /* Load data segments */
  669. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  670. dma_addr_t sle_dma;
  671. cont_a64_entry_t *cont_pkt;
  672. /* Allocate additional continuation packets? */
  673. if (avail_dsds == 0) {
  674. /*
  675. * Five DSDs are available in the Continuation
  676. * Type 1 IOCB.
  677. */
  678. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  679. cur_dsd = (uint32_t *)cont_pkt->dseg_0_address;
  680. avail_dsds = 5;
  681. }
  682. sle_dma = sg_dma_address(sg);
  683. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  684. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  685. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  686. avail_dsds--;
  687. }
  688. }
  689. struct fw_dif_context {
  690. uint32_t ref_tag;
  691. uint16_t app_tag;
  692. uint8_t ref_tag_mask[4]; /* Validation/Replacement Mask*/
  693. uint8_t app_tag_mask[2]; /* Validation/Replacement Mask*/
  694. };
  695. /*
  696. * qla24xx_set_t10dif_tags_from_cmd - Extract Ref and App tags from SCSI command
  697. *
  698. */
  699. static inline void
  700. qla24xx_set_t10dif_tags(srb_t *sp, struct fw_dif_context *pkt,
  701. unsigned int protcnt)
  702. {
  703. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  704. switch (scsi_get_prot_type(cmd)) {
  705. case SCSI_PROT_DIF_TYPE0:
  706. /*
  707. * No check for ql2xenablehba_err_chk, as it would be an
  708. * I/O error if hba tag generation is not done.
  709. */
  710. pkt->ref_tag = cpu_to_le32((uint32_t)
  711. (0xffffffff & scsi_get_lba(cmd)));
  712. if (!qla2x00_hba_err_chk_enabled(sp))
  713. break;
  714. pkt->ref_tag_mask[0] = 0xff;
  715. pkt->ref_tag_mask[1] = 0xff;
  716. pkt->ref_tag_mask[2] = 0xff;
  717. pkt->ref_tag_mask[3] = 0xff;
  718. break;
  719. /*
  720. * For TYPE 2 protection: 16 bit GUARD + 32 bit REF tag has to
  721. * match LBA in CDB + N
  722. */
  723. case SCSI_PROT_DIF_TYPE2:
  724. pkt->app_tag = __constant_cpu_to_le16(0);
  725. pkt->app_tag_mask[0] = 0x0;
  726. pkt->app_tag_mask[1] = 0x0;
  727. pkt->ref_tag = cpu_to_le32((uint32_t)
  728. (0xffffffff & scsi_get_lba(cmd)));
  729. if (!qla2x00_hba_err_chk_enabled(sp))
  730. break;
  731. /* enable ALL bytes of the ref tag */
  732. pkt->ref_tag_mask[0] = 0xff;
  733. pkt->ref_tag_mask[1] = 0xff;
  734. pkt->ref_tag_mask[2] = 0xff;
  735. pkt->ref_tag_mask[3] = 0xff;
  736. break;
  737. /* For Type 3 protection: 16 bit GUARD only */
  738. case SCSI_PROT_DIF_TYPE3:
  739. pkt->ref_tag_mask[0] = pkt->ref_tag_mask[1] =
  740. pkt->ref_tag_mask[2] = pkt->ref_tag_mask[3] =
  741. 0x00;
  742. break;
  743. /*
  744. * For TYpe 1 protection: 16 bit GUARD tag, 32 bit REF tag, and
  745. * 16 bit app tag.
  746. */
  747. case SCSI_PROT_DIF_TYPE1:
  748. pkt->ref_tag = cpu_to_le32((uint32_t)
  749. (0xffffffff & scsi_get_lba(cmd)));
  750. pkt->app_tag = __constant_cpu_to_le16(0);
  751. pkt->app_tag_mask[0] = 0x0;
  752. pkt->app_tag_mask[1] = 0x0;
  753. if (!qla2x00_hba_err_chk_enabled(sp))
  754. break;
  755. /* enable ALL bytes of the ref tag */
  756. pkt->ref_tag_mask[0] = 0xff;
  757. pkt->ref_tag_mask[1] = 0xff;
  758. pkt->ref_tag_mask[2] = 0xff;
  759. pkt->ref_tag_mask[3] = 0xff;
  760. break;
  761. }
  762. }
  763. struct qla2_sgx {
  764. dma_addr_t dma_addr; /* OUT */
  765. uint32_t dma_len; /* OUT */
  766. uint32_t tot_bytes; /* IN */
  767. struct scatterlist *cur_sg; /* IN */
  768. /* for book keeping, bzero on initial invocation */
  769. uint32_t bytes_consumed;
  770. uint32_t num_bytes;
  771. uint32_t tot_partial;
  772. /* for debugging */
  773. uint32_t num_sg;
  774. srb_t *sp;
  775. };
  776. static int
  777. qla24xx_get_one_block_sg(uint32_t blk_sz, struct qla2_sgx *sgx,
  778. uint32_t *partial)
  779. {
  780. struct scatterlist *sg;
  781. uint32_t cumulative_partial, sg_len;
  782. dma_addr_t sg_dma_addr;
  783. if (sgx->num_bytes == sgx->tot_bytes)
  784. return 0;
  785. sg = sgx->cur_sg;
  786. cumulative_partial = sgx->tot_partial;
  787. sg_dma_addr = sg_dma_address(sg);
  788. sg_len = sg_dma_len(sg);
  789. sgx->dma_addr = sg_dma_addr + sgx->bytes_consumed;
  790. if ((cumulative_partial + (sg_len - sgx->bytes_consumed)) >= blk_sz) {
  791. sgx->dma_len = (blk_sz - cumulative_partial);
  792. sgx->tot_partial = 0;
  793. sgx->num_bytes += blk_sz;
  794. *partial = 0;
  795. } else {
  796. sgx->dma_len = sg_len - sgx->bytes_consumed;
  797. sgx->tot_partial += sgx->dma_len;
  798. *partial = 1;
  799. }
  800. sgx->bytes_consumed += sgx->dma_len;
  801. if (sg_len == sgx->bytes_consumed) {
  802. sg = sg_next(sg);
  803. sgx->num_sg++;
  804. sgx->cur_sg = sg;
  805. sgx->bytes_consumed = 0;
  806. }
  807. return 1;
  808. }
  809. static int
  810. qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp,
  811. uint32_t *dsd, uint16_t tot_dsds)
  812. {
  813. void *next_dsd;
  814. uint8_t avail_dsds = 0;
  815. uint32_t dsd_list_len;
  816. struct dsd_dma *dsd_ptr;
  817. struct scatterlist *sg_prot;
  818. uint32_t *cur_dsd = dsd;
  819. uint16_t used_dsds = tot_dsds;
  820. uint32_t prot_int;
  821. uint32_t partial;
  822. struct qla2_sgx sgx;
  823. dma_addr_t sle_dma;
  824. uint32_t sle_dma_len, tot_prot_dma_len = 0;
  825. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  826. prot_int = cmd->device->sector_size;
  827. memset(&sgx, 0, sizeof(struct qla2_sgx));
  828. sgx.tot_bytes = scsi_bufflen(cmd);
  829. sgx.cur_sg = scsi_sglist(cmd);
  830. sgx.sp = sp;
  831. sg_prot = scsi_prot_sglist(cmd);
  832. while (qla24xx_get_one_block_sg(prot_int, &sgx, &partial)) {
  833. sle_dma = sgx.dma_addr;
  834. sle_dma_len = sgx.dma_len;
  835. alloc_and_fill:
  836. /* Allocate additional continuation packets? */
  837. if (avail_dsds == 0) {
  838. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  839. QLA_DSDS_PER_IOCB : used_dsds;
  840. dsd_list_len = (avail_dsds + 1) * 12;
  841. used_dsds -= avail_dsds;
  842. /* allocate tracking DS */
  843. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  844. if (!dsd_ptr)
  845. return 1;
  846. /* allocate new list */
  847. dsd_ptr->dsd_addr = next_dsd =
  848. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  849. &dsd_ptr->dsd_list_dma);
  850. if (!next_dsd) {
  851. /*
  852. * Need to cleanup only this dsd_ptr, rest
  853. * will be done by sp_free_dma()
  854. */
  855. kfree(dsd_ptr);
  856. return 1;
  857. }
  858. list_add_tail(&dsd_ptr->list,
  859. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  860. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  861. /* add new list to cmd iocb or last list */
  862. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  863. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  864. *cur_dsd++ = dsd_list_len;
  865. cur_dsd = (uint32_t *)next_dsd;
  866. }
  867. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  868. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  869. *cur_dsd++ = cpu_to_le32(sle_dma_len);
  870. avail_dsds--;
  871. if (partial == 0) {
  872. /* Got a full protection interval */
  873. sle_dma = sg_dma_address(sg_prot) + tot_prot_dma_len;
  874. sle_dma_len = 8;
  875. tot_prot_dma_len += sle_dma_len;
  876. if (tot_prot_dma_len == sg_dma_len(sg_prot)) {
  877. tot_prot_dma_len = 0;
  878. sg_prot = sg_next(sg_prot);
  879. }
  880. partial = 1; /* So as to not re-enter this block */
  881. goto alloc_and_fill;
  882. }
  883. }
  884. /* Null termination */
  885. *cur_dsd++ = 0;
  886. *cur_dsd++ = 0;
  887. *cur_dsd++ = 0;
  888. return 0;
  889. }
  890. static int
  891. qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd,
  892. uint16_t tot_dsds)
  893. {
  894. void *next_dsd;
  895. uint8_t avail_dsds = 0;
  896. uint32_t dsd_list_len;
  897. struct dsd_dma *dsd_ptr;
  898. struct scatterlist *sg;
  899. uint32_t *cur_dsd = dsd;
  900. int i;
  901. uint16_t used_dsds = tot_dsds;
  902. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  903. scsi_for_each_sg(cmd, sg, tot_dsds, i) {
  904. dma_addr_t sle_dma;
  905. /* Allocate additional continuation packets? */
  906. if (avail_dsds == 0) {
  907. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  908. QLA_DSDS_PER_IOCB : used_dsds;
  909. dsd_list_len = (avail_dsds + 1) * 12;
  910. used_dsds -= avail_dsds;
  911. /* allocate tracking DS */
  912. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  913. if (!dsd_ptr)
  914. return 1;
  915. /* allocate new list */
  916. dsd_ptr->dsd_addr = next_dsd =
  917. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  918. &dsd_ptr->dsd_list_dma);
  919. if (!next_dsd) {
  920. /*
  921. * Need to cleanup only this dsd_ptr, rest
  922. * will be done by sp_free_dma()
  923. */
  924. kfree(dsd_ptr);
  925. return 1;
  926. }
  927. list_add_tail(&dsd_ptr->list,
  928. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  929. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  930. /* add new list to cmd iocb or last list */
  931. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  932. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  933. *cur_dsd++ = dsd_list_len;
  934. cur_dsd = (uint32_t *)next_dsd;
  935. }
  936. sle_dma = sg_dma_address(sg);
  937. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  938. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  939. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  940. avail_dsds--;
  941. }
  942. /* Null termination */
  943. *cur_dsd++ = 0;
  944. *cur_dsd++ = 0;
  945. *cur_dsd++ = 0;
  946. return 0;
  947. }
  948. static int
  949. qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp,
  950. uint32_t *dsd,
  951. uint16_t tot_dsds)
  952. {
  953. void *next_dsd;
  954. uint8_t avail_dsds = 0;
  955. uint32_t dsd_list_len;
  956. struct dsd_dma *dsd_ptr;
  957. struct scatterlist *sg;
  958. int i;
  959. struct scsi_cmnd *cmd;
  960. uint32_t *cur_dsd = dsd;
  961. uint16_t used_dsds = tot_dsds;
  962. cmd = GET_CMD_SP(sp);
  963. scsi_for_each_prot_sg(cmd, sg, tot_dsds, i) {
  964. dma_addr_t sle_dma;
  965. /* Allocate additional continuation packets? */
  966. if (avail_dsds == 0) {
  967. avail_dsds = (used_dsds > QLA_DSDS_PER_IOCB) ?
  968. QLA_DSDS_PER_IOCB : used_dsds;
  969. dsd_list_len = (avail_dsds + 1) * 12;
  970. used_dsds -= avail_dsds;
  971. /* allocate tracking DS */
  972. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  973. if (!dsd_ptr)
  974. return 1;
  975. /* allocate new list */
  976. dsd_ptr->dsd_addr = next_dsd =
  977. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC,
  978. &dsd_ptr->dsd_list_dma);
  979. if (!next_dsd) {
  980. /*
  981. * Need to cleanup only this dsd_ptr, rest
  982. * will be done by sp_free_dma()
  983. */
  984. kfree(dsd_ptr);
  985. return 1;
  986. }
  987. list_add_tail(&dsd_ptr->list,
  988. &((struct crc_context *)sp->u.scmd.ctx)->dsd_list);
  989. sp->flags |= SRB_CRC_CTX_DSD_VALID;
  990. /* add new list to cmd iocb or last list */
  991. *cur_dsd++ = cpu_to_le32(LSD(dsd_ptr->dsd_list_dma));
  992. *cur_dsd++ = cpu_to_le32(MSD(dsd_ptr->dsd_list_dma));
  993. *cur_dsd++ = dsd_list_len;
  994. cur_dsd = (uint32_t *)next_dsd;
  995. }
  996. sle_dma = sg_dma_address(sg);
  997. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  998. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  999. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1000. avail_dsds--;
  1001. }
  1002. /* Null termination */
  1003. *cur_dsd++ = 0;
  1004. *cur_dsd++ = 0;
  1005. *cur_dsd++ = 0;
  1006. return 0;
  1007. }
  1008. /**
  1009. * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command
  1010. * Type 6 IOCB types.
  1011. *
  1012. * @sp: SRB command to process
  1013. * @cmd_pkt: Command type 3 IOCB
  1014. * @tot_dsds: Total number of segments to transfer
  1015. */
  1016. static inline int
  1017. qla24xx_build_scsi_crc_2_iocbs(srb_t *sp, struct cmd_type_crc_2 *cmd_pkt,
  1018. uint16_t tot_dsds, uint16_t tot_prot_dsds, uint16_t fw_prot_opts)
  1019. {
  1020. uint32_t *cur_dsd, *fcp_dl;
  1021. scsi_qla_host_t *vha;
  1022. struct scsi_cmnd *cmd;
  1023. int sgc;
  1024. uint32_t total_bytes = 0;
  1025. uint32_t data_bytes;
  1026. uint32_t dif_bytes;
  1027. uint8_t bundling = 1;
  1028. uint16_t blk_size;
  1029. uint8_t *clr_ptr;
  1030. struct crc_context *crc_ctx_pkt = NULL;
  1031. struct qla_hw_data *ha;
  1032. uint8_t additional_fcpcdb_len;
  1033. uint16_t fcp_cmnd_len;
  1034. struct fcp_cmnd *fcp_cmnd;
  1035. dma_addr_t crc_ctx_dma;
  1036. char tag[2];
  1037. cmd = GET_CMD_SP(sp);
  1038. sgc = 0;
  1039. /* Update entry type to indicate Command Type CRC_2 IOCB */
  1040. *((uint32_t *)(&cmd_pkt->entry_type)) =
  1041. __constant_cpu_to_le32(COMMAND_TYPE_CRC_2);
  1042. vha = sp->fcport->vha;
  1043. ha = vha->hw;
  1044. /* No data transfer */
  1045. data_bytes = scsi_bufflen(cmd);
  1046. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1047. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1048. return QLA_SUCCESS;
  1049. }
  1050. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1051. /* Set transfer direction */
  1052. if (cmd->sc_data_direction == DMA_TO_DEVICE) {
  1053. cmd_pkt->control_flags =
  1054. __constant_cpu_to_le16(CF_WRITE_DATA);
  1055. } else if (cmd->sc_data_direction == DMA_FROM_DEVICE) {
  1056. cmd_pkt->control_flags =
  1057. __constant_cpu_to_le16(CF_READ_DATA);
  1058. }
  1059. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1060. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP) ||
  1061. (scsi_get_prot_op(cmd) == SCSI_PROT_READ_STRIP) ||
  1062. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_INSERT))
  1063. bundling = 0;
  1064. /* Allocate CRC context from global pool */
  1065. crc_ctx_pkt = sp->u.scmd.ctx =
  1066. dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma);
  1067. if (!crc_ctx_pkt)
  1068. goto crc_queuing_error;
  1069. /* Zero out CTX area. */
  1070. clr_ptr = (uint8_t *)crc_ctx_pkt;
  1071. memset(clr_ptr, 0, sizeof(*crc_ctx_pkt));
  1072. crc_ctx_pkt->crc_ctx_dma = crc_ctx_dma;
  1073. sp->flags |= SRB_CRC_CTX_DMA_VALID;
  1074. /* Set handle */
  1075. crc_ctx_pkt->handle = cmd_pkt->handle;
  1076. INIT_LIST_HEAD(&crc_ctx_pkt->dsd_list);
  1077. qla24xx_set_t10dif_tags(sp, (struct fw_dif_context *)
  1078. &crc_ctx_pkt->ref_tag, tot_prot_dsds);
  1079. cmd_pkt->crc_context_address[0] = cpu_to_le32(LSD(crc_ctx_dma));
  1080. cmd_pkt->crc_context_address[1] = cpu_to_le32(MSD(crc_ctx_dma));
  1081. cmd_pkt->crc_context_len = CRC_CONTEXT_LEN_FW;
  1082. /* Determine SCSI command length -- align to 4 byte boundary */
  1083. if (cmd->cmd_len > 16) {
  1084. additional_fcpcdb_len = cmd->cmd_len - 16;
  1085. if ((cmd->cmd_len % 4) != 0) {
  1086. /* SCSI cmd > 16 bytes must be multiple of 4 */
  1087. goto crc_queuing_error;
  1088. }
  1089. fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  1090. } else {
  1091. additional_fcpcdb_len = 0;
  1092. fcp_cmnd_len = 12 + 16 + 4;
  1093. }
  1094. fcp_cmnd = &crc_ctx_pkt->fcp_cmnd;
  1095. fcp_cmnd->additional_cdb_len = additional_fcpcdb_len;
  1096. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  1097. fcp_cmnd->additional_cdb_len |= 1;
  1098. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  1099. fcp_cmnd->additional_cdb_len |= 2;
  1100. int_to_scsilun(cmd->device->lun, &fcp_cmnd->lun);
  1101. memcpy(fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  1102. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(fcp_cmnd_len);
  1103. cmd_pkt->fcp_cmnd_dseg_address[0] = cpu_to_le32(
  1104. LSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1105. cmd_pkt->fcp_cmnd_dseg_address[1] = cpu_to_le32(
  1106. MSD(crc_ctx_dma + CRC_CONTEXT_FCPCMND_OFF));
  1107. fcp_cmnd->task_management = 0;
  1108. /*
  1109. * Update tagged queuing modifier if using command tag queuing
  1110. */
  1111. if (scsi_populate_tag_msg(cmd, tag)) {
  1112. switch (tag[0]) {
  1113. case HEAD_OF_QUEUE_TAG:
  1114. fcp_cmnd->task_attribute = TSK_HEAD_OF_QUEUE;
  1115. break;
  1116. case ORDERED_QUEUE_TAG:
  1117. fcp_cmnd->task_attribute = TSK_ORDERED;
  1118. break;
  1119. default:
  1120. fcp_cmnd->task_attribute = 0;
  1121. break;
  1122. }
  1123. } else {
  1124. fcp_cmnd->task_attribute = 0;
  1125. }
  1126. cmd_pkt->fcp_rsp_dseg_len = 0; /* Let response come in status iocb */
  1127. /* Compute dif len and adjust data len to incude protection */
  1128. dif_bytes = 0;
  1129. blk_size = cmd->device->sector_size;
  1130. dif_bytes = (data_bytes / blk_size) * 8;
  1131. switch (scsi_get_prot_op(GET_CMD_SP(sp))) {
  1132. case SCSI_PROT_READ_INSERT:
  1133. case SCSI_PROT_WRITE_STRIP:
  1134. total_bytes = data_bytes;
  1135. data_bytes += dif_bytes;
  1136. break;
  1137. case SCSI_PROT_READ_STRIP:
  1138. case SCSI_PROT_WRITE_INSERT:
  1139. case SCSI_PROT_READ_PASS:
  1140. case SCSI_PROT_WRITE_PASS:
  1141. total_bytes = data_bytes + dif_bytes;
  1142. break;
  1143. default:
  1144. BUG();
  1145. }
  1146. if (!qla2x00_hba_err_chk_enabled(sp))
  1147. fw_prot_opts |= 0x10; /* Disable Guard tag checking */
  1148. /* HBA error checking enabled */
  1149. else if (IS_PI_UNINIT_CAPABLE(ha)) {
  1150. if ((scsi_get_prot_type(GET_CMD_SP(sp)) == SCSI_PROT_DIF_TYPE1)
  1151. || (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1152. SCSI_PROT_DIF_TYPE2))
  1153. fw_prot_opts |= BIT_10;
  1154. else if (scsi_get_prot_type(GET_CMD_SP(sp)) ==
  1155. SCSI_PROT_DIF_TYPE3)
  1156. fw_prot_opts |= BIT_11;
  1157. }
  1158. if (!bundling) {
  1159. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.nobundling.data_address;
  1160. } else {
  1161. /*
  1162. * Configure Bundling if we need to fetch interlaving
  1163. * protection PCI accesses
  1164. */
  1165. fw_prot_opts |= PO_ENABLE_DIF_BUNDLING;
  1166. crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes);
  1167. crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds -
  1168. tot_prot_dsds);
  1169. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.data_address;
  1170. }
  1171. /* Finish the common fields of CRC pkt */
  1172. crc_ctx_pkt->blk_size = cpu_to_le16(blk_size);
  1173. crc_ctx_pkt->prot_opts = cpu_to_le16(fw_prot_opts);
  1174. crc_ctx_pkt->byte_count = cpu_to_le32(data_bytes);
  1175. crc_ctx_pkt->guard_seed = __constant_cpu_to_le16(0);
  1176. /* Fibre channel byte count */
  1177. cmd_pkt->byte_count = cpu_to_le32(total_bytes);
  1178. fcp_dl = (uint32_t *)(crc_ctx_pkt->fcp_cmnd.cdb + 16 +
  1179. additional_fcpcdb_len);
  1180. *fcp_dl = htonl(total_bytes);
  1181. if (!data_bytes || cmd->sc_data_direction == DMA_NONE) {
  1182. cmd_pkt->byte_count = __constant_cpu_to_le32(0);
  1183. return QLA_SUCCESS;
  1184. }
  1185. /* Walks data segments */
  1186. cmd_pkt->control_flags |=
  1187. __constant_cpu_to_le16(CF_DATA_SEG_DESCR_ENABLE);
  1188. if (!bundling && tot_prot_dsds) {
  1189. if (qla24xx_walk_and_build_sglist_no_difb(ha, sp,
  1190. cur_dsd, tot_dsds))
  1191. goto crc_queuing_error;
  1192. } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd,
  1193. (tot_dsds - tot_prot_dsds)))
  1194. goto crc_queuing_error;
  1195. if (bundling && tot_prot_dsds) {
  1196. /* Walks dif segments */
  1197. cmd_pkt->control_flags |=
  1198. __constant_cpu_to_le16(CF_DIF_SEG_DESCR_ENABLE);
  1199. cur_dsd = (uint32_t *) &crc_ctx_pkt->u.bundling.dif_address;
  1200. if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd,
  1201. tot_prot_dsds))
  1202. goto crc_queuing_error;
  1203. }
  1204. return QLA_SUCCESS;
  1205. crc_queuing_error:
  1206. /* Cleanup will be performed by the caller */
  1207. return QLA_FUNCTION_FAILED;
  1208. }
  1209. /**
  1210. * qla24xx_start_scsi() - Send a SCSI command to the ISP
  1211. * @sp: command to send to the ISP
  1212. *
  1213. * Returns non-zero if a failure occurred, else zero.
  1214. */
  1215. int
  1216. qla24xx_start_scsi(srb_t *sp)
  1217. {
  1218. int ret, nseg;
  1219. unsigned long flags;
  1220. uint32_t *clr_ptr;
  1221. uint32_t index;
  1222. uint32_t handle;
  1223. struct cmd_type_7 *cmd_pkt;
  1224. uint16_t cnt;
  1225. uint16_t req_cnt;
  1226. uint16_t tot_dsds;
  1227. struct req_que *req = NULL;
  1228. struct rsp_que *rsp = NULL;
  1229. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1230. struct scsi_qla_host *vha = sp->fcport->vha;
  1231. struct qla_hw_data *ha = vha->hw;
  1232. char tag[2];
  1233. /* Setup device pointers. */
  1234. ret = 0;
  1235. qla25xx_set_que(sp, &rsp);
  1236. req = vha->req;
  1237. /* So we know we haven't pci_map'ed anything yet */
  1238. tot_dsds = 0;
  1239. /* Send marker if required */
  1240. if (vha->marker_needed != 0) {
  1241. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1242. QLA_SUCCESS)
  1243. return QLA_FUNCTION_FAILED;
  1244. vha->marker_needed = 0;
  1245. }
  1246. /* Acquire ring specific lock */
  1247. spin_lock_irqsave(&ha->hardware_lock, flags);
  1248. /* Check for room in outstanding command list. */
  1249. handle = req->current_outstanding_cmd;
  1250. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1251. handle++;
  1252. if (handle == req->num_outstanding_cmds)
  1253. handle = 1;
  1254. if (!req->outstanding_cmds[handle])
  1255. break;
  1256. }
  1257. if (index == req->num_outstanding_cmds)
  1258. goto queuing_error;
  1259. /* Map the sg table so we have an accurate count of sg entries needed */
  1260. if (scsi_sg_count(cmd)) {
  1261. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1262. scsi_sg_count(cmd), cmd->sc_data_direction);
  1263. if (unlikely(!nseg))
  1264. goto queuing_error;
  1265. } else
  1266. nseg = 0;
  1267. tot_dsds = nseg;
  1268. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  1269. if (req->cnt < (req_cnt + 2)) {
  1270. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  1271. if (req->ring_index < cnt)
  1272. req->cnt = cnt - req->ring_index;
  1273. else
  1274. req->cnt = req->length -
  1275. (req->ring_index - cnt);
  1276. if (req->cnt < (req_cnt + 2))
  1277. goto queuing_error;
  1278. }
  1279. /* Build command packet. */
  1280. req->current_outstanding_cmd = handle;
  1281. req->outstanding_cmds[handle] = sp;
  1282. sp->handle = handle;
  1283. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1284. req->cnt -= req_cnt;
  1285. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  1286. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1287. /* Zero out remaining portion of packet. */
  1288. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1289. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1290. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1291. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1292. /* Set NPORT-ID and LUN number*/
  1293. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1294. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1295. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1296. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1297. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  1298. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1299. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1300. /* Update tagged queuing modifier -- default is TSK_SIMPLE (0). */
  1301. if (scsi_populate_tag_msg(cmd, tag)) {
  1302. switch (tag[0]) {
  1303. case HEAD_OF_QUEUE_TAG:
  1304. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  1305. break;
  1306. case ORDERED_QUEUE_TAG:
  1307. cmd_pkt->task = TSK_ORDERED;
  1308. break;
  1309. }
  1310. }
  1311. /* Load SCSI command packet. */
  1312. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  1313. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  1314. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  1315. /* Build IOCB segments */
  1316. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  1317. /* Set total data segment count. */
  1318. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1319. /* Specify response queue number where completion should happen */
  1320. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1321. wmb();
  1322. /* Adjust ring index. */
  1323. req->ring_index++;
  1324. if (req->ring_index == req->length) {
  1325. req->ring_index = 0;
  1326. req->ring_ptr = req->ring;
  1327. } else
  1328. req->ring_ptr++;
  1329. sp->flags |= SRB_DMA_VALID;
  1330. /* Set chip new ring index. */
  1331. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1332. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1333. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1334. if (vha->flags.process_response_queue &&
  1335. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1336. qla24xx_process_response_queue(vha, rsp);
  1337. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1338. return QLA_SUCCESS;
  1339. queuing_error:
  1340. if (tot_dsds)
  1341. scsi_dma_unmap(cmd);
  1342. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1343. return QLA_FUNCTION_FAILED;
  1344. }
  1345. /**
  1346. * qla24xx_dif_start_scsi() - Send a SCSI command to the ISP
  1347. * @sp: command to send to the ISP
  1348. *
  1349. * Returns non-zero if a failure occurred, else zero.
  1350. */
  1351. int
  1352. qla24xx_dif_start_scsi(srb_t *sp)
  1353. {
  1354. int nseg;
  1355. unsigned long flags;
  1356. uint32_t *clr_ptr;
  1357. uint32_t index;
  1358. uint32_t handle;
  1359. uint16_t cnt;
  1360. uint16_t req_cnt = 0;
  1361. uint16_t tot_dsds;
  1362. uint16_t tot_prot_dsds;
  1363. uint16_t fw_prot_opts = 0;
  1364. struct req_que *req = NULL;
  1365. struct rsp_que *rsp = NULL;
  1366. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1367. struct scsi_qla_host *vha = sp->fcport->vha;
  1368. struct qla_hw_data *ha = vha->hw;
  1369. struct cmd_type_crc_2 *cmd_pkt;
  1370. uint32_t status = 0;
  1371. #define QDSS_GOT_Q_SPACE BIT_0
  1372. /* Only process protection or >16 cdb in this routine */
  1373. if (scsi_get_prot_op(cmd) == SCSI_PROT_NORMAL) {
  1374. if (cmd->cmd_len <= 16)
  1375. return qla24xx_start_scsi(sp);
  1376. }
  1377. /* Setup device pointers. */
  1378. qla25xx_set_que(sp, &rsp);
  1379. req = vha->req;
  1380. /* So we know we haven't pci_map'ed anything yet */
  1381. tot_dsds = 0;
  1382. /* Send marker if required */
  1383. if (vha->marker_needed != 0) {
  1384. if (qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL) !=
  1385. QLA_SUCCESS)
  1386. return QLA_FUNCTION_FAILED;
  1387. vha->marker_needed = 0;
  1388. }
  1389. /* Acquire ring specific lock */
  1390. spin_lock_irqsave(&ha->hardware_lock, flags);
  1391. /* Check for room in outstanding command list. */
  1392. handle = req->current_outstanding_cmd;
  1393. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1394. handle++;
  1395. if (handle == req->num_outstanding_cmds)
  1396. handle = 1;
  1397. if (!req->outstanding_cmds[handle])
  1398. break;
  1399. }
  1400. if (index == req->num_outstanding_cmds)
  1401. goto queuing_error;
  1402. /* Compute number of required data segments */
  1403. /* Map the sg table so we have an accurate count of sg entries needed */
  1404. if (scsi_sg_count(cmd)) {
  1405. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1406. scsi_sg_count(cmd), cmd->sc_data_direction);
  1407. if (unlikely(!nseg))
  1408. goto queuing_error;
  1409. else
  1410. sp->flags |= SRB_DMA_VALID;
  1411. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1412. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1413. struct qla2_sgx sgx;
  1414. uint32_t partial;
  1415. memset(&sgx, 0, sizeof(struct qla2_sgx));
  1416. sgx.tot_bytes = scsi_bufflen(cmd);
  1417. sgx.cur_sg = scsi_sglist(cmd);
  1418. sgx.sp = sp;
  1419. nseg = 0;
  1420. while (qla24xx_get_one_block_sg(
  1421. cmd->device->sector_size, &sgx, &partial))
  1422. nseg++;
  1423. }
  1424. } else
  1425. nseg = 0;
  1426. /* number of required data segments */
  1427. tot_dsds = nseg;
  1428. /* Compute number of required protection segments */
  1429. if (qla24xx_configure_prot_mode(sp, &fw_prot_opts)) {
  1430. nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  1431. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  1432. if (unlikely(!nseg))
  1433. goto queuing_error;
  1434. else
  1435. sp->flags |= SRB_CRC_PROT_DMA_VALID;
  1436. if ((scsi_get_prot_op(cmd) == SCSI_PROT_READ_INSERT) ||
  1437. (scsi_get_prot_op(cmd) == SCSI_PROT_WRITE_STRIP)) {
  1438. nseg = scsi_bufflen(cmd) / cmd->device->sector_size;
  1439. }
  1440. } else {
  1441. nseg = 0;
  1442. }
  1443. req_cnt = 1;
  1444. /* Total Data and protection sg segment(s) */
  1445. tot_prot_dsds = nseg;
  1446. tot_dsds += nseg;
  1447. if (req->cnt < (req_cnt + 2)) {
  1448. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  1449. if (req->ring_index < cnt)
  1450. req->cnt = cnt - req->ring_index;
  1451. else
  1452. req->cnt = req->length -
  1453. (req->ring_index - cnt);
  1454. if (req->cnt < (req_cnt + 2))
  1455. goto queuing_error;
  1456. }
  1457. status |= QDSS_GOT_Q_SPACE;
  1458. /* Build header part of command packet (excluding the OPCODE). */
  1459. req->current_outstanding_cmd = handle;
  1460. req->outstanding_cmds[handle] = sp;
  1461. sp->handle = handle;
  1462. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  1463. req->cnt -= req_cnt;
  1464. /* Fill-in common area */
  1465. cmd_pkt = (struct cmd_type_crc_2 *)req->ring_ptr;
  1466. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  1467. clr_ptr = (uint32_t *)cmd_pkt + 2;
  1468. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  1469. /* Set NPORT-ID and LUN number*/
  1470. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1471. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  1472. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  1473. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  1474. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  1475. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  1476. /* Total Data and protection segment(s) */
  1477. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  1478. /* Build IOCB segments and adjust for data protection segments */
  1479. if (qla24xx_build_scsi_crc_2_iocbs(sp, (struct cmd_type_crc_2 *)
  1480. req->ring_ptr, tot_dsds, tot_prot_dsds, fw_prot_opts) !=
  1481. QLA_SUCCESS)
  1482. goto queuing_error;
  1483. cmd_pkt->entry_count = (uint8_t)req_cnt;
  1484. /* Specify response queue number where completion should happen */
  1485. cmd_pkt->entry_status = (uint8_t) rsp->id;
  1486. cmd_pkt->timeout = __constant_cpu_to_le16(0);
  1487. wmb();
  1488. /* Adjust ring index. */
  1489. req->ring_index++;
  1490. if (req->ring_index == req->length) {
  1491. req->ring_index = 0;
  1492. req->ring_ptr = req->ring;
  1493. } else
  1494. req->ring_ptr++;
  1495. /* Set chip new ring index. */
  1496. WRT_REG_DWORD(req->req_q_in, req->ring_index);
  1497. RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr);
  1498. /* Manage unprocessed RIO/ZIO commands in response queue. */
  1499. if (vha->flags.process_response_queue &&
  1500. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  1501. qla24xx_process_response_queue(vha, rsp);
  1502. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1503. return QLA_SUCCESS;
  1504. queuing_error:
  1505. if (status & QDSS_GOT_Q_SPACE) {
  1506. req->outstanding_cmds[handle] = NULL;
  1507. req->cnt += req_cnt;
  1508. }
  1509. /* Cleanup will be performed by the caller (queuecommand) */
  1510. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1511. return QLA_FUNCTION_FAILED;
  1512. }
  1513. static void qla25xx_set_que(srb_t *sp, struct rsp_que **rsp)
  1514. {
  1515. struct scsi_cmnd *cmd = GET_CMD_SP(sp);
  1516. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1517. int affinity = cmd->request->cpu;
  1518. if (ha->flags.cpu_affinity_enabled && affinity >= 0 &&
  1519. affinity < ha->max_rsp_queues - 1)
  1520. *rsp = ha->rsp_q_map[affinity + 1];
  1521. else
  1522. *rsp = ha->rsp_q_map[0];
  1523. }
  1524. /* Generic Control-SRB manipulation functions. */
  1525. void *
  1526. qla2x00_alloc_iocbs(scsi_qla_host_t *vha, srb_t *sp)
  1527. {
  1528. struct qla_hw_data *ha = vha->hw;
  1529. struct req_que *req = ha->req_q_map[0];
  1530. device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id);
  1531. uint32_t index, handle;
  1532. request_t *pkt;
  1533. uint16_t cnt, req_cnt;
  1534. pkt = NULL;
  1535. req_cnt = 1;
  1536. handle = 0;
  1537. if (!sp)
  1538. goto skip_cmd_array;
  1539. /* Check for room in outstanding command list. */
  1540. handle = req->current_outstanding_cmd;
  1541. for (index = 1; req->num_outstanding_cmds; index++) {
  1542. handle++;
  1543. if (handle == req->num_outstanding_cmds)
  1544. handle = 1;
  1545. if (!req->outstanding_cmds[handle])
  1546. break;
  1547. }
  1548. if (index == req->num_outstanding_cmds) {
  1549. ql_log(ql_log_warn, vha, 0x700b,
  1550. "No room on outstanding cmd array.\n");
  1551. goto queuing_error;
  1552. }
  1553. /* Prep command array. */
  1554. req->current_outstanding_cmd = handle;
  1555. req->outstanding_cmds[handle] = sp;
  1556. sp->handle = handle;
  1557. /* Adjust entry-counts as needed. */
  1558. if (sp->type != SRB_SCSI_CMD)
  1559. req_cnt = sp->iocbs;
  1560. skip_cmd_array:
  1561. /* Check for room on request queue. */
  1562. if (req->cnt < req_cnt) {
  1563. if (ha->mqenable || IS_QLA83XX(ha))
  1564. cnt = RD_REG_DWORD(&reg->isp25mq.req_q_out);
  1565. else if (IS_QLA82XX(ha))
  1566. cnt = RD_REG_DWORD(&reg->isp82.req_q_out);
  1567. else if (IS_FWI2_CAPABLE(ha))
  1568. cnt = RD_REG_DWORD(&reg->isp24.req_q_out);
  1569. else if (IS_QLAFX00(ha))
  1570. cnt = RD_REG_DWORD(&reg->ispfx00.req_q_out);
  1571. else
  1572. cnt = qla2x00_debounce_register(
  1573. ISP_REQ_Q_OUT(ha, &reg->isp));
  1574. if (req->ring_index < cnt)
  1575. req->cnt = cnt - req->ring_index;
  1576. else
  1577. req->cnt = req->length -
  1578. (req->ring_index - cnt);
  1579. }
  1580. if (req->cnt < req_cnt)
  1581. goto queuing_error;
  1582. /* Prep packet */
  1583. req->cnt -= req_cnt;
  1584. pkt = req->ring_ptr;
  1585. memset(pkt, 0, REQUEST_ENTRY_SIZE);
  1586. if (IS_QLAFX00(ha)) {
  1587. WRT_REG_BYTE((void __iomem *)&pkt->entry_count, req_cnt);
  1588. WRT_REG_WORD((void __iomem *)&pkt->handle, handle);
  1589. } else {
  1590. pkt->entry_count = req_cnt;
  1591. pkt->handle = handle;
  1592. }
  1593. queuing_error:
  1594. return pkt;
  1595. }
  1596. static void
  1597. qla24xx_login_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1598. {
  1599. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1600. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1601. logio->control_flags = cpu_to_le16(LCF_COMMAND_PLOGI);
  1602. if (lio->u.logio.flags & SRB_LOGIN_COND_PLOGI)
  1603. logio->control_flags |= cpu_to_le16(LCF_COND_PLOGI);
  1604. if (lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI)
  1605. logio->control_flags |= cpu_to_le16(LCF_SKIP_PRLI);
  1606. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1607. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1608. logio->port_id[1] = sp->fcport->d_id.b.area;
  1609. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1610. logio->vp_index = sp->fcport->vha->vp_idx;
  1611. }
  1612. static void
  1613. qla2x00_login_iocb(srb_t *sp, struct mbx_entry *mbx)
  1614. {
  1615. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1616. struct srb_iocb *lio = &sp->u.iocb_cmd;
  1617. uint16_t opts;
  1618. mbx->entry_type = MBX_IOCB_TYPE;
  1619. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1620. mbx->mb0 = cpu_to_le16(MBC_LOGIN_FABRIC_PORT);
  1621. opts = lio->u.logio.flags & SRB_LOGIN_COND_PLOGI ? BIT_0 : 0;
  1622. opts |= lio->u.logio.flags & SRB_LOGIN_SKIP_PRLI ? BIT_1 : 0;
  1623. if (HAS_EXTENDED_IDS(ha)) {
  1624. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1625. mbx->mb10 = cpu_to_le16(opts);
  1626. } else {
  1627. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | opts);
  1628. }
  1629. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1630. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1631. sp->fcport->d_id.b.al_pa);
  1632. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1633. }
  1634. static void
  1635. qla24xx_logout_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1636. {
  1637. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1638. logio->control_flags =
  1639. cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1640. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1641. logio->port_id[0] = sp->fcport->d_id.b.al_pa;
  1642. logio->port_id[1] = sp->fcport->d_id.b.area;
  1643. logio->port_id[2] = sp->fcport->d_id.b.domain;
  1644. logio->vp_index = sp->fcport->vha->vp_idx;
  1645. }
  1646. static void
  1647. qla2x00_logout_iocb(srb_t *sp, struct mbx_entry *mbx)
  1648. {
  1649. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1650. mbx->entry_type = MBX_IOCB_TYPE;
  1651. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1652. mbx->mb0 = cpu_to_le16(MBC_LOGOUT_FABRIC_PORT);
  1653. mbx->mb1 = HAS_EXTENDED_IDS(ha) ?
  1654. cpu_to_le16(sp->fcport->loop_id):
  1655. cpu_to_le16(sp->fcport->loop_id << 8);
  1656. mbx->mb2 = cpu_to_le16(sp->fcport->d_id.b.domain);
  1657. mbx->mb3 = cpu_to_le16(sp->fcport->d_id.b.area << 8 |
  1658. sp->fcport->d_id.b.al_pa);
  1659. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1660. /* Implicit: mbx->mbx10 = 0. */
  1661. }
  1662. static void
  1663. qla24xx_adisc_iocb(srb_t *sp, struct logio_entry_24xx *logio)
  1664. {
  1665. logio->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1666. logio->control_flags = cpu_to_le16(LCF_COMMAND_ADISC);
  1667. logio->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1668. logio->vp_index = sp->fcport->vha->vp_idx;
  1669. }
  1670. static void
  1671. qla2x00_adisc_iocb(srb_t *sp, struct mbx_entry *mbx)
  1672. {
  1673. struct qla_hw_data *ha = sp->fcport->vha->hw;
  1674. mbx->entry_type = MBX_IOCB_TYPE;
  1675. SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id);
  1676. mbx->mb0 = cpu_to_le16(MBC_GET_PORT_DATABASE);
  1677. if (HAS_EXTENDED_IDS(ha)) {
  1678. mbx->mb1 = cpu_to_le16(sp->fcport->loop_id);
  1679. mbx->mb10 = cpu_to_le16(BIT_0);
  1680. } else {
  1681. mbx->mb1 = cpu_to_le16((sp->fcport->loop_id << 8) | BIT_0);
  1682. }
  1683. mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma));
  1684. mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma));
  1685. mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma)));
  1686. mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma)));
  1687. mbx->mb9 = cpu_to_le16(sp->fcport->vha->vp_idx);
  1688. }
  1689. static void
  1690. qla24xx_tm_iocb(srb_t *sp, struct tsk_mgmt_entry *tsk)
  1691. {
  1692. uint32_t flags;
  1693. unsigned int lun;
  1694. struct fc_port *fcport = sp->fcport;
  1695. scsi_qla_host_t *vha = fcport->vha;
  1696. struct qla_hw_data *ha = vha->hw;
  1697. struct srb_iocb *iocb = &sp->u.iocb_cmd;
  1698. struct req_que *req = vha->req;
  1699. flags = iocb->u.tmf.flags;
  1700. lun = iocb->u.tmf.lun;
  1701. tsk->entry_type = TSK_MGMT_IOCB_TYPE;
  1702. tsk->entry_count = 1;
  1703. tsk->handle = MAKE_HANDLE(req->id, tsk->handle);
  1704. tsk->nport_handle = cpu_to_le16(fcport->loop_id);
  1705. tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  1706. tsk->control_flags = cpu_to_le32(flags);
  1707. tsk->port_id[0] = fcport->d_id.b.al_pa;
  1708. tsk->port_id[1] = fcport->d_id.b.area;
  1709. tsk->port_id[2] = fcport->d_id.b.domain;
  1710. tsk->vp_index = fcport->vha->vp_idx;
  1711. if (flags == TCF_LUN_RESET) {
  1712. int_to_scsilun(lun, &tsk->lun);
  1713. host_to_fcp_swap((uint8_t *)&tsk->lun,
  1714. sizeof(tsk->lun));
  1715. }
  1716. }
  1717. static void
  1718. qla24xx_els_iocb(srb_t *sp, struct els_entry_24xx *els_iocb)
  1719. {
  1720. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1721. els_iocb->entry_type = ELS_IOCB_TYPE;
  1722. els_iocb->entry_count = 1;
  1723. els_iocb->sys_define = 0;
  1724. els_iocb->entry_status = 0;
  1725. els_iocb->handle = sp->handle;
  1726. els_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1727. els_iocb->tx_dsd_count = __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1728. els_iocb->vp_index = sp->fcport->vha->vp_idx;
  1729. els_iocb->sof_type = EST_SOFI3;
  1730. els_iocb->rx_dsd_count = __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1731. els_iocb->opcode =
  1732. sp->type == SRB_ELS_CMD_RPT ?
  1733. bsg_job->request->rqst_data.r_els.els_code :
  1734. bsg_job->request->rqst_data.h_els.command_code;
  1735. els_iocb->port_id[0] = sp->fcport->d_id.b.al_pa;
  1736. els_iocb->port_id[1] = sp->fcport->d_id.b.area;
  1737. els_iocb->port_id[2] = sp->fcport->d_id.b.domain;
  1738. els_iocb->control_flags = 0;
  1739. els_iocb->rx_byte_count =
  1740. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1741. els_iocb->tx_byte_count =
  1742. cpu_to_le32(bsg_job->request_payload.payload_len);
  1743. els_iocb->tx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1744. (bsg_job->request_payload.sg_list)));
  1745. els_iocb->tx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1746. (bsg_job->request_payload.sg_list)));
  1747. els_iocb->tx_len = cpu_to_le32(sg_dma_len
  1748. (bsg_job->request_payload.sg_list));
  1749. els_iocb->rx_address[0] = cpu_to_le32(LSD(sg_dma_address
  1750. (bsg_job->reply_payload.sg_list)));
  1751. els_iocb->rx_address[1] = cpu_to_le32(MSD(sg_dma_address
  1752. (bsg_job->reply_payload.sg_list)));
  1753. els_iocb->rx_len = cpu_to_le32(sg_dma_len
  1754. (bsg_job->reply_payload.sg_list));
  1755. }
  1756. static void
  1757. qla2x00_ct_iocb(srb_t *sp, ms_iocb_entry_t *ct_iocb)
  1758. {
  1759. uint16_t avail_dsds;
  1760. uint32_t *cur_dsd;
  1761. struct scatterlist *sg;
  1762. int index;
  1763. uint16_t tot_dsds;
  1764. scsi_qla_host_t *vha = sp->fcport->vha;
  1765. struct qla_hw_data *ha = vha->hw;
  1766. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1767. int loop_iterartion = 0;
  1768. int cont_iocb_prsnt = 0;
  1769. int entry_count = 1;
  1770. memset(ct_iocb, 0, sizeof(ms_iocb_entry_t));
  1771. ct_iocb->entry_type = CT_IOCB_TYPE;
  1772. ct_iocb->entry_status = 0;
  1773. ct_iocb->handle1 = sp->handle;
  1774. SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id);
  1775. ct_iocb->status = __constant_cpu_to_le16(0);
  1776. ct_iocb->control_flags = __constant_cpu_to_le16(0);
  1777. ct_iocb->timeout = 0;
  1778. ct_iocb->cmd_dsd_count =
  1779. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1780. ct_iocb->total_dsd_count =
  1781. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt + 1);
  1782. ct_iocb->req_bytecount =
  1783. cpu_to_le32(bsg_job->request_payload.payload_len);
  1784. ct_iocb->rsp_bytecount =
  1785. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1786. ct_iocb->dseg_req_address[0] = cpu_to_le32(LSD(sg_dma_address
  1787. (bsg_job->request_payload.sg_list)));
  1788. ct_iocb->dseg_req_address[1] = cpu_to_le32(MSD(sg_dma_address
  1789. (bsg_job->request_payload.sg_list)));
  1790. ct_iocb->dseg_req_length = ct_iocb->req_bytecount;
  1791. ct_iocb->dseg_rsp_address[0] = cpu_to_le32(LSD(sg_dma_address
  1792. (bsg_job->reply_payload.sg_list)));
  1793. ct_iocb->dseg_rsp_address[1] = cpu_to_le32(MSD(sg_dma_address
  1794. (bsg_job->reply_payload.sg_list)));
  1795. ct_iocb->dseg_rsp_length = ct_iocb->rsp_bytecount;
  1796. avail_dsds = 1;
  1797. cur_dsd = (uint32_t *)ct_iocb->dseg_rsp_address;
  1798. index = 0;
  1799. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1800. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1801. dma_addr_t sle_dma;
  1802. cont_a64_entry_t *cont_pkt;
  1803. /* Allocate additional continuation packets? */
  1804. if (avail_dsds == 0) {
  1805. /*
  1806. * Five DSDs are available in the Cont.
  1807. * Type 1 IOCB.
  1808. */
  1809. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1810. vha->hw->req_q_map[0]);
  1811. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1812. avail_dsds = 5;
  1813. cont_iocb_prsnt = 1;
  1814. entry_count++;
  1815. }
  1816. sle_dma = sg_dma_address(sg);
  1817. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1818. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1819. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1820. loop_iterartion++;
  1821. avail_dsds--;
  1822. }
  1823. ct_iocb->entry_count = entry_count;
  1824. }
  1825. static void
  1826. qla24xx_ct_iocb(srb_t *sp, struct ct_entry_24xx *ct_iocb)
  1827. {
  1828. uint16_t avail_dsds;
  1829. uint32_t *cur_dsd;
  1830. struct scatterlist *sg;
  1831. int index;
  1832. uint16_t tot_dsds;
  1833. scsi_qla_host_t *vha = sp->fcport->vha;
  1834. struct qla_hw_data *ha = vha->hw;
  1835. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  1836. int loop_iterartion = 0;
  1837. int cont_iocb_prsnt = 0;
  1838. int entry_count = 1;
  1839. ct_iocb->entry_type = CT_IOCB_TYPE;
  1840. ct_iocb->entry_status = 0;
  1841. ct_iocb->sys_define = 0;
  1842. ct_iocb->handle = sp->handle;
  1843. ct_iocb->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  1844. ct_iocb->vp_index = sp->fcport->vha->vp_idx;
  1845. ct_iocb->comp_status = __constant_cpu_to_le16(0);
  1846. ct_iocb->cmd_dsd_count =
  1847. __constant_cpu_to_le16(bsg_job->request_payload.sg_cnt);
  1848. ct_iocb->timeout = 0;
  1849. ct_iocb->rsp_dsd_count =
  1850. __constant_cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  1851. ct_iocb->rsp_byte_count =
  1852. cpu_to_le32(bsg_job->reply_payload.payload_len);
  1853. ct_iocb->cmd_byte_count =
  1854. cpu_to_le32(bsg_job->request_payload.payload_len);
  1855. ct_iocb->dseg_0_address[0] = cpu_to_le32(LSD(sg_dma_address
  1856. (bsg_job->request_payload.sg_list)));
  1857. ct_iocb->dseg_0_address[1] = cpu_to_le32(MSD(sg_dma_address
  1858. (bsg_job->request_payload.sg_list)));
  1859. ct_iocb->dseg_0_len = cpu_to_le32(sg_dma_len
  1860. (bsg_job->request_payload.sg_list));
  1861. avail_dsds = 1;
  1862. cur_dsd = (uint32_t *)ct_iocb->dseg_1_address;
  1863. index = 0;
  1864. tot_dsds = bsg_job->reply_payload.sg_cnt;
  1865. for_each_sg(bsg_job->reply_payload.sg_list, sg, tot_dsds, index) {
  1866. dma_addr_t sle_dma;
  1867. cont_a64_entry_t *cont_pkt;
  1868. /* Allocate additional continuation packets? */
  1869. if (avail_dsds == 0) {
  1870. /*
  1871. * Five DSDs are available in the Cont.
  1872. * Type 1 IOCB.
  1873. */
  1874. cont_pkt = qla2x00_prep_cont_type1_iocb(vha,
  1875. ha->req_q_map[0]);
  1876. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  1877. avail_dsds = 5;
  1878. cont_iocb_prsnt = 1;
  1879. entry_count++;
  1880. }
  1881. sle_dma = sg_dma_address(sg);
  1882. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  1883. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  1884. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  1885. loop_iterartion++;
  1886. avail_dsds--;
  1887. }
  1888. ct_iocb->entry_count = entry_count;
  1889. }
  1890. /*
  1891. * qla82xx_start_scsi() - Send a SCSI command to the ISP
  1892. * @sp: command to send to the ISP
  1893. *
  1894. * Returns non-zero if a failure occurred, else zero.
  1895. */
  1896. int
  1897. qla82xx_start_scsi(srb_t *sp)
  1898. {
  1899. int ret, nseg;
  1900. unsigned long flags;
  1901. struct scsi_cmnd *cmd;
  1902. uint32_t *clr_ptr;
  1903. uint32_t index;
  1904. uint32_t handle;
  1905. uint16_t cnt;
  1906. uint16_t req_cnt;
  1907. uint16_t tot_dsds;
  1908. struct device_reg_82xx __iomem *reg;
  1909. uint32_t dbval;
  1910. uint32_t *fcp_dl;
  1911. uint8_t additional_cdb_len;
  1912. struct ct6_dsd *ctx;
  1913. struct scsi_qla_host *vha = sp->fcport->vha;
  1914. struct qla_hw_data *ha = vha->hw;
  1915. struct req_que *req = NULL;
  1916. struct rsp_que *rsp = NULL;
  1917. char tag[2];
  1918. /* Setup device pointers. */
  1919. ret = 0;
  1920. reg = &ha->iobase->isp82;
  1921. cmd = GET_CMD_SP(sp);
  1922. req = vha->req;
  1923. rsp = ha->rsp_q_map[0];
  1924. /* So we know we haven't pci_map'ed anything yet */
  1925. tot_dsds = 0;
  1926. dbval = 0x04 | (ha->portnum << 5);
  1927. /* Send marker if required */
  1928. if (vha->marker_needed != 0) {
  1929. if (qla2x00_marker(vha, req,
  1930. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS) {
  1931. ql_log(ql_log_warn, vha, 0x300c,
  1932. "qla2x00_marker failed for cmd=%p.\n", cmd);
  1933. return QLA_FUNCTION_FAILED;
  1934. }
  1935. vha->marker_needed = 0;
  1936. }
  1937. /* Acquire ring specific lock */
  1938. spin_lock_irqsave(&ha->hardware_lock, flags);
  1939. /* Check for room in outstanding command list. */
  1940. handle = req->current_outstanding_cmd;
  1941. for (index = 1; index < req->num_outstanding_cmds; index++) {
  1942. handle++;
  1943. if (handle == req->num_outstanding_cmds)
  1944. handle = 1;
  1945. if (!req->outstanding_cmds[handle])
  1946. break;
  1947. }
  1948. if (index == req->num_outstanding_cmds)
  1949. goto queuing_error;
  1950. /* Map the sg table so we have an accurate count of sg entries needed */
  1951. if (scsi_sg_count(cmd)) {
  1952. nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd),
  1953. scsi_sg_count(cmd), cmd->sc_data_direction);
  1954. if (unlikely(!nseg))
  1955. goto queuing_error;
  1956. } else
  1957. nseg = 0;
  1958. tot_dsds = nseg;
  1959. if (tot_dsds > ql2xshiftctondsd) {
  1960. struct cmd_type_6 *cmd_pkt;
  1961. uint16_t more_dsd_lists = 0;
  1962. struct dsd_dma *dsd_ptr;
  1963. uint16_t i;
  1964. more_dsd_lists = qla24xx_calc_dsd_lists(tot_dsds);
  1965. if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) {
  1966. ql_dbg(ql_dbg_io, vha, 0x300d,
  1967. "Num of DSD list %d is than %d for cmd=%p.\n",
  1968. more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN,
  1969. cmd);
  1970. goto queuing_error;
  1971. }
  1972. if (more_dsd_lists <= ha->gbl_dsd_avail)
  1973. goto sufficient_dsds;
  1974. else
  1975. more_dsd_lists -= ha->gbl_dsd_avail;
  1976. for (i = 0; i < more_dsd_lists; i++) {
  1977. dsd_ptr = kzalloc(sizeof(struct dsd_dma), GFP_ATOMIC);
  1978. if (!dsd_ptr) {
  1979. ql_log(ql_log_fatal, vha, 0x300e,
  1980. "Failed to allocate memory for dsd_dma "
  1981. "for cmd=%p.\n", cmd);
  1982. goto queuing_error;
  1983. }
  1984. dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool,
  1985. GFP_ATOMIC, &dsd_ptr->dsd_list_dma);
  1986. if (!dsd_ptr->dsd_addr) {
  1987. kfree(dsd_ptr);
  1988. ql_log(ql_log_fatal, vha, 0x300f,
  1989. "Failed to allocate memory for dsd_addr "
  1990. "for cmd=%p.\n", cmd);
  1991. goto queuing_error;
  1992. }
  1993. list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list);
  1994. ha->gbl_dsd_avail++;
  1995. }
  1996. sufficient_dsds:
  1997. req_cnt = 1;
  1998. if (req->cnt < (req_cnt + 2)) {
  1999. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2000. &reg->req_q_out[0]);
  2001. if (req->ring_index < cnt)
  2002. req->cnt = cnt - req->ring_index;
  2003. else
  2004. req->cnt = req->length -
  2005. (req->ring_index - cnt);
  2006. if (req->cnt < (req_cnt + 2))
  2007. goto queuing_error;
  2008. }
  2009. ctx = sp->u.scmd.ctx =
  2010. mempool_alloc(ha->ctx_mempool, GFP_ATOMIC);
  2011. if (!ctx) {
  2012. ql_log(ql_log_fatal, vha, 0x3010,
  2013. "Failed to allocate ctx for cmd=%p.\n", cmd);
  2014. goto queuing_error;
  2015. }
  2016. memset(ctx, 0, sizeof(struct ct6_dsd));
  2017. ctx->fcp_cmnd = dma_pool_alloc(ha->fcp_cmnd_dma_pool,
  2018. GFP_ATOMIC, &ctx->fcp_cmnd_dma);
  2019. if (!ctx->fcp_cmnd) {
  2020. ql_log(ql_log_fatal, vha, 0x3011,
  2021. "Failed to allocate fcp_cmnd for cmd=%p.\n", cmd);
  2022. goto queuing_error;
  2023. }
  2024. /* Initialize the DSD list and dma handle */
  2025. INIT_LIST_HEAD(&ctx->dsd_list);
  2026. ctx->dsd_use_cnt = 0;
  2027. if (cmd->cmd_len > 16) {
  2028. additional_cdb_len = cmd->cmd_len - 16;
  2029. if ((cmd->cmd_len % 4) != 0) {
  2030. /* SCSI command bigger than 16 bytes must be
  2031. * multiple of 4
  2032. */
  2033. ql_log(ql_log_warn, vha, 0x3012,
  2034. "scsi cmd len %d not multiple of 4 "
  2035. "for cmd=%p.\n", cmd->cmd_len, cmd);
  2036. goto queuing_error_fcp_cmnd;
  2037. }
  2038. ctx->fcp_cmnd_len = 12 + cmd->cmd_len + 4;
  2039. } else {
  2040. additional_cdb_len = 0;
  2041. ctx->fcp_cmnd_len = 12 + 16 + 4;
  2042. }
  2043. cmd_pkt = (struct cmd_type_6 *)req->ring_ptr;
  2044. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2045. /* Zero out remaining portion of packet. */
  2046. /* tagged queuing modifier -- default is TSK_SIMPLE (0). */
  2047. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2048. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2049. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2050. /* Set NPORT-ID and LUN number*/
  2051. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2052. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2053. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2054. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2055. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2056. /* Build IOCB segments */
  2057. if (qla24xx_build_scsi_type_6_iocbs(sp, cmd_pkt, tot_dsds))
  2058. goto queuing_error_fcp_cmnd;
  2059. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2060. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun, sizeof(cmd_pkt->lun));
  2061. /* build FCP_CMND IU */
  2062. memset(ctx->fcp_cmnd, 0, sizeof(struct fcp_cmnd));
  2063. int_to_scsilun(cmd->device->lun, &ctx->fcp_cmnd->lun);
  2064. ctx->fcp_cmnd->additional_cdb_len = additional_cdb_len;
  2065. if (cmd->sc_data_direction == DMA_TO_DEVICE)
  2066. ctx->fcp_cmnd->additional_cdb_len |= 1;
  2067. else if (cmd->sc_data_direction == DMA_FROM_DEVICE)
  2068. ctx->fcp_cmnd->additional_cdb_len |= 2;
  2069. /*
  2070. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2071. */
  2072. if (scsi_populate_tag_msg(cmd, tag)) {
  2073. switch (tag[0]) {
  2074. case HEAD_OF_QUEUE_TAG:
  2075. ctx->fcp_cmnd->task_attribute =
  2076. TSK_HEAD_OF_QUEUE;
  2077. break;
  2078. case ORDERED_QUEUE_TAG:
  2079. ctx->fcp_cmnd->task_attribute =
  2080. TSK_ORDERED;
  2081. break;
  2082. }
  2083. }
  2084. /* Populate the FCP_PRIO. */
  2085. if (ha->flags.fcp_prio_enabled)
  2086. ctx->fcp_cmnd->task_attribute |=
  2087. sp->fcport->fcp_prio << 3;
  2088. memcpy(ctx->fcp_cmnd->cdb, cmd->cmnd, cmd->cmd_len);
  2089. fcp_dl = (uint32_t *)(ctx->fcp_cmnd->cdb + 16 +
  2090. additional_cdb_len);
  2091. *fcp_dl = htonl((uint32_t)scsi_bufflen(cmd));
  2092. cmd_pkt->fcp_cmnd_dseg_len = cpu_to_le16(ctx->fcp_cmnd_len);
  2093. cmd_pkt->fcp_cmnd_dseg_address[0] =
  2094. cpu_to_le32(LSD(ctx->fcp_cmnd_dma));
  2095. cmd_pkt->fcp_cmnd_dseg_address[1] =
  2096. cpu_to_le32(MSD(ctx->fcp_cmnd_dma));
  2097. sp->flags |= SRB_FCP_CMND_DMA_VALID;
  2098. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2099. /* Set total data segment count. */
  2100. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2101. /* Specify response queue number where
  2102. * completion should happen
  2103. */
  2104. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2105. } else {
  2106. struct cmd_type_7 *cmd_pkt;
  2107. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2108. if (req->cnt < (req_cnt + 2)) {
  2109. cnt = (uint16_t)RD_REG_DWORD_RELAXED(
  2110. &reg->req_q_out[0]);
  2111. if (req->ring_index < cnt)
  2112. req->cnt = cnt - req->ring_index;
  2113. else
  2114. req->cnt = req->length -
  2115. (req->ring_index - cnt);
  2116. }
  2117. if (req->cnt < (req_cnt + 2))
  2118. goto queuing_error;
  2119. cmd_pkt = (struct cmd_type_7 *)req->ring_ptr;
  2120. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2121. /* Zero out remaining portion of packet. */
  2122. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2123. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2124. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2125. cmd_pkt->dseg_count = cpu_to_le16(tot_dsds);
  2126. /* Set NPORT-ID and LUN number*/
  2127. cmd_pkt->nport_handle = cpu_to_le16(sp->fcport->loop_id);
  2128. cmd_pkt->port_id[0] = sp->fcport->d_id.b.al_pa;
  2129. cmd_pkt->port_id[1] = sp->fcport->d_id.b.area;
  2130. cmd_pkt->port_id[2] = sp->fcport->d_id.b.domain;
  2131. cmd_pkt->vp_index = sp->fcport->vha->vp_idx;
  2132. int_to_scsilun(cmd->device->lun, &cmd_pkt->lun);
  2133. host_to_fcp_swap((uint8_t *)&cmd_pkt->lun,
  2134. sizeof(cmd_pkt->lun));
  2135. /*
  2136. * Update tagged queuing modifier -- default is TSK_SIMPLE (0).
  2137. */
  2138. if (scsi_populate_tag_msg(cmd, tag)) {
  2139. switch (tag[0]) {
  2140. case HEAD_OF_QUEUE_TAG:
  2141. cmd_pkt->task = TSK_HEAD_OF_QUEUE;
  2142. break;
  2143. case ORDERED_QUEUE_TAG:
  2144. cmd_pkt->task = TSK_ORDERED;
  2145. break;
  2146. }
  2147. }
  2148. /* Populate the FCP_PRIO. */
  2149. if (ha->flags.fcp_prio_enabled)
  2150. cmd_pkt->task |= sp->fcport->fcp_prio << 3;
  2151. /* Load SCSI command packet. */
  2152. memcpy(cmd_pkt->fcp_cdb, cmd->cmnd, cmd->cmd_len);
  2153. host_to_fcp_swap(cmd_pkt->fcp_cdb, sizeof(cmd_pkt->fcp_cdb));
  2154. cmd_pkt->byte_count = cpu_to_le32((uint32_t)scsi_bufflen(cmd));
  2155. /* Build IOCB segments */
  2156. qla24xx_build_scsi_iocbs(sp, cmd_pkt, tot_dsds);
  2157. /* Set total data segment count. */
  2158. cmd_pkt->entry_count = (uint8_t)req_cnt;
  2159. /* Specify response queue number where
  2160. * completion should happen.
  2161. */
  2162. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2163. }
  2164. /* Build command packet. */
  2165. req->current_outstanding_cmd = handle;
  2166. req->outstanding_cmds[handle] = sp;
  2167. sp->handle = handle;
  2168. cmd->host_scribble = (unsigned char *)(unsigned long)handle;
  2169. req->cnt -= req_cnt;
  2170. wmb();
  2171. /* Adjust ring index. */
  2172. req->ring_index++;
  2173. if (req->ring_index == req->length) {
  2174. req->ring_index = 0;
  2175. req->ring_ptr = req->ring;
  2176. } else
  2177. req->ring_ptr++;
  2178. sp->flags |= SRB_DMA_VALID;
  2179. /* Set chip new ring index. */
  2180. /* write, read and verify logic */
  2181. dbval = dbval | (req->id << 8) | (req->ring_index << 16);
  2182. if (ql2xdbwr)
  2183. qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval);
  2184. else {
  2185. WRT_REG_DWORD(
  2186. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2187. dbval);
  2188. wmb();
  2189. while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) {
  2190. WRT_REG_DWORD(
  2191. (unsigned long __iomem *)ha->nxdb_wr_ptr,
  2192. dbval);
  2193. wmb();
  2194. }
  2195. }
  2196. /* Manage unprocessed RIO/ZIO commands in response queue. */
  2197. if (vha->flags.process_response_queue &&
  2198. rsp->ring_ptr->signature != RESPONSE_PROCESSED)
  2199. qla24xx_process_response_queue(vha, rsp);
  2200. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2201. return QLA_SUCCESS;
  2202. queuing_error_fcp_cmnd:
  2203. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma);
  2204. queuing_error:
  2205. if (tot_dsds)
  2206. scsi_dma_unmap(cmd);
  2207. if (sp->u.scmd.ctx) {
  2208. mempool_free(sp->u.scmd.ctx, ha->ctx_mempool);
  2209. sp->u.scmd.ctx = NULL;
  2210. }
  2211. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2212. return QLA_FUNCTION_FAILED;
  2213. }
  2214. int
  2215. qla2x00_start_sp(srb_t *sp)
  2216. {
  2217. int rval;
  2218. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2219. void *pkt;
  2220. unsigned long flags;
  2221. rval = QLA_FUNCTION_FAILED;
  2222. spin_lock_irqsave(&ha->hardware_lock, flags);
  2223. pkt = qla2x00_alloc_iocbs(sp->fcport->vha, sp);
  2224. if (!pkt) {
  2225. ql_log(ql_log_warn, sp->fcport->vha, 0x700c,
  2226. "qla2x00_alloc_iocbs failed.\n");
  2227. goto done;
  2228. }
  2229. rval = QLA_SUCCESS;
  2230. switch (sp->type) {
  2231. case SRB_LOGIN_CMD:
  2232. IS_FWI2_CAPABLE(ha) ?
  2233. qla24xx_login_iocb(sp, pkt) :
  2234. qla2x00_login_iocb(sp, pkt);
  2235. break;
  2236. case SRB_LOGOUT_CMD:
  2237. IS_FWI2_CAPABLE(ha) ?
  2238. qla24xx_logout_iocb(sp, pkt) :
  2239. qla2x00_logout_iocb(sp, pkt);
  2240. break;
  2241. case SRB_ELS_CMD_RPT:
  2242. case SRB_ELS_CMD_HST:
  2243. qla24xx_els_iocb(sp, pkt);
  2244. break;
  2245. case SRB_CT_CMD:
  2246. IS_FWI2_CAPABLE(ha) ?
  2247. qla24xx_ct_iocb(sp, pkt) :
  2248. qla2x00_ct_iocb(sp, pkt);
  2249. break;
  2250. case SRB_ADISC_CMD:
  2251. IS_FWI2_CAPABLE(ha) ?
  2252. qla24xx_adisc_iocb(sp, pkt) :
  2253. qla2x00_adisc_iocb(sp, pkt);
  2254. break;
  2255. case SRB_TM_CMD:
  2256. IS_QLAFX00(ha) ?
  2257. qlafx00_tm_iocb(sp, pkt) :
  2258. qla24xx_tm_iocb(sp, pkt);
  2259. break;
  2260. case SRB_FXIOCB_DCMD:
  2261. case SRB_FXIOCB_BCMD:
  2262. qlafx00_fxdisc_iocb(sp, pkt);
  2263. break;
  2264. case SRB_ABT_CMD:
  2265. qlafx00_abort_iocb(sp, pkt);
  2266. break;
  2267. default:
  2268. break;
  2269. }
  2270. wmb();
  2271. qla2x00_start_iocbs(sp->fcport->vha, ha->req_q_map[0]);
  2272. done:
  2273. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2274. return rval;
  2275. }
  2276. static void
  2277. qla25xx_build_bidir_iocb(srb_t *sp, struct scsi_qla_host *vha,
  2278. struct cmd_bidir *cmd_pkt, uint32_t tot_dsds)
  2279. {
  2280. uint16_t avail_dsds;
  2281. uint32_t *cur_dsd;
  2282. uint32_t req_data_len = 0;
  2283. uint32_t rsp_data_len = 0;
  2284. struct scatterlist *sg;
  2285. int index;
  2286. int entry_count = 1;
  2287. struct fc_bsg_job *bsg_job = sp->u.bsg_job;
  2288. /*Update entry type to indicate bidir command */
  2289. *((uint32_t *)(&cmd_pkt->entry_type)) =
  2290. __constant_cpu_to_le32(COMMAND_BIDIRECTIONAL);
  2291. /* Set the transfer direction, in this set both flags
  2292. * Also set the BD_WRAP_BACK flag, firmware will take care
  2293. * assigning DID=SID for outgoing pkts.
  2294. */
  2295. cmd_pkt->wr_dseg_count = cpu_to_le16(bsg_job->request_payload.sg_cnt);
  2296. cmd_pkt->rd_dseg_count = cpu_to_le16(bsg_job->reply_payload.sg_cnt);
  2297. cmd_pkt->control_flags =
  2298. __constant_cpu_to_le16(BD_WRITE_DATA | BD_READ_DATA |
  2299. BD_WRAP_BACK);
  2300. req_data_len = rsp_data_len = bsg_job->request_payload.payload_len;
  2301. cmd_pkt->wr_byte_count = cpu_to_le32(req_data_len);
  2302. cmd_pkt->rd_byte_count = cpu_to_le32(rsp_data_len);
  2303. cmd_pkt->timeout = cpu_to_le16(qla2x00_get_async_timeout(vha) + 2);
  2304. vha->bidi_stats.transfer_bytes += req_data_len;
  2305. vha->bidi_stats.io_count++;
  2306. /* Only one dsd is available for bidirectional IOCB, remaining dsds
  2307. * are bundled in continuation iocb
  2308. */
  2309. avail_dsds = 1;
  2310. cur_dsd = (uint32_t *)&cmd_pkt->fcp_data_dseg_address;
  2311. index = 0;
  2312. for_each_sg(bsg_job->request_payload.sg_list, sg,
  2313. bsg_job->request_payload.sg_cnt, index) {
  2314. dma_addr_t sle_dma;
  2315. cont_a64_entry_t *cont_pkt;
  2316. /* Allocate additional continuation packets */
  2317. if (avail_dsds == 0) {
  2318. /* Continuation type 1 IOCB can accomodate
  2319. * 5 DSDS
  2320. */
  2321. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2322. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2323. avail_dsds = 5;
  2324. entry_count++;
  2325. }
  2326. sle_dma = sg_dma_address(sg);
  2327. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2328. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2329. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2330. avail_dsds--;
  2331. }
  2332. /* For read request DSD will always goes to continuation IOCB
  2333. * and follow the write DSD. If there is room on the current IOCB
  2334. * then it is added to that IOCB else new continuation IOCB is
  2335. * allocated.
  2336. */
  2337. for_each_sg(bsg_job->reply_payload.sg_list, sg,
  2338. bsg_job->reply_payload.sg_cnt, index) {
  2339. dma_addr_t sle_dma;
  2340. cont_a64_entry_t *cont_pkt;
  2341. /* Allocate additional continuation packets */
  2342. if (avail_dsds == 0) {
  2343. /* Continuation type 1 IOCB can accomodate
  2344. * 5 DSDS
  2345. */
  2346. cont_pkt = qla2x00_prep_cont_type1_iocb(vha, vha->req);
  2347. cur_dsd = (uint32_t *) cont_pkt->dseg_0_address;
  2348. avail_dsds = 5;
  2349. entry_count++;
  2350. }
  2351. sle_dma = sg_dma_address(sg);
  2352. *cur_dsd++ = cpu_to_le32(LSD(sle_dma));
  2353. *cur_dsd++ = cpu_to_le32(MSD(sle_dma));
  2354. *cur_dsd++ = cpu_to_le32(sg_dma_len(sg));
  2355. avail_dsds--;
  2356. }
  2357. /* This value should be same as number of IOCB required for this cmd */
  2358. cmd_pkt->entry_count = entry_count;
  2359. }
  2360. int
  2361. qla2x00_start_bidir(srb_t *sp, struct scsi_qla_host *vha, uint32_t tot_dsds)
  2362. {
  2363. struct qla_hw_data *ha = vha->hw;
  2364. unsigned long flags;
  2365. uint32_t handle;
  2366. uint32_t index;
  2367. uint16_t req_cnt;
  2368. uint16_t cnt;
  2369. uint32_t *clr_ptr;
  2370. struct cmd_bidir *cmd_pkt = NULL;
  2371. struct rsp_que *rsp;
  2372. struct req_que *req;
  2373. int rval = EXT_STATUS_OK;
  2374. rval = QLA_SUCCESS;
  2375. rsp = ha->rsp_q_map[0];
  2376. req = vha->req;
  2377. /* Send marker if required */
  2378. if (vha->marker_needed != 0) {
  2379. if (qla2x00_marker(vha, req,
  2380. rsp, 0, 0, MK_SYNC_ALL) != QLA_SUCCESS)
  2381. return EXT_STATUS_MAILBOX;
  2382. vha->marker_needed = 0;
  2383. }
  2384. /* Acquire ring specific lock */
  2385. spin_lock_irqsave(&ha->hardware_lock, flags);
  2386. /* Check for room in outstanding command list. */
  2387. handle = req->current_outstanding_cmd;
  2388. for (index = 1; index < req->num_outstanding_cmds; index++) {
  2389. handle++;
  2390. if (handle == req->num_outstanding_cmds)
  2391. handle = 1;
  2392. if (!req->outstanding_cmds[handle])
  2393. break;
  2394. }
  2395. if (index == req->num_outstanding_cmds) {
  2396. rval = EXT_STATUS_BUSY;
  2397. goto queuing_error;
  2398. }
  2399. /* Calculate number of IOCB required */
  2400. req_cnt = qla24xx_calc_iocbs(vha, tot_dsds);
  2401. /* Check for room on request queue. */
  2402. if (req->cnt < req_cnt + 2) {
  2403. cnt = RD_REG_DWORD_RELAXED(req->req_q_out);
  2404. if (req->ring_index < cnt)
  2405. req->cnt = cnt - req->ring_index;
  2406. else
  2407. req->cnt = req->length -
  2408. (req->ring_index - cnt);
  2409. }
  2410. if (req->cnt < req_cnt + 2) {
  2411. rval = EXT_STATUS_BUSY;
  2412. goto queuing_error;
  2413. }
  2414. cmd_pkt = (struct cmd_bidir *)req->ring_ptr;
  2415. cmd_pkt->handle = MAKE_HANDLE(req->id, handle);
  2416. /* Zero out remaining portion of packet. */
  2417. /* tagged queuing modifier -- default is TSK_SIMPLE (0).*/
  2418. clr_ptr = (uint32_t *)cmd_pkt + 2;
  2419. memset(clr_ptr, 0, REQUEST_ENTRY_SIZE - 8);
  2420. /* Set NPORT-ID (of vha)*/
  2421. cmd_pkt->nport_handle = cpu_to_le16(vha->self_login_loop_id);
  2422. cmd_pkt->port_id[0] = vha->d_id.b.al_pa;
  2423. cmd_pkt->port_id[1] = vha->d_id.b.area;
  2424. cmd_pkt->port_id[2] = vha->d_id.b.domain;
  2425. qla25xx_build_bidir_iocb(sp, vha, cmd_pkt, tot_dsds);
  2426. cmd_pkt->entry_status = (uint8_t) rsp->id;
  2427. /* Build command packet. */
  2428. req->current_outstanding_cmd = handle;
  2429. req->outstanding_cmds[handle] = sp;
  2430. sp->handle = handle;
  2431. req->cnt -= req_cnt;
  2432. /* Send the command to the firmware */
  2433. wmb();
  2434. qla2x00_start_iocbs(vha, req);
  2435. queuing_error:
  2436. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2437. return rval;
  2438. }