pmic.h 25 KB

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  1. /*
  2. * pmic.h -- Power Managment Driver for Wolfson WM8350 PMIC
  3. *
  4. * Copyright 2007 Wolfson Microelectronics PLC
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. *
  11. */
  12. #ifndef __LINUX_MFD_WM8350_PMIC_H
  13. #define __LINUX_MFD_WM8350_PMIC_H
  14. /*
  15. * Register values.
  16. */
  17. #define WM8350_CURRENT_SINK_DRIVER_A 0xAC
  18. #define WM8350_CSA_FLASH_CONTROL 0xAD
  19. #define WM8350_CURRENT_SINK_DRIVER_B 0xAE
  20. #define WM8350_CSB_FLASH_CONTROL 0xAF
  21. #define WM8350_DCDC_LDO_REQUESTED 0xB0
  22. #define WM8350_DCDC_ACTIVE_OPTIONS 0xB1
  23. #define WM8350_DCDC_SLEEP_OPTIONS 0xB2
  24. #define WM8350_POWER_CHECK_COMPARATOR 0xB3
  25. #define WM8350_DCDC1_CONTROL 0xB4
  26. #define WM8350_DCDC1_TIMEOUTS 0xB5
  27. #define WM8350_DCDC1_LOW_POWER 0xB6
  28. #define WM8350_DCDC2_CONTROL 0xB7
  29. #define WM8350_DCDC2_TIMEOUTS 0xB8
  30. #define WM8350_DCDC3_CONTROL 0xBA
  31. #define WM8350_DCDC3_TIMEOUTS 0xBB
  32. #define WM8350_DCDC3_LOW_POWER 0xBC
  33. #define WM8350_DCDC4_CONTROL 0xBD
  34. #define WM8350_DCDC4_TIMEOUTS 0xBE
  35. #define WM8350_DCDC4_LOW_POWER 0xBF
  36. #define WM8350_DCDC5_CONTROL 0xC0
  37. #define WM8350_DCDC5_TIMEOUTS 0xC1
  38. #define WM8350_DCDC6_CONTROL 0xC3
  39. #define WM8350_DCDC6_TIMEOUTS 0xC4
  40. #define WM8350_DCDC6_LOW_POWER 0xC5
  41. #define WM8350_LIMIT_SWITCH_CONTROL 0xC7
  42. #define WM8350_LDO1_CONTROL 0xC8
  43. #define WM8350_LDO1_TIMEOUTS 0xC9
  44. #define WM8350_LDO1_LOW_POWER 0xCA
  45. #define WM8350_LDO2_CONTROL 0xCB
  46. #define WM8350_LDO2_TIMEOUTS 0xCC
  47. #define WM8350_LDO2_LOW_POWER 0xCD
  48. #define WM8350_LDO3_CONTROL 0xCE
  49. #define WM8350_LDO3_TIMEOUTS 0xCF
  50. #define WM8350_LDO3_LOW_POWER 0xD0
  51. #define WM8350_LDO4_CONTROL 0xD1
  52. #define WM8350_LDO4_TIMEOUTS 0xD2
  53. #define WM8350_LDO4_LOW_POWER 0xD3
  54. #define WM8350_VCC_FAULT_MASKS 0xD7
  55. #define WM8350_MAIN_BANDGAP_CONTROL 0xD8
  56. #define WM8350_OSC_CONTROL 0xD9
  57. #define WM8350_RTC_TICK_CONTROL 0xDA
  58. #define WM8350_SECURITY 0xDB
  59. #define WM8350_RAM_BIST_1 0xDC
  60. #define WM8350_DCDC_LDO_STATUS 0xE1
  61. #define WM8350_GPIO_PIN_STATUS 0xE6
  62. #define WM8350_DCDC1_FORCE_PWM 0xF8
  63. #define WM8350_DCDC3_FORCE_PWM 0xFA
  64. #define WM8350_DCDC4_FORCE_PWM 0xFB
  65. #define WM8350_DCDC6_FORCE_PWM 0xFD
  66. /*
  67. * R172 (0xAC) - Current Sink Driver A
  68. */
  69. #define WM8350_CS1_HIB_MODE 0x1000
  70. #define WM8350_CS1_HIB_MODE_MASK 0x1000
  71. #define WM8350_CS1_HIB_MODE_SHIFT 12
  72. #define WM8350_CS1_ISEL_MASK 0x003F
  73. #define WM8350_CS1_ISEL_SHIFT 0
  74. /* Bit values for R172 (0xAC) */
  75. #define WM8350_CS1_HIB_MODE_DISABLE 0
  76. #define WM8350_CS1_HIB_MODE_LEAVE 1
  77. #define WM8350_CS1_ISEL_220M 0x3F
  78. /*
  79. * R173 (0xAD) - CSA Flash control
  80. */
  81. #define WM8350_CS1_FLASH_MODE 0x8000
  82. #define WM8350_CS1_TRIGSRC 0x4000
  83. #define WM8350_CS1_DRIVE 0x2000
  84. #define WM8350_CS1_FLASH_DUR_MASK 0x0300
  85. #define WM8350_CS1_OFF_RAMP_MASK 0x0030
  86. #define WM8350_CS1_ON_RAMP_MASK 0x0003
  87. /*
  88. * R174 (0xAE) - Current Sink Driver B
  89. */
  90. #define WM8350_CS2_HIB_MODE 0x1000
  91. #define WM8350_CS2_ISEL_MASK 0x003F
  92. /*
  93. * R175 (0xAF) - CSB Flash control
  94. */
  95. #define WM8350_CS2_FLASH_MODE 0x8000
  96. #define WM8350_CS2_TRIGSRC 0x4000
  97. #define WM8350_CS2_DRIVE 0x2000
  98. #define WM8350_CS2_FLASH_DUR_MASK 0x0300
  99. #define WM8350_CS2_OFF_RAMP_MASK 0x0030
  100. #define WM8350_CS2_ON_RAMP_MASK 0x0003
  101. /*
  102. * R176 (0xB0) - DCDC/LDO requested
  103. */
  104. #define WM8350_LS_ENA 0x8000
  105. #define WM8350_LDO4_ENA 0x0800
  106. #define WM8350_LDO3_ENA 0x0400
  107. #define WM8350_LDO2_ENA 0x0200
  108. #define WM8350_LDO1_ENA 0x0100
  109. #define WM8350_DC6_ENA 0x0020
  110. #define WM8350_DC5_ENA 0x0010
  111. #define WM8350_DC4_ENA 0x0008
  112. #define WM8350_DC3_ENA 0x0004
  113. #define WM8350_DC2_ENA 0x0002
  114. #define WM8350_DC1_ENA 0x0001
  115. /*
  116. * R177 (0xB1) - DCDC Active options
  117. */
  118. #define WM8350_PUTO_MASK 0x3000
  119. #define WM8350_PWRUP_DELAY_MASK 0x0300
  120. #define WM8350_DC6_ACTIVE 0x0020
  121. #define WM8350_DC4_ACTIVE 0x0008
  122. #define WM8350_DC3_ACTIVE 0x0004
  123. #define WM8350_DC1_ACTIVE 0x0001
  124. /*
  125. * R178 (0xB2) - DCDC Sleep options
  126. */
  127. #define WM8350_DC6_SLEEP 0x0020
  128. #define WM8350_DC4_SLEEP 0x0008
  129. #define WM8350_DC3_SLEEP 0x0004
  130. #define WM8350_DC1_SLEEP 0x0001
  131. /*
  132. * R179 (0xB3) - Power-check comparator
  133. */
  134. #define WM8350_PCCMP_ERRACT 0x4000
  135. #define WM8350_PCCMP_RAIL 0x0100
  136. #define WM8350_PCCMP_OFF_THR_MASK 0x0070
  137. #define WM8350_PCCMP_ON_THR_MASK 0x0007
  138. /*
  139. * R180 (0xB4) - DCDC1 Control
  140. */
  141. #define WM8350_DC1_OPFLT 0x0400
  142. #define WM8350_DC1_VSEL_MASK 0x007F
  143. #define WM8350_DC1_VSEL_SHIFT 0
  144. /*
  145. * R181 (0xB5) - DCDC1 Timeouts
  146. */
  147. #define WM8350_DC1_ERRACT_MASK 0xC000
  148. #define WM8350_DC1_ERRACT_SHIFT 14
  149. #define WM8350_DC1_ENSLOT_MASK 0x3C00
  150. #define WM8350_DC1_ENSLOT_SHIFT 10
  151. #define WM8350_DC1_SDSLOT_MASK 0x03C0
  152. #define WM8350_DC1_UVTO_MASK 0x0030
  153. #define WM8350_DC1_SDSLOT_SHIFT 6
  154. /* Bit values for R181 (0xB5) */
  155. #define WM8350_DC1_ERRACT_NONE 0
  156. #define WM8350_DC1_ERRACT_SHUTDOWN_CONV 1
  157. #define WM8350_DC1_ERRACT_SHUTDOWN_SYS 2
  158. /*
  159. * R182 (0xB6) - DCDC1 Low Power
  160. */
  161. #define WM8350_DC1_HIB_MODE_MASK 0x7000
  162. #define WM8350_DC1_HIB_TRIG_MASK 0x0300
  163. #define WM8350_DC1_VIMG_MASK 0x007F
  164. /*
  165. * R183 (0xB7) - DCDC2 Control
  166. */
  167. #define WM8350_DC2_MODE 0x4000
  168. #define WM8350_DC2_MODE_MASK 0x4000
  169. #define WM8350_DC2_MODE_SHIFT 14
  170. #define WM8350_DC2_HIB_MODE 0x1000
  171. #define WM8350_DC2_HIB_MODE_MASK 0x1000
  172. #define WM8350_DC2_HIB_MODE_SHIFT 12
  173. #define WM8350_DC2_HIB_TRIG_MASK 0x0300
  174. #define WM8350_DC2_HIB_TRIG_SHIFT 8
  175. #define WM8350_DC2_ILIM 0x0040
  176. #define WM8350_DC2_ILIM_MASK 0x0040
  177. #define WM8350_DC2_ILIM_SHIFT 6
  178. #define WM8350_DC2_RMP_MASK 0x0018
  179. #define WM8350_DC2_RMP_SHIFT 3
  180. #define WM8350_DC2_FBSRC_MASK 0x0003
  181. #define WM8350_DC2_FBSRC_SHIFT 0
  182. /* Bit values for R183 (0xB7) */
  183. #define WM8350_DC2_MODE_BOOST 0
  184. #define WM8350_DC2_MODE_SWITCH 1
  185. #define WM8350_DC2_HIB_MODE_ACTIVE 1
  186. #define WM8350_DC2_HIB_MODE_DISABLE 0
  187. #define WM8350_DC2_HIB_TRIG_NONE 0
  188. #define WM8350_DC2_HIB_TRIG_LPWR1 1
  189. #define WM8350_DC2_HIB_TRIG_LPWR2 2
  190. #define WM8350_DC2_HIB_TRIG_LPWR3 3
  191. #define WM8350_DC2_ILIM_HIGH 0
  192. #define WM8350_DC2_ILIM_LOW 1
  193. #define WM8350_DC2_RMP_30V 0
  194. #define WM8350_DC2_RMP_20V 1
  195. #define WM8350_DC2_RMP_10V 2
  196. #define WM8350_DC2_RMP_5V 3
  197. #define WM8350_DC2_FBSRC_FB2 0
  198. #define WM8350_DC2_FBSRC_ISINKA 1
  199. #define WM8350_DC2_FBSRC_ISINKB 2
  200. #define WM8350_DC2_FBSRC_USB 3
  201. /*
  202. * R184 (0xB8) - DCDC2 Timeouts
  203. */
  204. #define WM8350_DC2_ERRACT_MASK 0xC000
  205. #define WM8350_DC2_ERRACT_SHIFT 14
  206. #define WM8350_DC2_ENSLOT_MASK 0x3C00
  207. #define WM8350_DC2_ENSLOT_SHIFT 10
  208. #define WM8350_DC2_SDSLOT_MASK 0x03C0
  209. #define WM8350_DC2_UVTO_MASK 0x0030
  210. /* Bit values for R184 (0xB8) */
  211. #define WM8350_DC2_ERRACT_NONE 0
  212. #define WM8350_DC2_ERRACT_SHUTDOWN_CONV 1
  213. #define WM8350_DC2_ERRACT_SHUTDOWN_SYS 2
  214. /*
  215. * R186 (0xBA) - DCDC3 Control
  216. */
  217. #define WM8350_DC3_OPFLT 0x0400
  218. #define WM8350_DC3_VSEL_MASK 0x007F
  219. #define WM8350_DC3_VSEL_SHIFT 0
  220. /*
  221. * R187 (0xBB) - DCDC3 Timeouts
  222. */
  223. #define WM8350_DC3_ERRACT_MASK 0xC000
  224. #define WM8350_DC3_ERRACT_SHIFT 14
  225. #define WM8350_DC3_ENSLOT_MASK 0x3C00
  226. #define WM8350_DC3_ENSLOT_SHIFT 10
  227. #define WM8350_DC3_SDSLOT_MASK 0x03C0
  228. #define WM8350_DC3_UVTO_MASK 0x0030
  229. #define WM8350_DC3_SDSLOT_SHIFT 6
  230. /* Bit values for R187 (0xBB) */
  231. #define WM8350_DC3_ERRACT_NONE 0
  232. #define WM8350_DC3_ERRACT_SHUTDOWN_CONV 1
  233. #define WM8350_DC3_ERRACT_SHUTDOWN_SYS 2
  234. /*
  235. * R188 (0xBC) - DCDC3 Low Power
  236. */
  237. #define WM8350_DC3_HIB_MODE_MASK 0x7000
  238. #define WM8350_DC3_HIB_TRIG_MASK 0x0300
  239. #define WM8350_DC3_VIMG_MASK 0x007F
  240. /*
  241. * R189 (0xBD) - DCDC4 Control
  242. */
  243. #define WM8350_DC4_OPFLT 0x0400
  244. #define WM8350_DC4_VSEL_MASK 0x007F
  245. #define WM8350_DC4_VSEL_SHIFT 0
  246. /*
  247. * R190 (0xBE) - DCDC4 Timeouts
  248. */
  249. #define WM8350_DC4_ERRACT_MASK 0xC000
  250. #define WM8350_DC4_ERRACT_SHIFT 14
  251. #define WM8350_DC4_ENSLOT_MASK 0x3C00
  252. #define WM8350_DC4_ENSLOT_SHIFT 10
  253. #define WM8350_DC4_SDSLOT_MASK 0x03C0
  254. #define WM8350_DC4_UVTO_MASK 0x0030
  255. #define WM8350_DC4_SDSLOT_SHIFT 6
  256. /* Bit values for R190 (0xBE) */
  257. #define WM8350_DC4_ERRACT_NONE 0
  258. #define WM8350_DC4_ERRACT_SHUTDOWN_CONV 1
  259. #define WM8350_DC4_ERRACT_SHUTDOWN_SYS 2
  260. /*
  261. * R191 (0xBF) - DCDC4 Low Power
  262. */
  263. #define WM8350_DC4_HIB_MODE_MASK 0x7000
  264. #define WM8350_DC4_HIB_TRIG_MASK 0x0300
  265. #define WM8350_DC4_VIMG_MASK 0x007F
  266. /*
  267. * R192 (0xC0) - DCDC5 Control
  268. */
  269. #define WM8350_DC5_MODE 0x4000
  270. #define WM8350_DC5_MODE_MASK 0x4000
  271. #define WM8350_DC5_MODE_SHIFT 14
  272. #define WM8350_DC5_HIB_MODE 0x1000
  273. #define WM8350_DC5_HIB_MODE_MASK 0x1000
  274. #define WM8350_DC5_HIB_MODE_SHIFT 12
  275. #define WM8350_DC5_HIB_TRIG_MASK 0x0300
  276. #define WM8350_DC5_HIB_TRIG_SHIFT 8
  277. #define WM8350_DC5_ILIM 0x0040
  278. #define WM8350_DC5_ILIM_MASK 0x0040
  279. #define WM8350_DC5_ILIM_SHIFT 6
  280. #define WM8350_DC5_RMP_MASK 0x0018
  281. #define WM8350_DC5_RMP_SHIFT 3
  282. #define WM8350_DC5_FBSRC_MASK 0x0003
  283. #define WM8350_DC5_FBSRC_SHIFT 0
  284. /* Bit values for R192 (0xC0) */
  285. #define WM8350_DC5_MODE_BOOST 0
  286. #define WM8350_DC5_MODE_SWITCH 1
  287. #define WM8350_DC5_HIB_MODE_ACTIVE 1
  288. #define WM8350_DC5_HIB_MODE_DISABLE 0
  289. #define WM8350_DC5_HIB_TRIG_NONE 0
  290. #define WM8350_DC5_HIB_TRIG_LPWR1 1
  291. #define WM8350_DC5_HIB_TRIG_LPWR2 2
  292. #define WM8350_DC5_HIB_TRIG_LPWR3 3
  293. #define WM8350_DC5_ILIM_HIGH 0
  294. #define WM8350_DC5_ILIM_LOW 1
  295. #define WM8350_DC5_RMP_30V 0
  296. #define WM8350_DC5_RMP_20V 1
  297. #define WM8350_DC5_RMP_10V 2
  298. #define WM8350_DC5_RMP_5V 3
  299. #define WM8350_DC5_FBSRC_FB2 0
  300. #define WM8350_DC5_FBSRC_ISINKA 1
  301. #define WM8350_DC5_FBSRC_ISINKB 2
  302. #define WM8350_DC5_FBSRC_USB 3
  303. /*
  304. * R193 (0xC1) - DCDC5 Timeouts
  305. */
  306. #define WM8350_DC5_ERRACT_MASK 0xC000
  307. #define WM8350_DC5_ERRACT_SHIFT 14
  308. #define WM8350_DC5_ENSLOT_MASK 0x3C00
  309. #define WM8350_DC5_ENSLOT_SHIFT 10
  310. #define WM8350_DC5_SDSLOT_MASK 0x03C0
  311. #define WM8350_DC5_UVTO_MASK 0x0030
  312. #define WM8350_DC5_SDSLOT_SHIFT 6
  313. /* Bit values for R193 (0xC1) */
  314. #define WM8350_DC5_ERRACT_NONE 0
  315. #define WM8350_DC5_ERRACT_SHUTDOWN_CONV 1
  316. #define WM8350_DC5_ERRACT_SHUTDOWN_SYS 2
  317. /*
  318. * R195 (0xC3) - DCDC6 Control
  319. */
  320. #define WM8350_DC6_OPFLT 0x0400
  321. #define WM8350_DC6_VSEL_MASK 0x007F
  322. #define WM8350_DC6_VSEL_SHIFT 0
  323. /*
  324. * R196 (0xC4) - DCDC6 Timeouts
  325. */
  326. #define WM8350_DC6_ERRACT_MASK 0xC000
  327. #define WM8350_DC6_ERRACT_SHIFT 14
  328. #define WM8350_DC6_ENSLOT_MASK 0x3C00
  329. #define WM8350_DC6_ENSLOT_SHIFT 10
  330. #define WM8350_DC6_SDSLOT_MASK 0x03C0
  331. #define WM8350_DC6_UVTO_MASK 0x0030
  332. #define WM8350_DC6_SDSLOT_SHIFT 6
  333. /* Bit values for R196 (0xC4) */
  334. #define WM8350_DC6_ERRACT_NONE 0
  335. #define WM8350_DC6_ERRACT_SHUTDOWN_CONV 1
  336. #define WM8350_DC6_ERRACT_SHUTDOWN_SYS 2
  337. /*
  338. * R197 (0xC5) - DCDC6 Low Power
  339. */
  340. #define WM8350_DC6_HIB_MODE_MASK 0x7000
  341. #define WM8350_DC6_HIB_TRIG_MASK 0x0300
  342. #define WM8350_DC6_VIMG_MASK 0x007F
  343. /*
  344. * R199 (0xC7) - Limit Switch Control
  345. */
  346. #define WM8350_LS_ERRACT_MASK 0xC000
  347. #define WM8350_LS_ERRACT_SHIFT 14
  348. #define WM8350_LS_ENSLOT_MASK 0x3C00
  349. #define WM8350_LS_ENSLOT_SHIFT 10
  350. #define WM8350_LS_SDSLOT_MASK 0x03C0
  351. #define WM8350_LS_SDSLOT_SHIFT 6
  352. #define WM8350_LS_HIB_MODE 0x0010
  353. #define WM8350_LS_HIB_MODE_MASK 0x0010
  354. #define WM8350_LS_HIB_MODE_SHIFT 4
  355. #define WM8350_LS_HIB_PROT 0x0002
  356. #define WM8350_LS_HIB_PROT_MASK 0x0002
  357. #define WM8350_LS_HIB_PROT_SHIFT 1
  358. #define WM8350_LS_PROT 0x0001
  359. #define WM8350_LS_PROT_MASK 0x0001
  360. #define WM8350_LS_PROT_SHIFT 0
  361. /* Bit values for R199 (0xC7) */
  362. #define WM8350_LS_ERRACT_NONE 0
  363. #define WM8350_LS_ERRACT_SHUTDOWN_CONV 1
  364. #define WM8350_LS_ERRACT_SHUTDOWN_SYS 2
  365. /*
  366. * R200 (0xC8) - LDO1 Control
  367. */
  368. #define WM8350_LDO1_SWI 0x4000
  369. #define WM8350_LDO1_OPFLT 0x0400
  370. #define WM8350_LDO1_VSEL_MASK 0x001F
  371. #define WM8350_LDO1_VSEL_SHIFT 0
  372. /*
  373. * R201 (0xC9) - LDO1 Timeouts
  374. */
  375. #define WM8350_LDO1_ERRACT_MASK 0xC000
  376. #define WM8350_LDO1_ERRACT_SHIFT 14
  377. #define WM8350_LDO1_ENSLOT_MASK 0x3C00
  378. #define WM8350_LDO1_ENSLOT_SHIFT 10
  379. #define WM8350_LDO1_SDSLOT_MASK 0x03C0
  380. #define WM8350_LDO1_UVTO_MASK 0x0030
  381. #define WM8350_LDO1_SDSLOT_SHIFT 6
  382. /* Bit values for R201 (0xC9) */
  383. #define WM8350_LDO1_ERRACT_NONE 0
  384. #define WM8350_LDO1_ERRACT_SHUTDOWN_CONV 1
  385. #define WM8350_LDO1_ERRACT_SHUTDOWN_SYS 2
  386. /*
  387. * R202 (0xCA) - LDO1 Low Power
  388. */
  389. #define WM8350_LDO1_HIB_MODE_MASK 0x3000
  390. #define WM8350_LDO1_HIB_TRIG_MASK 0x0300
  391. #define WM8350_LDO1_VIMG_MASK 0x001F
  392. #define WM8350_LDO1_HIB_MODE_DIS (0x1 << 12)
  393. /*
  394. * R203 (0xCB) - LDO2 Control
  395. */
  396. #define WM8350_LDO2_SWI 0x4000
  397. #define WM8350_LDO2_OPFLT 0x0400
  398. #define WM8350_LDO2_VSEL_MASK 0x001F
  399. #define WM8350_LDO2_VSEL_SHIFT 0
  400. /*
  401. * R204 (0xCC) - LDO2 Timeouts
  402. */
  403. #define WM8350_LDO2_ERRACT_MASK 0xC000
  404. #define WM8350_LDO2_ERRACT_SHIFT 14
  405. #define WM8350_LDO2_ENSLOT_MASK 0x3C00
  406. #define WM8350_LDO2_ENSLOT_SHIFT 10
  407. #define WM8350_LDO2_SDSLOT_MASK 0x03C0
  408. #define WM8350_LDO2_SDSLOT_SHIFT 6
  409. /* Bit values for R204 (0xCC) */
  410. #define WM8350_LDO2_ERRACT_NONE 0
  411. #define WM8350_LDO2_ERRACT_SHUTDOWN_CONV 1
  412. #define WM8350_LDO2_ERRACT_SHUTDOWN_SYS 2
  413. /*
  414. * R205 (0xCD) - LDO2 Low Power
  415. */
  416. #define WM8350_LDO2_HIB_MODE_MASK 0x3000
  417. #define WM8350_LDO2_HIB_TRIG_MASK 0x0300
  418. #define WM8350_LDO2_VIMG_MASK 0x001F
  419. /*
  420. * R206 (0xCE) - LDO3 Control
  421. */
  422. #define WM8350_LDO3_SWI 0x4000
  423. #define WM8350_LDO3_OPFLT 0x0400
  424. #define WM8350_LDO3_VSEL_MASK 0x001F
  425. #define WM8350_LDO3_VSEL_SHIFT 0
  426. /*
  427. * R207 (0xCF) - LDO3 Timeouts
  428. */
  429. #define WM8350_LDO3_ERRACT_MASK 0xC000
  430. #define WM8350_LDO3_ERRACT_SHIFT 14
  431. #define WM8350_LDO3_ENSLOT_MASK 0x3C00
  432. #define WM8350_LDO3_ENSLOT_SHIFT 10
  433. #define WM8350_LDO3_SDSLOT_MASK 0x03C0
  434. #define WM8350_LDO3_UVTO_MASK 0x0030
  435. #define WM8350_LDO3_SDSLOT_SHIFT 6
  436. /* Bit values for R207 (0xCF) */
  437. #define WM8350_LDO3_ERRACT_NONE 0
  438. #define WM8350_LDO3_ERRACT_SHUTDOWN_CONV 1
  439. #define WM8350_LDO3_ERRACT_SHUTDOWN_SYS 2
  440. /*
  441. * R208 (0xD0) - LDO3 Low Power
  442. */
  443. #define WM8350_LDO3_HIB_MODE_MASK 0x3000
  444. #define WM8350_LDO3_HIB_TRIG_MASK 0x0300
  445. #define WM8350_LDO3_VIMG_MASK 0x001F
  446. /*
  447. * R209 (0xD1) - LDO4 Control
  448. */
  449. #define WM8350_LDO4_SWI 0x4000
  450. #define WM8350_LDO4_OPFLT 0x0400
  451. #define WM8350_LDO4_VSEL_MASK 0x001F
  452. #define WM8350_LDO4_VSEL_SHIFT 0
  453. /*
  454. * R210 (0xD2) - LDO4 Timeouts
  455. */
  456. #define WM8350_LDO4_ERRACT_MASK 0xC000
  457. #define WM8350_LDO4_ERRACT_SHIFT 14
  458. #define WM8350_LDO4_ENSLOT_MASK 0x3C00
  459. #define WM8350_LDO4_ENSLOT_SHIFT 10
  460. #define WM8350_LDO4_SDSLOT_MASK 0x03C0
  461. #define WM8350_LDO4_UVTO_MASK 0x0030
  462. #define WM8350_LDO4_SDSLOT_SHIFT 6
  463. /* Bit values for R210 (0xD2) */
  464. #define WM8350_LDO4_ERRACT_NONE 0
  465. #define WM8350_LDO4_ERRACT_SHUTDOWN_CONV 1
  466. #define WM8350_LDO4_ERRACT_SHUTDOWN_SYS 2
  467. /*
  468. * R211 (0xD3) - LDO4 Low Power
  469. */
  470. #define WM8350_LDO4_HIB_MODE_MASK 0x3000
  471. #define WM8350_LDO4_HIB_TRIG_MASK 0x0300
  472. #define WM8350_LDO4_VIMG_MASK 0x001F
  473. /*
  474. * R215 (0xD7) - VCC_FAULT Masks
  475. */
  476. #define WM8350_LS_FAULT 0x8000
  477. #define WM8350_LDO4_FAULT 0x0800
  478. #define WM8350_LDO3_FAULT 0x0400
  479. #define WM8350_LDO2_FAULT 0x0200
  480. #define WM8350_LDO1_FAULT 0x0100
  481. #define WM8350_DC6_FAULT 0x0020
  482. #define WM8350_DC5_FAULT 0x0010
  483. #define WM8350_DC4_FAULT 0x0008
  484. #define WM8350_DC3_FAULT 0x0004
  485. #define WM8350_DC2_FAULT 0x0002
  486. #define WM8350_DC1_FAULT 0x0001
  487. /*
  488. * R216 (0xD8) - Main Bandgap Control
  489. */
  490. #define WM8350_MBG_LOAD_FUSES 0x8000
  491. #define WM8350_MBG_FUSE_WPREP 0x4000
  492. #define WM8350_MBG_FUSE_WRITE 0x2000
  493. #define WM8350_MBG_FUSE_TRIM_MASK 0x1F00
  494. #define WM8350_MBG_TRIM_SRC 0x0020
  495. #define WM8350_MBG_USER_TRIM_MASK 0x001F
  496. /*
  497. * R217 (0xD9) - OSC Control
  498. */
  499. #define WM8350_OSC_LOAD_FUSES 0x8000
  500. #define WM8350_OSC_FUSE_WPREP 0x4000
  501. #define WM8350_OSC_FUSE_WRITE 0x2000
  502. #define WM8350_OSC_FUSE_TRIM_MASK 0x0F00
  503. #define WM8350_OSC_TRIM_SRC 0x0020
  504. #define WM8350_OSC_USER_TRIM_MASK 0x000F
  505. /*
  506. * R248 (0xF8) - DCDC1 Force PWM
  507. */
  508. #define WM8350_DCDC1_FORCE_PWM_ENA 0x0010
  509. /*
  510. * R250 (0xFA) - DCDC3 Force PWM
  511. */
  512. #define WM8350_DCDC3_FORCE_PWM_ENA 0x0010
  513. /*
  514. * R251 (0xFB) - DCDC4 Force PWM
  515. */
  516. #define WM8350_DCDC4_FORCE_PWM_ENA 0x0010
  517. /*
  518. * R253 (0xFD) - DCDC1 Force PWM
  519. */
  520. #define WM8350_DCDC6_FORCE_PWM_ENA 0x0010
  521. /*
  522. * DCDC's
  523. */
  524. #define WM8350_DCDC_1 0
  525. #define WM8350_DCDC_2 1
  526. #define WM8350_DCDC_3 2
  527. #define WM8350_DCDC_4 3
  528. #define WM8350_DCDC_5 4
  529. #define WM8350_DCDC_6 5
  530. /* DCDC modes */
  531. #define WM8350_DCDC_ACTIVE_STANDBY 0
  532. #define WM8350_DCDC_ACTIVE_PULSE 1
  533. #define WM8350_DCDC_SLEEP_NORMAL 0
  534. #define WM8350_DCDC_SLEEP_LOW 1
  535. /* DCDC Low power (Hibernate) mode */
  536. #define WM8350_DCDC_HIB_MODE_CUR (0 << 12)
  537. #define WM8350_DCDC_HIB_MODE_IMAGE (1 << 12)
  538. #define WM8350_DCDC_HIB_MODE_STANDBY (2 << 12)
  539. #define WM8350_DCDC_HIB_MODE_LDO (4 << 12)
  540. #define WM8350_DCDC_HIB_MODE_LDO_IM (5 << 12)
  541. #define WM8350_DCDC_HIB_MODE_DIS (7 << 12)
  542. #define WM8350_DCDC_HIB_MODE_MASK (7 << 12)
  543. /* DCDC Low Power (Hibernate) signal */
  544. #define WM8350_DCDC_HIB_SIG_REG (0 << 8)
  545. #define WM8350_DCDC_HIB_SIG_LPWR1 (1 << 8)
  546. #define WM8350_DCDC_HIB_SIG_LPWR2 (2 << 8)
  547. #define WM8350_DCDC_HIB_SIG_LPWR3 (3 << 8)
  548. /* LDO Low power (Hibernate) mode */
  549. #define WM8350_LDO_HIB_MODE_IMAGE (0 << 0)
  550. #define WM8350_LDO_HIB_MODE_DIS (1 << 0)
  551. /* LDO Low Power (Hibernate) signal */
  552. #define WM8350_LDO_HIB_SIG_REG (0 << 8)
  553. #define WM8350_LDO_HIB_SIG_LPWR1 (1 << 8)
  554. #define WM8350_LDO_HIB_SIG_LPWR2 (2 << 8)
  555. #define WM8350_LDO_HIB_SIG_LPWR3 (3 << 8)
  556. /*
  557. * LDOs
  558. */
  559. #define WM8350_LDO_1 6
  560. #define WM8350_LDO_2 7
  561. #define WM8350_LDO_3 8
  562. #define WM8350_LDO_4 9
  563. /*
  564. * ISINKs
  565. */
  566. #define WM8350_ISINK_A 10
  567. #define WM8350_ISINK_B 11
  568. #define WM8350_ISINK_MODE_BOOST 0
  569. #define WM8350_ISINK_MODE_SWITCH 1
  570. #define WM8350_ISINK_ILIM_NORMAL 0
  571. #define WM8350_ISINK_ILIM_LOW 1
  572. #define WM8350_ISINK_FLASH_DISABLE 0
  573. #define WM8350_ISINK_FLASH_ENABLE 1
  574. #define WM8350_ISINK_FLASH_TRIG_BIT 0
  575. #define WM8350_ISINK_FLASH_TRIG_GPIO 1
  576. #define WM8350_ISINK_FLASH_MODE_EN (1 << 13)
  577. #define WM8350_ISINK_FLASH_MODE_DIS (0 << 13)
  578. #define WM8350_ISINK_FLASH_DUR_32MS (0 << 8)
  579. #define WM8350_ISINK_FLASH_DUR_64MS (1 << 8)
  580. #define WM8350_ISINK_FLASH_DUR_96MS (2 << 8)
  581. #define WM8350_ISINK_FLASH_DUR_1024MS (3 << 8)
  582. #define WM8350_ISINK_FLASH_ON_INSTANT (0 << 4)
  583. #define WM8350_ISINK_FLASH_ON_0_25S (1 << 4)
  584. #define WM8350_ISINK_FLASH_ON_0_50S (2 << 4)
  585. #define WM8350_ISINK_FLASH_ON_1_00S (3 << 4)
  586. #define WM8350_ISINK_FLASH_ON_1_95S (1 << 4)
  587. #define WM8350_ISINK_FLASH_ON_3_91S (2 << 4)
  588. #define WM8350_ISINK_FLASH_ON_7_80S (3 << 4)
  589. #define WM8350_ISINK_FLASH_OFF_INSTANT (0 << 0)
  590. #define WM8350_ISINK_FLASH_OFF_0_25S (1 << 0)
  591. #define WM8350_ISINK_FLASH_OFF_0_50S (2 << 0)
  592. #define WM8350_ISINK_FLASH_OFF_1_00S (3 << 0)
  593. #define WM8350_ISINK_FLASH_OFF_1_95S (1 << 0)
  594. #define WM8350_ISINK_FLASH_OFF_3_91S (2 << 0)
  595. #define WM8350_ISINK_FLASH_OFF_7_80S (3 << 0)
  596. /*
  597. * Regulator Interrupts.
  598. */
  599. #define WM8350_IRQ_CS1 13
  600. #define WM8350_IRQ_CS2 14
  601. #define WM8350_IRQ_UV_LDO4 25
  602. #define WM8350_IRQ_UV_LDO3 26
  603. #define WM8350_IRQ_UV_LDO2 27
  604. #define WM8350_IRQ_UV_LDO1 28
  605. #define WM8350_IRQ_UV_DC6 29
  606. #define WM8350_IRQ_UV_DC5 30
  607. #define WM8350_IRQ_UV_DC4 31
  608. #define WM8350_IRQ_UV_DC3 32
  609. #define WM8350_IRQ_UV_DC2 33
  610. #define WM8350_IRQ_UV_DC1 34
  611. #define WM8350_IRQ_OC_LS 35
  612. #define NUM_WM8350_REGULATORS 12
  613. #endif