setup-common.c 17 KB

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  1. /*
  2. * Common boot and setup code for both 32-bit and 64-bit.
  3. * Extracted from arch/powerpc/kernel/setup_64.c.
  4. *
  5. * Copyright (C) 2001 PPC64 Team, IBM Corp
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #undef DEBUG
  13. #include <linux/module.h>
  14. #include <linux/string.h>
  15. #include <linux/sched.h>
  16. #include <linux/init.h>
  17. #include <linux/kernel.h>
  18. #include <linux/reboot.h>
  19. #include <linux/delay.h>
  20. #include <linux/initrd.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/seq_file.h>
  23. #include <linux/ioport.h>
  24. #include <linux/console.h>
  25. #include <linux/screen_info.h>
  26. #include <linux/root_dev.h>
  27. #include <linux/notifier.h>
  28. #include <linux/cpu.h>
  29. #include <linux/unistd.h>
  30. #include <linux/serial.h>
  31. #include <linux/serial_8250.h>
  32. #include <linux/debugfs.h>
  33. #include <linux/percpu.h>
  34. #include <linux/memblock.h>
  35. #include <linux/of_platform.h>
  36. #include <asm/io.h>
  37. #include <asm/paca.h>
  38. #include <asm/prom.h>
  39. #include <asm/processor.h>
  40. #include <asm/vdso_datapage.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/smp.h>
  43. #include <asm/elf.h>
  44. #include <asm/machdep.h>
  45. #include <asm/time.h>
  46. #include <asm/cputable.h>
  47. #include <asm/sections.h>
  48. #include <asm/firmware.h>
  49. #include <asm/btext.h>
  50. #include <asm/nvram.h>
  51. #include <asm/setup.h>
  52. #include <asm/system.h>
  53. #include <asm/rtas.h>
  54. #include <asm/iommu.h>
  55. #include <asm/serial.h>
  56. #include <asm/cache.h>
  57. #include <asm/page.h>
  58. #include <asm/mmu.h>
  59. #include <asm/xmon.h>
  60. #include <asm/cputhreads.h>
  61. #include <mm/mmu_decl.h>
  62. #include "setup.h"
  63. #ifdef DEBUG
  64. #include <asm/udbg.h>
  65. #define DBG(fmt...) udbg_printf(fmt)
  66. #else
  67. #define DBG(fmt...)
  68. #endif
  69. /* The main machine-dep calls structure
  70. */
  71. struct machdep_calls ppc_md;
  72. EXPORT_SYMBOL(ppc_md);
  73. struct machdep_calls *machine_id;
  74. EXPORT_SYMBOL(machine_id);
  75. unsigned long klimit = (unsigned long) _end;
  76. char cmd_line[COMMAND_LINE_SIZE];
  77. /*
  78. * This still seems to be needed... -- paulus
  79. */
  80. struct screen_info screen_info = {
  81. .orig_x = 0,
  82. .orig_y = 25,
  83. .orig_video_cols = 80,
  84. .orig_video_lines = 25,
  85. .orig_video_isVGA = 1,
  86. .orig_video_points = 16
  87. };
  88. /* Variables required to store legacy IO irq routing */
  89. int of_i8042_kbd_irq;
  90. int of_i8042_aux_irq;
  91. #ifdef __DO_IRQ_CANON
  92. /* XXX should go elsewhere eventually */
  93. int ppc_do_canonicalize_irqs;
  94. EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
  95. #endif
  96. /* also used by kexec */
  97. void machine_shutdown(void)
  98. {
  99. if (ppc_md.machine_shutdown)
  100. ppc_md.machine_shutdown();
  101. }
  102. void machine_restart(char *cmd)
  103. {
  104. machine_shutdown();
  105. if (ppc_md.restart)
  106. ppc_md.restart(cmd);
  107. #ifdef CONFIG_SMP
  108. smp_send_stop();
  109. #endif
  110. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  111. local_irq_disable();
  112. while (1) ;
  113. }
  114. void machine_power_off(void)
  115. {
  116. machine_shutdown();
  117. if (ppc_md.power_off)
  118. ppc_md.power_off();
  119. #ifdef CONFIG_SMP
  120. smp_send_stop();
  121. #endif
  122. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  123. local_irq_disable();
  124. while (1) ;
  125. }
  126. /* Used by the G5 thermal driver */
  127. EXPORT_SYMBOL_GPL(machine_power_off);
  128. void (*pm_power_off)(void) = machine_power_off;
  129. EXPORT_SYMBOL_GPL(pm_power_off);
  130. void machine_halt(void)
  131. {
  132. machine_shutdown();
  133. if (ppc_md.halt)
  134. ppc_md.halt();
  135. #ifdef CONFIG_SMP
  136. smp_send_stop();
  137. #endif
  138. printk(KERN_EMERG "System Halted, OK to turn off power\n");
  139. local_irq_disable();
  140. while (1) ;
  141. }
  142. #ifdef CONFIG_TAU
  143. extern u32 cpu_temp(unsigned long cpu);
  144. extern u32 cpu_temp_both(unsigned long cpu);
  145. #endif /* CONFIG_TAU */
  146. #ifdef CONFIG_SMP
  147. DEFINE_PER_CPU(unsigned int, cpu_pvr);
  148. #endif
  149. static void show_cpuinfo_summary(struct seq_file *m)
  150. {
  151. struct device_node *root;
  152. const char *model = NULL;
  153. #if defined(CONFIG_SMP) && defined(CONFIG_PPC32)
  154. unsigned long bogosum = 0;
  155. int i;
  156. for_each_online_cpu(i)
  157. bogosum += loops_per_jiffy;
  158. seq_printf(m, "total bogomips\t: %lu.%02lu\n",
  159. bogosum/(500000/HZ), bogosum/(5000/HZ) % 100);
  160. #endif /* CONFIG_SMP && CONFIG_PPC32 */
  161. seq_printf(m, "timebase\t: %lu\n", ppc_tb_freq);
  162. if (ppc_md.name)
  163. seq_printf(m, "platform\t: %s\n", ppc_md.name);
  164. root = of_find_node_by_path("/");
  165. if (root)
  166. model = of_get_property(root, "model", NULL);
  167. if (model)
  168. seq_printf(m, "model\t\t: %s\n", model);
  169. of_node_put(root);
  170. if (ppc_md.show_cpuinfo != NULL)
  171. ppc_md.show_cpuinfo(m);
  172. #ifdef CONFIG_PPC32
  173. /* Display the amount of memory */
  174. seq_printf(m, "Memory\t\t: %d MB\n",
  175. (unsigned int)(total_memory / (1024 * 1024)));
  176. #endif
  177. }
  178. static int show_cpuinfo(struct seq_file *m, void *v)
  179. {
  180. unsigned long cpu_id = (unsigned long)v - 1;
  181. unsigned int pvr;
  182. unsigned short maj;
  183. unsigned short min;
  184. /* We only show online cpus: disable preempt (overzealous, I
  185. * knew) to prevent cpu going down. */
  186. preempt_disable();
  187. if (!cpu_online(cpu_id)) {
  188. preempt_enable();
  189. return 0;
  190. }
  191. #ifdef CONFIG_SMP
  192. pvr = per_cpu(cpu_pvr, cpu_id);
  193. #else
  194. pvr = mfspr(SPRN_PVR);
  195. #endif
  196. maj = (pvr >> 8) & 0xFF;
  197. min = pvr & 0xFF;
  198. seq_printf(m, "processor\t: %lu\n", cpu_id);
  199. seq_printf(m, "cpu\t\t: ");
  200. if (cur_cpu_spec->pvr_mask)
  201. seq_printf(m, "%s", cur_cpu_spec->cpu_name);
  202. else
  203. seq_printf(m, "unknown (%08x)", pvr);
  204. #ifdef CONFIG_ALTIVEC
  205. if (cpu_has_feature(CPU_FTR_ALTIVEC))
  206. seq_printf(m, ", altivec supported");
  207. #endif /* CONFIG_ALTIVEC */
  208. seq_printf(m, "\n");
  209. #ifdef CONFIG_TAU
  210. if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
  211. #ifdef CONFIG_TAU_AVERAGE
  212. /* more straightforward, but potentially misleading */
  213. seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
  214. cpu_temp(cpu_id));
  215. #else
  216. /* show the actual temp sensor range */
  217. u32 temp;
  218. temp = cpu_temp_both(cpu_id);
  219. seq_printf(m, "temperature \t: %u-%u C (uncalibrated)\n",
  220. temp & 0xff, temp >> 16);
  221. #endif
  222. }
  223. #endif /* CONFIG_TAU */
  224. /*
  225. * Assume here that all clock rates are the same in a
  226. * smp system. -- Cort
  227. */
  228. if (ppc_proc_freq)
  229. seq_printf(m, "clock\t\t: %lu.%06luMHz\n",
  230. ppc_proc_freq / 1000000, ppc_proc_freq % 1000000);
  231. if (ppc_md.show_percpuinfo != NULL)
  232. ppc_md.show_percpuinfo(m, cpu_id);
  233. /* If we are a Freescale core do a simple check so
  234. * we dont have to keep adding cases in the future */
  235. if (PVR_VER(pvr) & 0x8000) {
  236. switch (PVR_VER(pvr)) {
  237. case 0x8000: /* 7441/7450/7451, Voyager */
  238. case 0x8001: /* 7445/7455, Apollo 6 */
  239. case 0x8002: /* 7447/7457, Apollo 7 */
  240. case 0x8003: /* 7447A, Apollo 7 PM */
  241. case 0x8004: /* 7448, Apollo 8 */
  242. case 0x800c: /* 7410, Nitro */
  243. maj = ((pvr >> 8) & 0xF);
  244. min = PVR_MIN(pvr);
  245. break;
  246. default: /* e500/book-e */
  247. maj = PVR_MAJ(pvr);
  248. min = PVR_MIN(pvr);
  249. break;
  250. }
  251. } else {
  252. switch (PVR_VER(pvr)) {
  253. case 0x0020: /* 403 family */
  254. maj = PVR_MAJ(pvr) + 1;
  255. min = PVR_MIN(pvr);
  256. break;
  257. case 0x1008: /* 740P/750P ?? */
  258. maj = ((pvr >> 8) & 0xFF) - 1;
  259. min = pvr & 0xFF;
  260. break;
  261. default:
  262. maj = (pvr >> 8) & 0xFF;
  263. min = pvr & 0xFF;
  264. break;
  265. }
  266. }
  267. seq_printf(m, "revision\t: %hd.%hd (pvr %04x %04x)\n",
  268. maj, min, PVR_VER(pvr), PVR_REV(pvr));
  269. #ifdef CONFIG_PPC32
  270. seq_printf(m, "bogomips\t: %lu.%02lu\n",
  271. loops_per_jiffy / (500000/HZ),
  272. (loops_per_jiffy / (5000/HZ)) % 100);
  273. #endif
  274. #ifdef CONFIG_SMP
  275. seq_printf(m, "\n");
  276. #endif
  277. preempt_enable();
  278. /* If this is the last cpu, print the summary */
  279. if (cpumask_next(cpu_id, cpu_online_mask) >= nr_cpu_ids)
  280. show_cpuinfo_summary(m);
  281. return 0;
  282. }
  283. static void *c_start(struct seq_file *m, loff_t *pos)
  284. {
  285. if (*pos == 0) /* just in case, cpu 0 is not the first */
  286. *pos = cpumask_first(cpu_online_mask);
  287. else
  288. *pos = cpumask_next(*pos - 1, cpu_online_mask);
  289. if ((*pos) < nr_cpu_ids)
  290. return (void *)(unsigned long)(*pos + 1);
  291. return NULL;
  292. }
  293. static void *c_next(struct seq_file *m, void *v, loff_t *pos)
  294. {
  295. (*pos)++;
  296. return c_start(m, pos);
  297. }
  298. static void c_stop(struct seq_file *m, void *v)
  299. {
  300. }
  301. const struct seq_operations cpuinfo_op = {
  302. .start =c_start,
  303. .next = c_next,
  304. .stop = c_stop,
  305. .show = show_cpuinfo,
  306. };
  307. void __init check_for_initrd(void)
  308. {
  309. #ifdef CONFIG_BLK_DEV_INITRD
  310. DBG(" -> check_for_initrd() initrd_start=0x%lx initrd_end=0x%lx\n",
  311. initrd_start, initrd_end);
  312. /* If we were passed an initrd, set the ROOT_DEV properly if the values
  313. * look sensible. If not, clear initrd reference.
  314. */
  315. if (is_kernel_addr(initrd_start) && is_kernel_addr(initrd_end) &&
  316. initrd_end > initrd_start)
  317. ROOT_DEV = Root_RAM0;
  318. else
  319. initrd_start = initrd_end = 0;
  320. if (initrd_start)
  321. printk("Found initrd at 0x%lx:0x%lx\n", initrd_start, initrd_end);
  322. DBG(" <- check_for_initrd()\n");
  323. #endif /* CONFIG_BLK_DEV_INITRD */
  324. }
  325. #ifdef CONFIG_SMP
  326. int threads_per_core, threads_shift;
  327. cpumask_t threads_core_mask;
  328. static void __init cpu_init_thread_core_maps(int tpc)
  329. {
  330. int i;
  331. threads_per_core = tpc;
  332. threads_core_mask = CPU_MASK_NONE;
  333. /* This implementation only supports power of 2 number of threads
  334. * for simplicity and performance
  335. */
  336. threads_shift = ilog2(tpc);
  337. BUG_ON(tpc != (1 << threads_shift));
  338. for (i = 0; i < tpc; i++)
  339. cpu_set(i, threads_core_mask);
  340. printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
  341. tpc, tpc > 1 ? "s" : "");
  342. printk(KERN_DEBUG " (thread shift is %d)\n", threads_shift);
  343. }
  344. /**
  345. * setup_cpu_maps - initialize the following cpu maps:
  346. * cpu_possible_mask
  347. * cpu_present_mask
  348. *
  349. * Having the possible map set up early allows us to restrict allocations
  350. * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
  351. *
  352. * We do not initialize the online map here; cpus set their own bits in
  353. * cpu_online_mask as they come up.
  354. *
  355. * This function is valid only for Open Firmware systems. finish_device_tree
  356. * must be called before using this.
  357. *
  358. * While we're here, we may as well set the "physical" cpu ids in the paca.
  359. *
  360. * NOTE: This must match the parsing done in early_init_dt_scan_cpus.
  361. */
  362. void __init smp_setup_cpu_maps(void)
  363. {
  364. struct device_node *dn = NULL;
  365. int cpu = 0;
  366. int nthreads = 1;
  367. DBG("smp_setup_cpu_maps()\n");
  368. while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
  369. const int *intserv;
  370. int j, len;
  371. DBG(" * %s...\n", dn->full_name);
  372. intserv = of_get_property(dn, "ibm,ppc-interrupt-server#s",
  373. &len);
  374. if (intserv) {
  375. nthreads = len / sizeof(int);
  376. DBG(" ibm,ppc-interrupt-server#s -> %d threads\n",
  377. nthreads);
  378. } else {
  379. DBG(" no ibm,ppc-interrupt-server#s -> 1 thread\n");
  380. intserv = of_get_property(dn, "reg", NULL);
  381. if (!intserv)
  382. intserv = &cpu; /* assume logical == phys */
  383. }
  384. for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
  385. DBG(" thread %d -> cpu %d (hard id %d)\n",
  386. j, cpu, intserv[j]);
  387. set_cpu_present(cpu, true);
  388. set_hard_smp_processor_id(cpu, intserv[j]);
  389. set_cpu_possible(cpu, true);
  390. cpu++;
  391. }
  392. }
  393. /* If no SMT supported, nthreads is forced to 1 */
  394. if (!cpu_has_feature(CPU_FTR_SMT)) {
  395. DBG(" SMT disabled ! nthreads forced to 1\n");
  396. nthreads = 1;
  397. }
  398. #ifdef CONFIG_PPC64
  399. /*
  400. * On pSeries LPAR, we need to know how many cpus
  401. * could possibly be added to this partition.
  402. */
  403. if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR) &&
  404. (dn = of_find_node_by_path("/rtas"))) {
  405. int num_addr_cell, num_size_cell, maxcpus;
  406. const unsigned int *ireg;
  407. num_addr_cell = of_n_addr_cells(dn);
  408. num_size_cell = of_n_size_cells(dn);
  409. ireg = of_get_property(dn, "ibm,lrdr-capacity", NULL);
  410. if (!ireg)
  411. goto out;
  412. maxcpus = ireg[num_addr_cell + num_size_cell];
  413. /* Double maxcpus for processors which have SMT capability */
  414. if (cpu_has_feature(CPU_FTR_SMT))
  415. maxcpus *= nthreads;
  416. if (maxcpus > NR_CPUS) {
  417. printk(KERN_WARNING
  418. "Partition configured for %d cpus, "
  419. "operating system maximum is %d.\n",
  420. maxcpus, NR_CPUS);
  421. maxcpus = NR_CPUS;
  422. } else
  423. printk(KERN_INFO "Partition configured for %d cpus.\n",
  424. maxcpus);
  425. for (cpu = 0; cpu < maxcpus; cpu++)
  426. set_cpu_possible(cpu, true);
  427. out:
  428. of_node_put(dn);
  429. }
  430. vdso_data->processorCount = num_present_cpus();
  431. #endif /* CONFIG_PPC64 */
  432. /* Initialize CPU <=> thread mapping/
  433. *
  434. * WARNING: We assume that the number of threads is the same for
  435. * every CPU in the system. If that is not the case, then some code
  436. * here will have to be reworked
  437. */
  438. cpu_init_thread_core_maps(nthreads);
  439. free_unused_pacas();
  440. }
  441. #endif /* CONFIG_SMP */
  442. #ifdef CONFIG_PCSPKR_PLATFORM
  443. static __init int add_pcspkr(void)
  444. {
  445. struct device_node *np;
  446. struct platform_device *pd;
  447. int ret;
  448. np = of_find_compatible_node(NULL, NULL, "pnpPNP,100");
  449. of_node_put(np);
  450. if (!np)
  451. return -ENODEV;
  452. pd = platform_device_alloc("pcspkr", -1);
  453. if (!pd)
  454. return -ENOMEM;
  455. ret = platform_device_add(pd);
  456. if (ret)
  457. platform_device_put(pd);
  458. return ret;
  459. }
  460. device_initcall(add_pcspkr);
  461. #endif /* CONFIG_PCSPKR_PLATFORM */
  462. void probe_machine(void)
  463. {
  464. extern struct machdep_calls __machine_desc_start;
  465. extern struct machdep_calls __machine_desc_end;
  466. /*
  467. * Iterate all ppc_md structures until we find the proper
  468. * one for the current machine type
  469. */
  470. DBG("Probing machine type ...\n");
  471. for (machine_id = &__machine_desc_start;
  472. machine_id < &__machine_desc_end;
  473. machine_id++) {
  474. DBG(" %s ...", machine_id->name);
  475. memcpy(&ppc_md, machine_id, sizeof(struct machdep_calls));
  476. if (ppc_md.probe()) {
  477. DBG(" match !\n");
  478. break;
  479. }
  480. DBG("\n");
  481. }
  482. /* What can we do if we didn't find ? */
  483. if (machine_id >= &__machine_desc_end) {
  484. DBG("No suitable machine found !\n");
  485. for (;;);
  486. }
  487. printk(KERN_INFO "Using %s machine description\n", ppc_md.name);
  488. }
  489. /* Match a class of boards, not a specific device configuration. */
  490. int check_legacy_ioport(unsigned long base_port)
  491. {
  492. struct device_node *parent, *np = NULL;
  493. int ret = -ENODEV;
  494. switch(base_port) {
  495. case I8042_DATA_REG:
  496. if (!(np = of_find_compatible_node(NULL, NULL, "pnpPNP,303")))
  497. np = of_find_compatible_node(NULL, NULL, "pnpPNP,f03");
  498. if (np) {
  499. parent = of_get_parent(np);
  500. of_i8042_kbd_irq = irq_of_parse_and_map(parent, 0);
  501. if (!of_i8042_kbd_irq)
  502. of_i8042_kbd_irq = 1;
  503. of_i8042_aux_irq = irq_of_parse_and_map(parent, 1);
  504. if (!of_i8042_aux_irq)
  505. of_i8042_aux_irq = 12;
  506. of_node_put(np);
  507. np = parent;
  508. break;
  509. }
  510. np = of_find_node_by_type(NULL, "8042");
  511. /* Pegasos has no device_type on its 8042 node, look for the
  512. * name instead */
  513. if (!np)
  514. np = of_find_node_by_name(NULL, "8042");
  515. break;
  516. case FDC_BASE: /* FDC1 */
  517. np = of_find_node_by_type(NULL, "fdc");
  518. break;
  519. #ifdef CONFIG_PPC_PREP
  520. case _PIDXR:
  521. case _PNPWRP:
  522. case PNPBIOS_BASE:
  523. /* implement me */
  524. #endif
  525. default:
  526. /* ipmi is supposed to fail here */
  527. break;
  528. }
  529. if (!np)
  530. return ret;
  531. parent = of_get_parent(np);
  532. if (parent) {
  533. if (strcmp(parent->type, "isa") == 0)
  534. ret = 0;
  535. of_node_put(parent);
  536. }
  537. of_node_put(np);
  538. return ret;
  539. }
  540. EXPORT_SYMBOL(check_legacy_ioport);
  541. static int ppc_panic_event(struct notifier_block *this,
  542. unsigned long event, void *ptr)
  543. {
  544. ppc_md.panic(ptr); /* May not return */
  545. return NOTIFY_DONE;
  546. }
  547. static struct notifier_block ppc_panic_block = {
  548. .notifier_call = ppc_panic_event,
  549. .priority = INT_MIN /* may not return; must be done last */
  550. };
  551. void __init setup_panic(void)
  552. {
  553. atomic_notifier_chain_register(&panic_notifier_list, &ppc_panic_block);
  554. }
  555. #ifdef CONFIG_CHECK_CACHE_COHERENCY
  556. /*
  557. * For platforms that have configurable cache-coherency. This function
  558. * checks that the cache coherency setting of the kernel matches the setting
  559. * left by the firmware, as indicated in the device tree. Since a mismatch
  560. * will eventually result in DMA failures, we print * and error and call
  561. * BUG() in that case.
  562. */
  563. #ifdef CONFIG_NOT_COHERENT_CACHE
  564. #define KERNEL_COHERENCY 0
  565. #else
  566. #define KERNEL_COHERENCY 1
  567. #endif
  568. static int __init check_cache_coherency(void)
  569. {
  570. struct device_node *np;
  571. const void *prop;
  572. int devtree_coherency;
  573. np = of_find_node_by_path("/");
  574. prop = of_get_property(np, "coherency-off", NULL);
  575. of_node_put(np);
  576. devtree_coherency = prop ? 0 : 1;
  577. if (devtree_coherency != KERNEL_COHERENCY) {
  578. printk(KERN_ERR
  579. "kernel coherency:%s != device tree_coherency:%s\n",
  580. KERNEL_COHERENCY ? "on" : "off",
  581. devtree_coherency ? "on" : "off");
  582. BUG();
  583. }
  584. return 0;
  585. }
  586. late_initcall(check_cache_coherency);
  587. #endif /* CONFIG_CHECK_CACHE_COHERENCY */
  588. #ifdef CONFIG_DEBUG_FS
  589. struct dentry *powerpc_debugfs_root;
  590. EXPORT_SYMBOL(powerpc_debugfs_root);
  591. static int powerpc_debugfs_init(void)
  592. {
  593. powerpc_debugfs_root = debugfs_create_dir("powerpc", NULL);
  594. return powerpc_debugfs_root == NULL;
  595. }
  596. arch_initcall(powerpc_debugfs_init);
  597. #endif
  598. static int ppc_dflt_bus_notify(struct notifier_block *nb,
  599. unsigned long action, void *data)
  600. {
  601. struct device *dev = data;
  602. /* We are only intereted in device addition */
  603. if (action != BUS_NOTIFY_ADD_DEVICE)
  604. return 0;
  605. set_dma_ops(dev, &dma_direct_ops);
  606. return NOTIFY_DONE;
  607. }
  608. static struct notifier_block ppc_dflt_plat_bus_notifier = {
  609. .notifier_call = ppc_dflt_bus_notify,
  610. .priority = INT_MAX,
  611. };
  612. static int __init setup_bus_notifier(void)
  613. {
  614. bus_register_notifier(&platform_bus_type, &ppc_dflt_plat_bus_notifier);
  615. return 0;
  616. }
  617. arch_initcall(setup_bus_notifier);