qla_init.c 146 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2011 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/slab.h>
  11. #include <linux/vmalloc.h>
  12. #include "qla_devtbl.h"
  13. #ifdef CONFIG_SPARC
  14. #include <asm/prom.h>
  15. #endif
  16. /*
  17. * QLogic ISP2x00 Hardware Support Function Prototypes.
  18. */
  19. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  20. static int qla2x00_setup_chip(scsi_qla_host_t *);
  21. static int qla2x00_init_rings(scsi_qla_host_t *);
  22. static int qla2x00_fw_ready(scsi_qla_host_t *);
  23. static int qla2x00_configure_hba(scsi_qla_host_t *);
  24. static int qla2x00_configure_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  26. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  27. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  28. static int qla2x00_device_resync(scsi_qla_host_t *);
  29. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  30. uint16_t *);
  31. static int qla2x00_restart_isp(scsi_qla_host_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /* SRB Extensions ---------------------------------------------------------- */
  36. static void
  37. qla2x00_ctx_sp_timeout(unsigned long __data)
  38. {
  39. srb_t *sp = (srb_t *)__data;
  40. struct srb_ctx *ctx;
  41. struct srb_iocb *iocb;
  42. fc_port_t *fcport = sp->fcport;
  43. struct qla_hw_data *ha = fcport->vha->hw;
  44. struct req_que *req;
  45. unsigned long flags;
  46. spin_lock_irqsave(&ha->hardware_lock, flags);
  47. req = ha->req_q_map[0];
  48. req->outstanding_cmds[sp->handle] = NULL;
  49. ctx = sp->ctx;
  50. iocb = ctx->u.iocb_cmd;
  51. iocb->timeout(sp);
  52. iocb->free(sp);
  53. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  54. }
  55. static void
  56. qla2x00_ctx_sp_free(srb_t *sp)
  57. {
  58. struct srb_ctx *ctx = sp->ctx;
  59. struct srb_iocb *iocb = ctx->u.iocb_cmd;
  60. struct scsi_qla_host *vha = sp->fcport->vha;
  61. del_timer(&iocb->timer);
  62. kfree(iocb);
  63. kfree(ctx);
  64. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  65. QLA_VHA_MARK_NOT_BUSY(vha);
  66. }
  67. inline srb_t *
  68. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  69. unsigned long tmo)
  70. {
  71. srb_t *sp = NULL;
  72. struct qla_hw_data *ha = vha->hw;
  73. struct srb_ctx *ctx;
  74. struct srb_iocb *iocb;
  75. uint8_t bail;
  76. QLA_VHA_MARK_BUSY(vha, bail);
  77. if (bail)
  78. return NULL;
  79. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  80. if (!sp)
  81. goto done;
  82. ctx = kzalloc(size, GFP_KERNEL);
  83. if (!ctx) {
  84. mempool_free(sp, ha->srb_mempool);
  85. sp = NULL;
  86. goto done;
  87. }
  88. iocb = kzalloc(sizeof(struct srb_iocb), GFP_KERNEL);
  89. if (!iocb) {
  90. mempool_free(sp, ha->srb_mempool);
  91. sp = NULL;
  92. kfree(ctx);
  93. goto done;
  94. }
  95. memset(sp, 0, sizeof(*sp));
  96. sp->fcport = fcport;
  97. sp->ctx = ctx;
  98. ctx->u.iocb_cmd = iocb;
  99. iocb->free = qla2x00_ctx_sp_free;
  100. init_timer(&iocb->timer);
  101. if (!tmo)
  102. goto done;
  103. iocb->timer.expires = jiffies + tmo * HZ;
  104. iocb->timer.data = (unsigned long)sp;
  105. iocb->timer.function = qla2x00_ctx_sp_timeout;
  106. add_timer(&iocb->timer);
  107. done:
  108. if (!sp)
  109. QLA_VHA_MARK_NOT_BUSY(vha);
  110. return sp;
  111. }
  112. /* Asynchronous Login/Logout Routines -------------------------------------- */
  113. static inline unsigned long
  114. qla2x00_get_async_timeout(struct scsi_qla_host *vha)
  115. {
  116. unsigned long tmo;
  117. struct qla_hw_data *ha = vha->hw;
  118. /* Firmware should use switch negotiated r_a_tov for timeout. */
  119. tmo = ha->r_a_tov / 10 * 2;
  120. if (!IS_FWI2_CAPABLE(ha)) {
  121. /*
  122. * Except for earlier ISPs where the timeout is seeded from the
  123. * initialization control block.
  124. */
  125. tmo = ha->login_timeout;
  126. }
  127. return tmo;
  128. }
  129. static void
  130. qla2x00_async_iocb_timeout(srb_t *sp)
  131. {
  132. fc_port_t *fcport = sp->fcport;
  133. struct srb_ctx *ctx = sp->ctx;
  134. DEBUG2(printk(KERN_WARNING
  135. "scsi(%ld:%x): Async-%s timeout - portid=%02x%02x%02x.\n",
  136. fcport->vha->host_no, sp->handle,
  137. ctx->name, fcport->d_id.b.domain,
  138. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  139. fcport->flags &= ~FCF_ASYNC_SENT;
  140. if (ctx->type == SRB_LOGIN_CMD) {
  141. struct srb_iocb *lio = ctx->u.iocb_cmd;
  142. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  143. /* Retry as needed. */
  144. lio->u.logio.data[0] = MBS_COMMAND_ERROR;
  145. lio->u.logio.data[1] = lio->u.logio.flags & SRB_LOGIN_RETRIED ?
  146. QLA_LOGIO_LOGIN_RETRIED : 0;
  147. qla2x00_post_async_login_done_work(fcport->vha, fcport,
  148. lio->u.logio.data);
  149. }
  150. }
  151. static void
  152. qla2x00_async_login_ctx_done(srb_t *sp)
  153. {
  154. struct srb_ctx *ctx = sp->ctx;
  155. struct srb_iocb *lio = ctx->u.iocb_cmd;
  156. qla2x00_post_async_login_done_work(sp->fcport->vha, sp->fcport,
  157. lio->u.logio.data);
  158. lio->free(sp);
  159. }
  160. int
  161. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  162. uint16_t *data)
  163. {
  164. srb_t *sp;
  165. struct srb_ctx *ctx;
  166. struct srb_iocb *lio;
  167. int rval;
  168. rval = QLA_FUNCTION_FAILED;
  169. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  170. qla2x00_get_async_timeout(vha) + 2);
  171. if (!sp)
  172. goto done;
  173. ctx = sp->ctx;
  174. ctx->type = SRB_LOGIN_CMD;
  175. ctx->name = "login";
  176. lio = ctx->u.iocb_cmd;
  177. lio->timeout = qla2x00_async_iocb_timeout;
  178. lio->done = qla2x00_async_login_ctx_done;
  179. lio->u.logio.flags |= SRB_LOGIN_COND_PLOGI;
  180. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  181. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  182. rval = qla2x00_start_sp(sp);
  183. if (rval != QLA_SUCCESS)
  184. goto done_free_sp;
  185. DEBUG2(printk(KERN_DEBUG
  186. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  187. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  188. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  189. fcport->login_retry));
  190. return rval;
  191. done_free_sp:
  192. lio->free(sp);
  193. done:
  194. return rval;
  195. }
  196. static void
  197. qla2x00_async_logout_ctx_done(srb_t *sp)
  198. {
  199. struct srb_ctx *ctx = sp->ctx;
  200. struct srb_iocb *lio = ctx->u.iocb_cmd;
  201. qla2x00_post_async_logout_done_work(sp->fcport->vha, sp->fcport,
  202. lio->u.logio.data);
  203. lio->free(sp);
  204. }
  205. int
  206. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  207. {
  208. srb_t *sp;
  209. struct srb_ctx *ctx;
  210. struct srb_iocb *lio;
  211. int rval;
  212. rval = QLA_FUNCTION_FAILED;
  213. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  214. qla2x00_get_async_timeout(vha) + 2);
  215. if (!sp)
  216. goto done;
  217. ctx = sp->ctx;
  218. ctx->type = SRB_LOGOUT_CMD;
  219. ctx->name = "logout";
  220. lio = ctx->u.iocb_cmd;
  221. lio->timeout = qla2x00_async_iocb_timeout;
  222. lio->done = qla2x00_async_logout_ctx_done;
  223. rval = qla2x00_start_sp(sp);
  224. if (rval != QLA_SUCCESS)
  225. goto done_free_sp;
  226. DEBUG2(printk(KERN_DEBUG
  227. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  228. fcport->vha->host_no, sp->handle, fcport->loop_id,
  229. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  230. return rval;
  231. done_free_sp:
  232. lio->free(sp);
  233. done:
  234. return rval;
  235. }
  236. static void
  237. qla2x00_async_adisc_ctx_done(srb_t *sp)
  238. {
  239. struct srb_ctx *ctx = sp->ctx;
  240. struct srb_iocb *lio = ctx->u.iocb_cmd;
  241. qla2x00_post_async_adisc_done_work(sp->fcport->vha, sp->fcport,
  242. lio->u.logio.data);
  243. lio->free(sp);
  244. }
  245. int
  246. qla2x00_async_adisc(struct scsi_qla_host *vha, fc_port_t *fcport,
  247. uint16_t *data)
  248. {
  249. srb_t *sp;
  250. struct srb_ctx *ctx;
  251. struct srb_iocb *lio;
  252. int rval;
  253. rval = QLA_FUNCTION_FAILED;
  254. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  255. qla2x00_get_async_timeout(vha) + 2);
  256. if (!sp)
  257. goto done;
  258. ctx = sp->ctx;
  259. ctx->type = SRB_ADISC_CMD;
  260. ctx->name = "adisc";
  261. lio = ctx->u.iocb_cmd;
  262. lio->timeout = qla2x00_async_iocb_timeout;
  263. lio->done = qla2x00_async_adisc_ctx_done;
  264. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  265. lio->u.logio.flags |= SRB_LOGIN_RETRIED;
  266. rval = qla2x00_start_sp(sp);
  267. if (rval != QLA_SUCCESS)
  268. goto done_free_sp;
  269. DEBUG2(printk(KERN_DEBUG
  270. "scsi(%ld:%x): Async-adisc - loop-id=%x portid=%02x%02x%02x.\n",
  271. fcport->vha->host_no, sp->handle, fcport->loop_id,
  272. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  273. return rval;
  274. done_free_sp:
  275. lio->free(sp);
  276. done:
  277. return rval;
  278. }
  279. static void
  280. qla2x00_async_tm_cmd_ctx_done(srb_t *sp)
  281. {
  282. struct srb_ctx *ctx = sp->ctx;
  283. struct srb_iocb *iocb = (struct srb_iocb *)ctx->u.iocb_cmd;
  284. qla2x00_async_tm_cmd_done(sp->fcport->vha, sp->fcport, iocb);
  285. iocb->free(sp);
  286. }
  287. int
  288. qla2x00_async_tm_cmd(fc_port_t *fcport, uint32_t flags, uint32_t lun,
  289. uint32_t tag)
  290. {
  291. struct scsi_qla_host *vha = fcport->vha;
  292. srb_t *sp;
  293. struct srb_ctx *ctx;
  294. struct srb_iocb *tcf;
  295. int rval;
  296. rval = QLA_FUNCTION_FAILED;
  297. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_ctx),
  298. qla2x00_get_async_timeout(vha) + 2);
  299. if (!sp)
  300. goto done;
  301. ctx = sp->ctx;
  302. ctx->type = SRB_TM_CMD;
  303. ctx->name = "tmf";
  304. tcf = ctx->u.iocb_cmd;
  305. tcf->u.tmf.flags = flags;
  306. tcf->u.tmf.lun = lun;
  307. tcf->u.tmf.data = tag;
  308. tcf->timeout = qla2x00_async_iocb_timeout;
  309. tcf->done = qla2x00_async_tm_cmd_ctx_done;
  310. rval = qla2x00_start_sp(sp);
  311. if (rval != QLA_SUCCESS)
  312. goto done_free_sp;
  313. DEBUG2(printk(KERN_DEBUG
  314. "scsi(%ld:%x): Async-tmf - loop-id=%x portid=%02x%02x%02x.\n",
  315. fcport->vha->host_no, sp->handle, fcport->loop_id,
  316. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  317. return rval;
  318. done_free_sp:
  319. tcf->free(sp);
  320. done:
  321. return rval;
  322. }
  323. void
  324. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  325. uint16_t *data)
  326. {
  327. int rval;
  328. switch (data[0]) {
  329. case MBS_COMMAND_COMPLETE:
  330. if (fcport->flags & FCF_FCP2_DEVICE) {
  331. qla2x00_post_async_adisc_work(vha, fcport, data);
  332. break;
  333. }
  334. qla2x00_update_fcport(vha, fcport);
  335. break;
  336. case MBS_COMMAND_ERROR:
  337. fcport->flags &= ~FCF_ASYNC_SENT;
  338. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  339. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  340. else
  341. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  342. break;
  343. case MBS_PORT_ID_USED:
  344. fcport->loop_id = data[1];
  345. qla2x00_post_async_logout_work(vha, fcport, NULL);
  346. qla2x00_post_async_login_work(vha, fcport, NULL);
  347. break;
  348. case MBS_LOOP_ID_USED:
  349. fcport->loop_id++;
  350. rval = qla2x00_find_new_loop_id(vha, fcport);
  351. if (rval != QLA_SUCCESS) {
  352. fcport->flags &= ~FCF_ASYNC_SENT;
  353. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  354. break;
  355. }
  356. qla2x00_post_async_login_work(vha, fcport, NULL);
  357. break;
  358. }
  359. return;
  360. }
  361. void
  362. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  363. uint16_t *data)
  364. {
  365. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  366. return;
  367. }
  368. void
  369. qla2x00_async_adisc_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  370. uint16_t *data)
  371. {
  372. if (data[0] == MBS_COMMAND_COMPLETE) {
  373. qla2x00_update_fcport(vha, fcport);
  374. return;
  375. }
  376. /* Retry login. */
  377. fcport->flags &= ~FCF_ASYNC_SENT;
  378. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  379. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  380. else
  381. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  382. return;
  383. }
  384. void
  385. qla2x00_async_tm_cmd_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  386. struct srb_iocb *iocb)
  387. {
  388. int rval;
  389. uint32_t flags;
  390. uint16_t lun;
  391. flags = iocb->u.tmf.flags;
  392. lun = (uint16_t)iocb->u.tmf.lun;
  393. /* Issue Marker IOCB */
  394. rval = qla2x00_marker(vha, vha->hw->req_q_map[0],
  395. vha->hw->rsp_q_map[0], fcport->loop_id, lun,
  396. flags == TCF_LUN_RESET ? MK_SYNC_ID_LUN : MK_SYNC_ID);
  397. if ((rval != QLA_SUCCESS) || iocb->u.tmf.data) {
  398. DEBUG2_3_11(printk(KERN_WARNING
  399. "%s(%ld): TM IOCB failed (%x).\n",
  400. __func__, vha->host_no, rval));
  401. }
  402. return;
  403. }
  404. /****************************************************************************/
  405. /* QLogic ISP2x00 Hardware Support Functions. */
  406. /****************************************************************************/
  407. /*
  408. * qla2x00_initialize_adapter
  409. * Initialize board.
  410. *
  411. * Input:
  412. * ha = adapter block pointer.
  413. *
  414. * Returns:
  415. * 0 = success
  416. */
  417. int
  418. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  419. {
  420. int rval;
  421. struct qla_hw_data *ha = vha->hw;
  422. struct req_que *req = ha->req_q_map[0];
  423. /* Clear adapter flags. */
  424. vha->flags.online = 0;
  425. ha->flags.chip_reset_done = 0;
  426. vha->flags.reset_active = 0;
  427. ha->flags.pci_channel_io_perm_failure = 0;
  428. ha->flags.eeh_busy = 0;
  429. ha->flags.thermal_supported = 1;
  430. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  431. atomic_set(&vha->loop_state, LOOP_DOWN);
  432. vha->device_flags = DFLG_NO_CABLE;
  433. vha->dpc_flags = 0;
  434. vha->flags.management_server_logged_in = 0;
  435. vha->marker_needed = 0;
  436. ha->isp_abort_cnt = 0;
  437. ha->beacon_blink_led = 0;
  438. set_bit(0, ha->req_qid_map);
  439. set_bit(0, ha->rsp_qid_map);
  440. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  441. rval = ha->isp_ops->pci_config(vha);
  442. if (rval) {
  443. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  444. vha->host_no));
  445. return (rval);
  446. }
  447. ha->isp_ops->reset_chip(vha);
  448. rval = qla2xxx_get_flash_info(vha);
  449. if (rval) {
  450. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  451. vha->host_no));
  452. return (rval);
  453. }
  454. ha->isp_ops->get_flash_version(vha, req->ring);
  455. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  456. ha->isp_ops->nvram_config(vha);
  457. if (ha->flags.disable_serdes) {
  458. /* Mask HBA via NVRAM settings? */
  459. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  460. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  461. vha->port_name[0], vha->port_name[1],
  462. vha->port_name[2], vha->port_name[3],
  463. vha->port_name[4], vha->port_name[5],
  464. vha->port_name[6], vha->port_name[7]);
  465. return QLA_FUNCTION_FAILED;
  466. }
  467. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  468. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  469. rval = ha->isp_ops->chip_diag(vha);
  470. if (rval)
  471. return (rval);
  472. rval = qla2x00_setup_chip(vha);
  473. if (rval)
  474. return (rval);
  475. }
  476. if (IS_QLA84XX(ha)) {
  477. ha->cs84xx = qla84xx_get_chip(vha);
  478. if (!ha->cs84xx) {
  479. qla_printk(KERN_ERR, ha,
  480. "Unable to configure ISP84XX.\n");
  481. return QLA_FUNCTION_FAILED;
  482. }
  483. }
  484. rval = qla2x00_init_rings(vha);
  485. ha->flags.chip_reset_done = 1;
  486. if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) {
  487. /* Issue verify 84xx FW IOCB to complete 84xx initialization */
  488. rval = qla84xx_init_chip(vha);
  489. if (rval != QLA_SUCCESS) {
  490. qla_printk(KERN_ERR, ha,
  491. "Unable to initialize ISP84XX.\n");
  492. qla84xx_put_chip(vha);
  493. }
  494. }
  495. if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha))
  496. qla24xx_read_fcp_prio_cfg(vha);
  497. return (rval);
  498. }
  499. /**
  500. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  501. * @ha: HA context
  502. *
  503. * Returns 0 on success.
  504. */
  505. int
  506. qla2100_pci_config(scsi_qla_host_t *vha)
  507. {
  508. uint16_t w;
  509. unsigned long flags;
  510. struct qla_hw_data *ha = vha->hw;
  511. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  512. pci_set_master(ha->pdev);
  513. pci_try_set_mwi(ha->pdev);
  514. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  515. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  516. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  517. pci_disable_rom(ha->pdev);
  518. /* Get PCI bus information. */
  519. spin_lock_irqsave(&ha->hardware_lock, flags);
  520. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  521. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  522. return QLA_SUCCESS;
  523. }
  524. /**
  525. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  526. * @ha: HA context
  527. *
  528. * Returns 0 on success.
  529. */
  530. int
  531. qla2300_pci_config(scsi_qla_host_t *vha)
  532. {
  533. uint16_t w;
  534. unsigned long flags = 0;
  535. uint32_t cnt;
  536. struct qla_hw_data *ha = vha->hw;
  537. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  538. pci_set_master(ha->pdev);
  539. pci_try_set_mwi(ha->pdev);
  540. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  541. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  542. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  543. w &= ~PCI_COMMAND_INTX_DISABLE;
  544. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  545. /*
  546. * If this is a 2300 card and not 2312, reset the
  547. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  548. * the 2310 also reports itself as a 2300 so we need to get the
  549. * fb revision level -- a 6 indicates it really is a 2300 and
  550. * not a 2310.
  551. */
  552. if (IS_QLA2300(ha)) {
  553. spin_lock_irqsave(&ha->hardware_lock, flags);
  554. /* Pause RISC. */
  555. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  556. for (cnt = 0; cnt < 30000; cnt++) {
  557. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  558. break;
  559. udelay(10);
  560. }
  561. /* Select FPM registers. */
  562. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  563. RD_REG_WORD(&reg->ctrl_status);
  564. /* Get the fb rev level */
  565. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  566. if (ha->fb_rev == FPM_2300)
  567. pci_clear_mwi(ha->pdev);
  568. /* Deselect FPM registers. */
  569. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  570. RD_REG_WORD(&reg->ctrl_status);
  571. /* Release RISC module. */
  572. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  573. for (cnt = 0; cnt < 30000; cnt++) {
  574. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  575. break;
  576. udelay(10);
  577. }
  578. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  579. }
  580. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  581. pci_disable_rom(ha->pdev);
  582. /* Get PCI bus information. */
  583. spin_lock_irqsave(&ha->hardware_lock, flags);
  584. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  585. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  586. return QLA_SUCCESS;
  587. }
  588. /**
  589. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  590. * @ha: HA context
  591. *
  592. * Returns 0 on success.
  593. */
  594. int
  595. qla24xx_pci_config(scsi_qla_host_t *vha)
  596. {
  597. uint16_t w;
  598. unsigned long flags = 0;
  599. struct qla_hw_data *ha = vha->hw;
  600. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  601. pci_set_master(ha->pdev);
  602. pci_try_set_mwi(ha->pdev);
  603. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  604. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  605. w &= ~PCI_COMMAND_INTX_DISABLE;
  606. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  607. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  608. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  609. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  610. pcix_set_mmrbc(ha->pdev, 2048);
  611. /* PCIe -- adjust Maximum Read Request Size (2048). */
  612. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  613. pcie_set_readrq(ha->pdev, 2048);
  614. pci_disable_rom(ha->pdev);
  615. ha->chip_revision = ha->pdev->revision;
  616. /* Get PCI bus information. */
  617. spin_lock_irqsave(&ha->hardware_lock, flags);
  618. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  619. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  620. return QLA_SUCCESS;
  621. }
  622. /**
  623. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  624. * @ha: HA context
  625. *
  626. * Returns 0 on success.
  627. */
  628. int
  629. qla25xx_pci_config(scsi_qla_host_t *vha)
  630. {
  631. uint16_t w;
  632. struct qla_hw_data *ha = vha->hw;
  633. pci_set_master(ha->pdev);
  634. pci_try_set_mwi(ha->pdev);
  635. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  636. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  637. w &= ~PCI_COMMAND_INTX_DISABLE;
  638. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  639. /* PCIe -- adjust Maximum Read Request Size (2048). */
  640. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  641. pcie_set_readrq(ha->pdev, 2048);
  642. pci_disable_rom(ha->pdev);
  643. ha->chip_revision = ha->pdev->revision;
  644. return QLA_SUCCESS;
  645. }
  646. /**
  647. * qla2x00_isp_firmware() - Choose firmware image.
  648. * @ha: HA context
  649. *
  650. * Returns 0 on success.
  651. */
  652. static int
  653. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  654. {
  655. int rval;
  656. uint16_t loop_id, topo, sw_cap;
  657. uint8_t domain, area, al_pa;
  658. struct qla_hw_data *ha = vha->hw;
  659. /* Assume loading risc code */
  660. rval = QLA_FUNCTION_FAILED;
  661. if (ha->flags.disable_risc_code_load) {
  662. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  663. vha->host_no));
  664. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  665. /* Verify checksum of loaded RISC code. */
  666. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  667. if (rval == QLA_SUCCESS) {
  668. /* And, verify we are not in ROM code. */
  669. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  670. &area, &domain, &topo, &sw_cap);
  671. }
  672. }
  673. if (rval) {
  674. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  675. vha->host_no));
  676. }
  677. return (rval);
  678. }
  679. /**
  680. * qla2x00_reset_chip() - Reset ISP chip.
  681. * @ha: HA context
  682. *
  683. * Returns 0 on success.
  684. */
  685. void
  686. qla2x00_reset_chip(scsi_qla_host_t *vha)
  687. {
  688. unsigned long flags = 0;
  689. struct qla_hw_data *ha = vha->hw;
  690. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  691. uint32_t cnt;
  692. uint16_t cmd;
  693. if (unlikely(pci_channel_offline(ha->pdev)))
  694. return;
  695. ha->isp_ops->disable_intrs(ha);
  696. spin_lock_irqsave(&ha->hardware_lock, flags);
  697. /* Turn off master enable */
  698. cmd = 0;
  699. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  700. cmd &= ~PCI_COMMAND_MASTER;
  701. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  702. if (!IS_QLA2100(ha)) {
  703. /* Pause RISC. */
  704. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  705. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  706. for (cnt = 0; cnt < 30000; cnt++) {
  707. if ((RD_REG_WORD(&reg->hccr) &
  708. HCCR_RISC_PAUSE) != 0)
  709. break;
  710. udelay(100);
  711. }
  712. } else {
  713. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  714. udelay(10);
  715. }
  716. /* Select FPM registers. */
  717. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  718. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  719. /* FPM Soft Reset. */
  720. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  721. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  722. /* Toggle Fpm Reset. */
  723. if (!IS_QLA2200(ha)) {
  724. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  725. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  726. }
  727. /* Select frame buffer registers. */
  728. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  729. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  730. /* Reset frame buffer FIFOs. */
  731. if (IS_QLA2200(ha)) {
  732. WRT_FB_CMD_REG(ha, reg, 0xa000);
  733. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  734. } else {
  735. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  736. /* Read back fb_cmd until zero or 3 seconds max */
  737. for (cnt = 0; cnt < 3000; cnt++) {
  738. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  739. break;
  740. udelay(100);
  741. }
  742. }
  743. /* Select RISC module registers. */
  744. WRT_REG_WORD(&reg->ctrl_status, 0);
  745. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  746. /* Reset RISC processor. */
  747. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  748. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  749. /* Release RISC processor. */
  750. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  751. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  752. }
  753. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  754. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  755. /* Reset ISP chip. */
  756. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  757. /* Wait for RISC to recover from reset. */
  758. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  759. /*
  760. * It is necessary to for a delay here since the card doesn't
  761. * respond to PCI reads during a reset. On some architectures
  762. * this will result in an MCA.
  763. */
  764. udelay(20);
  765. for (cnt = 30000; cnt; cnt--) {
  766. if ((RD_REG_WORD(&reg->ctrl_status) &
  767. CSR_ISP_SOFT_RESET) == 0)
  768. break;
  769. udelay(100);
  770. }
  771. } else
  772. udelay(10);
  773. /* Reset RISC processor. */
  774. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  775. WRT_REG_WORD(&reg->semaphore, 0);
  776. /* Release RISC processor. */
  777. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  778. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  779. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  780. for (cnt = 0; cnt < 30000; cnt++) {
  781. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  782. break;
  783. udelay(100);
  784. }
  785. } else
  786. udelay(100);
  787. /* Turn on master enable */
  788. cmd |= PCI_COMMAND_MASTER;
  789. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  790. /* Disable RISC pause on FPM parity error. */
  791. if (!IS_QLA2100(ha)) {
  792. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  793. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  794. }
  795. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  796. }
  797. /**
  798. * qla81xx_reset_mpi() - Reset's MPI FW via Write MPI Register MBC.
  799. *
  800. * Returns 0 on success.
  801. */
  802. int
  803. qla81xx_reset_mpi(scsi_qla_host_t *vha)
  804. {
  805. uint16_t mb[4] = {0x1010, 0, 1, 0};
  806. return qla81xx_write_mpi_register(vha, mb);
  807. }
  808. /**
  809. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  810. * @ha: HA context
  811. *
  812. * Returns 0 on success.
  813. */
  814. static inline void
  815. qla24xx_reset_risc(scsi_qla_host_t *vha)
  816. {
  817. unsigned long flags = 0;
  818. struct qla_hw_data *ha = vha->hw;
  819. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  820. uint32_t cnt, d2;
  821. uint16_t wd;
  822. static int abts_cnt; /* ISP abort retry counts */
  823. spin_lock_irqsave(&ha->hardware_lock, flags);
  824. /* Reset RISC. */
  825. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  826. for (cnt = 0; cnt < 30000; cnt++) {
  827. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  828. break;
  829. udelay(10);
  830. }
  831. WRT_REG_DWORD(&reg->ctrl_status,
  832. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  833. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  834. udelay(100);
  835. /* Wait for firmware to complete NVRAM accesses. */
  836. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  837. for (cnt = 10000 ; cnt && d2; cnt--) {
  838. udelay(5);
  839. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  840. barrier();
  841. }
  842. /* Wait for soft-reset to complete. */
  843. d2 = RD_REG_DWORD(&reg->ctrl_status);
  844. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  845. udelay(5);
  846. d2 = RD_REG_DWORD(&reg->ctrl_status);
  847. barrier();
  848. }
  849. /* If required, do an MPI FW reset now */
  850. if (test_and_clear_bit(MPI_RESET_NEEDED, &vha->dpc_flags)) {
  851. if (qla81xx_reset_mpi(vha) != QLA_SUCCESS) {
  852. if (++abts_cnt < 5) {
  853. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  854. set_bit(MPI_RESET_NEEDED, &vha->dpc_flags);
  855. } else {
  856. /*
  857. * We exhausted the ISP abort retries. We have to
  858. * set the board offline.
  859. */
  860. abts_cnt = 0;
  861. vha->flags.online = 0;
  862. }
  863. }
  864. }
  865. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  866. RD_REG_DWORD(&reg->hccr);
  867. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  868. RD_REG_DWORD(&reg->hccr);
  869. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  870. RD_REG_DWORD(&reg->hccr);
  871. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  872. for (cnt = 6000000 ; cnt && d2; cnt--) {
  873. udelay(5);
  874. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  875. barrier();
  876. }
  877. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  878. if (IS_NOPOLLING_TYPE(ha))
  879. ha->isp_ops->enable_intrs(ha);
  880. }
  881. /**
  882. * qla24xx_reset_chip() - Reset ISP24xx chip.
  883. * @ha: HA context
  884. *
  885. * Returns 0 on success.
  886. */
  887. void
  888. qla24xx_reset_chip(scsi_qla_host_t *vha)
  889. {
  890. struct qla_hw_data *ha = vha->hw;
  891. if (pci_channel_offline(ha->pdev) &&
  892. ha->flags.pci_channel_io_perm_failure) {
  893. return;
  894. }
  895. ha->isp_ops->disable_intrs(ha);
  896. /* Perform RISC reset. */
  897. qla24xx_reset_risc(vha);
  898. }
  899. /**
  900. * qla2x00_chip_diag() - Test chip for proper operation.
  901. * @ha: HA context
  902. *
  903. * Returns 0 on success.
  904. */
  905. int
  906. qla2x00_chip_diag(scsi_qla_host_t *vha)
  907. {
  908. int rval;
  909. struct qla_hw_data *ha = vha->hw;
  910. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  911. unsigned long flags = 0;
  912. uint16_t data;
  913. uint32_t cnt;
  914. uint16_t mb[5];
  915. struct req_que *req = ha->req_q_map[0];
  916. /* Assume a failed state */
  917. rval = QLA_FUNCTION_FAILED;
  918. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  919. vha->host_no, (u_long)&reg->flash_address));
  920. spin_lock_irqsave(&ha->hardware_lock, flags);
  921. /* Reset ISP chip. */
  922. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  923. /*
  924. * We need to have a delay here since the card will not respond while
  925. * in reset causing an MCA on some architectures.
  926. */
  927. udelay(20);
  928. data = qla2x00_debounce_register(&reg->ctrl_status);
  929. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  930. udelay(5);
  931. data = RD_REG_WORD(&reg->ctrl_status);
  932. barrier();
  933. }
  934. if (!cnt)
  935. goto chip_diag_failed;
  936. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  937. vha->host_no));
  938. /* Reset RISC processor. */
  939. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  940. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  941. /* Workaround for QLA2312 PCI parity error */
  942. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  943. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  944. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  945. udelay(5);
  946. data = RD_MAILBOX_REG(ha, reg, 0);
  947. barrier();
  948. }
  949. } else
  950. udelay(10);
  951. if (!cnt)
  952. goto chip_diag_failed;
  953. /* Check product ID of chip */
  954. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  955. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  956. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  957. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  958. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  959. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  960. mb[3] != PROD_ID_3) {
  961. qla_printk(KERN_WARNING, ha,
  962. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  963. goto chip_diag_failed;
  964. }
  965. ha->product_id[0] = mb[1];
  966. ha->product_id[1] = mb[2];
  967. ha->product_id[2] = mb[3];
  968. ha->product_id[3] = mb[4];
  969. /* Adjust fw RISC transfer size */
  970. if (req->length > 1024)
  971. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  972. else
  973. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  974. req->length;
  975. if (IS_QLA2200(ha) &&
  976. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  977. /* Limit firmware transfer size with a 2200A */
  978. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  979. vha->host_no));
  980. ha->device_type |= DT_ISP2200A;
  981. ha->fw_transfer_size = 128;
  982. }
  983. /* Wrap Incoming Mailboxes Test. */
  984. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  985. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  986. rval = qla2x00_mbx_reg_test(vha);
  987. if (rval) {
  988. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  989. vha->host_no));
  990. qla_printk(KERN_WARNING, ha,
  991. "Failed mailbox send register test\n");
  992. }
  993. else {
  994. /* Flag a successful rval */
  995. rval = QLA_SUCCESS;
  996. }
  997. spin_lock_irqsave(&ha->hardware_lock, flags);
  998. chip_diag_failed:
  999. if (rval)
  1000. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  1001. "****\n", vha->host_no));
  1002. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1003. return (rval);
  1004. }
  1005. /**
  1006. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  1007. * @ha: HA context
  1008. *
  1009. * Returns 0 on success.
  1010. */
  1011. int
  1012. qla24xx_chip_diag(scsi_qla_host_t *vha)
  1013. {
  1014. int rval;
  1015. struct qla_hw_data *ha = vha->hw;
  1016. struct req_que *req = ha->req_q_map[0];
  1017. if (IS_QLA82XX(ha))
  1018. return QLA_SUCCESS;
  1019. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  1020. rval = qla2x00_mbx_reg_test(vha);
  1021. if (rval) {
  1022. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  1023. vha->host_no));
  1024. qla_printk(KERN_WARNING, ha,
  1025. "Failed mailbox send register test\n");
  1026. } else {
  1027. /* Flag a successful rval */
  1028. rval = QLA_SUCCESS;
  1029. }
  1030. return rval;
  1031. }
  1032. void
  1033. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  1034. {
  1035. int rval;
  1036. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  1037. eft_size, fce_size, mq_size;
  1038. dma_addr_t tc_dma;
  1039. void *tc;
  1040. struct qla_hw_data *ha = vha->hw;
  1041. struct req_que *req = ha->req_q_map[0];
  1042. struct rsp_que *rsp = ha->rsp_q_map[0];
  1043. if (ha->fw_dump) {
  1044. qla_printk(KERN_WARNING, ha,
  1045. "Firmware dump previously allocated.\n");
  1046. return;
  1047. }
  1048. ha->fw_dumped = 0;
  1049. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  1050. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1051. fixed_size = sizeof(struct qla2100_fw_dump);
  1052. } else if (IS_QLA23XX(ha)) {
  1053. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  1054. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  1055. sizeof(uint16_t);
  1056. } else if (IS_FWI2_CAPABLE(ha)) {
  1057. if (IS_QLA81XX(ha))
  1058. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  1059. else if (IS_QLA25XX(ha))
  1060. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  1061. else
  1062. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  1063. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  1064. sizeof(uint32_t);
  1065. if (ha->mqenable)
  1066. mq_size = sizeof(struct qla2xxx_mq_chain);
  1067. /* Allocate memory for Fibre Channel Event Buffer. */
  1068. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  1069. goto try_eft;
  1070. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  1071. GFP_KERNEL);
  1072. if (!tc) {
  1073. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1074. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  1075. goto try_eft;
  1076. }
  1077. memset(tc, 0, FCE_SIZE);
  1078. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  1079. ha->fce_mb, &ha->fce_bufs);
  1080. if (rval) {
  1081. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1082. "FCE (%d).\n", rval);
  1083. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  1084. tc_dma);
  1085. ha->flags.fce_enabled = 0;
  1086. goto try_eft;
  1087. }
  1088. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  1089. FCE_SIZE / 1024);
  1090. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  1091. ha->flags.fce_enabled = 1;
  1092. ha->fce_dma = tc_dma;
  1093. ha->fce = tc;
  1094. try_eft:
  1095. /* Allocate memory for Extended Trace Buffer. */
  1096. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  1097. GFP_KERNEL);
  1098. if (!tc) {
  1099. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  1100. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  1101. goto cont_alloc;
  1102. }
  1103. memset(tc, 0, EFT_SIZE);
  1104. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  1105. if (rval) {
  1106. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  1107. "EFT (%d).\n", rval);
  1108. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  1109. tc_dma);
  1110. goto cont_alloc;
  1111. }
  1112. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  1113. EFT_SIZE / 1024);
  1114. eft_size = EFT_SIZE;
  1115. ha->eft_dma = tc_dma;
  1116. ha->eft = tc;
  1117. }
  1118. cont_alloc:
  1119. req_q_size = req->length * sizeof(request_t);
  1120. rsp_q_size = rsp->length * sizeof(response_t);
  1121. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  1122. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  1123. ha->chain_offset = dump_size;
  1124. dump_size += mq_size + fce_size;
  1125. ha->fw_dump = vmalloc(dump_size);
  1126. if (!ha->fw_dump) {
  1127. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  1128. "firmware dump!!!\n", dump_size / 1024);
  1129. if (ha->fce) {
  1130. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  1131. ha->fce_dma);
  1132. ha->fce = NULL;
  1133. ha->fce_dma = 0;
  1134. }
  1135. if (ha->eft) {
  1136. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  1137. ha->eft_dma);
  1138. ha->eft = NULL;
  1139. ha->eft_dma = 0;
  1140. }
  1141. return;
  1142. }
  1143. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  1144. dump_size / 1024);
  1145. ha->fw_dump_len = dump_size;
  1146. ha->fw_dump->signature[0] = 'Q';
  1147. ha->fw_dump->signature[1] = 'L';
  1148. ha->fw_dump->signature[2] = 'G';
  1149. ha->fw_dump->signature[3] = 'C';
  1150. ha->fw_dump->version = __constant_htonl(1);
  1151. ha->fw_dump->fixed_size = htonl(fixed_size);
  1152. ha->fw_dump->mem_size = htonl(mem_size);
  1153. ha->fw_dump->req_q_size = htonl(req_q_size);
  1154. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  1155. ha->fw_dump->eft_size = htonl(eft_size);
  1156. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  1157. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  1158. ha->fw_dump->header_size =
  1159. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  1160. }
  1161. static int
  1162. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  1163. {
  1164. #define MPS_MASK 0xe0
  1165. int rval;
  1166. uint16_t dc;
  1167. uint32_t dw;
  1168. struct qla_hw_data *ha = vha->hw;
  1169. if (!IS_QLA81XX(vha->hw))
  1170. return QLA_SUCCESS;
  1171. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  1172. if (rval != QLA_SUCCESS) {
  1173. DEBUG2(qla_printk(KERN_WARNING, ha,
  1174. "Sync-MPI: Unable to acquire semaphore.\n"));
  1175. goto done;
  1176. }
  1177. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  1178. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  1179. if (rval != QLA_SUCCESS) {
  1180. DEBUG2(qla_printk(KERN_WARNING, ha,
  1181. "Sync-MPI: Unable to read sync.\n"));
  1182. goto done_release;
  1183. }
  1184. dc &= MPS_MASK;
  1185. if (dc == (dw & MPS_MASK))
  1186. goto done_release;
  1187. dw &= ~MPS_MASK;
  1188. dw |= dc;
  1189. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  1190. if (rval != QLA_SUCCESS) {
  1191. DEBUG2(qla_printk(KERN_WARNING, ha,
  1192. "Sync-MPI: Unable to gain sync.\n"));
  1193. }
  1194. done_release:
  1195. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  1196. if (rval != QLA_SUCCESS) {
  1197. DEBUG2(qla_printk(KERN_WARNING, ha,
  1198. "Sync-MPI: Unable to release semaphore.\n"));
  1199. }
  1200. done:
  1201. return rval;
  1202. }
  1203. /**
  1204. * qla2x00_setup_chip() - Load and start RISC firmware.
  1205. * @ha: HA context
  1206. *
  1207. * Returns 0 on success.
  1208. */
  1209. static int
  1210. qla2x00_setup_chip(scsi_qla_host_t *vha)
  1211. {
  1212. int rval;
  1213. uint32_t srisc_address = 0;
  1214. struct qla_hw_data *ha = vha->hw;
  1215. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1216. unsigned long flags;
  1217. uint16_t fw_major_version;
  1218. if (IS_QLA82XX(ha)) {
  1219. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1220. if (rval == QLA_SUCCESS) {
  1221. qla2x00_stop_firmware(vha);
  1222. goto enable_82xx_npiv;
  1223. } else
  1224. goto failed;
  1225. }
  1226. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1227. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  1228. spin_lock_irqsave(&ha->hardware_lock, flags);
  1229. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  1230. RD_REG_WORD(&reg->hccr);
  1231. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1232. }
  1233. qla81xx_mpi_sync(vha);
  1234. /* Load firmware sequences */
  1235. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  1236. if (rval == QLA_SUCCESS) {
  1237. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  1238. "code.\n", vha->host_no));
  1239. rval = qla2x00_verify_checksum(vha, srisc_address);
  1240. if (rval == QLA_SUCCESS) {
  1241. /* Start firmware execution. */
  1242. DEBUG(printk("scsi(%ld): Checksum OK, start "
  1243. "firmware.\n", vha->host_no));
  1244. rval = qla2x00_execute_fw(vha, srisc_address);
  1245. /* Retrieve firmware information. */
  1246. if (rval == QLA_SUCCESS) {
  1247. enable_82xx_npiv:
  1248. fw_major_version = ha->fw_major_version;
  1249. rval = qla2x00_get_fw_version(vha,
  1250. &ha->fw_major_version,
  1251. &ha->fw_minor_version,
  1252. &ha->fw_subminor_version,
  1253. &ha->fw_attributes, &ha->fw_memory_size,
  1254. ha->mpi_version, &ha->mpi_capabilities,
  1255. ha->phy_version);
  1256. if (rval != QLA_SUCCESS)
  1257. goto failed;
  1258. ha->flags.npiv_supported = 0;
  1259. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1260. (ha->fw_attributes & BIT_2)) {
  1261. ha->flags.npiv_supported = 1;
  1262. if ((!ha->max_npiv_vports) ||
  1263. ((ha->max_npiv_vports + 1) %
  1264. MIN_MULTI_ID_FABRIC))
  1265. ha->max_npiv_vports =
  1266. MIN_MULTI_ID_FABRIC - 1;
  1267. }
  1268. qla2x00_get_resource_cnts(vha, NULL,
  1269. &ha->fw_xcb_count, NULL, NULL,
  1270. &ha->max_npiv_vports, NULL);
  1271. if (!fw_major_version && ql2xallocfwdump) {
  1272. if (!IS_QLA82XX(ha))
  1273. qla2x00_alloc_fw_dump(vha);
  1274. }
  1275. }
  1276. } else {
  1277. DEBUG2(printk(KERN_INFO
  1278. "scsi(%ld): ISP Firmware failed checksum.\n",
  1279. vha->host_no));
  1280. }
  1281. }
  1282. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1283. /* Enable proper parity. */
  1284. spin_lock_irqsave(&ha->hardware_lock, flags);
  1285. if (IS_QLA2300(ha))
  1286. /* SRAM parity */
  1287. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1288. else
  1289. /* SRAM, Instruction RAM and GP RAM parity */
  1290. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1291. RD_REG_WORD(&reg->hccr);
  1292. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1293. }
  1294. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1295. uint32_t size;
  1296. rval = qla81xx_fac_get_sector_size(vha, &size);
  1297. if (rval == QLA_SUCCESS) {
  1298. ha->flags.fac_supported = 1;
  1299. ha->fdt_block_size = size << 2;
  1300. } else {
  1301. qla_printk(KERN_ERR, ha,
  1302. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1303. ha->fw_major_version, ha->fw_minor_version,
  1304. ha->fw_subminor_version);
  1305. }
  1306. }
  1307. failed:
  1308. if (rval) {
  1309. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1310. vha->host_no));
  1311. }
  1312. return (rval);
  1313. }
  1314. /**
  1315. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1316. * @ha: HA context
  1317. *
  1318. * Beginning of request ring has initialization control block already built
  1319. * by nvram config routine.
  1320. *
  1321. * Returns 0 on success.
  1322. */
  1323. void
  1324. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1325. {
  1326. uint16_t cnt;
  1327. response_t *pkt;
  1328. rsp->ring_ptr = rsp->ring;
  1329. rsp->ring_index = 0;
  1330. rsp->status_srb = NULL;
  1331. pkt = rsp->ring_ptr;
  1332. for (cnt = 0; cnt < rsp->length; cnt++) {
  1333. pkt->signature = RESPONSE_PROCESSED;
  1334. pkt++;
  1335. }
  1336. }
  1337. /**
  1338. * qla2x00_update_fw_options() - Read and process firmware options.
  1339. * @ha: HA context
  1340. *
  1341. * Returns 0 on success.
  1342. */
  1343. void
  1344. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1345. {
  1346. uint16_t swing, emphasis, tx_sens, rx_sens;
  1347. struct qla_hw_data *ha = vha->hw;
  1348. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1349. qla2x00_get_fw_options(vha, ha->fw_options);
  1350. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1351. return;
  1352. /* Serial Link options. */
  1353. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1354. vha->host_no));
  1355. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1356. sizeof(ha->fw_seriallink_options)));
  1357. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1358. if (ha->fw_seriallink_options[3] & BIT_2) {
  1359. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1360. /* 1G settings */
  1361. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1362. emphasis = (ha->fw_seriallink_options[2] &
  1363. (BIT_4 | BIT_3)) >> 3;
  1364. tx_sens = ha->fw_seriallink_options[0] &
  1365. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1366. rx_sens = (ha->fw_seriallink_options[0] &
  1367. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1368. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1369. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1370. if (rx_sens == 0x0)
  1371. rx_sens = 0x3;
  1372. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1373. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1374. ha->fw_options[10] |= BIT_5 |
  1375. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1376. (tx_sens & (BIT_1 | BIT_0));
  1377. /* 2G settings */
  1378. swing = (ha->fw_seriallink_options[2] &
  1379. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1380. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1381. tx_sens = ha->fw_seriallink_options[1] &
  1382. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1383. rx_sens = (ha->fw_seriallink_options[1] &
  1384. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1385. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1386. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1387. if (rx_sens == 0x0)
  1388. rx_sens = 0x3;
  1389. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1390. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1391. ha->fw_options[11] |= BIT_5 |
  1392. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1393. (tx_sens & (BIT_1 | BIT_0));
  1394. }
  1395. /* FCP2 options. */
  1396. /* Return command IOCBs without waiting for an ABTS to complete. */
  1397. ha->fw_options[3] |= BIT_13;
  1398. /* LED scheme. */
  1399. if (ha->flags.enable_led_scheme)
  1400. ha->fw_options[2] |= BIT_12;
  1401. /* Detect ISP6312. */
  1402. if (IS_QLA6312(ha))
  1403. ha->fw_options[2] |= BIT_13;
  1404. /* Update firmware options. */
  1405. qla2x00_set_fw_options(vha, ha->fw_options);
  1406. }
  1407. void
  1408. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1409. {
  1410. int rval;
  1411. struct qla_hw_data *ha = vha->hw;
  1412. if (IS_QLA82XX(ha))
  1413. return;
  1414. /* Update Serial Link options. */
  1415. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1416. return;
  1417. rval = qla2x00_set_serdes_params(vha,
  1418. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1419. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1420. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1421. if (rval != QLA_SUCCESS) {
  1422. qla_printk(KERN_WARNING, ha,
  1423. "Unable to update Serial Link options (%x).\n", rval);
  1424. }
  1425. }
  1426. void
  1427. qla2x00_config_rings(struct scsi_qla_host *vha)
  1428. {
  1429. struct qla_hw_data *ha = vha->hw;
  1430. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1431. struct req_que *req = ha->req_q_map[0];
  1432. struct rsp_que *rsp = ha->rsp_q_map[0];
  1433. /* Setup ring parameters in initialization control block. */
  1434. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1435. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1436. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1437. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1438. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1439. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1440. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1441. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1442. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1443. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1444. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1445. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1446. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1447. }
  1448. void
  1449. qla24xx_config_rings(struct scsi_qla_host *vha)
  1450. {
  1451. struct qla_hw_data *ha = vha->hw;
  1452. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1453. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1454. struct qla_msix_entry *msix;
  1455. struct init_cb_24xx *icb;
  1456. uint16_t rid = 0;
  1457. struct req_que *req = ha->req_q_map[0];
  1458. struct rsp_que *rsp = ha->rsp_q_map[0];
  1459. /* Setup ring parameters in initialization control block. */
  1460. icb = (struct init_cb_24xx *)ha->init_cb;
  1461. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1462. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1463. icb->request_q_length = cpu_to_le16(req->length);
  1464. icb->response_q_length = cpu_to_le16(rsp->length);
  1465. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1466. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1467. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1468. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1469. if (ha->mqenable) {
  1470. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1471. icb->rid = __constant_cpu_to_le16(rid);
  1472. if (ha->flags.msix_enabled) {
  1473. msix = &ha->msix_entries[1];
  1474. DEBUG2_17(printk(KERN_INFO
  1475. "Registering vector 0x%x for base que\n", msix->entry));
  1476. icb->msix = cpu_to_le16(msix->entry);
  1477. }
  1478. /* Use alternate PCI bus number */
  1479. if (MSB(rid))
  1480. icb->firmware_options_2 |=
  1481. __constant_cpu_to_le32(BIT_19);
  1482. /* Use alternate PCI devfn */
  1483. if (LSB(rid))
  1484. icb->firmware_options_2 |=
  1485. __constant_cpu_to_le32(BIT_18);
  1486. /* Use Disable MSIX Handshake mode for capable adapters */
  1487. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1488. icb->firmware_options_2 &=
  1489. __constant_cpu_to_le32(~BIT_22);
  1490. ha->flags.disable_msix_handshake = 1;
  1491. qla_printk(KERN_INFO, ha,
  1492. "MSIX Handshake Disable Mode turned on\n");
  1493. } else {
  1494. icb->firmware_options_2 |=
  1495. __constant_cpu_to_le32(BIT_22);
  1496. }
  1497. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1498. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1499. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1500. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1501. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1502. } else {
  1503. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1504. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1505. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1506. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1507. }
  1508. /* PCI posting */
  1509. RD_REG_DWORD(&ioreg->hccr);
  1510. }
  1511. /**
  1512. * qla2x00_init_rings() - Initializes firmware.
  1513. * @ha: HA context
  1514. *
  1515. * Beginning of request ring has initialization control block already built
  1516. * by nvram config routine.
  1517. *
  1518. * Returns 0 on success.
  1519. */
  1520. static int
  1521. qla2x00_init_rings(scsi_qla_host_t *vha)
  1522. {
  1523. int rval;
  1524. unsigned long flags = 0;
  1525. int cnt, que;
  1526. struct qla_hw_data *ha = vha->hw;
  1527. struct req_que *req;
  1528. struct rsp_que *rsp;
  1529. struct scsi_qla_host *vp;
  1530. struct mid_init_cb_24xx *mid_init_cb =
  1531. (struct mid_init_cb_24xx *) ha->init_cb;
  1532. spin_lock_irqsave(&ha->hardware_lock, flags);
  1533. /* Clear outstanding commands array. */
  1534. for (que = 0; que < ha->max_req_queues; que++) {
  1535. req = ha->req_q_map[que];
  1536. if (!req)
  1537. continue;
  1538. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1539. req->outstanding_cmds[cnt] = NULL;
  1540. req->current_outstanding_cmd = 1;
  1541. /* Initialize firmware. */
  1542. req->ring_ptr = req->ring;
  1543. req->ring_index = 0;
  1544. req->cnt = req->length;
  1545. }
  1546. for (que = 0; que < ha->max_rsp_queues; que++) {
  1547. rsp = ha->rsp_q_map[que];
  1548. if (!rsp)
  1549. continue;
  1550. /* Initialize response queue entries */
  1551. qla2x00_init_response_q_entries(rsp);
  1552. }
  1553. spin_lock(&ha->vport_slock);
  1554. /* Clear RSCN queue. */
  1555. list_for_each_entry(vp, &ha->vp_list, list) {
  1556. vp->rscn_in_ptr = 0;
  1557. vp->rscn_out_ptr = 0;
  1558. }
  1559. spin_unlock(&ha->vport_slock);
  1560. ha->isp_ops->config_rings(vha);
  1561. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1562. /* Update any ISP specific firmware options before initialization. */
  1563. ha->isp_ops->update_fw_options(vha);
  1564. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1565. if (ha->flags.npiv_supported) {
  1566. if (ha->operating_mode == LOOP)
  1567. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1568. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1569. }
  1570. if (IS_FWI2_CAPABLE(ha)) {
  1571. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1572. mid_init_cb->init_cb.execution_throttle =
  1573. cpu_to_le16(ha->fw_xcb_count);
  1574. }
  1575. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1576. if (rval) {
  1577. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1578. vha->host_no));
  1579. } else {
  1580. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1581. vha->host_no));
  1582. }
  1583. return (rval);
  1584. }
  1585. /**
  1586. * qla2x00_fw_ready() - Waits for firmware ready.
  1587. * @ha: HA context
  1588. *
  1589. * Returns 0 on success.
  1590. */
  1591. static int
  1592. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1593. {
  1594. int rval;
  1595. unsigned long wtime, mtime, cs84xx_time;
  1596. uint16_t min_wait; /* Minimum wait time if loop is down */
  1597. uint16_t wait_time; /* Wait time if loop is coming ready */
  1598. uint16_t state[5];
  1599. struct qla_hw_data *ha = vha->hw;
  1600. rval = QLA_SUCCESS;
  1601. /* 20 seconds for loop down. */
  1602. min_wait = 20;
  1603. /*
  1604. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1605. * our own processing.
  1606. */
  1607. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1608. wait_time = min_wait;
  1609. }
  1610. /* Min wait time if loop down */
  1611. mtime = jiffies + (min_wait * HZ);
  1612. /* wait time before firmware ready */
  1613. wtime = jiffies + (wait_time * HZ);
  1614. /* Wait for ISP to finish LIP */
  1615. if (!vha->flags.init_done)
  1616. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1617. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1618. vha->host_no));
  1619. do {
  1620. rval = qla2x00_get_firmware_state(vha, state);
  1621. if (rval == QLA_SUCCESS) {
  1622. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1623. vha->device_flags &= ~DFLG_NO_CABLE;
  1624. }
  1625. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1626. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1627. "84xx=%x.\n", vha->host_no, state[0],
  1628. state[2]));
  1629. if ((state[2] & FSTATE_LOGGED_IN) &&
  1630. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1631. DEBUG16(printk("scsi(%ld): Sending "
  1632. "verify iocb.\n", vha->host_no));
  1633. cs84xx_time = jiffies;
  1634. rval = qla84xx_init_chip(vha);
  1635. if (rval != QLA_SUCCESS)
  1636. break;
  1637. /* Add time taken to initialize. */
  1638. cs84xx_time = jiffies - cs84xx_time;
  1639. wtime += cs84xx_time;
  1640. mtime += cs84xx_time;
  1641. DEBUG16(printk("scsi(%ld): Increasing "
  1642. "wait time by %ld. New time %ld\n",
  1643. vha->host_no, cs84xx_time, wtime));
  1644. }
  1645. } else if (state[0] == FSTATE_READY) {
  1646. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1647. vha->host_no));
  1648. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1649. &ha->login_timeout, &ha->r_a_tov);
  1650. rval = QLA_SUCCESS;
  1651. break;
  1652. }
  1653. rval = QLA_FUNCTION_FAILED;
  1654. if (atomic_read(&vha->loop_down_timer) &&
  1655. state[0] != FSTATE_READY) {
  1656. /* Loop down. Timeout on min_wait for states
  1657. * other than Wait for Login.
  1658. */
  1659. if (time_after_eq(jiffies, mtime)) {
  1660. qla_printk(KERN_INFO, ha,
  1661. "Cable is unplugged...\n");
  1662. vha->device_flags |= DFLG_NO_CABLE;
  1663. break;
  1664. }
  1665. }
  1666. } else {
  1667. /* Mailbox cmd failed. Timeout on min_wait. */
  1668. if (time_after_eq(jiffies, mtime) ||
  1669. ha->flags.isp82xx_fw_hung)
  1670. break;
  1671. }
  1672. if (time_after_eq(jiffies, wtime))
  1673. break;
  1674. /* Delay for a while */
  1675. msleep(500);
  1676. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1677. vha->host_no, state[0], jiffies));
  1678. } while (1);
  1679. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1680. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1681. jiffies));
  1682. if (rval) {
  1683. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1684. vha->host_no));
  1685. }
  1686. return (rval);
  1687. }
  1688. /*
  1689. * qla2x00_configure_hba
  1690. * Setup adapter context.
  1691. *
  1692. * Input:
  1693. * ha = adapter state pointer.
  1694. *
  1695. * Returns:
  1696. * 0 = success
  1697. *
  1698. * Context:
  1699. * Kernel context.
  1700. */
  1701. static int
  1702. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1703. {
  1704. int rval;
  1705. uint16_t loop_id;
  1706. uint16_t topo;
  1707. uint16_t sw_cap;
  1708. uint8_t al_pa;
  1709. uint8_t area;
  1710. uint8_t domain;
  1711. char connect_type[22];
  1712. struct qla_hw_data *ha = vha->hw;
  1713. /* Get host addresses. */
  1714. rval = qla2x00_get_adapter_id(vha,
  1715. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1716. if (rval != QLA_SUCCESS) {
  1717. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1718. IS_QLA8XXX_TYPE(ha) ||
  1719. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1720. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1721. __func__, vha->host_no));
  1722. } else {
  1723. qla_printk(KERN_WARNING, ha,
  1724. "ERROR -- Unable to get host loop ID.\n");
  1725. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1726. }
  1727. return (rval);
  1728. }
  1729. if (topo == 4) {
  1730. qla_printk(KERN_INFO, ha,
  1731. "Cannot get topology - retrying.\n");
  1732. return (QLA_FUNCTION_FAILED);
  1733. }
  1734. vha->loop_id = loop_id;
  1735. /* initialize */
  1736. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1737. ha->operating_mode = LOOP;
  1738. ha->switch_cap = 0;
  1739. switch (topo) {
  1740. case 0:
  1741. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1742. vha->host_no));
  1743. ha->current_topology = ISP_CFG_NL;
  1744. strcpy(connect_type, "(Loop)");
  1745. break;
  1746. case 1:
  1747. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1748. vha->host_no));
  1749. ha->switch_cap = sw_cap;
  1750. ha->current_topology = ISP_CFG_FL;
  1751. strcpy(connect_type, "(FL_Port)");
  1752. break;
  1753. case 2:
  1754. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1755. vha->host_no));
  1756. ha->operating_mode = P2P;
  1757. ha->current_topology = ISP_CFG_N;
  1758. strcpy(connect_type, "(N_Port-to-N_Port)");
  1759. break;
  1760. case 3:
  1761. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1762. vha->host_no));
  1763. ha->switch_cap = sw_cap;
  1764. ha->operating_mode = P2P;
  1765. ha->current_topology = ISP_CFG_F;
  1766. strcpy(connect_type, "(F_Port)");
  1767. break;
  1768. default:
  1769. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1770. "Using NL.\n",
  1771. vha->host_no, topo));
  1772. ha->current_topology = ISP_CFG_NL;
  1773. strcpy(connect_type, "(Loop)");
  1774. break;
  1775. }
  1776. /* Save Host port and loop ID. */
  1777. /* byte order - Big Endian */
  1778. vha->d_id.b.domain = domain;
  1779. vha->d_id.b.area = area;
  1780. vha->d_id.b.al_pa = al_pa;
  1781. if (!vha->flags.init_done)
  1782. qla_printk(KERN_INFO, ha,
  1783. "Topology - %s, Host Loop address 0x%x\n",
  1784. connect_type, vha->loop_id);
  1785. if (rval) {
  1786. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1787. } else {
  1788. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1789. }
  1790. return(rval);
  1791. }
  1792. inline void
  1793. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1794. char *def)
  1795. {
  1796. char *st, *en;
  1797. uint16_t index;
  1798. struct qla_hw_data *ha = vha->hw;
  1799. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1800. !IS_QLA8XXX_TYPE(ha);
  1801. if (memcmp(model, BINZERO, len) != 0) {
  1802. strncpy(ha->model_number, model, len);
  1803. st = en = ha->model_number;
  1804. en += len - 1;
  1805. while (en > st) {
  1806. if (*en != 0x20 && *en != 0x00)
  1807. break;
  1808. *en-- = '\0';
  1809. }
  1810. index = (ha->pdev->subsystem_device & 0xff);
  1811. if (use_tbl &&
  1812. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1813. index < QLA_MODEL_NAMES)
  1814. strncpy(ha->model_desc,
  1815. qla2x00_model_name[index * 2 + 1],
  1816. sizeof(ha->model_desc) - 1);
  1817. } else {
  1818. index = (ha->pdev->subsystem_device & 0xff);
  1819. if (use_tbl &&
  1820. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1821. index < QLA_MODEL_NAMES) {
  1822. strcpy(ha->model_number,
  1823. qla2x00_model_name[index * 2]);
  1824. strncpy(ha->model_desc,
  1825. qla2x00_model_name[index * 2 + 1],
  1826. sizeof(ha->model_desc) - 1);
  1827. } else {
  1828. strcpy(ha->model_number, def);
  1829. }
  1830. }
  1831. if (IS_FWI2_CAPABLE(ha))
  1832. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1833. sizeof(ha->model_desc));
  1834. }
  1835. /* On sparc systems, obtain port and node WWN from firmware
  1836. * properties.
  1837. */
  1838. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1839. {
  1840. #ifdef CONFIG_SPARC
  1841. struct qla_hw_data *ha = vha->hw;
  1842. struct pci_dev *pdev = ha->pdev;
  1843. struct device_node *dp = pci_device_to_OF_node(pdev);
  1844. const u8 *val;
  1845. int len;
  1846. val = of_get_property(dp, "port-wwn", &len);
  1847. if (val && len >= WWN_SIZE)
  1848. memcpy(nv->port_name, val, WWN_SIZE);
  1849. val = of_get_property(dp, "node-wwn", &len);
  1850. if (val && len >= WWN_SIZE)
  1851. memcpy(nv->node_name, val, WWN_SIZE);
  1852. #endif
  1853. }
  1854. /*
  1855. * NVRAM configuration for ISP 2xxx
  1856. *
  1857. * Input:
  1858. * ha = adapter block pointer.
  1859. *
  1860. * Output:
  1861. * initialization control block in response_ring
  1862. * host adapters parameters in host adapter block
  1863. *
  1864. * Returns:
  1865. * 0 = success.
  1866. */
  1867. int
  1868. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1869. {
  1870. int rval;
  1871. uint8_t chksum = 0;
  1872. uint16_t cnt;
  1873. uint8_t *dptr1, *dptr2;
  1874. struct qla_hw_data *ha = vha->hw;
  1875. init_cb_t *icb = ha->init_cb;
  1876. nvram_t *nv = ha->nvram;
  1877. uint8_t *ptr = ha->nvram;
  1878. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1879. rval = QLA_SUCCESS;
  1880. /* Determine NVRAM starting address. */
  1881. ha->nvram_size = sizeof(nvram_t);
  1882. ha->nvram_base = 0;
  1883. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1884. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1885. ha->nvram_base = 0x80;
  1886. /* Get NVRAM data and calculate checksum. */
  1887. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1888. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1889. chksum += *ptr++;
  1890. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1891. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1892. /* Bad NVRAM data, set defaults parameters. */
  1893. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1894. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1895. /* Reset NVRAM data. */
  1896. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1897. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1898. nv->nvram_version);
  1899. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1900. "invalid -- WWPN) defaults.\n");
  1901. /*
  1902. * Set default initialization control block.
  1903. */
  1904. memset(nv, 0, ha->nvram_size);
  1905. nv->parameter_block_version = ICB_VERSION;
  1906. if (IS_QLA23XX(ha)) {
  1907. nv->firmware_options[0] = BIT_2 | BIT_1;
  1908. nv->firmware_options[1] = BIT_7 | BIT_5;
  1909. nv->add_firmware_options[0] = BIT_5;
  1910. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1911. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1912. nv->special_options[1] = BIT_7;
  1913. } else if (IS_QLA2200(ha)) {
  1914. nv->firmware_options[0] = BIT_2 | BIT_1;
  1915. nv->firmware_options[1] = BIT_7 | BIT_5;
  1916. nv->add_firmware_options[0] = BIT_5;
  1917. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1918. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1919. } else if (IS_QLA2100(ha)) {
  1920. nv->firmware_options[0] = BIT_3 | BIT_1;
  1921. nv->firmware_options[1] = BIT_5;
  1922. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1923. }
  1924. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1925. nv->execution_throttle = __constant_cpu_to_le16(16);
  1926. nv->retry_count = 8;
  1927. nv->retry_delay = 1;
  1928. nv->port_name[0] = 33;
  1929. nv->port_name[3] = 224;
  1930. nv->port_name[4] = 139;
  1931. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1932. nv->login_timeout = 4;
  1933. /*
  1934. * Set default host adapter parameters
  1935. */
  1936. nv->host_p[1] = BIT_2;
  1937. nv->reset_delay = 5;
  1938. nv->port_down_retry_count = 8;
  1939. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1940. nv->link_down_timeout = 60;
  1941. rval = 1;
  1942. }
  1943. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1944. /*
  1945. * The SN2 does not provide BIOS emulation which means you can't change
  1946. * potentially bogus BIOS settings. Force the use of default settings
  1947. * for link rate and frame size. Hope that the rest of the settings
  1948. * are valid.
  1949. */
  1950. if (ia64_platform_is("sn2")) {
  1951. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1952. if (IS_QLA23XX(ha))
  1953. nv->special_options[1] = BIT_7;
  1954. }
  1955. #endif
  1956. /* Reset Initialization control block */
  1957. memset(icb, 0, ha->init_cb_size);
  1958. /*
  1959. * Setup driver NVRAM options.
  1960. */
  1961. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1962. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1963. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1964. nv->firmware_options[1] &= ~BIT_4;
  1965. if (IS_QLA23XX(ha)) {
  1966. nv->firmware_options[0] |= BIT_2;
  1967. nv->firmware_options[0] &= ~BIT_3;
  1968. nv->firmware_options[0] &= ~BIT_6;
  1969. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1970. if (IS_QLA2300(ha)) {
  1971. if (ha->fb_rev == FPM_2310) {
  1972. strcpy(ha->model_number, "QLA2310");
  1973. } else {
  1974. strcpy(ha->model_number, "QLA2300");
  1975. }
  1976. } else {
  1977. qla2x00_set_model_info(vha, nv->model_number,
  1978. sizeof(nv->model_number), "QLA23xx");
  1979. }
  1980. } else if (IS_QLA2200(ha)) {
  1981. nv->firmware_options[0] |= BIT_2;
  1982. /*
  1983. * 'Point-to-point preferred, else loop' is not a safe
  1984. * connection mode setting.
  1985. */
  1986. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1987. (BIT_5 | BIT_4)) {
  1988. /* Force 'loop preferred, else point-to-point'. */
  1989. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1990. nv->add_firmware_options[0] |= BIT_5;
  1991. }
  1992. strcpy(ha->model_number, "QLA22xx");
  1993. } else /*if (IS_QLA2100(ha))*/ {
  1994. strcpy(ha->model_number, "QLA2100");
  1995. }
  1996. /*
  1997. * Copy over NVRAM RISC parameter block to initialization control block.
  1998. */
  1999. dptr1 = (uint8_t *)icb;
  2000. dptr2 = (uint8_t *)&nv->parameter_block_version;
  2001. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  2002. while (cnt--)
  2003. *dptr1++ = *dptr2++;
  2004. /* Copy 2nd half. */
  2005. dptr1 = (uint8_t *)icb->add_firmware_options;
  2006. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  2007. while (cnt--)
  2008. *dptr1++ = *dptr2++;
  2009. /* Use alternate WWN? */
  2010. if (nv->host_p[1] & BIT_7) {
  2011. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  2012. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  2013. }
  2014. /* Prepare nodename */
  2015. if ((icb->firmware_options[1] & BIT_6) == 0) {
  2016. /*
  2017. * Firmware will apply the following mask if the nodename was
  2018. * not provided.
  2019. */
  2020. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  2021. icb->node_name[0] &= 0xF0;
  2022. }
  2023. /*
  2024. * Set host adapter parameters.
  2025. */
  2026. if (nv->host_p[0] & BIT_7)
  2027. ql2xextended_error_logging = 1;
  2028. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  2029. /* Always load RISC code on non ISP2[12]00 chips. */
  2030. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  2031. ha->flags.disable_risc_code_load = 0;
  2032. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  2033. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  2034. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  2035. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  2036. ha->flags.disable_serdes = 0;
  2037. ha->operating_mode =
  2038. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  2039. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  2040. sizeof(ha->fw_seriallink_options));
  2041. /* save HBA serial number */
  2042. ha->serial0 = icb->port_name[5];
  2043. ha->serial1 = icb->port_name[6];
  2044. ha->serial2 = icb->port_name[7];
  2045. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  2046. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  2047. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  2048. ha->retry_count = nv->retry_count;
  2049. /* Set minimum login_timeout to 4 seconds. */
  2050. if (nv->login_timeout != ql2xlogintimeout)
  2051. nv->login_timeout = ql2xlogintimeout;
  2052. if (nv->login_timeout < 4)
  2053. nv->login_timeout = 4;
  2054. ha->login_timeout = nv->login_timeout;
  2055. icb->login_timeout = nv->login_timeout;
  2056. /* Set minimum RATOV to 100 tenths of a second. */
  2057. ha->r_a_tov = 100;
  2058. ha->loop_reset_delay = nv->reset_delay;
  2059. /* Link Down Timeout = 0:
  2060. *
  2061. * When Port Down timer expires we will start returning
  2062. * I/O's to OS with "DID_NO_CONNECT".
  2063. *
  2064. * Link Down Timeout != 0:
  2065. *
  2066. * The driver waits for the link to come up after link down
  2067. * before returning I/Os to OS with "DID_NO_CONNECT".
  2068. */
  2069. if (nv->link_down_timeout == 0) {
  2070. ha->loop_down_abort_time =
  2071. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  2072. } else {
  2073. ha->link_down_timeout = nv->link_down_timeout;
  2074. ha->loop_down_abort_time =
  2075. (LOOP_DOWN_TIME - ha->link_down_timeout);
  2076. }
  2077. /*
  2078. * Need enough time to try and get the port back.
  2079. */
  2080. ha->port_down_retry_count = nv->port_down_retry_count;
  2081. if (qlport_down_retry)
  2082. ha->port_down_retry_count = qlport_down_retry;
  2083. /* Set login_retry_count */
  2084. ha->login_retry_count = nv->retry_count;
  2085. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  2086. ha->port_down_retry_count > 3)
  2087. ha->login_retry_count = ha->port_down_retry_count;
  2088. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  2089. ha->login_retry_count = ha->port_down_retry_count;
  2090. if (ql2xloginretrycount)
  2091. ha->login_retry_count = ql2xloginretrycount;
  2092. icb->lun_enables = __constant_cpu_to_le16(0);
  2093. icb->command_resource_count = 0;
  2094. icb->immediate_notify_resource_count = 0;
  2095. icb->timeout = __constant_cpu_to_le16(0);
  2096. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2097. /* Enable RIO */
  2098. icb->firmware_options[0] &= ~BIT_3;
  2099. icb->add_firmware_options[0] &=
  2100. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2101. icb->add_firmware_options[0] |= BIT_2;
  2102. icb->response_accumulation_timer = 3;
  2103. icb->interrupt_delay_timer = 5;
  2104. vha->flags.process_response_queue = 1;
  2105. } else {
  2106. /* Enable ZIO. */
  2107. if (!vha->flags.init_done) {
  2108. ha->zio_mode = icb->add_firmware_options[0] &
  2109. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2110. ha->zio_timer = icb->interrupt_delay_timer ?
  2111. icb->interrupt_delay_timer: 2;
  2112. }
  2113. icb->add_firmware_options[0] &=
  2114. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  2115. vha->flags.process_response_queue = 0;
  2116. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  2117. ha->zio_mode = QLA_ZIO_MODE_6;
  2118. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  2119. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  2120. ha->zio_timer * 100));
  2121. qla_printk(KERN_INFO, ha,
  2122. "ZIO mode %d enabled; timer delay (%d us).\n",
  2123. ha->zio_mode, ha->zio_timer * 100);
  2124. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  2125. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  2126. vha->flags.process_response_queue = 1;
  2127. }
  2128. }
  2129. if (rval) {
  2130. DEBUG2_3(printk(KERN_WARNING
  2131. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  2132. }
  2133. return (rval);
  2134. }
  2135. static void
  2136. qla2x00_rport_del(void *data)
  2137. {
  2138. fc_port_t *fcport = data;
  2139. struct fc_rport *rport;
  2140. unsigned long flags;
  2141. spin_lock_irqsave(fcport->vha->host->host_lock, flags);
  2142. rport = fcport->drport ? fcport->drport: fcport->rport;
  2143. fcport->drport = NULL;
  2144. spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
  2145. if (rport)
  2146. fc_remote_port_delete(rport);
  2147. }
  2148. /**
  2149. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  2150. * @ha: HA context
  2151. * @flags: allocation flags
  2152. *
  2153. * Returns a pointer to the allocated fcport, or NULL, if none available.
  2154. */
  2155. fc_port_t *
  2156. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  2157. {
  2158. fc_port_t *fcport;
  2159. fcport = kzalloc(sizeof(fc_port_t), flags);
  2160. if (!fcport)
  2161. return NULL;
  2162. /* Setup fcport template structure. */
  2163. fcport->vha = vha;
  2164. fcport->vp_idx = vha->vp_idx;
  2165. fcport->port_type = FCT_UNKNOWN;
  2166. fcport->loop_id = FC_NO_LOOP_ID;
  2167. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  2168. fcport->supported_classes = FC_COS_UNSPECIFIED;
  2169. return fcport;
  2170. }
  2171. /*
  2172. * qla2x00_configure_loop
  2173. * Updates Fibre Channel Device Database with what is actually on loop.
  2174. *
  2175. * Input:
  2176. * ha = adapter block pointer.
  2177. *
  2178. * Returns:
  2179. * 0 = success.
  2180. * 1 = error.
  2181. * 2 = database was full and device was not configured.
  2182. */
  2183. static int
  2184. qla2x00_configure_loop(scsi_qla_host_t *vha)
  2185. {
  2186. int rval;
  2187. unsigned long flags, save_flags;
  2188. struct qla_hw_data *ha = vha->hw;
  2189. rval = QLA_SUCCESS;
  2190. /* Get Initiator ID */
  2191. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  2192. rval = qla2x00_configure_hba(vha);
  2193. if (rval != QLA_SUCCESS) {
  2194. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  2195. vha->host_no));
  2196. return (rval);
  2197. }
  2198. }
  2199. save_flags = flags = vha->dpc_flags;
  2200. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  2201. vha->host_no, flags));
  2202. /*
  2203. * If we have both an RSCN and PORT UPDATE pending then handle them
  2204. * both at the same time.
  2205. */
  2206. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2207. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  2208. qla2x00_get_data_rate(vha);
  2209. /* Determine what we need to do */
  2210. if (ha->current_topology == ISP_CFG_FL &&
  2211. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2212. vha->flags.rscn_queue_overflow = 1;
  2213. set_bit(RSCN_UPDATE, &flags);
  2214. } else if (ha->current_topology == ISP_CFG_F &&
  2215. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  2216. vha->flags.rscn_queue_overflow = 1;
  2217. set_bit(RSCN_UPDATE, &flags);
  2218. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  2219. } else if (ha->current_topology == ISP_CFG_N) {
  2220. clear_bit(RSCN_UPDATE, &flags);
  2221. } else if (!vha->flags.online ||
  2222. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  2223. vha->flags.rscn_queue_overflow = 1;
  2224. set_bit(RSCN_UPDATE, &flags);
  2225. set_bit(LOCAL_LOOP_UPDATE, &flags);
  2226. }
  2227. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  2228. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2229. rval = QLA_FUNCTION_FAILED;
  2230. else
  2231. rval = qla2x00_configure_local_loop(vha);
  2232. }
  2233. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  2234. if (LOOP_TRANSITION(vha))
  2235. rval = QLA_FUNCTION_FAILED;
  2236. else
  2237. rval = qla2x00_configure_fabric(vha);
  2238. }
  2239. if (rval == QLA_SUCCESS) {
  2240. if (atomic_read(&vha->loop_down_timer) ||
  2241. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2242. rval = QLA_FUNCTION_FAILED;
  2243. } else {
  2244. atomic_set(&vha->loop_state, LOOP_READY);
  2245. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  2246. }
  2247. }
  2248. if (rval) {
  2249. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  2250. __func__, vha->host_no));
  2251. } else {
  2252. DEBUG3(printk("%s: exiting normally\n", __func__));
  2253. }
  2254. /* Restore state if a resync event occurred during processing */
  2255. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  2256. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  2257. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2258. if (test_bit(RSCN_UPDATE, &save_flags)) {
  2259. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2260. if (!IS_ALOGIO_CAPABLE(ha))
  2261. vha->flags.rscn_queue_overflow = 1;
  2262. }
  2263. }
  2264. return (rval);
  2265. }
  2266. /*
  2267. * qla2x00_configure_local_loop
  2268. * Updates Fibre Channel Device Database with local loop devices.
  2269. *
  2270. * Input:
  2271. * ha = adapter block pointer.
  2272. *
  2273. * Returns:
  2274. * 0 = success.
  2275. */
  2276. static int
  2277. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2278. {
  2279. int rval, rval2;
  2280. int found_devs;
  2281. int found;
  2282. fc_port_t *fcport, *new_fcport;
  2283. uint16_t index;
  2284. uint16_t entries;
  2285. char *id_iter;
  2286. uint16_t loop_id;
  2287. uint8_t domain, area, al_pa;
  2288. struct qla_hw_data *ha = vha->hw;
  2289. found_devs = 0;
  2290. new_fcport = NULL;
  2291. entries = MAX_FIBRE_DEVICES;
  2292. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2293. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2294. /* Get list of logged in devices. */
  2295. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2296. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2297. &entries);
  2298. if (rval != QLA_SUCCESS)
  2299. goto cleanup_allocation;
  2300. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2301. vha->host_no, entries));
  2302. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2303. entries * sizeof(struct gid_list_info)));
  2304. /* Allocate temporary fcport for any new fcports discovered. */
  2305. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2306. if (new_fcport == NULL) {
  2307. rval = QLA_MEMORY_ALLOC_FAILED;
  2308. goto cleanup_allocation;
  2309. }
  2310. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2311. /*
  2312. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2313. */
  2314. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2315. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2316. fcport->port_type != FCT_BROADCAST &&
  2317. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2318. DEBUG(printk("scsi(%ld): Marking port lost, "
  2319. "loop_id=0x%04x\n",
  2320. vha->host_no, fcport->loop_id));
  2321. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2322. }
  2323. }
  2324. /* Add devices to port list. */
  2325. id_iter = (char *)ha->gid_list;
  2326. for (index = 0; index < entries; index++) {
  2327. domain = ((struct gid_list_info *)id_iter)->domain;
  2328. area = ((struct gid_list_info *)id_iter)->area;
  2329. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2330. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2331. loop_id = (uint16_t)
  2332. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2333. else
  2334. loop_id = le16_to_cpu(
  2335. ((struct gid_list_info *)id_iter)->loop_id);
  2336. id_iter += ha->gid_list_info_size;
  2337. /* Bypass reserved domain fields. */
  2338. if ((domain & 0xf0) == 0xf0)
  2339. continue;
  2340. /* Bypass if not same domain and area of adapter. */
  2341. if (area && domain &&
  2342. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2343. continue;
  2344. /* Bypass invalid local loop ID. */
  2345. if (loop_id > LAST_LOCAL_LOOP_ID)
  2346. continue;
  2347. /* Fill in member data. */
  2348. new_fcport->d_id.b.domain = domain;
  2349. new_fcport->d_id.b.area = area;
  2350. new_fcport->d_id.b.al_pa = al_pa;
  2351. new_fcport->loop_id = loop_id;
  2352. new_fcport->vp_idx = vha->vp_idx;
  2353. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2354. if (rval2 != QLA_SUCCESS) {
  2355. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2356. "information -- get_port_database=%x, "
  2357. "loop_id=0x%04x\n",
  2358. vha->host_no, rval2, new_fcport->loop_id));
  2359. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2360. vha->host_no));
  2361. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2362. continue;
  2363. }
  2364. /* Check for matching device in port list. */
  2365. found = 0;
  2366. fcport = NULL;
  2367. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2368. if (memcmp(new_fcport->port_name, fcport->port_name,
  2369. WWN_SIZE))
  2370. continue;
  2371. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2372. fcport->loop_id = new_fcport->loop_id;
  2373. fcport->port_type = new_fcport->port_type;
  2374. fcport->d_id.b24 = new_fcport->d_id.b24;
  2375. memcpy(fcport->node_name, new_fcport->node_name,
  2376. WWN_SIZE);
  2377. found++;
  2378. break;
  2379. }
  2380. if (!found) {
  2381. /* New device, add to fcports list. */
  2382. if (vha->vp_idx) {
  2383. new_fcport->vha = vha;
  2384. new_fcport->vp_idx = vha->vp_idx;
  2385. }
  2386. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2387. /* Allocate a new replacement fcport. */
  2388. fcport = new_fcport;
  2389. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2390. if (new_fcport == NULL) {
  2391. rval = QLA_MEMORY_ALLOC_FAILED;
  2392. goto cleanup_allocation;
  2393. }
  2394. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2395. }
  2396. /* Base iIDMA settings on HBA port speed. */
  2397. fcport->fp_speed = ha->link_data_rate;
  2398. qla2x00_update_fcport(vha, fcport);
  2399. found_devs++;
  2400. }
  2401. cleanup_allocation:
  2402. kfree(new_fcport);
  2403. if (rval != QLA_SUCCESS) {
  2404. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2405. "rval=%x\n", vha->host_no, rval));
  2406. }
  2407. return (rval);
  2408. }
  2409. static void
  2410. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2411. {
  2412. #define LS_UNKNOWN 2
  2413. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2414. char *link_speed;
  2415. int rval;
  2416. uint16_t mb[4];
  2417. struct qla_hw_data *ha = vha->hw;
  2418. if (!IS_IIDMA_CAPABLE(ha))
  2419. return;
  2420. if (atomic_read(&fcport->state) != FCS_ONLINE)
  2421. return;
  2422. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2423. fcport->fp_speed > ha->link_data_rate)
  2424. return;
  2425. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2426. mb);
  2427. if (rval != QLA_SUCCESS) {
  2428. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2429. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2430. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2431. fcport->port_name[2], fcport->port_name[3],
  2432. fcport->port_name[4], fcport->port_name[5],
  2433. fcport->port_name[6], fcport->port_name[7], rval,
  2434. fcport->fp_speed, mb[0], mb[1]));
  2435. } else {
  2436. link_speed = link_speeds[LS_UNKNOWN];
  2437. if (fcport->fp_speed < 5)
  2438. link_speed = link_speeds[fcport->fp_speed];
  2439. else if (fcport->fp_speed == 0x13)
  2440. link_speed = link_speeds[5];
  2441. DEBUG2(qla_printk(KERN_INFO, ha,
  2442. "iIDMA adjusted to %s GB/s on "
  2443. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2444. link_speed, fcport->port_name[0],
  2445. fcport->port_name[1], fcport->port_name[2],
  2446. fcport->port_name[3], fcport->port_name[4],
  2447. fcport->port_name[5], fcport->port_name[6],
  2448. fcport->port_name[7]));
  2449. }
  2450. }
  2451. static void
  2452. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2453. {
  2454. struct fc_rport_identifiers rport_ids;
  2455. struct fc_rport *rport;
  2456. struct qla_hw_data *ha = vha->hw;
  2457. unsigned long flags;
  2458. qla2x00_rport_del(fcport);
  2459. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2460. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2461. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2462. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2463. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2464. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2465. if (!rport) {
  2466. qla_printk(KERN_WARNING, ha,
  2467. "Unable to allocate fc remote port!\n");
  2468. return;
  2469. }
  2470. spin_lock_irqsave(fcport->vha->host->host_lock, flags);
  2471. *((fc_port_t **)rport->dd_data) = fcport;
  2472. spin_unlock_irqrestore(fcport->vha->host->host_lock, flags);
  2473. rport->supported_classes = fcport->supported_classes;
  2474. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2475. if (fcport->port_type == FCT_INITIATOR)
  2476. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2477. if (fcport->port_type == FCT_TARGET)
  2478. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2479. fc_remote_port_rolechg(rport, rport_ids.roles);
  2480. }
  2481. /*
  2482. * qla2x00_update_fcport
  2483. * Updates device on list.
  2484. *
  2485. * Input:
  2486. * ha = adapter block pointer.
  2487. * fcport = port structure pointer.
  2488. *
  2489. * Return:
  2490. * 0 - Success
  2491. * BIT_0 - error
  2492. *
  2493. * Context:
  2494. * Kernel context.
  2495. */
  2496. void
  2497. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2498. {
  2499. fcport->vha = vha;
  2500. fcport->login_retry = 0;
  2501. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  2502. qla2x00_iidma_fcport(vha, fcport);
  2503. qla24xx_update_fcport_fcp_prio(vha, fcport);
  2504. qla2x00_reg_remote_port(vha, fcport);
  2505. atomic_set(&fcport->state, FCS_ONLINE);
  2506. }
  2507. /*
  2508. * qla2x00_configure_fabric
  2509. * Setup SNS devices with loop ID's.
  2510. *
  2511. * Input:
  2512. * ha = adapter block pointer.
  2513. *
  2514. * Returns:
  2515. * 0 = success.
  2516. * BIT_0 = error
  2517. */
  2518. static int
  2519. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2520. {
  2521. int rval, rval2;
  2522. fc_port_t *fcport, *fcptemp;
  2523. uint16_t next_loopid;
  2524. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2525. uint16_t loop_id;
  2526. LIST_HEAD(new_fcports);
  2527. struct qla_hw_data *ha = vha->hw;
  2528. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2529. /* If FL port exists, then SNS is present */
  2530. if (IS_FWI2_CAPABLE(ha))
  2531. loop_id = NPH_F_PORT;
  2532. else
  2533. loop_id = SNS_FL_PORT;
  2534. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2535. if (rval != QLA_SUCCESS) {
  2536. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2537. "Port\n", vha->host_no));
  2538. vha->device_flags &= ~SWITCH_FOUND;
  2539. return (QLA_SUCCESS);
  2540. }
  2541. vha->device_flags |= SWITCH_FOUND;
  2542. /* Mark devices that need re-synchronization. */
  2543. rval2 = qla2x00_device_resync(vha);
  2544. if (rval2 == QLA_RSCNS_HANDLED) {
  2545. /* No point doing the scan, just continue. */
  2546. return (QLA_SUCCESS);
  2547. }
  2548. do {
  2549. /* FDMI support. */
  2550. if (ql2xfdmienable &&
  2551. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2552. qla2x00_fdmi_register(vha);
  2553. /* Ensure we are logged into the SNS. */
  2554. if (IS_FWI2_CAPABLE(ha))
  2555. loop_id = NPH_SNS;
  2556. else
  2557. loop_id = SIMPLE_NAME_SERVER;
  2558. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2559. 0xfc, mb, BIT_1 | BIT_0);
  2560. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2561. DEBUG2(qla_printk(KERN_INFO, ha,
  2562. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2563. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2564. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2565. return (QLA_SUCCESS);
  2566. }
  2567. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2568. if (qla2x00_rft_id(vha)) {
  2569. /* EMPTY */
  2570. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2571. "TYPE failed.\n", vha->host_no));
  2572. }
  2573. if (qla2x00_rff_id(vha)) {
  2574. /* EMPTY */
  2575. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2576. "Features failed.\n", vha->host_no));
  2577. }
  2578. if (qla2x00_rnn_id(vha)) {
  2579. /* EMPTY */
  2580. DEBUG2(printk("scsi(%ld): Register Node Name "
  2581. "failed.\n", vha->host_no));
  2582. } else if (qla2x00_rsnn_nn(vha)) {
  2583. /* EMPTY */
  2584. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2585. "Node Name failed.\n", vha->host_no));
  2586. }
  2587. }
  2588. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2589. if (rval != QLA_SUCCESS)
  2590. break;
  2591. /*
  2592. * Logout all previous fabric devices marked lost, except
  2593. * FCP2 devices.
  2594. */
  2595. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2596. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2597. break;
  2598. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2599. continue;
  2600. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2601. qla2x00_mark_device_lost(vha, fcport,
  2602. ql2xplogiabsentdevice, 0);
  2603. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2604. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2605. fcport->port_type != FCT_INITIATOR &&
  2606. fcport->port_type != FCT_BROADCAST) {
  2607. ha->isp_ops->fabric_logout(vha,
  2608. fcport->loop_id,
  2609. fcport->d_id.b.domain,
  2610. fcport->d_id.b.area,
  2611. fcport->d_id.b.al_pa);
  2612. fcport->loop_id = FC_NO_LOOP_ID;
  2613. }
  2614. }
  2615. }
  2616. /* Starting free loop ID. */
  2617. next_loopid = ha->min_external_loopid;
  2618. /*
  2619. * Scan through our port list and login entries that need to be
  2620. * logged in.
  2621. */
  2622. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2623. if (atomic_read(&vha->loop_down_timer) ||
  2624. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2625. break;
  2626. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2627. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2628. continue;
  2629. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2630. fcport->loop_id = next_loopid;
  2631. rval = qla2x00_find_new_loop_id(
  2632. base_vha, fcport);
  2633. if (rval != QLA_SUCCESS) {
  2634. /* Ran out of IDs to use */
  2635. break;
  2636. }
  2637. }
  2638. /* Login and update database */
  2639. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2640. }
  2641. /* Exit if out of loop IDs. */
  2642. if (rval != QLA_SUCCESS) {
  2643. break;
  2644. }
  2645. /*
  2646. * Login and add the new devices to our port list.
  2647. */
  2648. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2649. if (atomic_read(&vha->loop_down_timer) ||
  2650. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2651. break;
  2652. /* Find a new loop ID to use. */
  2653. fcport->loop_id = next_loopid;
  2654. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2655. if (rval != QLA_SUCCESS) {
  2656. /* Ran out of IDs to use */
  2657. break;
  2658. }
  2659. /* Login and update database */
  2660. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2661. if (vha->vp_idx) {
  2662. fcport->vha = vha;
  2663. fcport->vp_idx = vha->vp_idx;
  2664. }
  2665. list_move_tail(&fcport->list, &vha->vp_fcports);
  2666. }
  2667. } while (0);
  2668. /* Free all new device structures not processed. */
  2669. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2670. list_del(&fcport->list);
  2671. kfree(fcport);
  2672. }
  2673. if (rval) {
  2674. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2675. "rval=%d\n", vha->host_no, rval));
  2676. }
  2677. return (rval);
  2678. }
  2679. /*
  2680. * qla2x00_find_all_fabric_devs
  2681. *
  2682. * Input:
  2683. * ha = adapter block pointer.
  2684. * dev = database device entry pointer.
  2685. *
  2686. * Returns:
  2687. * 0 = success.
  2688. *
  2689. * Context:
  2690. * Kernel context.
  2691. */
  2692. static int
  2693. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2694. struct list_head *new_fcports)
  2695. {
  2696. int rval;
  2697. uint16_t loop_id;
  2698. fc_port_t *fcport, *new_fcport, *fcptemp;
  2699. int found;
  2700. sw_info_t *swl;
  2701. int swl_idx;
  2702. int first_dev, last_dev;
  2703. port_id_t wrap = {}, nxt_d_id;
  2704. struct qla_hw_data *ha = vha->hw;
  2705. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2706. struct scsi_qla_host *tvp;
  2707. rval = QLA_SUCCESS;
  2708. /* Try GID_PT to get device list, else GAN. */
  2709. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2710. if (!swl) {
  2711. /*EMPTY*/
  2712. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2713. "on GA_NXT\n", vha->host_no));
  2714. } else {
  2715. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2716. kfree(swl);
  2717. swl = NULL;
  2718. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2719. kfree(swl);
  2720. swl = NULL;
  2721. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2722. kfree(swl);
  2723. swl = NULL;
  2724. } else if (ql2xiidmaenable &&
  2725. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2726. qla2x00_gpsc(vha, swl);
  2727. }
  2728. /* If other queries succeeded probe for FC-4 type */
  2729. if (swl)
  2730. qla2x00_gff_id(vha, swl);
  2731. }
  2732. swl_idx = 0;
  2733. /* Allocate temporary fcport for any new fcports discovered. */
  2734. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2735. if (new_fcport == NULL) {
  2736. kfree(swl);
  2737. return (QLA_MEMORY_ALLOC_FAILED);
  2738. }
  2739. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2740. /* Set start port ID scan at adapter ID. */
  2741. first_dev = 1;
  2742. last_dev = 0;
  2743. /* Starting free loop ID. */
  2744. loop_id = ha->min_external_loopid;
  2745. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2746. if (qla2x00_is_reserved_id(vha, loop_id))
  2747. continue;
  2748. if (ha->current_topology == ISP_CFG_FL &&
  2749. (atomic_read(&vha->loop_down_timer) ||
  2750. LOOP_TRANSITION(vha))) {
  2751. atomic_set(&vha->loop_down_timer, 0);
  2752. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2753. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  2754. break;
  2755. }
  2756. if (swl != NULL) {
  2757. if (last_dev) {
  2758. wrap.b24 = new_fcport->d_id.b24;
  2759. } else {
  2760. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2761. memcpy(new_fcport->node_name,
  2762. swl[swl_idx].node_name, WWN_SIZE);
  2763. memcpy(new_fcport->port_name,
  2764. swl[swl_idx].port_name, WWN_SIZE);
  2765. memcpy(new_fcport->fabric_port_name,
  2766. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2767. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2768. new_fcport->fc4_type = swl[swl_idx].fc4_type;
  2769. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2770. last_dev = 1;
  2771. }
  2772. swl_idx++;
  2773. }
  2774. } else {
  2775. /* Send GA_NXT to the switch */
  2776. rval = qla2x00_ga_nxt(vha, new_fcport);
  2777. if (rval != QLA_SUCCESS) {
  2778. qla_printk(KERN_WARNING, ha,
  2779. "SNS scan failed -- assuming zero-entry "
  2780. "result...\n");
  2781. list_for_each_entry_safe(fcport, fcptemp,
  2782. new_fcports, list) {
  2783. list_del(&fcport->list);
  2784. kfree(fcport);
  2785. }
  2786. rval = QLA_SUCCESS;
  2787. break;
  2788. }
  2789. }
  2790. /* If wrap on switch device list, exit. */
  2791. if (first_dev) {
  2792. wrap.b24 = new_fcport->d_id.b24;
  2793. first_dev = 0;
  2794. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2795. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2796. vha->host_no, new_fcport->d_id.b.domain,
  2797. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2798. break;
  2799. }
  2800. /* Bypass if same physical adapter. */
  2801. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2802. continue;
  2803. /* Bypass virtual ports of the same host. */
  2804. found = 0;
  2805. if (ha->num_vhosts) {
  2806. unsigned long flags;
  2807. spin_lock_irqsave(&ha->vport_slock, flags);
  2808. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2809. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2810. found = 1;
  2811. break;
  2812. }
  2813. }
  2814. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2815. if (found)
  2816. continue;
  2817. }
  2818. /* Bypass if same domain and area of adapter. */
  2819. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2820. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2821. ISP_CFG_FL)
  2822. continue;
  2823. /* Bypass reserved domain fields. */
  2824. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2825. continue;
  2826. /* Bypass ports whose FCP-4 type is not FCP_SCSI */
  2827. if (ql2xgffidenable &&
  2828. (new_fcport->fc4_type != FC4_TYPE_FCP_SCSI &&
  2829. new_fcport->fc4_type != FC4_TYPE_UNKNOWN))
  2830. continue;
  2831. /* Locate matching device in database. */
  2832. found = 0;
  2833. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2834. if (memcmp(new_fcport->port_name, fcport->port_name,
  2835. WWN_SIZE))
  2836. continue;
  2837. found++;
  2838. /* Update port state. */
  2839. memcpy(fcport->fabric_port_name,
  2840. new_fcport->fabric_port_name, WWN_SIZE);
  2841. fcport->fp_speed = new_fcport->fp_speed;
  2842. /*
  2843. * If address the same and state FCS_ONLINE, nothing
  2844. * changed.
  2845. */
  2846. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2847. atomic_read(&fcport->state) == FCS_ONLINE) {
  2848. break;
  2849. }
  2850. /*
  2851. * If device was not a fabric device before.
  2852. */
  2853. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2854. fcport->d_id.b24 = new_fcport->d_id.b24;
  2855. fcport->loop_id = FC_NO_LOOP_ID;
  2856. fcport->flags |= (FCF_FABRIC_DEVICE |
  2857. FCF_LOGIN_NEEDED);
  2858. break;
  2859. }
  2860. /*
  2861. * Port ID changed or device was marked to be updated;
  2862. * Log it out if still logged in and mark it for
  2863. * relogin later.
  2864. */
  2865. fcport->d_id.b24 = new_fcport->d_id.b24;
  2866. fcport->flags |= FCF_LOGIN_NEEDED;
  2867. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2868. (fcport->flags & FCF_FCP2_DEVICE) == 0 &&
  2869. fcport->port_type != FCT_INITIATOR &&
  2870. fcport->port_type != FCT_BROADCAST) {
  2871. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2872. fcport->d_id.b.domain, fcport->d_id.b.area,
  2873. fcport->d_id.b.al_pa);
  2874. fcport->loop_id = FC_NO_LOOP_ID;
  2875. }
  2876. break;
  2877. }
  2878. if (found)
  2879. continue;
  2880. /* If device was not in our fcports list, then add it. */
  2881. list_add_tail(&new_fcport->list, new_fcports);
  2882. /* Allocate a new replacement fcport. */
  2883. nxt_d_id.b24 = new_fcport->d_id.b24;
  2884. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2885. if (new_fcport == NULL) {
  2886. kfree(swl);
  2887. return (QLA_MEMORY_ALLOC_FAILED);
  2888. }
  2889. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2890. new_fcport->d_id.b24 = nxt_d_id.b24;
  2891. }
  2892. kfree(swl);
  2893. kfree(new_fcport);
  2894. return (rval);
  2895. }
  2896. /*
  2897. * qla2x00_find_new_loop_id
  2898. * Scan through our port list and find a new usable loop ID.
  2899. *
  2900. * Input:
  2901. * ha: adapter state pointer.
  2902. * dev: port structure pointer.
  2903. *
  2904. * Returns:
  2905. * qla2x00 local function return status code.
  2906. *
  2907. * Context:
  2908. * Kernel context.
  2909. */
  2910. int
  2911. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2912. {
  2913. int rval;
  2914. int found;
  2915. fc_port_t *fcport;
  2916. uint16_t first_loop_id;
  2917. struct qla_hw_data *ha = vha->hw;
  2918. struct scsi_qla_host *vp;
  2919. struct scsi_qla_host *tvp;
  2920. unsigned long flags = 0;
  2921. rval = QLA_SUCCESS;
  2922. /* Save starting loop ID. */
  2923. first_loop_id = dev->loop_id;
  2924. for (;;) {
  2925. /* Skip loop ID if already used by adapter. */
  2926. if (dev->loop_id == vha->loop_id)
  2927. dev->loop_id++;
  2928. /* Skip reserved loop IDs. */
  2929. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2930. dev->loop_id++;
  2931. /* Reset loop ID if passed the end. */
  2932. if (dev->loop_id > ha->max_loop_id) {
  2933. /* first loop ID. */
  2934. dev->loop_id = ha->min_external_loopid;
  2935. }
  2936. /* Check for loop ID being already in use. */
  2937. found = 0;
  2938. fcport = NULL;
  2939. spin_lock_irqsave(&ha->vport_slock, flags);
  2940. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2941. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2942. if (fcport->loop_id == dev->loop_id &&
  2943. fcport != dev) {
  2944. /* ID possibly in use */
  2945. found++;
  2946. break;
  2947. }
  2948. }
  2949. if (found)
  2950. break;
  2951. }
  2952. spin_unlock_irqrestore(&ha->vport_slock, flags);
  2953. /* If not in use then it is free to use. */
  2954. if (!found) {
  2955. break;
  2956. }
  2957. /* ID in use. Try next value. */
  2958. dev->loop_id++;
  2959. /* If wrap around. No free ID to use. */
  2960. if (dev->loop_id == first_loop_id) {
  2961. dev->loop_id = FC_NO_LOOP_ID;
  2962. rval = QLA_FUNCTION_FAILED;
  2963. break;
  2964. }
  2965. }
  2966. return (rval);
  2967. }
  2968. /*
  2969. * qla2x00_device_resync
  2970. * Marks devices in the database that needs resynchronization.
  2971. *
  2972. * Input:
  2973. * ha = adapter block pointer.
  2974. *
  2975. * Context:
  2976. * Kernel context.
  2977. */
  2978. static int
  2979. qla2x00_device_resync(scsi_qla_host_t *vha)
  2980. {
  2981. int rval;
  2982. uint32_t mask;
  2983. fc_port_t *fcport;
  2984. uint32_t rscn_entry;
  2985. uint8_t rscn_out_iter;
  2986. uint8_t format;
  2987. port_id_t d_id = {};
  2988. rval = QLA_RSCNS_HANDLED;
  2989. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2990. vha->flags.rscn_queue_overflow) {
  2991. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2992. format = MSB(MSW(rscn_entry));
  2993. d_id.b.domain = LSB(MSW(rscn_entry));
  2994. d_id.b.area = MSB(LSW(rscn_entry));
  2995. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2996. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2997. "[%02x/%02x%02x%02x].\n",
  2998. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2999. d_id.b.area, d_id.b.al_pa));
  3000. vha->rscn_out_ptr++;
  3001. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  3002. vha->rscn_out_ptr = 0;
  3003. /* Skip duplicate entries. */
  3004. for (rscn_out_iter = vha->rscn_out_ptr;
  3005. !vha->flags.rscn_queue_overflow &&
  3006. rscn_out_iter != vha->rscn_in_ptr;
  3007. rscn_out_iter = (rscn_out_iter ==
  3008. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  3009. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  3010. break;
  3011. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  3012. "entry found at [%d].\n", vha->host_no,
  3013. rscn_out_iter));
  3014. vha->rscn_out_ptr = rscn_out_iter;
  3015. }
  3016. /* Queue overflow, set switch default case. */
  3017. if (vha->flags.rscn_queue_overflow) {
  3018. DEBUG(printk("scsi(%ld): device_resync: rscn "
  3019. "overflow.\n", vha->host_no));
  3020. format = 3;
  3021. vha->flags.rscn_queue_overflow = 0;
  3022. }
  3023. switch (format) {
  3024. case 0:
  3025. mask = 0xffffff;
  3026. break;
  3027. case 1:
  3028. mask = 0xffff00;
  3029. break;
  3030. case 2:
  3031. mask = 0xff0000;
  3032. break;
  3033. default:
  3034. mask = 0x0;
  3035. d_id.b24 = 0;
  3036. vha->rscn_out_ptr = vha->rscn_in_ptr;
  3037. break;
  3038. }
  3039. rval = QLA_SUCCESS;
  3040. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3041. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  3042. (fcport->d_id.b24 & mask) != d_id.b24 ||
  3043. fcport->port_type == FCT_BROADCAST)
  3044. continue;
  3045. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  3046. if (format != 3 ||
  3047. fcport->port_type != FCT_INITIATOR) {
  3048. qla2x00_mark_device_lost(vha, fcport,
  3049. 0, 0);
  3050. }
  3051. }
  3052. }
  3053. }
  3054. return (rval);
  3055. }
  3056. /*
  3057. * qla2x00_fabric_dev_login
  3058. * Login fabric target device and update FC port database.
  3059. *
  3060. * Input:
  3061. * ha: adapter state pointer.
  3062. * fcport: port structure list pointer.
  3063. * next_loopid: contains value of a new loop ID that can be used
  3064. * by the next login attempt.
  3065. *
  3066. * Returns:
  3067. * qla2x00 local function return status code.
  3068. *
  3069. * Context:
  3070. * Kernel context.
  3071. */
  3072. static int
  3073. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3074. uint16_t *next_loopid)
  3075. {
  3076. int rval;
  3077. int retry;
  3078. uint8_t opts;
  3079. struct qla_hw_data *ha = vha->hw;
  3080. rval = QLA_SUCCESS;
  3081. retry = 0;
  3082. if (IS_ALOGIO_CAPABLE(ha)) {
  3083. if (fcport->flags & FCF_ASYNC_SENT)
  3084. return rval;
  3085. fcport->flags |= FCF_ASYNC_SENT;
  3086. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  3087. if (!rval)
  3088. return rval;
  3089. }
  3090. fcport->flags &= ~FCF_ASYNC_SENT;
  3091. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  3092. if (rval == QLA_SUCCESS) {
  3093. /* Send an ADISC to FCP2 devices.*/
  3094. opts = 0;
  3095. if (fcport->flags & FCF_FCP2_DEVICE)
  3096. opts |= BIT_1;
  3097. rval = qla2x00_get_port_database(vha, fcport, opts);
  3098. if (rval != QLA_SUCCESS) {
  3099. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3100. fcport->d_id.b.domain, fcport->d_id.b.area,
  3101. fcport->d_id.b.al_pa);
  3102. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3103. } else {
  3104. qla2x00_update_fcport(vha, fcport);
  3105. }
  3106. }
  3107. return (rval);
  3108. }
  3109. /*
  3110. * qla2x00_fabric_login
  3111. * Issue fabric login command.
  3112. *
  3113. * Input:
  3114. * ha = adapter block pointer.
  3115. * device = pointer to FC device type structure.
  3116. *
  3117. * Returns:
  3118. * 0 - Login successfully
  3119. * 1 - Login failed
  3120. * 2 - Initiator device
  3121. * 3 - Fatal error
  3122. */
  3123. int
  3124. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  3125. uint16_t *next_loopid)
  3126. {
  3127. int rval;
  3128. int retry;
  3129. uint16_t tmp_loopid;
  3130. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3131. struct qla_hw_data *ha = vha->hw;
  3132. retry = 0;
  3133. tmp_loopid = 0;
  3134. for (;;) {
  3135. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  3136. "for port %02x%02x%02x.\n",
  3137. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  3138. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3139. /* Login fcport on switch. */
  3140. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  3141. fcport->d_id.b.domain, fcport->d_id.b.area,
  3142. fcport->d_id.b.al_pa, mb, BIT_0);
  3143. if (mb[0] == MBS_PORT_ID_USED) {
  3144. /*
  3145. * Device has another loop ID. The firmware team
  3146. * recommends the driver perform an implicit login with
  3147. * the specified ID again. The ID we just used is save
  3148. * here so we return with an ID that can be tried by
  3149. * the next login.
  3150. */
  3151. retry++;
  3152. tmp_loopid = fcport->loop_id;
  3153. fcport->loop_id = mb[1];
  3154. DEBUG(printk("Fabric Login: port in use - next "
  3155. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  3156. fcport->loop_id, fcport->d_id.b.domain,
  3157. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  3158. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  3159. /*
  3160. * Login succeeded.
  3161. */
  3162. if (retry) {
  3163. /* A retry occurred before. */
  3164. *next_loopid = tmp_loopid;
  3165. } else {
  3166. /*
  3167. * No retry occurred before. Just increment the
  3168. * ID value for next login.
  3169. */
  3170. *next_loopid = (fcport->loop_id + 1);
  3171. }
  3172. if (mb[1] & BIT_0) {
  3173. fcport->port_type = FCT_INITIATOR;
  3174. } else {
  3175. fcport->port_type = FCT_TARGET;
  3176. if (mb[1] & BIT_1) {
  3177. fcport->flags |= FCF_FCP2_DEVICE;
  3178. }
  3179. }
  3180. if (mb[10] & BIT_0)
  3181. fcport->supported_classes |= FC_COS_CLASS2;
  3182. if (mb[10] & BIT_1)
  3183. fcport->supported_classes |= FC_COS_CLASS3;
  3184. rval = QLA_SUCCESS;
  3185. break;
  3186. } else if (mb[0] == MBS_LOOP_ID_USED) {
  3187. /*
  3188. * Loop ID already used, try next loop ID.
  3189. */
  3190. fcport->loop_id++;
  3191. rval = qla2x00_find_new_loop_id(vha, fcport);
  3192. if (rval != QLA_SUCCESS) {
  3193. /* Ran out of loop IDs to use */
  3194. break;
  3195. }
  3196. } else if (mb[0] == MBS_COMMAND_ERROR) {
  3197. /*
  3198. * Firmware possibly timed out during login. If NO
  3199. * retries are left to do then the device is declared
  3200. * dead.
  3201. */
  3202. *next_loopid = fcport->loop_id;
  3203. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3204. fcport->d_id.b.domain, fcport->d_id.b.area,
  3205. fcport->d_id.b.al_pa);
  3206. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  3207. rval = 1;
  3208. break;
  3209. } else {
  3210. /*
  3211. * unrecoverable / not handled error
  3212. */
  3213. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  3214. "loop_id=%x jiffies=%lx.\n",
  3215. __func__, vha->host_no, mb[0],
  3216. fcport->d_id.b.domain, fcport->d_id.b.area,
  3217. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  3218. *next_loopid = fcport->loop_id;
  3219. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  3220. fcport->d_id.b.domain, fcport->d_id.b.area,
  3221. fcport->d_id.b.al_pa);
  3222. fcport->loop_id = FC_NO_LOOP_ID;
  3223. fcport->login_retry = 0;
  3224. rval = 3;
  3225. break;
  3226. }
  3227. }
  3228. return (rval);
  3229. }
  3230. /*
  3231. * qla2x00_local_device_login
  3232. * Issue local device login command.
  3233. *
  3234. * Input:
  3235. * ha = adapter block pointer.
  3236. * loop_id = loop id of device to login to.
  3237. *
  3238. * Returns (Where's the #define!!!!):
  3239. * 0 - Login successfully
  3240. * 1 - Login failed
  3241. * 3 - Fatal error
  3242. */
  3243. int
  3244. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  3245. {
  3246. int rval;
  3247. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3248. memset(mb, 0, sizeof(mb));
  3249. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  3250. if (rval == QLA_SUCCESS) {
  3251. /* Interrogate mailbox registers for any errors */
  3252. if (mb[0] == MBS_COMMAND_ERROR)
  3253. rval = 1;
  3254. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  3255. /* device not in PCB table */
  3256. rval = 3;
  3257. }
  3258. return (rval);
  3259. }
  3260. /*
  3261. * qla2x00_loop_resync
  3262. * Resync with fibre channel devices.
  3263. *
  3264. * Input:
  3265. * ha = adapter block pointer.
  3266. *
  3267. * Returns:
  3268. * 0 = success
  3269. */
  3270. int
  3271. qla2x00_loop_resync(scsi_qla_host_t *vha)
  3272. {
  3273. int rval = QLA_SUCCESS;
  3274. uint32_t wait_time;
  3275. struct req_que *req;
  3276. struct rsp_que *rsp;
  3277. if (vha->hw->flags.cpu_affinity_enabled)
  3278. req = vha->hw->req_q_map[0];
  3279. else
  3280. req = vha->req;
  3281. rsp = req->rsp;
  3282. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3283. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3284. if (vha->flags.online) {
  3285. if (!(rval = qla2x00_fw_ready(vha))) {
  3286. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3287. wait_time = 256;
  3288. do {
  3289. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3290. /* Issue a marker after FW becomes ready. */
  3291. qla2x00_marker(vha, req, rsp, 0, 0,
  3292. MK_SYNC_ALL);
  3293. vha->marker_needed = 0;
  3294. /* Remap devices on Loop. */
  3295. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3296. qla2x00_configure_loop(vha);
  3297. wait_time--;
  3298. } while (!atomic_read(&vha->loop_down_timer) &&
  3299. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3300. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3301. &vha->dpc_flags)));
  3302. }
  3303. }
  3304. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3305. return (QLA_FUNCTION_FAILED);
  3306. if (rval)
  3307. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3308. return (rval);
  3309. }
  3310. /*
  3311. * qla2x00_perform_loop_resync
  3312. * Description: This function will set the appropriate flags and call
  3313. * qla2x00_loop_resync. If successful loop will be resynced
  3314. * Arguments : scsi_qla_host_t pointer
  3315. * returm : Success or Failure
  3316. */
  3317. int qla2x00_perform_loop_resync(scsi_qla_host_t *ha)
  3318. {
  3319. int32_t rval = 0;
  3320. if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) {
  3321. /*Configure the flags so that resync happens properly*/
  3322. atomic_set(&ha->loop_down_timer, 0);
  3323. if (!(ha->device_flags & DFLG_NO_CABLE)) {
  3324. atomic_set(&ha->loop_state, LOOP_UP);
  3325. set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags);
  3326. set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags);
  3327. set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags);
  3328. rval = qla2x00_loop_resync(ha);
  3329. } else
  3330. atomic_set(&ha->loop_state, LOOP_DEAD);
  3331. clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags);
  3332. }
  3333. return rval;
  3334. }
  3335. void
  3336. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3337. {
  3338. fc_port_t *fcport;
  3339. struct scsi_qla_host *vha;
  3340. struct qla_hw_data *ha = base_vha->hw;
  3341. unsigned long flags;
  3342. spin_lock_irqsave(&ha->vport_slock, flags);
  3343. /* Go with deferred removal of rport references. */
  3344. list_for_each_entry(vha, &base_vha->hw->vp_list, list) {
  3345. atomic_inc(&vha->vref_count);
  3346. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3347. if (fcport->drport &&
  3348. atomic_read(&fcport->state) != FCS_UNCONFIGURED) {
  3349. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3350. qla2x00_rport_del(fcport);
  3351. spin_lock_irqsave(&ha->vport_slock, flags);
  3352. }
  3353. }
  3354. atomic_dec(&vha->vref_count);
  3355. }
  3356. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3357. }
  3358. /*
  3359. * qla82xx_quiescent_state_cleanup
  3360. * Description: This function will block the new I/Os
  3361. * Its not aborting any I/Os as context
  3362. * is not destroyed during quiescence
  3363. * Arguments: scsi_qla_host_t
  3364. * return : void
  3365. */
  3366. void
  3367. qla82xx_quiescent_state_cleanup(scsi_qla_host_t *vha)
  3368. {
  3369. struct qla_hw_data *ha = vha->hw;
  3370. struct scsi_qla_host *vp;
  3371. qla_printk(KERN_INFO, ha,
  3372. "Performing ISP error recovery - ha= %p.\n", ha);
  3373. atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME);
  3374. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3375. atomic_set(&vha->loop_state, LOOP_DOWN);
  3376. qla2x00_mark_all_devices_lost(vha, 0);
  3377. list_for_each_entry(vp, &ha->vp_list, list)
  3378. qla2x00_mark_all_devices_lost(vha, 0);
  3379. } else {
  3380. if (!atomic_read(&vha->loop_down_timer))
  3381. atomic_set(&vha->loop_down_timer,
  3382. LOOP_DOWN_TIME);
  3383. }
  3384. /* Wait for pending cmds to complete */
  3385. qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST);
  3386. }
  3387. void
  3388. qla2x00_abort_isp_cleanup(scsi_qla_host_t *vha)
  3389. {
  3390. struct qla_hw_data *ha = vha->hw;
  3391. struct scsi_qla_host *vp;
  3392. unsigned long flags;
  3393. fc_port_t *fcport;
  3394. /* For ISP82XX, driver waits for completion of the commands.
  3395. * online flag should be set.
  3396. */
  3397. if (!IS_QLA82XX(ha))
  3398. vha->flags.online = 0;
  3399. ha->flags.chip_reset_done = 0;
  3400. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3401. ha->qla_stats.total_isp_aborts++;
  3402. qla_printk(KERN_INFO, ha,
  3403. "Performing ISP error recovery - ha= %p.\n", ha);
  3404. /* For ISP82XX, reset_chip is just disabling interrupts.
  3405. * Driver waits for the completion of the commands.
  3406. * the interrupts need to be enabled.
  3407. */
  3408. if (!IS_QLA82XX(ha))
  3409. ha->isp_ops->reset_chip(vha);
  3410. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3411. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3412. atomic_set(&vha->loop_state, LOOP_DOWN);
  3413. qla2x00_mark_all_devices_lost(vha, 0);
  3414. spin_lock_irqsave(&ha->vport_slock, flags);
  3415. list_for_each_entry(vp, &ha->vp_list, list) {
  3416. atomic_inc(&vp->vref_count);
  3417. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3418. qla2x00_mark_all_devices_lost(vp, 0);
  3419. spin_lock_irqsave(&ha->vport_slock, flags);
  3420. atomic_dec(&vp->vref_count);
  3421. }
  3422. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3423. } else {
  3424. if (!atomic_read(&vha->loop_down_timer))
  3425. atomic_set(&vha->loop_down_timer,
  3426. LOOP_DOWN_TIME);
  3427. }
  3428. /* Clear all async request states across all VPs. */
  3429. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3430. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  3431. spin_lock_irqsave(&ha->vport_slock, flags);
  3432. list_for_each_entry(vp, &ha->vp_list, list) {
  3433. atomic_inc(&vp->vref_count);
  3434. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3435. list_for_each_entry(fcport, &vp->vp_fcports, list)
  3436. fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
  3437. spin_lock_irqsave(&ha->vport_slock, flags);
  3438. atomic_dec(&vp->vref_count);
  3439. }
  3440. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3441. if (!ha->flags.eeh_busy) {
  3442. /* Make sure for ISP 82XX IO DMA is complete */
  3443. if (IS_QLA82XX(ha)) {
  3444. qla82xx_chip_reset_cleanup(vha);
  3445. /* Done waiting for pending commands.
  3446. * Reset the online flag.
  3447. */
  3448. vha->flags.online = 0;
  3449. }
  3450. /* Requeue all commands in outstanding command list. */
  3451. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3452. }
  3453. }
  3454. /*
  3455. * qla2x00_abort_isp
  3456. * Resets ISP and aborts all outstanding commands.
  3457. *
  3458. * Input:
  3459. * ha = adapter block pointer.
  3460. *
  3461. * Returns:
  3462. * 0 = success
  3463. */
  3464. int
  3465. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3466. {
  3467. int rval;
  3468. uint8_t status = 0;
  3469. struct qla_hw_data *ha = vha->hw;
  3470. struct scsi_qla_host *vp;
  3471. struct req_que *req = ha->req_q_map[0];
  3472. unsigned long flags;
  3473. if (vha->flags.online) {
  3474. qla2x00_abort_isp_cleanup(vha);
  3475. if (unlikely(pci_channel_offline(ha->pdev) &&
  3476. ha->flags.pci_channel_io_perm_failure)) {
  3477. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3478. status = 0;
  3479. return status;
  3480. }
  3481. ha->isp_ops->get_flash_version(vha, req->ring);
  3482. ha->isp_ops->nvram_config(vha);
  3483. if (!qla2x00_restart_isp(vha)) {
  3484. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3485. if (!atomic_read(&vha->loop_down_timer)) {
  3486. /*
  3487. * Issue marker command only when we are going
  3488. * to start the I/O .
  3489. */
  3490. vha->marker_needed = 1;
  3491. }
  3492. vha->flags.online = 1;
  3493. ha->isp_ops->enable_intrs(ha);
  3494. ha->isp_abort_cnt = 0;
  3495. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3496. if (IS_QLA81XX(ha))
  3497. qla2x00_get_fw_version(vha,
  3498. &ha->fw_major_version,
  3499. &ha->fw_minor_version,
  3500. &ha->fw_subminor_version,
  3501. &ha->fw_attributes, &ha->fw_memory_size,
  3502. ha->mpi_version, &ha->mpi_capabilities,
  3503. ha->phy_version);
  3504. if (ha->fce) {
  3505. ha->flags.fce_enabled = 1;
  3506. memset(ha->fce, 0,
  3507. fce_calc_size(ha->fce_bufs));
  3508. rval = qla2x00_enable_fce_trace(vha,
  3509. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3510. &ha->fce_bufs);
  3511. if (rval) {
  3512. qla_printk(KERN_WARNING, ha,
  3513. "Unable to reinitialize FCE "
  3514. "(%d).\n", rval);
  3515. ha->flags.fce_enabled = 0;
  3516. }
  3517. }
  3518. if (ha->eft) {
  3519. memset(ha->eft, 0, EFT_SIZE);
  3520. rval = qla2x00_enable_eft_trace(vha,
  3521. ha->eft_dma, EFT_NUM_BUFFERS);
  3522. if (rval) {
  3523. qla_printk(KERN_WARNING, ha,
  3524. "Unable to reinitialize EFT "
  3525. "(%d).\n", rval);
  3526. }
  3527. }
  3528. } else { /* failed the ISP abort */
  3529. vha->flags.online = 1;
  3530. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3531. if (ha->isp_abort_cnt == 0) {
  3532. qla_printk(KERN_WARNING, ha,
  3533. "ISP error recovery failed - "
  3534. "board disabled\n");
  3535. /*
  3536. * The next call disables the board
  3537. * completely.
  3538. */
  3539. ha->isp_ops->reset_adapter(vha);
  3540. vha->flags.online = 0;
  3541. clear_bit(ISP_ABORT_RETRY,
  3542. &vha->dpc_flags);
  3543. status = 0;
  3544. } else { /* schedule another ISP abort */
  3545. ha->isp_abort_cnt--;
  3546. DEBUG(printk("qla%ld: ISP abort - "
  3547. "retry remaining %d\n",
  3548. vha->host_no, ha->isp_abort_cnt));
  3549. status = 1;
  3550. }
  3551. } else {
  3552. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3553. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3554. "- retrying (%d) more times\n",
  3555. vha->host_no, ha->isp_abort_cnt));
  3556. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3557. status = 1;
  3558. }
  3559. }
  3560. }
  3561. if (!status) {
  3562. DEBUG(printk(KERN_INFO
  3563. "qla2x00_abort_isp(%ld): succeeded.\n",
  3564. vha->host_no));
  3565. spin_lock_irqsave(&ha->vport_slock, flags);
  3566. list_for_each_entry(vp, &ha->vp_list, list) {
  3567. if (vp->vp_idx) {
  3568. atomic_inc(&vp->vref_count);
  3569. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3570. qla2x00_vp_abort_isp(vp);
  3571. spin_lock_irqsave(&ha->vport_slock, flags);
  3572. atomic_dec(&vp->vref_count);
  3573. }
  3574. }
  3575. spin_unlock_irqrestore(&ha->vport_slock, flags);
  3576. } else {
  3577. qla_printk(KERN_INFO, ha,
  3578. "qla2x00_abort_isp: **** FAILED ****\n");
  3579. }
  3580. return(status);
  3581. }
  3582. /*
  3583. * qla2x00_restart_isp
  3584. * restarts the ISP after a reset
  3585. *
  3586. * Input:
  3587. * ha = adapter block pointer.
  3588. *
  3589. * Returns:
  3590. * 0 = success
  3591. */
  3592. static int
  3593. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3594. {
  3595. int status = 0;
  3596. uint32_t wait_time;
  3597. struct qla_hw_data *ha = vha->hw;
  3598. struct req_que *req = ha->req_q_map[0];
  3599. struct rsp_que *rsp = ha->rsp_q_map[0];
  3600. /* If firmware needs to be loaded */
  3601. if (qla2x00_isp_firmware(vha)) {
  3602. vha->flags.online = 0;
  3603. status = ha->isp_ops->chip_diag(vha);
  3604. if (!status)
  3605. status = qla2x00_setup_chip(vha);
  3606. }
  3607. if (!status && !(status = qla2x00_init_rings(vha))) {
  3608. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3609. ha->flags.chip_reset_done = 1;
  3610. /* Initialize the queues in use */
  3611. qla25xx_init_queues(ha);
  3612. status = qla2x00_fw_ready(vha);
  3613. if (!status) {
  3614. DEBUG(printk("%s(): Start configure loop, "
  3615. "status = %d\n", __func__, status));
  3616. /* Issue a marker after FW becomes ready. */
  3617. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3618. vha->flags.online = 1;
  3619. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3620. wait_time = 256;
  3621. do {
  3622. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3623. qla2x00_configure_loop(vha);
  3624. wait_time--;
  3625. } while (!atomic_read(&vha->loop_down_timer) &&
  3626. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3627. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3628. &vha->dpc_flags)));
  3629. }
  3630. /* if no cable then assume it's good */
  3631. if ((vha->device_flags & DFLG_NO_CABLE))
  3632. status = 0;
  3633. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3634. __func__,
  3635. status));
  3636. }
  3637. return (status);
  3638. }
  3639. static int
  3640. qla25xx_init_queues(struct qla_hw_data *ha)
  3641. {
  3642. struct rsp_que *rsp = NULL;
  3643. struct req_que *req = NULL;
  3644. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3645. int ret = -1;
  3646. int i;
  3647. for (i = 1; i < ha->max_rsp_queues; i++) {
  3648. rsp = ha->rsp_q_map[i];
  3649. if (rsp) {
  3650. rsp->options &= ~BIT_0;
  3651. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3652. if (ret != QLA_SUCCESS)
  3653. DEBUG2_17(printk(KERN_WARNING
  3654. "%s Rsp que:%d init failed\n", __func__,
  3655. rsp->id));
  3656. else
  3657. DEBUG2_17(printk(KERN_INFO
  3658. "%s Rsp que:%d inited\n", __func__,
  3659. rsp->id));
  3660. }
  3661. }
  3662. for (i = 1; i < ha->max_req_queues; i++) {
  3663. req = ha->req_q_map[i];
  3664. if (req) {
  3665. /* Clear outstanding commands array. */
  3666. req->options &= ~BIT_0;
  3667. ret = qla25xx_init_req_que(base_vha, req);
  3668. if (ret != QLA_SUCCESS)
  3669. DEBUG2_17(printk(KERN_WARNING
  3670. "%s Req que:%d init failed\n", __func__,
  3671. req->id));
  3672. else
  3673. DEBUG2_17(printk(KERN_WARNING
  3674. "%s Req que:%d inited\n", __func__,
  3675. req->id));
  3676. }
  3677. }
  3678. return ret;
  3679. }
  3680. /*
  3681. * qla2x00_reset_adapter
  3682. * Reset adapter.
  3683. *
  3684. * Input:
  3685. * ha = adapter block pointer.
  3686. */
  3687. void
  3688. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3689. {
  3690. unsigned long flags = 0;
  3691. struct qla_hw_data *ha = vha->hw;
  3692. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3693. vha->flags.online = 0;
  3694. ha->isp_ops->disable_intrs(ha);
  3695. spin_lock_irqsave(&ha->hardware_lock, flags);
  3696. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3697. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3698. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3699. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3700. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3701. }
  3702. void
  3703. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3704. {
  3705. unsigned long flags = 0;
  3706. struct qla_hw_data *ha = vha->hw;
  3707. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3708. if (IS_QLA82XX(ha))
  3709. return;
  3710. vha->flags.online = 0;
  3711. ha->isp_ops->disable_intrs(ha);
  3712. spin_lock_irqsave(&ha->hardware_lock, flags);
  3713. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3714. RD_REG_DWORD(&reg->hccr);
  3715. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3716. RD_REG_DWORD(&reg->hccr);
  3717. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3718. if (IS_NOPOLLING_TYPE(ha))
  3719. ha->isp_ops->enable_intrs(ha);
  3720. }
  3721. /* On sparc systems, obtain port and node WWN from firmware
  3722. * properties.
  3723. */
  3724. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3725. struct nvram_24xx *nv)
  3726. {
  3727. #ifdef CONFIG_SPARC
  3728. struct qla_hw_data *ha = vha->hw;
  3729. struct pci_dev *pdev = ha->pdev;
  3730. struct device_node *dp = pci_device_to_OF_node(pdev);
  3731. const u8 *val;
  3732. int len;
  3733. val = of_get_property(dp, "port-wwn", &len);
  3734. if (val && len >= WWN_SIZE)
  3735. memcpy(nv->port_name, val, WWN_SIZE);
  3736. val = of_get_property(dp, "node-wwn", &len);
  3737. if (val && len >= WWN_SIZE)
  3738. memcpy(nv->node_name, val, WWN_SIZE);
  3739. #endif
  3740. }
  3741. int
  3742. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3743. {
  3744. int rval;
  3745. struct init_cb_24xx *icb;
  3746. struct nvram_24xx *nv;
  3747. uint32_t *dptr;
  3748. uint8_t *dptr1, *dptr2;
  3749. uint32_t chksum;
  3750. uint16_t cnt;
  3751. struct qla_hw_data *ha = vha->hw;
  3752. rval = QLA_SUCCESS;
  3753. icb = (struct init_cb_24xx *)ha->init_cb;
  3754. nv = ha->nvram;
  3755. /* Determine NVRAM starting address. */
  3756. if (ha->flags.port0) {
  3757. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3758. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3759. } else {
  3760. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3761. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3762. }
  3763. ha->nvram_size = sizeof(struct nvram_24xx);
  3764. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3765. if (IS_QLA82XX(ha))
  3766. ha->vpd_size = FA_VPD_SIZE_82XX;
  3767. /* Get VPD data into cache */
  3768. ha->vpd = ha->nvram + VPD_OFFSET;
  3769. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3770. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3771. /* Get NVRAM data into cache and calculate checksum. */
  3772. dptr = (uint32_t *)nv;
  3773. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3774. ha->nvram_size);
  3775. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3776. chksum += le32_to_cpu(*dptr++);
  3777. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3778. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3779. /* Bad NVRAM data, set defaults parameters. */
  3780. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3781. || nv->id[3] != ' ' ||
  3782. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3783. /* Reset NVRAM data. */
  3784. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3785. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3786. le16_to_cpu(nv->nvram_version));
  3787. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3788. "invalid -- WWPN) defaults.\n");
  3789. /*
  3790. * Set default initialization control block.
  3791. */
  3792. memset(nv, 0, ha->nvram_size);
  3793. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3794. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3795. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3796. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3797. nv->exchange_count = __constant_cpu_to_le16(0);
  3798. nv->hard_address = __constant_cpu_to_le16(124);
  3799. nv->port_name[0] = 0x21;
  3800. nv->port_name[1] = 0x00 + ha->port_no;
  3801. nv->port_name[2] = 0x00;
  3802. nv->port_name[3] = 0xe0;
  3803. nv->port_name[4] = 0x8b;
  3804. nv->port_name[5] = 0x1c;
  3805. nv->port_name[6] = 0x55;
  3806. nv->port_name[7] = 0x86;
  3807. nv->node_name[0] = 0x20;
  3808. nv->node_name[1] = 0x00;
  3809. nv->node_name[2] = 0x00;
  3810. nv->node_name[3] = 0xe0;
  3811. nv->node_name[4] = 0x8b;
  3812. nv->node_name[5] = 0x1c;
  3813. nv->node_name[6] = 0x55;
  3814. nv->node_name[7] = 0x86;
  3815. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3816. nv->login_retry_count = __constant_cpu_to_le16(8);
  3817. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3818. nv->login_timeout = __constant_cpu_to_le16(0);
  3819. nv->firmware_options_1 =
  3820. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3821. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3822. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3823. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3824. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3825. nv->efi_parameters = __constant_cpu_to_le32(0);
  3826. nv->reset_delay = 5;
  3827. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3828. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3829. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3830. rval = 1;
  3831. }
  3832. /* Reset Initialization control block */
  3833. memset(icb, 0, ha->init_cb_size);
  3834. /* Copy 1st segment. */
  3835. dptr1 = (uint8_t *)icb;
  3836. dptr2 = (uint8_t *)&nv->version;
  3837. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3838. while (cnt--)
  3839. *dptr1++ = *dptr2++;
  3840. icb->login_retry_count = nv->login_retry_count;
  3841. icb->link_down_on_nos = nv->link_down_on_nos;
  3842. /* Copy 2nd segment. */
  3843. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3844. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3845. cnt = (uint8_t *)&icb->reserved_3 -
  3846. (uint8_t *)&icb->interrupt_delay_timer;
  3847. while (cnt--)
  3848. *dptr1++ = *dptr2++;
  3849. /*
  3850. * Setup driver NVRAM options.
  3851. */
  3852. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3853. "QLA2462");
  3854. /* Use alternate WWN? */
  3855. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3856. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3857. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3858. }
  3859. /* Prepare nodename */
  3860. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3861. /*
  3862. * Firmware will apply the following mask if the nodename was
  3863. * not provided.
  3864. */
  3865. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3866. icb->node_name[0] &= 0xF0;
  3867. }
  3868. /* Set host adapter parameters. */
  3869. ha->flags.disable_risc_code_load = 0;
  3870. ha->flags.enable_lip_reset = 0;
  3871. ha->flags.enable_lip_full_login =
  3872. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3873. ha->flags.enable_target_reset =
  3874. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3875. ha->flags.enable_led_scheme = 0;
  3876. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3877. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3878. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3879. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3880. sizeof(ha->fw_seriallink_options24));
  3881. /* save HBA serial number */
  3882. ha->serial0 = icb->port_name[5];
  3883. ha->serial1 = icb->port_name[6];
  3884. ha->serial2 = icb->port_name[7];
  3885. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3886. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3887. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3888. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3889. /* Set minimum login_timeout to 4 seconds. */
  3890. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3891. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3892. if (le16_to_cpu(nv->login_timeout) < 4)
  3893. nv->login_timeout = __constant_cpu_to_le16(4);
  3894. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3895. icb->login_timeout = nv->login_timeout;
  3896. /* Set minimum RATOV to 100 tenths of a second. */
  3897. ha->r_a_tov = 100;
  3898. ha->loop_reset_delay = nv->reset_delay;
  3899. /* Link Down Timeout = 0:
  3900. *
  3901. * When Port Down timer expires we will start returning
  3902. * I/O's to OS with "DID_NO_CONNECT".
  3903. *
  3904. * Link Down Timeout != 0:
  3905. *
  3906. * The driver waits for the link to come up after link down
  3907. * before returning I/Os to OS with "DID_NO_CONNECT".
  3908. */
  3909. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3910. ha->loop_down_abort_time =
  3911. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3912. } else {
  3913. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3914. ha->loop_down_abort_time =
  3915. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3916. }
  3917. /* Need enough time to try and get the port back. */
  3918. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3919. if (qlport_down_retry)
  3920. ha->port_down_retry_count = qlport_down_retry;
  3921. /* Set login_retry_count */
  3922. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3923. if (ha->port_down_retry_count ==
  3924. le16_to_cpu(nv->port_down_retry_count) &&
  3925. ha->port_down_retry_count > 3)
  3926. ha->login_retry_count = ha->port_down_retry_count;
  3927. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3928. ha->login_retry_count = ha->port_down_retry_count;
  3929. if (ql2xloginretrycount)
  3930. ha->login_retry_count = ql2xloginretrycount;
  3931. /* Enable ZIO. */
  3932. if (!vha->flags.init_done) {
  3933. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3934. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3935. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3936. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3937. }
  3938. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3939. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3940. vha->flags.process_response_queue = 0;
  3941. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3942. ha->zio_mode = QLA_ZIO_MODE_6;
  3943. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3944. "(%d us).\n", vha->host_no, ha->zio_mode,
  3945. ha->zio_timer * 100));
  3946. qla_printk(KERN_INFO, ha,
  3947. "ZIO mode %d enabled; timer delay (%d us).\n",
  3948. ha->zio_mode, ha->zio_timer * 100);
  3949. icb->firmware_options_2 |= cpu_to_le32(
  3950. (uint32_t)ha->zio_mode);
  3951. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3952. vha->flags.process_response_queue = 1;
  3953. }
  3954. if (rval) {
  3955. DEBUG2_3(printk(KERN_WARNING
  3956. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3957. }
  3958. return (rval);
  3959. }
  3960. static int
  3961. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3962. uint32_t faddr)
  3963. {
  3964. int rval = QLA_SUCCESS;
  3965. int segments, fragment;
  3966. uint32_t *dcode, dlen;
  3967. uint32_t risc_addr;
  3968. uint32_t risc_size;
  3969. uint32_t i;
  3970. struct qla_hw_data *ha = vha->hw;
  3971. struct req_que *req = ha->req_q_map[0];
  3972. qla_printk(KERN_INFO, ha,
  3973. "FW: Loading from flash (%x)...\n", faddr);
  3974. rval = QLA_SUCCESS;
  3975. segments = FA_RISC_CODE_SEGMENTS;
  3976. dcode = (uint32_t *)req->ring;
  3977. *srisc_addr = 0;
  3978. /* Validate firmware image by checking version. */
  3979. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3980. for (i = 0; i < 4; i++)
  3981. dcode[i] = be32_to_cpu(dcode[i]);
  3982. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3983. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3984. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3985. dcode[3] == 0)) {
  3986. qla_printk(KERN_WARNING, ha,
  3987. "Unable to verify integrity of flash firmware image!\n");
  3988. qla_printk(KERN_WARNING, ha,
  3989. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3990. dcode[1], dcode[2], dcode[3]);
  3991. return QLA_FUNCTION_FAILED;
  3992. }
  3993. while (segments && rval == QLA_SUCCESS) {
  3994. /* Read segment's load information. */
  3995. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3996. risc_addr = be32_to_cpu(dcode[2]);
  3997. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3998. risc_size = be32_to_cpu(dcode[3]);
  3999. fragment = 0;
  4000. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4001. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4002. if (dlen > risc_size)
  4003. dlen = risc_size;
  4004. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4005. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  4006. vha->host_no, risc_addr, dlen, faddr));
  4007. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  4008. for (i = 0; i < dlen; i++)
  4009. dcode[i] = swab32(dcode[i]);
  4010. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4011. dlen);
  4012. if (rval) {
  4013. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4014. "segment %d of firmware\n", vha->host_no,
  4015. fragment));
  4016. qla_printk(KERN_WARNING, ha,
  4017. "[ERROR] Failed to load segment %d of "
  4018. "firmware\n", fragment);
  4019. break;
  4020. }
  4021. faddr += dlen;
  4022. risc_addr += dlen;
  4023. risc_size -= dlen;
  4024. fragment++;
  4025. }
  4026. /* Next segment. */
  4027. segments--;
  4028. }
  4029. return rval;
  4030. }
  4031. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  4032. int
  4033. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4034. {
  4035. int rval;
  4036. int i, fragment;
  4037. uint16_t *wcode, *fwcode;
  4038. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  4039. struct fw_blob *blob;
  4040. struct qla_hw_data *ha = vha->hw;
  4041. struct req_que *req = ha->req_q_map[0];
  4042. /* Load firmware blob. */
  4043. blob = qla2x00_request_firmware(vha);
  4044. if (!blob) {
  4045. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4046. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4047. "from: " QLA_FW_URL ".\n");
  4048. return QLA_FUNCTION_FAILED;
  4049. }
  4050. rval = QLA_SUCCESS;
  4051. wcode = (uint16_t *)req->ring;
  4052. *srisc_addr = 0;
  4053. fwcode = (uint16_t *)blob->fw->data;
  4054. fwclen = 0;
  4055. /* Validate firmware image by checking version. */
  4056. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  4057. qla_printk(KERN_WARNING, ha,
  4058. "Unable to verify integrity of firmware image (%Zd)!\n",
  4059. blob->fw->size);
  4060. goto fail_fw_integrity;
  4061. }
  4062. for (i = 0; i < 4; i++)
  4063. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  4064. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  4065. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  4066. wcode[2] == 0 && wcode[3] == 0)) {
  4067. qla_printk(KERN_WARNING, ha,
  4068. "Unable to verify integrity of firmware image!\n");
  4069. qla_printk(KERN_WARNING, ha,
  4070. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  4071. wcode[1], wcode[2], wcode[3]);
  4072. goto fail_fw_integrity;
  4073. }
  4074. seg = blob->segs;
  4075. while (*seg && rval == QLA_SUCCESS) {
  4076. risc_addr = *seg;
  4077. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  4078. risc_size = be16_to_cpu(fwcode[3]);
  4079. /* Validate firmware image size. */
  4080. fwclen += risc_size * sizeof(uint16_t);
  4081. if (blob->fw->size < fwclen) {
  4082. qla_printk(KERN_WARNING, ha,
  4083. "Unable to verify integrity of firmware image "
  4084. "(%Zd)!\n", blob->fw->size);
  4085. goto fail_fw_integrity;
  4086. }
  4087. fragment = 0;
  4088. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4089. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  4090. if (wlen > risc_size)
  4091. wlen = risc_size;
  4092. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4093. "addr %x, number of words 0x%x.\n", vha->host_no,
  4094. risc_addr, wlen));
  4095. for (i = 0; i < wlen; i++)
  4096. wcode[i] = swab16(fwcode[i]);
  4097. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4098. wlen);
  4099. if (rval) {
  4100. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4101. "segment %d of firmware\n", vha->host_no,
  4102. fragment));
  4103. qla_printk(KERN_WARNING, ha,
  4104. "[ERROR] Failed to load segment %d of "
  4105. "firmware\n", fragment);
  4106. break;
  4107. }
  4108. fwcode += wlen;
  4109. risc_addr += wlen;
  4110. risc_size -= wlen;
  4111. fragment++;
  4112. }
  4113. /* Next segment. */
  4114. seg++;
  4115. }
  4116. return rval;
  4117. fail_fw_integrity:
  4118. return QLA_FUNCTION_FAILED;
  4119. }
  4120. static int
  4121. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4122. {
  4123. int rval;
  4124. int segments, fragment;
  4125. uint32_t *dcode, dlen;
  4126. uint32_t risc_addr;
  4127. uint32_t risc_size;
  4128. uint32_t i;
  4129. struct fw_blob *blob;
  4130. uint32_t *fwcode, fwclen;
  4131. struct qla_hw_data *ha = vha->hw;
  4132. struct req_que *req = ha->req_q_map[0];
  4133. /* Load firmware blob. */
  4134. blob = qla2x00_request_firmware(vha);
  4135. if (!blob) {
  4136. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  4137. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  4138. "from: " QLA_FW_URL ".\n");
  4139. return QLA_FUNCTION_FAILED;
  4140. }
  4141. qla_printk(KERN_INFO, ha,
  4142. "FW: Loading via request-firmware...\n");
  4143. rval = QLA_SUCCESS;
  4144. segments = FA_RISC_CODE_SEGMENTS;
  4145. dcode = (uint32_t *)req->ring;
  4146. *srisc_addr = 0;
  4147. fwcode = (uint32_t *)blob->fw->data;
  4148. fwclen = 0;
  4149. /* Validate firmware image by checking version. */
  4150. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  4151. qla_printk(KERN_WARNING, ha,
  4152. "Unable to verify integrity of firmware image (%Zd)!\n",
  4153. blob->fw->size);
  4154. goto fail_fw_integrity;
  4155. }
  4156. for (i = 0; i < 4; i++)
  4157. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  4158. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  4159. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  4160. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  4161. dcode[3] == 0)) {
  4162. qla_printk(KERN_WARNING, ha,
  4163. "Unable to verify integrity of firmware image!\n");
  4164. qla_printk(KERN_WARNING, ha,
  4165. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  4166. dcode[1], dcode[2], dcode[3]);
  4167. goto fail_fw_integrity;
  4168. }
  4169. while (segments && rval == QLA_SUCCESS) {
  4170. risc_addr = be32_to_cpu(fwcode[2]);
  4171. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  4172. risc_size = be32_to_cpu(fwcode[3]);
  4173. /* Validate firmware image size. */
  4174. fwclen += risc_size * sizeof(uint32_t);
  4175. if (blob->fw->size < fwclen) {
  4176. qla_printk(KERN_WARNING, ha,
  4177. "Unable to verify integrity of firmware image "
  4178. "(%Zd)!\n", blob->fw->size);
  4179. goto fail_fw_integrity;
  4180. }
  4181. fragment = 0;
  4182. while (risc_size > 0 && rval == QLA_SUCCESS) {
  4183. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  4184. if (dlen > risc_size)
  4185. dlen = risc_size;
  4186. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  4187. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  4188. risc_addr, dlen));
  4189. for (i = 0; i < dlen; i++)
  4190. dcode[i] = swab32(fwcode[i]);
  4191. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  4192. dlen);
  4193. if (rval) {
  4194. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  4195. "segment %d of firmware\n", vha->host_no,
  4196. fragment));
  4197. qla_printk(KERN_WARNING, ha,
  4198. "[ERROR] Failed to load segment %d of "
  4199. "firmware\n", fragment);
  4200. break;
  4201. }
  4202. fwcode += dlen;
  4203. risc_addr += dlen;
  4204. risc_size -= dlen;
  4205. fragment++;
  4206. }
  4207. /* Next segment. */
  4208. segments--;
  4209. }
  4210. return rval;
  4211. fail_fw_integrity:
  4212. return QLA_FUNCTION_FAILED;
  4213. }
  4214. int
  4215. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4216. {
  4217. int rval;
  4218. if (ql2xfwloadbin == 1)
  4219. return qla81xx_load_risc(vha, srisc_addr);
  4220. /*
  4221. * FW Load priority:
  4222. * 1) Firmware via request-firmware interface (.bin file).
  4223. * 2) Firmware residing in flash.
  4224. */
  4225. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4226. if (rval == QLA_SUCCESS)
  4227. return rval;
  4228. return qla24xx_load_risc_flash(vha, srisc_addr,
  4229. vha->hw->flt_region_fw);
  4230. }
  4231. int
  4232. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  4233. {
  4234. int rval;
  4235. struct qla_hw_data *ha = vha->hw;
  4236. if (ql2xfwloadbin == 2)
  4237. goto try_blob_fw;
  4238. /*
  4239. * FW Load priority:
  4240. * 1) Firmware residing in flash.
  4241. * 2) Firmware via request-firmware interface (.bin file).
  4242. * 3) Golden-Firmware residing in flash -- limited operation.
  4243. */
  4244. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  4245. if (rval == QLA_SUCCESS)
  4246. return rval;
  4247. try_blob_fw:
  4248. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  4249. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  4250. return rval;
  4251. qla_printk(KERN_ERR, ha,
  4252. "FW: Attempting to fallback to golden firmware...\n");
  4253. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  4254. if (rval != QLA_SUCCESS)
  4255. return rval;
  4256. qla_printk(KERN_ERR, ha,
  4257. "FW: Please update operational firmware...\n");
  4258. ha->flags.running_gold_fw = 1;
  4259. return rval;
  4260. }
  4261. void
  4262. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  4263. {
  4264. int ret, retries;
  4265. struct qla_hw_data *ha = vha->hw;
  4266. if (ha->flags.pci_channel_io_perm_failure)
  4267. return;
  4268. if (!IS_FWI2_CAPABLE(ha))
  4269. return;
  4270. if (!ha->fw_major_version)
  4271. return;
  4272. ret = qla2x00_stop_firmware(vha);
  4273. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  4274. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  4275. ha->isp_ops->reset_chip(vha);
  4276. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  4277. continue;
  4278. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  4279. continue;
  4280. qla_printk(KERN_INFO, ha,
  4281. "Attempting retry of stop-firmware command...\n");
  4282. ret = qla2x00_stop_firmware(vha);
  4283. }
  4284. }
  4285. int
  4286. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  4287. {
  4288. int rval = QLA_SUCCESS;
  4289. uint16_t mb[MAILBOX_REGISTER_COUNT];
  4290. struct qla_hw_data *ha = vha->hw;
  4291. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  4292. struct req_que *req;
  4293. struct rsp_que *rsp;
  4294. if (!vha->vp_idx)
  4295. return -EINVAL;
  4296. rval = qla2x00_fw_ready(base_vha);
  4297. if (ha->flags.cpu_affinity_enabled)
  4298. req = ha->req_q_map[0];
  4299. else
  4300. req = vha->req;
  4301. rsp = req->rsp;
  4302. if (rval == QLA_SUCCESS) {
  4303. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4304. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4305. }
  4306. vha->flags.management_server_logged_in = 0;
  4307. /* Login to SNS first */
  4308. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  4309. if (mb[0] != MBS_COMMAND_COMPLETE) {
  4310. DEBUG15(qla_printk(KERN_INFO, ha,
  4311. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  4312. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  4313. mb[0], mb[1], mb[2], mb[6], mb[7]));
  4314. return (QLA_FUNCTION_FAILED);
  4315. }
  4316. atomic_set(&vha->loop_down_timer, 0);
  4317. atomic_set(&vha->loop_state, LOOP_UP);
  4318. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4319. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  4320. rval = qla2x00_loop_resync(base_vha);
  4321. return rval;
  4322. }
  4323. /* 84XX Support **************************************************************/
  4324. static LIST_HEAD(qla_cs84xx_list);
  4325. static DEFINE_MUTEX(qla_cs84xx_mutex);
  4326. static struct qla_chip_state_84xx *
  4327. qla84xx_get_chip(struct scsi_qla_host *vha)
  4328. {
  4329. struct qla_chip_state_84xx *cs84xx;
  4330. struct qla_hw_data *ha = vha->hw;
  4331. mutex_lock(&qla_cs84xx_mutex);
  4332. /* Find any shared 84xx chip. */
  4333. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  4334. if (cs84xx->bus == ha->pdev->bus) {
  4335. kref_get(&cs84xx->kref);
  4336. goto done;
  4337. }
  4338. }
  4339. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  4340. if (!cs84xx)
  4341. goto done;
  4342. kref_init(&cs84xx->kref);
  4343. spin_lock_init(&cs84xx->access_lock);
  4344. mutex_init(&cs84xx->fw_update_mutex);
  4345. cs84xx->bus = ha->pdev->bus;
  4346. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  4347. done:
  4348. mutex_unlock(&qla_cs84xx_mutex);
  4349. return cs84xx;
  4350. }
  4351. static void
  4352. __qla84xx_chip_release(struct kref *kref)
  4353. {
  4354. struct qla_chip_state_84xx *cs84xx =
  4355. container_of(kref, struct qla_chip_state_84xx, kref);
  4356. mutex_lock(&qla_cs84xx_mutex);
  4357. list_del(&cs84xx->list);
  4358. mutex_unlock(&qla_cs84xx_mutex);
  4359. kfree(cs84xx);
  4360. }
  4361. void
  4362. qla84xx_put_chip(struct scsi_qla_host *vha)
  4363. {
  4364. struct qla_hw_data *ha = vha->hw;
  4365. if (ha->cs84xx)
  4366. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  4367. }
  4368. static int
  4369. qla84xx_init_chip(scsi_qla_host_t *vha)
  4370. {
  4371. int rval;
  4372. uint16_t status[2];
  4373. struct qla_hw_data *ha = vha->hw;
  4374. mutex_lock(&ha->cs84xx->fw_update_mutex);
  4375. rval = qla84xx_verify_chip(vha, status);
  4376. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  4377. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  4378. QLA_SUCCESS;
  4379. }
  4380. /* 81XX Support **************************************************************/
  4381. int
  4382. qla81xx_nvram_config(scsi_qla_host_t *vha)
  4383. {
  4384. int rval;
  4385. struct init_cb_81xx *icb;
  4386. struct nvram_81xx *nv;
  4387. uint32_t *dptr;
  4388. uint8_t *dptr1, *dptr2;
  4389. uint32_t chksum;
  4390. uint16_t cnt;
  4391. struct qla_hw_data *ha = vha->hw;
  4392. rval = QLA_SUCCESS;
  4393. icb = (struct init_cb_81xx *)ha->init_cb;
  4394. nv = ha->nvram;
  4395. /* Determine NVRAM starting address. */
  4396. ha->nvram_size = sizeof(struct nvram_81xx);
  4397. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  4398. /* Get VPD data into cache */
  4399. ha->vpd = ha->nvram + VPD_OFFSET;
  4400. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  4401. ha->vpd_size);
  4402. /* Get NVRAM data into cache and calculate checksum. */
  4403. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  4404. ha->nvram_size);
  4405. dptr = (uint32_t *)nv;
  4406. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  4407. chksum += le32_to_cpu(*dptr++);
  4408. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  4409. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  4410. /* Bad NVRAM data, set defaults parameters. */
  4411. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4412. || nv->id[3] != ' ' ||
  4413. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4414. /* Reset NVRAM data. */
  4415. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4416. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4417. le16_to_cpu(nv->nvram_version));
  4418. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4419. "invalid -- WWPN) defaults.\n");
  4420. /*
  4421. * Set default initialization control block.
  4422. */
  4423. memset(nv, 0, ha->nvram_size);
  4424. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4425. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4426. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4427. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4428. nv->exchange_count = __constant_cpu_to_le16(0);
  4429. nv->port_name[0] = 0x21;
  4430. nv->port_name[1] = 0x00 + ha->port_no;
  4431. nv->port_name[2] = 0x00;
  4432. nv->port_name[3] = 0xe0;
  4433. nv->port_name[4] = 0x8b;
  4434. nv->port_name[5] = 0x1c;
  4435. nv->port_name[6] = 0x55;
  4436. nv->port_name[7] = 0x86;
  4437. nv->node_name[0] = 0x20;
  4438. nv->node_name[1] = 0x00;
  4439. nv->node_name[2] = 0x00;
  4440. nv->node_name[3] = 0xe0;
  4441. nv->node_name[4] = 0x8b;
  4442. nv->node_name[5] = 0x1c;
  4443. nv->node_name[6] = 0x55;
  4444. nv->node_name[7] = 0x86;
  4445. nv->login_retry_count = __constant_cpu_to_le16(8);
  4446. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4447. nv->login_timeout = __constant_cpu_to_le16(0);
  4448. nv->firmware_options_1 =
  4449. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4450. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4451. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4452. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4453. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4454. nv->efi_parameters = __constant_cpu_to_le32(0);
  4455. nv->reset_delay = 5;
  4456. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4457. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4458. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4459. nv->enode_mac[0] = 0x00;
  4460. nv->enode_mac[1] = 0x02;
  4461. nv->enode_mac[2] = 0x03;
  4462. nv->enode_mac[3] = 0x04;
  4463. nv->enode_mac[4] = 0x05;
  4464. nv->enode_mac[5] = 0x06 + ha->port_no;
  4465. rval = 1;
  4466. }
  4467. /* Reset Initialization control block */
  4468. memset(icb, 0, sizeof(struct init_cb_81xx));
  4469. /* Copy 1st segment. */
  4470. dptr1 = (uint8_t *)icb;
  4471. dptr2 = (uint8_t *)&nv->version;
  4472. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4473. while (cnt--)
  4474. *dptr1++ = *dptr2++;
  4475. icb->login_retry_count = nv->login_retry_count;
  4476. /* Copy 2nd segment. */
  4477. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4478. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4479. cnt = (uint8_t *)&icb->reserved_5 -
  4480. (uint8_t *)&icb->interrupt_delay_timer;
  4481. while (cnt--)
  4482. *dptr1++ = *dptr2++;
  4483. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4484. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4485. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4486. icb->enode_mac[0] = 0x01;
  4487. icb->enode_mac[1] = 0x02;
  4488. icb->enode_mac[2] = 0x03;
  4489. icb->enode_mac[3] = 0x04;
  4490. icb->enode_mac[4] = 0x05;
  4491. icb->enode_mac[5] = 0x06 + ha->port_no;
  4492. }
  4493. /* Use extended-initialization control block. */
  4494. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4495. /*
  4496. * Setup driver NVRAM options.
  4497. */
  4498. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4499. "QLE8XXX");
  4500. /* Use alternate WWN? */
  4501. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4502. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4503. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4504. }
  4505. /* Prepare nodename */
  4506. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4507. /*
  4508. * Firmware will apply the following mask if the nodename was
  4509. * not provided.
  4510. */
  4511. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4512. icb->node_name[0] &= 0xF0;
  4513. }
  4514. /* Set host adapter parameters. */
  4515. ha->flags.disable_risc_code_load = 0;
  4516. ha->flags.enable_lip_reset = 0;
  4517. ha->flags.enable_lip_full_login =
  4518. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4519. ha->flags.enable_target_reset =
  4520. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4521. ha->flags.enable_led_scheme = 0;
  4522. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4523. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4524. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4525. /* save HBA serial number */
  4526. ha->serial0 = icb->port_name[5];
  4527. ha->serial1 = icb->port_name[6];
  4528. ha->serial2 = icb->port_name[7];
  4529. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4530. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4531. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4532. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4533. /* Set minimum login_timeout to 4 seconds. */
  4534. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4535. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4536. if (le16_to_cpu(nv->login_timeout) < 4)
  4537. nv->login_timeout = __constant_cpu_to_le16(4);
  4538. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4539. icb->login_timeout = nv->login_timeout;
  4540. /* Set minimum RATOV to 100 tenths of a second. */
  4541. ha->r_a_tov = 100;
  4542. ha->loop_reset_delay = nv->reset_delay;
  4543. /* Link Down Timeout = 0:
  4544. *
  4545. * When Port Down timer expires we will start returning
  4546. * I/O's to OS with "DID_NO_CONNECT".
  4547. *
  4548. * Link Down Timeout != 0:
  4549. *
  4550. * The driver waits for the link to come up after link down
  4551. * before returning I/Os to OS with "DID_NO_CONNECT".
  4552. */
  4553. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4554. ha->loop_down_abort_time =
  4555. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4556. } else {
  4557. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4558. ha->loop_down_abort_time =
  4559. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4560. }
  4561. /* Need enough time to try and get the port back. */
  4562. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4563. if (qlport_down_retry)
  4564. ha->port_down_retry_count = qlport_down_retry;
  4565. /* Set login_retry_count */
  4566. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4567. if (ha->port_down_retry_count ==
  4568. le16_to_cpu(nv->port_down_retry_count) &&
  4569. ha->port_down_retry_count > 3)
  4570. ha->login_retry_count = ha->port_down_retry_count;
  4571. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4572. ha->login_retry_count = ha->port_down_retry_count;
  4573. if (ql2xloginretrycount)
  4574. ha->login_retry_count = ql2xloginretrycount;
  4575. /* Enable ZIO. */
  4576. if (!vha->flags.init_done) {
  4577. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4578. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4579. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4580. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4581. }
  4582. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4583. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4584. vha->flags.process_response_queue = 0;
  4585. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4586. ha->zio_mode = QLA_ZIO_MODE_6;
  4587. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4588. "(%d us).\n", vha->host_no, ha->zio_mode,
  4589. ha->zio_timer * 100));
  4590. qla_printk(KERN_INFO, ha,
  4591. "ZIO mode %d enabled; timer delay (%d us).\n",
  4592. ha->zio_mode, ha->zio_timer * 100);
  4593. icb->firmware_options_2 |= cpu_to_le32(
  4594. (uint32_t)ha->zio_mode);
  4595. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4596. vha->flags.process_response_queue = 1;
  4597. }
  4598. if (rval) {
  4599. DEBUG2_3(printk(KERN_WARNING
  4600. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4601. }
  4602. return (rval);
  4603. }
  4604. int
  4605. qla82xx_restart_isp(scsi_qla_host_t *vha)
  4606. {
  4607. int status, rval;
  4608. uint32_t wait_time;
  4609. struct qla_hw_data *ha = vha->hw;
  4610. struct req_que *req = ha->req_q_map[0];
  4611. struct rsp_que *rsp = ha->rsp_q_map[0];
  4612. struct scsi_qla_host *vp;
  4613. unsigned long flags;
  4614. status = qla2x00_init_rings(vha);
  4615. if (!status) {
  4616. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4617. ha->flags.chip_reset_done = 1;
  4618. status = qla2x00_fw_ready(vha);
  4619. if (!status) {
  4620. qla_printk(KERN_INFO, ha,
  4621. "%s(): Start configure loop, "
  4622. "status = %d\n", __func__, status);
  4623. /* Issue a marker after FW becomes ready. */
  4624. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  4625. vha->flags.online = 1;
  4626. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  4627. wait_time = 256;
  4628. do {
  4629. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  4630. qla2x00_configure_loop(vha);
  4631. wait_time--;
  4632. } while (!atomic_read(&vha->loop_down_timer) &&
  4633. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags)) &&
  4634. wait_time &&
  4635. (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)));
  4636. }
  4637. /* if no cable then assume it's good */
  4638. if ((vha->device_flags & DFLG_NO_CABLE))
  4639. status = 0;
  4640. qla_printk(KERN_INFO, ha,
  4641. "%s(): Configure loop done, status = 0x%x\n",
  4642. __func__, status);
  4643. }
  4644. if (!status) {
  4645. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  4646. if (!atomic_read(&vha->loop_down_timer)) {
  4647. /*
  4648. * Issue marker command only when we are going
  4649. * to start the I/O .
  4650. */
  4651. vha->marker_needed = 1;
  4652. }
  4653. vha->flags.online = 1;
  4654. ha->isp_ops->enable_intrs(ha);
  4655. ha->isp_abort_cnt = 0;
  4656. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  4657. if (ha->fce) {
  4658. ha->flags.fce_enabled = 1;
  4659. memset(ha->fce, 0,
  4660. fce_calc_size(ha->fce_bufs));
  4661. rval = qla2x00_enable_fce_trace(vha,
  4662. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  4663. &ha->fce_bufs);
  4664. if (rval) {
  4665. qla_printk(KERN_WARNING, ha,
  4666. "Unable to reinitialize FCE "
  4667. "(%d).\n", rval);
  4668. ha->flags.fce_enabled = 0;
  4669. }
  4670. }
  4671. if (ha->eft) {
  4672. memset(ha->eft, 0, EFT_SIZE);
  4673. rval = qla2x00_enable_eft_trace(vha,
  4674. ha->eft_dma, EFT_NUM_BUFFERS);
  4675. if (rval) {
  4676. qla_printk(KERN_WARNING, ha,
  4677. "Unable to reinitialize EFT "
  4678. "(%d).\n", rval);
  4679. }
  4680. }
  4681. }
  4682. if (!status) {
  4683. DEBUG(printk(KERN_INFO
  4684. "qla82xx_restart_isp(%ld): succeeded.\n",
  4685. vha->host_no));
  4686. spin_lock_irqsave(&ha->vport_slock, flags);
  4687. list_for_each_entry(vp, &ha->vp_list, list) {
  4688. if (vp->vp_idx) {
  4689. atomic_inc(&vp->vref_count);
  4690. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4691. qla2x00_vp_abort_isp(vp);
  4692. spin_lock_irqsave(&ha->vport_slock, flags);
  4693. atomic_dec(&vp->vref_count);
  4694. }
  4695. }
  4696. spin_unlock_irqrestore(&ha->vport_slock, flags);
  4697. } else {
  4698. qla_printk(KERN_INFO, ha,
  4699. "qla82xx_restart_isp: **** FAILED ****\n");
  4700. }
  4701. return status;
  4702. }
  4703. void
  4704. qla81xx_update_fw_options(scsi_qla_host_t *vha)
  4705. {
  4706. struct qla_hw_data *ha = vha->hw;
  4707. if (!ql2xetsenable)
  4708. return;
  4709. /* Enable ETS Burst. */
  4710. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  4711. ha->fw_options[2] |= BIT_9;
  4712. qla2x00_set_fw_options(vha, ha->fw_options);
  4713. }
  4714. /*
  4715. * qla24xx_get_fcp_prio
  4716. * Gets the fcp cmd priority value for the logged in port.
  4717. * Looks for a match of the port descriptors within
  4718. * each of the fcp prio config entries. If a match is found,
  4719. * the tag (priority) value is returned.
  4720. *
  4721. * Input:
  4722. * vha = scsi host structure pointer.
  4723. * fcport = port structure pointer.
  4724. *
  4725. * Return:
  4726. * non-zero (if found)
  4727. * -1 (if not found)
  4728. *
  4729. * Context:
  4730. * Kernel context
  4731. */
  4732. static int
  4733. qla24xx_get_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4734. {
  4735. int i, entries;
  4736. uint8_t pid_match, wwn_match;
  4737. int priority;
  4738. uint32_t pid1, pid2;
  4739. uint64_t wwn1, wwn2;
  4740. struct qla_fcp_prio_entry *pri_entry;
  4741. struct qla_hw_data *ha = vha->hw;
  4742. if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled)
  4743. return -1;
  4744. priority = -1;
  4745. entries = ha->fcp_prio_cfg->num_entries;
  4746. pri_entry = &ha->fcp_prio_cfg->entry[0];
  4747. for (i = 0; i < entries; i++) {
  4748. pid_match = wwn_match = 0;
  4749. if (!(pri_entry->flags & FCP_PRIO_ENTRY_VALID)) {
  4750. pri_entry++;
  4751. continue;
  4752. }
  4753. /* check source pid for a match */
  4754. if (pri_entry->flags & FCP_PRIO_ENTRY_SPID_VALID) {
  4755. pid1 = pri_entry->src_pid & INVALID_PORT_ID;
  4756. pid2 = vha->d_id.b24 & INVALID_PORT_ID;
  4757. if (pid1 == INVALID_PORT_ID)
  4758. pid_match++;
  4759. else if (pid1 == pid2)
  4760. pid_match++;
  4761. }
  4762. /* check destination pid for a match */
  4763. if (pri_entry->flags & FCP_PRIO_ENTRY_DPID_VALID) {
  4764. pid1 = pri_entry->dst_pid & INVALID_PORT_ID;
  4765. pid2 = fcport->d_id.b24 & INVALID_PORT_ID;
  4766. if (pid1 == INVALID_PORT_ID)
  4767. pid_match++;
  4768. else if (pid1 == pid2)
  4769. pid_match++;
  4770. }
  4771. /* check source WWN for a match */
  4772. if (pri_entry->flags & FCP_PRIO_ENTRY_SWWN_VALID) {
  4773. wwn1 = wwn_to_u64(vha->port_name);
  4774. wwn2 = wwn_to_u64(pri_entry->src_wwpn);
  4775. if (wwn2 == (uint64_t)-1)
  4776. wwn_match++;
  4777. else if (wwn1 == wwn2)
  4778. wwn_match++;
  4779. }
  4780. /* check destination WWN for a match */
  4781. if (pri_entry->flags & FCP_PRIO_ENTRY_DWWN_VALID) {
  4782. wwn1 = wwn_to_u64(fcport->port_name);
  4783. wwn2 = wwn_to_u64(pri_entry->dst_wwpn);
  4784. if (wwn2 == (uint64_t)-1)
  4785. wwn_match++;
  4786. else if (wwn1 == wwn2)
  4787. wwn_match++;
  4788. }
  4789. if (pid_match == 2 || wwn_match == 2) {
  4790. /* Found a matching entry */
  4791. if (pri_entry->flags & FCP_PRIO_ENTRY_TAG_VALID)
  4792. priority = pri_entry->tag;
  4793. break;
  4794. }
  4795. pri_entry++;
  4796. }
  4797. return priority;
  4798. }
  4799. /*
  4800. * qla24xx_update_fcport_fcp_prio
  4801. * Activates fcp priority for the logged in fc port
  4802. *
  4803. * Input:
  4804. * vha = scsi host structure pointer.
  4805. * fcp = port structure pointer.
  4806. *
  4807. * Return:
  4808. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4809. *
  4810. * Context:
  4811. * Kernel context.
  4812. */
  4813. int
  4814. qla24xx_update_fcport_fcp_prio(scsi_qla_host_t *vha, fc_port_t *fcport)
  4815. {
  4816. int ret;
  4817. int priority;
  4818. uint16_t mb[5];
  4819. if (fcport->port_type != FCT_TARGET ||
  4820. fcport->loop_id == FC_NO_LOOP_ID)
  4821. return QLA_FUNCTION_FAILED;
  4822. priority = qla24xx_get_fcp_prio(vha, fcport);
  4823. if (priority < 0)
  4824. return QLA_FUNCTION_FAILED;
  4825. ret = qla24xx_set_fcp_prio(vha, fcport->loop_id, priority, mb);
  4826. if (ret == QLA_SUCCESS)
  4827. fcport->fcp_prio = priority;
  4828. else
  4829. DEBUG2(printk(KERN_WARNING
  4830. "scsi(%ld): Unable to activate fcp priority, "
  4831. " ret=0x%x\n", vha->host_no, ret));
  4832. return ret;
  4833. }
  4834. /*
  4835. * qla24xx_update_all_fcp_prio
  4836. * Activates fcp priority for all the logged in ports
  4837. *
  4838. * Input:
  4839. * ha = adapter block pointer.
  4840. *
  4841. * Return:
  4842. * QLA_SUCCESS or QLA_FUNCTION_FAILED
  4843. *
  4844. * Context:
  4845. * Kernel context.
  4846. */
  4847. int
  4848. qla24xx_update_all_fcp_prio(scsi_qla_host_t *vha)
  4849. {
  4850. int ret;
  4851. fc_port_t *fcport;
  4852. ret = QLA_FUNCTION_FAILED;
  4853. /* We need to set priority for all logged in ports */
  4854. list_for_each_entry(fcport, &vha->vp_fcports, list)
  4855. ret = qla24xx_update_fcport_fcp_prio(vha, fcport);
  4856. return ret;
  4857. }