rtc-sa1100.c 9.3 KB

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  1. /*
  2. * Real Time Clock interface for StrongARM SA1x00 and XScale PXA2xx
  3. *
  4. * Copyright (c) 2000 Nils Faerber
  5. *
  6. * Based on rtc.c by Paul Gortmaker
  7. *
  8. * Original Driver by Nils Faerber <nils@kernelconcepts.de>
  9. *
  10. * Modifications from:
  11. * CIH <cih@coventive.com>
  12. * Nicolas Pitre <nico@fluxnic.net>
  13. * Andrew Christian <andrew.christian@hp.com>
  14. *
  15. * Converted to the RTC subsystem and Driver Model
  16. * by Richard Purdie <rpurdie@rpsys.net>
  17. *
  18. * This program is free software; you can redistribute it and/or
  19. * modify it under the terms of the GNU General Public License
  20. * as published by the Free Software Foundation; either version
  21. * 2 of the License, or (at your option) any later version.
  22. */
  23. #include <linux/platform_device.h>
  24. #include <linux/module.h>
  25. #include <linux/clk.h>
  26. #include <linux/rtc.h>
  27. #include <linux/init.h>
  28. #include <linux/fs.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/slab.h>
  31. #include <linux/string.h>
  32. #include <linux/of.h>
  33. #include <linux/pm.h>
  34. #include <linux/bitops.h>
  35. #include <mach/hardware.h>
  36. #include <asm/irq.h>
  37. #if defined(CONFIG_ARCH_PXA) || defined(CONFIG_ARCH_MMP)
  38. #include <mach/regs-rtc.h>
  39. #endif
  40. #define RTC_DEF_DIVIDER (32768 - 1)
  41. #define RTC_DEF_TRIM 0
  42. #define RTC_FREQ 1024
  43. struct sa1100_rtc {
  44. spinlock_t lock;
  45. int irq_1hz;
  46. int irq_alarm;
  47. struct rtc_device *rtc;
  48. struct clk *clk;
  49. };
  50. static irqreturn_t sa1100_rtc_interrupt(int irq, void *dev_id)
  51. {
  52. struct sa1100_rtc *info = dev_get_drvdata(dev_id);
  53. struct rtc_device *rtc = info->rtc;
  54. unsigned int rtsr;
  55. unsigned long events = 0;
  56. spin_lock(&info->lock);
  57. rtsr = RTSR;
  58. /* clear interrupt sources */
  59. RTSR = 0;
  60. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  61. * See also the comments in sa1100_rtc_probe(). */
  62. if (rtsr & (RTSR_ALE | RTSR_HZE)) {
  63. /* This is the original code, before there was the if test
  64. * above. This code does not clear interrupts that were not
  65. * enabled. */
  66. RTSR = (RTSR_AL | RTSR_HZ) & (rtsr >> 2);
  67. } else {
  68. /* For some reason, it is possible to enter this routine
  69. * without interruptions enabled, it has been tested with
  70. * several units (Bug in SA11xx chip?).
  71. *
  72. * This situation leads to an infinite "loop" of interrupt
  73. * routine calling and as a result the processor seems to
  74. * lock on its first call to open(). */
  75. RTSR = RTSR_AL | RTSR_HZ;
  76. }
  77. /* clear alarm interrupt if it has occurred */
  78. if (rtsr & RTSR_AL)
  79. rtsr &= ~RTSR_ALE;
  80. RTSR = rtsr & (RTSR_ALE | RTSR_HZE);
  81. /* update irq data & counter */
  82. if (rtsr & RTSR_AL)
  83. events |= RTC_AF | RTC_IRQF;
  84. if (rtsr & RTSR_HZ)
  85. events |= RTC_UF | RTC_IRQF;
  86. rtc_update_irq(rtc, 1, events);
  87. spin_unlock(&info->lock);
  88. return IRQ_HANDLED;
  89. }
  90. static int sa1100_rtc_open(struct device *dev)
  91. {
  92. struct sa1100_rtc *info = dev_get_drvdata(dev);
  93. struct rtc_device *rtc = info->rtc;
  94. int ret;
  95. ret = clk_prepare_enable(info->clk);
  96. if (ret)
  97. goto fail_clk;
  98. ret = request_irq(info->irq_1hz, sa1100_rtc_interrupt, 0, "rtc 1Hz", dev);
  99. if (ret) {
  100. dev_err(dev, "IRQ %d already in use.\n", info->irq_1hz);
  101. goto fail_ui;
  102. }
  103. ret = request_irq(info->irq_alarm, sa1100_rtc_interrupt, 0, "rtc Alrm", dev);
  104. if (ret) {
  105. dev_err(dev, "IRQ %d already in use.\n", info->irq_alarm);
  106. goto fail_ai;
  107. }
  108. rtc->max_user_freq = RTC_FREQ;
  109. rtc_irq_set_freq(rtc, NULL, RTC_FREQ);
  110. return 0;
  111. fail_ai:
  112. free_irq(info->irq_1hz, dev);
  113. fail_ui:
  114. clk_disable_unprepare(info->clk);
  115. fail_clk:
  116. return ret;
  117. }
  118. static void sa1100_rtc_release(struct device *dev)
  119. {
  120. struct sa1100_rtc *info = dev_get_drvdata(dev);
  121. spin_lock_irq(&info->lock);
  122. RTSR = 0;
  123. spin_unlock_irq(&info->lock);
  124. free_irq(info->irq_alarm, dev);
  125. free_irq(info->irq_1hz, dev);
  126. clk_disable_unprepare(info->clk);
  127. }
  128. static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
  129. {
  130. struct sa1100_rtc *info = dev_get_drvdata(dev);
  131. spin_lock_irq(&info->lock);
  132. if (enabled)
  133. RTSR |= RTSR_ALE;
  134. else
  135. RTSR &= ~RTSR_ALE;
  136. spin_unlock_irq(&info->lock);
  137. return 0;
  138. }
  139. static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm)
  140. {
  141. rtc_time_to_tm(RCNR, tm);
  142. return 0;
  143. }
  144. static int sa1100_rtc_set_time(struct device *dev, struct rtc_time *tm)
  145. {
  146. unsigned long time;
  147. int ret;
  148. ret = rtc_tm_to_time(tm, &time);
  149. if (ret == 0)
  150. RCNR = time;
  151. return ret;
  152. }
  153. static int sa1100_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  154. {
  155. u32 rtsr;
  156. rtsr = RTSR;
  157. alrm->enabled = (rtsr & RTSR_ALE) ? 1 : 0;
  158. alrm->pending = (rtsr & RTSR_AL) ? 1 : 0;
  159. return 0;
  160. }
  161. static int sa1100_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
  162. {
  163. struct sa1100_rtc *info = dev_get_drvdata(dev);
  164. unsigned long time;
  165. int ret;
  166. spin_lock_irq(&info->lock);
  167. ret = rtc_tm_to_time(&alrm->time, &time);
  168. if (ret != 0)
  169. goto out;
  170. RTSR = RTSR & (RTSR_HZE|RTSR_ALE|RTSR_AL);
  171. RTAR = time;
  172. if (alrm->enabled)
  173. RTSR |= RTSR_ALE;
  174. else
  175. RTSR &= ~RTSR_ALE;
  176. out:
  177. spin_unlock_irq(&info->lock);
  178. return ret;
  179. }
  180. static int sa1100_rtc_proc(struct device *dev, struct seq_file *seq)
  181. {
  182. seq_printf(seq, "trim/divider\t\t: 0x%08x\n", (u32) RTTR);
  183. seq_printf(seq, "RTSR\t\t\t: 0x%08x\n", (u32)RTSR);
  184. return 0;
  185. }
  186. static const struct rtc_class_ops sa1100_rtc_ops = {
  187. .open = sa1100_rtc_open,
  188. .release = sa1100_rtc_release,
  189. .read_time = sa1100_rtc_read_time,
  190. .set_time = sa1100_rtc_set_time,
  191. .read_alarm = sa1100_rtc_read_alarm,
  192. .set_alarm = sa1100_rtc_set_alarm,
  193. .proc = sa1100_rtc_proc,
  194. .alarm_irq_enable = sa1100_rtc_alarm_irq_enable,
  195. };
  196. static int sa1100_rtc_probe(struct platform_device *pdev)
  197. {
  198. struct rtc_device *rtc;
  199. struct sa1100_rtc *info;
  200. int irq_1hz, irq_alarm, ret = 0;
  201. irq_1hz = platform_get_irq_byname(pdev, "rtc 1Hz");
  202. irq_alarm = platform_get_irq_byname(pdev, "rtc alarm");
  203. if (irq_1hz < 0 || irq_alarm < 0)
  204. return -ENODEV;
  205. info = kzalloc(sizeof(struct sa1100_rtc), GFP_KERNEL);
  206. if (!info)
  207. return -ENOMEM;
  208. info->clk = clk_get(&pdev->dev, NULL);
  209. if (IS_ERR(info->clk)) {
  210. dev_err(&pdev->dev, "failed to find rtc clock source\n");
  211. ret = PTR_ERR(info->clk);
  212. goto err_clk;
  213. }
  214. info->irq_1hz = irq_1hz;
  215. info->irq_alarm = irq_alarm;
  216. spin_lock_init(&info->lock);
  217. platform_set_drvdata(pdev, info);
  218. /*
  219. * According to the manual we should be able to let RTTR be zero
  220. * and then a default diviser for a 32.768KHz clock is used.
  221. * Apparently this doesn't work, at least for my SA1110 rev 5.
  222. * If the clock divider is uninitialized then reset it to the
  223. * default value to get the 1Hz clock.
  224. */
  225. if (RTTR == 0) {
  226. RTTR = RTC_DEF_DIVIDER + (RTC_DEF_TRIM << 16);
  227. dev_warn(&pdev->dev, "warning: "
  228. "initializing default clock divider/trim value\n");
  229. /* The current RTC value probably doesn't make sense either */
  230. RCNR = 0;
  231. }
  232. device_init_wakeup(&pdev->dev, 1);
  233. rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops,
  234. THIS_MODULE);
  235. if (IS_ERR(rtc)) {
  236. ret = PTR_ERR(rtc);
  237. goto err_dev;
  238. }
  239. info->rtc = rtc;
  240. /* Fix for a nasty initialization problem the in SA11xx RTSR register.
  241. * See also the comments in sa1100_rtc_interrupt().
  242. *
  243. * Sometimes bit 1 of the RTSR (RTSR_HZ) will wake up 1, which means an
  244. * interrupt pending, even though interrupts were never enabled.
  245. * In this case, this bit it must be reset before enabling
  246. * interruptions to avoid a nonexistent interrupt to occur.
  247. *
  248. * In principle, the same problem would apply to bit 0, although it has
  249. * never been observed to happen.
  250. *
  251. * This issue is addressed both here and in sa1100_rtc_interrupt().
  252. * If the issue is not addressed here, in the times when the processor
  253. * wakes up with the bit set there will be one spurious interrupt.
  254. *
  255. * The issue is also dealt with in sa1100_rtc_interrupt() to be on the
  256. * safe side, once the condition that lead to this strange
  257. * initialization is unknown and could in principle happen during
  258. * normal processing.
  259. *
  260. * Notice that clearing bit 1 and 0 is accomplished by writting ONES to
  261. * the corresponding bits in RTSR. */
  262. RTSR = RTSR_AL | RTSR_HZ;
  263. return 0;
  264. err_dev:
  265. platform_set_drvdata(pdev, NULL);
  266. clk_put(info->clk);
  267. err_clk:
  268. kfree(info);
  269. return ret;
  270. }
  271. static int sa1100_rtc_remove(struct platform_device *pdev)
  272. {
  273. struct sa1100_rtc *info = platform_get_drvdata(pdev);
  274. if (info) {
  275. rtc_device_unregister(info->rtc);
  276. clk_put(info->clk);
  277. platform_set_drvdata(pdev, NULL);
  278. kfree(info);
  279. }
  280. return 0;
  281. }
  282. #ifdef CONFIG_PM
  283. static int sa1100_rtc_suspend(struct device *dev)
  284. {
  285. struct sa1100_rtc *info = dev_get_drvdata(dev);
  286. if (device_may_wakeup(dev))
  287. enable_irq_wake(info->irq_alarm);
  288. return 0;
  289. }
  290. static int sa1100_rtc_resume(struct device *dev)
  291. {
  292. struct sa1100_rtc *info = dev_get_drvdata(dev);
  293. if (device_may_wakeup(dev))
  294. disable_irq_wake(info->irq_alarm);
  295. return 0;
  296. }
  297. static const struct dev_pm_ops sa1100_rtc_pm_ops = {
  298. .suspend = sa1100_rtc_suspend,
  299. .resume = sa1100_rtc_resume,
  300. };
  301. #endif
  302. static struct of_device_id sa1100_rtc_dt_ids[] = {
  303. { .compatible = "mrvl,sa1100-rtc", },
  304. { .compatible = "mrvl,mmp-rtc", },
  305. {}
  306. };
  307. MODULE_DEVICE_TABLE(of, sa1100_rtc_dt_ids);
  308. static struct platform_driver sa1100_rtc_driver = {
  309. .probe = sa1100_rtc_probe,
  310. .remove = sa1100_rtc_remove,
  311. .driver = {
  312. .name = "sa1100-rtc",
  313. #ifdef CONFIG_PM
  314. .pm = &sa1100_rtc_pm_ops,
  315. #endif
  316. .of_match_table = sa1100_rtc_dt_ids,
  317. },
  318. };
  319. module_platform_driver(sa1100_rtc_driver);
  320. MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
  321. MODULE_DESCRIPTION("SA11x0/PXA2xx Realtime Clock Driver (RTC)");
  322. MODULE_LICENSE("GPL");
  323. MODULE_ALIAS("platform:sa1100-rtc");