pxa.c 21 KB

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  1. /*
  2. * linux/drivers/serial/pxa.c
  3. *
  4. * Based on drivers/serial/8250.c by Russell King.
  5. *
  6. * Author: Nicolas Pitre
  7. * Created: Feb 20, 2003
  8. * Copyright: (C) 2003 Monta Vista Software, Inc.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * Note 1: This driver is made separate from the already too overloaded
  16. * 8250.c because it needs some kirks of its own and that'll make it
  17. * easier to add DMA support.
  18. *
  19. * Note 2: I'm too sick of device allocation policies for serial ports.
  20. * If someone else wants to request an "official" allocation of major/minor
  21. * for this driver please be my guest. And don't forget that new hardware
  22. * to come from Intel might have more than 3 or 4 of those UARTs. Let's
  23. * hope for a better port registration and dynamic device allocation scheme
  24. * with the serial core maintainer satisfaction to appear soon.
  25. */
  26. #include <linux/config.h>
  27. #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  28. #define SUPPORT_SYSRQ
  29. #endif
  30. #include <linux/module.h>
  31. #include <linux/ioport.h>
  32. #include <linux/init.h>
  33. #include <linux/console.h>
  34. #include <linux/sysrq.h>
  35. #include <linux/serial_reg.h>
  36. #include <linux/circ_buf.h>
  37. #include <linux/delay.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/device.h>
  40. #include <linux/tty.h>
  41. #include <linux/tty_flip.h>
  42. #include <linux/serial_core.h>
  43. #include <asm/io.h>
  44. #include <asm/hardware.h>
  45. #include <asm/irq.h>
  46. #include <asm/arch/pxa-regs.h>
  47. struct uart_pxa_port {
  48. struct uart_port port;
  49. unsigned char ier;
  50. unsigned char lcr;
  51. unsigned char mcr;
  52. unsigned int lsr_break_flag;
  53. unsigned int cken;
  54. char *name;
  55. };
  56. static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
  57. {
  58. offset <<= 2;
  59. return readl(up->port.membase + offset);
  60. }
  61. static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
  62. {
  63. offset <<= 2;
  64. writel(value, up->port.membase + offset);
  65. }
  66. static void serial_pxa_enable_ms(struct uart_port *port)
  67. {
  68. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  69. up->ier |= UART_IER_MSI;
  70. serial_out(up, UART_IER, up->ier);
  71. }
  72. static void serial_pxa_stop_tx(struct uart_port *port, unsigned int tty_stop)
  73. {
  74. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  75. if (up->ier & UART_IER_THRI) {
  76. up->ier &= ~UART_IER_THRI;
  77. serial_out(up, UART_IER, up->ier);
  78. }
  79. }
  80. static void serial_pxa_stop_rx(struct uart_port *port)
  81. {
  82. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  83. up->ier &= ~UART_IER_RLSI;
  84. up->port.read_status_mask &= ~UART_LSR_DR;
  85. serial_out(up, UART_IER, up->ier);
  86. }
  87. static inline void
  88. receive_chars(struct uart_pxa_port *up, int *status, struct pt_regs *regs)
  89. {
  90. struct tty_struct *tty = up->port.info->tty;
  91. unsigned int ch, flag;
  92. int max_count = 256;
  93. do {
  94. if (unlikely(tty->flip.count >= TTY_FLIPBUF_SIZE)) {
  95. if (tty->low_latency)
  96. tty_flip_buffer_push(tty);
  97. /*
  98. * If this failed then we will throw away the
  99. * bytes but must do so to clear interrupts
  100. */
  101. }
  102. ch = serial_in(up, UART_RX);
  103. flag = TTY_NORMAL;
  104. up->port.icount.rx++;
  105. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  106. UART_LSR_FE | UART_LSR_OE))) {
  107. /*
  108. * For statistics only
  109. */
  110. if (*status & UART_LSR_BI) {
  111. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  112. up->port.icount.brk++;
  113. /*
  114. * We do the SysRQ and SAK checking
  115. * here because otherwise the break
  116. * may get masked by ignore_status_mask
  117. * or read_status_mask.
  118. */
  119. if (uart_handle_break(&up->port))
  120. goto ignore_char;
  121. } else if (*status & UART_LSR_PE)
  122. up->port.icount.parity++;
  123. else if (*status & UART_LSR_FE)
  124. up->port.icount.frame++;
  125. if (*status & UART_LSR_OE)
  126. up->port.icount.overrun++;
  127. /*
  128. * Mask off conditions which should be ignored.
  129. */
  130. *status &= up->port.read_status_mask;
  131. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  132. if (up->port.line == up->port.cons->index) {
  133. /* Recover the break flag from console xmit */
  134. *status |= up->lsr_break_flag;
  135. up->lsr_break_flag = 0;
  136. }
  137. #endif
  138. if (*status & UART_LSR_BI) {
  139. flag = TTY_BREAK;
  140. } else if (*status & UART_LSR_PE)
  141. flag = TTY_PARITY;
  142. else if (*status & UART_LSR_FE)
  143. flag = TTY_FRAME;
  144. }
  145. if (uart_handle_sysrq_char(&up->port, ch, regs))
  146. goto ignore_char;
  147. if ((*status & up->port.ignore_status_mask) == 0) {
  148. tty_insert_flip_char(tty, ch, flag);
  149. }
  150. if ((*status & UART_LSR_OE) &&
  151. tty->flip.count < TTY_FLIPBUF_SIZE) {
  152. /*
  153. * Overrun is special, since it's reported
  154. * immediately, and doesn't affect the current
  155. * character.
  156. */
  157. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  158. }
  159. ignore_char:
  160. *status = serial_in(up, UART_LSR);
  161. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  162. tty_flip_buffer_push(tty);
  163. }
  164. static void transmit_chars(struct uart_pxa_port *up)
  165. {
  166. struct circ_buf *xmit = &up->port.info->xmit;
  167. int count;
  168. if (up->port.x_char) {
  169. serial_out(up, UART_TX, up->port.x_char);
  170. up->port.icount.tx++;
  171. up->port.x_char = 0;
  172. return;
  173. }
  174. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  175. serial_pxa_stop_tx(&up->port, 0);
  176. return;
  177. }
  178. count = up->port.fifosize / 2;
  179. do {
  180. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  181. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  182. up->port.icount.tx++;
  183. if (uart_circ_empty(xmit))
  184. break;
  185. } while (--count > 0);
  186. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  187. uart_write_wakeup(&up->port);
  188. if (uart_circ_empty(xmit))
  189. serial_pxa_stop_tx(&up->port, 0);
  190. }
  191. static void serial_pxa_start_tx(struct uart_port *port, unsigned int tty_start)
  192. {
  193. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  194. if (!(up->ier & UART_IER_THRI)) {
  195. up->ier |= UART_IER_THRI;
  196. serial_out(up, UART_IER, up->ier);
  197. }
  198. }
  199. static inline void check_modem_status(struct uart_pxa_port *up)
  200. {
  201. int status;
  202. status = serial_in(up, UART_MSR);
  203. if ((status & UART_MSR_ANY_DELTA) == 0)
  204. return;
  205. if (status & UART_MSR_TERI)
  206. up->port.icount.rng++;
  207. if (status & UART_MSR_DDSR)
  208. up->port.icount.dsr++;
  209. if (status & UART_MSR_DDCD)
  210. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  211. if (status & UART_MSR_DCTS)
  212. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  213. wake_up_interruptible(&up->port.info->delta_msr_wait);
  214. }
  215. /*
  216. * This handles the interrupt from one port.
  217. */
  218. static inline irqreturn_t
  219. serial_pxa_irq(int irq, void *dev_id, struct pt_regs *regs)
  220. {
  221. struct uart_pxa_port *up = (struct uart_pxa_port *)dev_id;
  222. unsigned int iir, lsr;
  223. iir = serial_in(up, UART_IIR);
  224. if (iir & UART_IIR_NO_INT)
  225. return IRQ_NONE;
  226. lsr = serial_in(up, UART_LSR);
  227. if (lsr & UART_LSR_DR)
  228. receive_chars(up, &lsr, regs);
  229. check_modem_status(up);
  230. if (lsr & UART_LSR_THRE)
  231. transmit_chars(up);
  232. return IRQ_HANDLED;
  233. }
  234. static unsigned int serial_pxa_tx_empty(struct uart_port *port)
  235. {
  236. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  237. unsigned long flags;
  238. unsigned int ret;
  239. spin_lock_irqsave(&up->port.lock, flags);
  240. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  241. spin_unlock_irqrestore(&up->port.lock, flags);
  242. return ret;
  243. }
  244. static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
  245. {
  246. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  247. unsigned long flags;
  248. unsigned char status;
  249. unsigned int ret;
  250. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  251. spin_lock_irqsave(&up->port.lock, flags);
  252. status = serial_in(up, UART_MSR);
  253. spin_unlock_irqrestore(&up->port.lock, flags);
  254. ret = 0;
  255. if (status & UART_MSR_DCD)
  256. ret |= TIOCM_CAR;
  257. if (status & UART_MSR_RI)
  258. ret |= TIOCM_RNG;
  259. if (status & UART_MSR_DSR)
  260. ret |= TIOCM_DSR;
  261. if (status & UART_MSR_CTS)
  262. ret |= TIOCM_CTS;
  263. return ret;
  264. }
  265. static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
  266. {
  267. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  268. unsigned char mcr = 0;
  269. if (mctrl & TIOCM_RTS)
  270. mcr |= UART_MCR_RTS;
  271. if (mctrl & TIOCM_DTR)
  272. mcr |= UART_MCR_DTR;
  273. if (mctrl & TIOCM_OUT1)
  274. mcr |= UART_MCR_OUT1;
  275. if (mctrl & TIOCM_OUT2)
  276. mcr |= UART_MCR_OUT2;
  277. if (mctrl & TIOCM_LOOP)
  278. mcr |= UART_MCR_LOOP;
  279. mcr |= up->mcr;
  280. serial_out(up, UART_MCR, mcr);
  281. }
  282. static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
  283. {
  284. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  285. unsigned long flags;
  286. spin_lock_irqsave(&up->port.lock, flags);
  287. if (break_state == -1)
  288. up->lcr |= UART_LCR_SBC;
  289. else
  290. up->lcr &= ~UART_LCR_SBC;
  291. serial_out(up, UART_LCR, up->lcr);
  292. spin_unlock_irqrestore(&up->port.lock, flags);
  293. }
  294. #if 0
  295. static void serial_pxa_dma_init(struct pxa_uart *up)
  296. {
  297. up->rxdma =
  298. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
  299. if (up->rxdma < 0)
  300. goto out;
  301. up->txdma =
  302. pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
  303. if (up->txdma < 0)
  304. goto err_txdma;
  305. up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
  306. if (!up->dmadesc)
  307. goto err_alloc;
  308. /* ... */
  309. err_alloc:
  310. pxa_free_dma(up->txdma);
  311. err_rxdma:
  312. pxa_free_dma(up->rxdma);
  313. out:
  314. return;
  315. }
  316. #endif
  317. static int serial_pxa_startup(struct uart_port *port)
  318. {
  319. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  320. unsigned long flags;
  321. int retval;
  322. up->mcr = 0;
  323. /*
  324. * Allocate the IRQ
  325. */
  326. retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
  327. if (retval)
  328. return retval;
  329. /*
  330. * Clear the FIFO buffers and disable them.
  331. * (they will be reenabled in set_termios())
  332. */
  333. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  334. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  335. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  336. serial_out(up, UART_FCR, 0);
  337. /*
  338. * Clear the interrupt registers.
  339. */
  340. (void) serial_in(up, UART_LSR);
  341. (void) serial_in(up, UART_RX);
  342. (void) serial_in(up, UART_IIR);
  343. (void) serial_in(up, UART_MSR);
  344. /*
  345. * Now, initialize the UART
  346. */
  347. serial_out(up, UART_LCR, UART_LCR_WLEN8);
  348. spin_lock_irqsave(&up->port.lock, flags);
  349. up->port.mctrl |= TIOCM_OUT2;
  350. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  351. spin_unlock_irqrestore(&up->port.lock, flags);
  352. /*
  353. * Finally, enable interrupts. Note: Modem status interrupts
  354. * are set via set_termios(), which will be occuring imminently
  355. * anyway, so we don't enable them here.
  356. */
  357. up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
  358. serial_out(up, UART_IER, up->ier);
  359. /*
  360. * And clear the interrupt registers again for luck.
  361. */
  362. (void) serial_in(up, UART_LSR);
  363. (void) serial_in(up, UART_RX);
  364. (void) serial_in(up, UART_IIR);
  365. (void) serial_in(up, UART_MSR);
  366. return 0;
  367. }
  368. static void serial_pxa_shutdown(struct uart_port *port)
  369. {
  370. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  371. unsigned long flags;
  372. free_irq(up->port.irq, up);
  373. /*
  374. * Disable interrupts from this port
  375. */
  376. up->ier = 0;
  377. serial_out(up, UART_IER, 0);
  378. spin_lock_irqsave(&up->port.lock, flags);
  379. up->port.mctrl &= ~TIOCM_OUT2;
  380. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  381. spin_unlock_irqrestore(&up->port.lock, flags);
  382. /*
  383. * Disable break condition and FIFOs
  384. */
  385. serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
  386. serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  387. UART_FCR_CLEAR_RCVR |
  388. UART_FCR_CLEAR_XMIT);
  389. serial_out(up, UART_FCR, 0);
  390. }
  391. static void
  392. serial_pxa_set_termios(struct uart_port *port, struct termios *termios,
  393. struct termios *old)
  394. {
  395. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  396. unsigned char cval, fcr = 0;
  397. unsigned long flags;
  398. unsigned int baud, quot;
  399. switch (termios->c_cflag & CSIZE) {
  400. case CS5:
  401. cval = 0x00;
  402. break;
  403. case CS6:
  404. cval = 0x01;
  405. break;
  406. case CS7:
  407. cval = 0x02;
  408. break;
  409. default:
  410. case CS8:
  411. cval = 0x03;
  412. break;
  413. }
  414. if (termios->c_cflag & CSTOPB)
  415. cval |= 0x04;
  416. if (termios->c_cflag & PARENB)
  417. cval |= UART_LCR_PARITY;
  418. if (!(termios->c_cflag & PARODD))
  419. cval |= UART_LCR_EPAR;
  420. /*
  421. * Ask the core to calculate the divisor for us.
  422. */
  423. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  424. quot = uart_get_divisor(port, baud);
  425. if ((up->port.uartclk / quot) < (2400 * 16))
  426. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
  427. else
  428. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
  429. /*
  430. * Ok, we're now changing the port state. Do it with
  431. * interrupts disabled.
  432. */
  433. spin_lock_irqsave(&up->port.lock, flags);
  434. /*
  435. * Ensure the port will be enabled.
  436. * This is required especially for serial console.
  437. */
  438. up->ier |= IER_UUE;
  439. /*
  440. * Update the per-port timeout.
  441. */
  442. uart_update_timeout(port, termios->c_cflag, quot);
  443. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  444. if (termios->c_iflag & INPCK)
  445. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  446. if (termios->c_iflag & (BRKINT | PARMRK))
  447. up->port.read_status_mask |= UART_LSR_BI;
  448. /*
  449. * Characters to ignore
  450. */
  451. up->port.ignore_status_mask = 0;
  452. if (termios->c_iflag & IGNPAR)
  453. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  454. if (termios->c_iflag & IGNBRK) {
  455. up->port.ignore_status_mask |= UART_LSR_BI;
  456. /*
  457. * If we're ignoring parity and break indicators,
  458. * ignore overruns too (for real raw support).
  459. */
  460. if (termios->c_iflag & IGNPAR)
  461. up->port.ignore_status_mask |= UART_LSR_OE;
  462. }
  463. /*
  464. * ignore all characters if CREAD is not set
  465. */
  466. if ((termios->c_cflag & CREAD) == 0)
  467. up->port.ignore_status_mask |= UART_LSR_DR;
  468. /*
  469. * CTS flow control flag and modem status interrupts
  470. */
  471. up->ier &= ~UART_IER_MSI;
  472. if (UART_ENABLE_MS(&up->port, termios->c_cflag))
  473. up->ier |= UART_IER_MSI;
  474. serial_out(up, UART_IER, up->ier);
  475. serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  476. serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
  477. serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
  478. serial_out(up, UART_LCR, cval); /* reset DLAB */
  479. up->lcr = cval; /* Save LCR */
  480. serial_pxa_set_mctrl(&up->port, up->port.mctrl);
  481. serial_out(up, UART_FCR, fcr);
  482. spin_unlock_irqrestore(&up->port.lock, flags);
  483. }
  484. static void
  485. serial_pxa_pm(struct uart_port *port, unsigned int state,
  486. unsigned int oldstate)
  487. {
  488. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  489. pxa_set_cken(up->cken, !state);
  490. if (!state)
  491. udelay(1);
  492. }
  493. static void serial_pxa_release_port(struct uart_port *port)
  494. {
  495. }
  496. static int serial_pxa_request_port(struct uart_port *port)
  497. {
  498. return 0;
  499. }
  500. static void serial_pxa_config_port(struct uart_port *port, int flags)
  501. {
  502. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  503. up->port.type = PORT_PXA;
  504. }
  505. static int
  506. serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
  507. {
  508. /* we don't want the core code to modify any port params */
  509. return -EINVAL;
  510. }
  511. static const char *
  512. serial_pxa_type(struct uart_port *port)
  513. {
  514. struct uart_pxa_port *up = (struct uart_pxa_port *)port;
  515. return up->name;
  516. }
  517. #ifdef CONFIG_SERIAL_PXA_CONSOLE
  518. extern struct uart_pxa_port serial_pxa_ports[];
  519. extern struct uart_driver serial_pxa_reg;
  520. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  521. /*
  522. * Wait for transmitter & holding register to empty
  523. */
  524. static inline void wait_for_xmitr(struct uart_pxa_port *up)
  525. {
  526. unsigned int status, tmout = 10000;
  527. /* Wait up to 10ms for the character(s) to be sent. */
  528. do {
  529. status = serial_in(up, UART_LSR);
  530. if (status & UART_LSR_BI)
  531. up->lsr_break_flag = UART_LSR_BI;
  532. if (--tmout == 0)
  533. break;
  534. udelay(1);
  535. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  536. /* Wait up to 1s for flow control if necessary */
  537. if (up->port.flags & UPF_CONS_FLOW) {
  538. tmout = 1000000;
  539. while (--tmout &&
  540. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  541. udelay(1);
  542. }
  543. }
  544. /*
  545. * Print a string to the serial port trying not to disturb
  546. * any possible real use of the port...
  547. *
  548. * The console_lock must be held when we get here.
  549. */
  550. static void
  551. serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
  552. {
  553. struct uart_pxa_port *up = &serial_pxa_ports[co->index];
  554. unsigned int ier;
  555. int i;
  556. /*
  557. * First save the UER then disable the interrupts
  558. */
  559. ier = serial_in(up, UART_IER);
  560. serial_out(up, UART_IER, UART_IER_UUE);
  561. /*
  562. * Now, do each character
  563. */
  564. for (i = 0; i < count; i++, s++) {
  565. wait_for_xmitr(up);
  566. /*
  567. * Send the character out.
  568. * If a LF, also do CR...
  569. */
  570. serial_out(up, UART_TX, *s);
  571. if (*s == 10) {
  572. wait_for_xmitr(up);
  573. serial_out(up, UART_TX, 13);
  574. }
  575. }
  576. /*
  577. * Finally, wait for transmitter to become empty
  578. * and restore the IER
  579. */
  580. wait_for_xmitr(up);
  581. serial_out(up, UART_IER, ier);
  582. }
  583. static int __init
  584. serial_pxa_console_setup(struct console *co, char *options)
  585. {
  586. struct uart_pxa_port *up;
  587. int baud = 9600;
  588. int bits = 8;
  589. int parity = 'n';
  590. int flow = 'n';
  591. if (co->index == -1 || co->index >= serial_pxa_reg.nr)
  592. co->index = 0;
  593. up = &serial_pxa_ports[co->index];
  594. if (options)
  595. uart_parse_options(options, &baud, &parity, &bits, &flow);
  596. return uart_set_options(&up->port, co, baud, parity, bits, flow);
  597. }
  598. static struct console serial_pxa_console = {
  599. .name = "ttyS",
  600. .write = serial_pxa_console_write,
  601. .device = uart_console_device,
  602. .setup = serial_pxa_console_setup,
  603. .flags = CON_PRINTBUFFER,
  604. .index = -1,
  605. .data = &serial_pxa_reg,
  606. };
  607. static int __init
  608. serial_pxa_console_init(void)
  609. {
  610. register_console(&serial_pxa_console);
  611. return 0;
  612. }
  613. console_initcall(serial_pxa_console_init);
  614. #define PXA_CONSOLE &serial_pxa_console
  615. #else
  616. #define PXA_CONSOLE NULL
  617. #endif
  618. struct uart_ops serial_pxa_pops = {
  619. .tx_empty = serial_pxa_tx_empty,
  620. .set_mctrl = serial_pxa_set_mctrl,
  621. .get_mctrl = serial_pxa_get_mctrl,
  622. .stop_tx = serial_pxa_stop_tx,
  623. .start_tx = serial_pxa_start_tx,
  624. .stop_rx = serial_pxa_stop_rx,
  625. .enable_ms = serial_pxa_enable_ms,
  626. .break_ctl = serial_pxa_break_ctl,
  627. .startup = serial_pxa_startup,
  628. .shutdown = serial_pxa_shutdown,
  629. .set_termios = serial_pxa_set_termios,
  630. .pm = serial_pxa_pm,
  631. .type = serial_pxa_type,
  632. .release_port = serial_pxa_release_port,
  633. .request_port = serial_pxa_request_port,
  634. .config_port = serial_pxa_config_port,
  635. .verify_port = serial_pxa_verify_port,
  636. };
  637. static struct uart_pxa_port serial_pxa_ports[] = {
  638. { /* FFUART */
  639. .name = "FFUART",
  640. .cken = CKEN6_FFUART,
  641. .port = {
  642. .type = PORT_PXA,
  643. .iotype = UPIO_MEM,
  644. .membase = (void *)&FFUART,
  645. .mapbase = __PREG(FFUART),
  646. .irq = IRQ_FFUART,
  647. .uartclk = 921600 * 16,
  648. .fifosize = 64,
  649. .ops = &serial_pxa_pops,
  650. .line = 0,
  651. },
  652. }, { /* BTUART */
  653. .name = "BTUART",
  654. .cken = CKEN7_BTUART,
  655. .port = {
  656. .type = PORT_PXA,
  657. .iotype = UPIO_MEM,
  658. .membase = (void *)&BTUART,
  659. .mapbase = __PREG(BTUART),
  660. .irq = IRQ_BTUART,
  661. .uartclk = 921600 * 16,
  662. .fifosize = 64,
  663. .ops = &serial_pxa_pops,
  664. .line = 1,
  665. },
  666. }, { /* STUART */
  667. .name = "STUART",
  668. .cken = CKEN5_STUART,
  669. .port = {
  670. .type = PORT_PXA,
  671. .iotype = UPIO_MEM,
  672. .membase = (void *)&STUART,
  673. .mapbase = __PREG(STUART),
  674. .irq = IRQ_STUART,
  675. .uartclk = 921600 * 16,
  676. .fifosize = 64,
  677. .ops = &serial_pxa_pops,
  678. .line = 2,
  679. },
  680. }
  681. };
  682. static struct uart_driver serial_pxa_reg = {
  683. .owner = THIS_MODULE,
  684. .driver_name = "PXA serial",
  685. .devfs_name = "tts/",
  686. .dev_name = "ttyS",
  687. .major = TTY_MAJOR,
  688. .minor = 64,
  689. .nr = ARRAY_SIZE(serial_pxa_ports),
  690. .cons = PXA_CONSOLE,
  691. };
  692. static int serial_pxa_suspend(struct device *_dev, pm_message_t state, u32 level)
  693. {
  694. struct uart_pxa_port *sport = dev_get_drvdata(_dev);
  695. if (sport && level == SUSPEND_DISABLE)
  696. uart_suspend_port(&serial_pxa_reg, &sport->port);
  697. return 0;
  698. }
  699. static int serial_pxa_resume(struct device *_dev, u32 level)
  700. {
  701. struct uart_pxa_port *sport = dev_get_drvdata(_dev);
  702. if (sport && level == RESUME_ENABLE)
  703. uart_resume_port(&serial_pxa_reg, &sport->port);
  704. return 0;
  705. }
  706. static int serial_pxa_probe(struct device *_dev)
  707. {
  708. struct platform_device *dev = to_platform_device(_dev);
  709. serial_pxa_ports[dev->id].port.dev = _dev;
  710. uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
  711. dev_set_drvdata(_dev, &serial_pxa_ports[dev->id]);
  712. return 0;
  713. }
  714. static int serial_pxa_remove(struct device *_dev)
  715. {
  716. struct uart_pxa_port *sport = dev_get_drvdata(_dev);
  717. dev_set_drvdata(_dev, NULL);
  718. if (sport)
  719. uart_remove_one_port(&serial_pxa_reg, &sport->port);
  720. return 0;
  721. }
  722. static struct device_driver serial_pxa_driver = {
  723. .name = "pxa2xx-uart",
  724. .bus = &platform_bus_type,
  725. .probe = serial_pxa_probe,
  726. .remove = serial_pxa_remove,
  727. .suspend = serial_pxa_suspend,
  728. .resume = serial_pxa_resume,
  729. };
  730. int __init serial_pxa_init(void)
  731. {
  732. int ret;
  733. ret = uart_register_driver(&serial_pxa_reg);
  734. if (ret != 0)
  735. return ret;
  736. ret = driver_register(&serial_pxa_driver);
  737. if (ret != 0)
  738. uart_unregister_driver(&serial_pxa_reg);
  739. return ret;
  740. }
  741. void __exit serial_pxa_exit(void)
  742. {
  743. driver_unregister(&serial_pxa_driver);
  744. uart_unregister_driver(&serial_pxa_reg);
  745. }
  746. module_init(serial_pxa_init);
  747. module_exit(serial_pxa_exit);
  748. MODULE_LICENSE("GPL");