budget-ci.c 34 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include "budget.h"
  32. #include <linux/module.h>
  33. #include <linux/errno.h>
  34. #include <linux/slab.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/input.h>
  37. #include <linux/spinlock.h>
  38. #include <media/ir-common.h>
  39. #include "dvb_ca_en50221.h"
  40. #include "stv0299.h"
  41. #include "stv0297.h"
  42. #include "tda1004x.h"
  43. #include "lnbp21.h"
  44. #include "bsbe1.h"
  45. #include "bsru6.h"
  46. /*
  47. * Regarding DEBIADDR_IR:
  48. * Some CI modules hang if random addresses are read.
  49. * Using address 0x4000 for the IR read means that we
  50. * use the same address as for CI version, which should
  51. * be a safe default.
  52. */
  53. #define DEBIADDR_IR 0x4000
  54. #define DEBIADDR_CICONTROL 0x0000
  55. #define DEBIADDR_CIVERSION 0x4000
  56. #define DEBIADDR_IO 0x1000
  57. #define DEBIADDR_ATTR 0x3000
  58. #define CICONTROL_RESET 0x01
  59. #define CICONTROL_ENABLETS 0x02
  60. #define CICONTROL_CAMDETECT 0x08
  61. #define DEBICICTL 0x00420000
  62. #define DEBICICAM 0x02420000
  63. #define SLOTSTATUS_NONE 1
  64. #define SLOTSTATUS_PRESENT 2
  65. #define SLOTSTATUS_RESET 4
  66. #define SLOTSTATUS_READY 8
  67. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  68. /* Milliseconds during which key presses are regarded as key repeat and during
  69. * which the debounce logic is active
  70. */
  71. #define IR_REPEAT_TIMEOUT 350
  72. /* RC5 device wildcard */
  73. #define IR_DEVICE_ANY 255
  74. /* Some remotes sends multiple sequences per keypress (e.g. Zenith sends two),
  75. * this setting allows the superflous sequences to be ignored
  76. */
  77. static int debounce = 0;
  78. module_param(debounce, int, 0644);
  79. MODULE_PARM_DESC(debounce, "ignore repeated IR sequences (default: 0 = ignore no sequences)");
  80. static int rc5_device = -1;
  81. module_param(rc5_device, int, 0644);
  82. MODULE_PARM_DESC(rc5_device, "only IR commands to given RC5 device (device = 0 - 31, any device = 255, default: autodetect)");
  83. static int ir_debug = 0;
  84. module_param(ir_debug, int, 0644);
  85. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  86. struct budget_ci_ir {
  87. struct input_dev *dev;
  88. struct tasklet_struct msp430_irq_tasklet;
  89. char name[72]; /* 40 + 32 for (struct saa7146_dev).name */
  90. char phys[32];
  91. struct ir_input_state state;
  92. int rc5_device;
  93. };
  94. struct budget_ci {
  95. struct budget budget;
  96. struct tasklet_struct ciintf_irq_tasklet;
  97. int slot_status;
  98. int ci_irq;
  99. struct dvb_ca_en50221 ca;
  100. struct budget_ci_ir ir;
  101. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  102. };
  103. static void msp430_ir_keyup(unsigned long data)
  104. {
  105. struct budget_ci_ir *ir = (struct budget_ci_ir *) data;
  106. ir_input_nokey(ir->dev, &ir->state);
  107. }
  108. static void msp430_ir_interrupt(unsigned long data)
  109. {
  110. struct budget_ci *budget_ci = (struct budget_ci *) data;
  111. struct input_dev *dev = budget_ci->ir.dev;
  112. static int bounces = 0;
  113. int device;
  114. int toggle;
  115. static int prev_toggle = -1;
  116. static u32 ir_key;
  117. u32 command = ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  118. /*
  119. * The msp430 chip can generate two different bytes, command and device
  120. *
  121. * type1: X1CCCCCC, C = command bits (0 - 63)
  122. * type2: X0TDDDDD, D = device bits (0 - 31), T = RC5 toggle bit
  123. *
  124. * More than one command byte may be generated before the device byte
  125. * Only when we have both, a correct keypress is generated
  126. */
  127. /* Is this a RC5 command byte? */
  128. if (command & 0x40) {
  129. if (ir_debug)
  130. printk("budget_ci: received command byte 0x%02x\n", command);
  131. ir_key = command & 0x3f;
  132. return;
  133. }
  134. /* It's a RC5 device byte */
  135. if (ir_debug)
  136. printk("budget_ci: received device byte 0x%02x\n", command);
  137. device = command & 0x1f;
  138. toggle = command & 0x20;
  139. if (budget_ci->ir.rc5_device != IR_DEVICE_ANY && budget_ci->ir.rc5_device != device)
  140. return;
  141. /* Ignore repeated key sequences if requested */
  142. if (toggle == prev_toggle && ir_key == dev->repeat_key &&
  143. bounces > 0 && timer_pending(&dev->timer)) {
  144. if (ir_debug)
  145. printk("budget_ci: debounce logic ignored IR command\n");
  146. bounces--;
  147. return;
  148. }
  149. prev_toggle = toggle;
  150. /* Are we still waiting for a keyup event? */
  151. if (del_timer(&dev->timer))
  152. ir_input_nokey(dev, &budget_ci->ir.state);
  153. /* Generate keypress */
  154. if (ir_debug)
  155. printk("budget_ci: generating keypress 0x%02x\n", ir_key);
  156. ir_input_keydown(dev, &budget_ci->ir.state, ir_key, (ir_key & (command << 8)));
  157. /* Do we want to delay the keyup event? */
  158. if (debounce) {
  159. bounces = debounce;
  160. mod_timer(&dev->timer, jiffies + msecs_to_jiffies(IR_REPEAT_TIMEOUT));
  161. } else {
  162. ir_input_nokey(dev, &budget_ci->ir.state);
  163. }
  164. }
  165. static int msp430_ir_init(struct budget_ci *budget_ci)
  166. {
  167. struct saa7146_dev *saa = budget_ci->budget.dev;
  168. struct input_dev *input_dev = budget_ci->ir.dev;
  169. int error;
  170. budget_ci->ir.dev = input_dev = input_allocate_device();
  171. if (!input_dev) {
  172. printk(KERN_ERR "budget_ci: IR interface initialisation failed\n");
  173. error = -ENOMEM;
  174. goto out1;
  175. }
  176. snprintf(budget_ci->ir.name, sizeof(budget_ci->ir.name),
  177. "Budget-CI dvb ir receiver %s", saa->name);
  178. snprintf(budget_ci->ir.phys, sizeof(budget_ci->ir.phys),
  179. "pci-%s/ir0", pci_name(saa->pci));
  180. input_dev->name = budget_ci->ir.name;
  181. input_dev->phys = budget_ci->ir.phys;
  182. input_dev->id.bustype = BUS_PCI;
  183. input_dev->id.version = 1;
  184. if (saa->pci->subsystem_vendor) {
  185. input_dev->id.vendor = saa->pci->subsystem_vendor;
  186. input_dev->id.product = saa->pci->subsystem_device;
  187. } else {
  188. input_dev->id.vendor = saa->pci->vendor;
  189. input_dev->id.product = saa->pci->device;
  190. }
  191. input_dev->cdev.dev = &saa->pci->dev;
  192. /* Select keymap and address */
  193. switch (budget_ci->budget.dev->pci->subsystem_device) {
  194. case 0x100c:
  195. case 0x100f:
  196. case 0x1010:
  197. case 0x1011:
  198. case 0x1012:
  199. case 0x1017:
  200. /* The hauppauge keymap is a superset of these remotes */
  201. ir_input_init(input_dev, &budget_ci->ir.state,
  202. IR_TYPE_RC5, ir_codes_hauppauge_new);
  203. if (rc5_device < 0)
  204. budget_ci->ir.rc5_device = 0x1f;
  205. else
  206. budget_ci->ir.rc5_device = rc5_device;
  207. break;
  208. default:
  209. /* unknown remote */
  210. ir_input_init(input_dev, &budget_ci->ir.state,
  211. IR_TYPE_RC5, ir_codes_budget_ci_old);
  212. if (rc5_device < 0)
  213. budget_ci->ir.rc5_device = IR_DEVICE_ANY;
  214. else
  215. budget_ci->ir.rc5_device = rc5_device;
  216. break;
  217. }
  218. /* initialise the key-up debounce timeout handler */
  219. input_dev->timer.function = msp430_ir_keyup;
  220. input_dev->timer.data = (unsigned long) &budget_ci->ir;
  221. error = input_register_device(input_dev);
  222. if (error) {
  223. printk(KERN_ERR "budget_ci: could not init driver for IR device (code %d)\n", error);
  224. goto out2;
  225. }
  226. tasklet_init(&budget_ci->ir.msp430_irq_tasklet, msp430_ir_interrupt,
  227. (unsigned long) budget_ci);
  228. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06);
  229. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  230. return 0;
  231. out2:
  232. input_free_device(input_dev);
  233. out1:
  234. return error;
  235. }
  236. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  237. {
  238. struct saa7146_dev *saa = budget_ci->budget.dev;
  239. struct input_dev *dev = budget_ci->ir.dev;
  240. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06);
  241. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  242. tasklet_kill(&budget_ci->ir.msp430_irq_tasklet);
  243. if (del_timer(&dev->timer)) {
  244. ir_input_nokey(dev, &budget_ci->ir.state);
  245. input_sync(dev);
  246. }
  247. input_unregister_device(dev);
  248. }
  249. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  250. {
  251. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  252. if (slot != 0)
  253. return -EINVAL;
  254. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  255. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  256. }
  257. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  258. {
  259. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  260. if (slot != 0)
  261. return -EINVAL;
  262. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  263. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  264. }
  265. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  266. {
  267. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  268. if (slot != 0)
  269. return -EINVAL;
  270. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  271. DEBIADDR_IO | (address & 3), 1, 1, 0);
  272. }
  273. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  274. {
  275. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  276. if (slot != 0)
  277. return -EINVAL;
  278. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  279. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  280. }
  281. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  282. {
  283. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  284. struct saa7146_dev *saa = budget_ci->budget.dev;
  285. if (slot != 0)
  286. return -EINVAL;
  287. if (budget_ci->ci_irq) {
  288. // trigger on RISING edge during reset so we know when READY is re-asserted
  289. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  290. }
  291. budget_ci->slot_status = SLOTSTATUS_RESET;
  292. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  293. msleep(1);
  294. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  295. CICONTROL_RESET, 1, 0);
  296. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  297. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  298. return 0;
  299. }
  300. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  301. {
  302. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  303. struct saa7146_dev *saa = budget_ci->budget.dev;
  304. if (slot != 0)
  305. return -EINVAL;
  306. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  307. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  308. return 0;
  309. }
  310. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  311. {
  312. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  313. struct saa7146_dev *saa = budget_ci->budget.dev;
  314. int tmp;
  315. if (slot != 0)
  316. return -EINVAL;
  317. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  318. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  319. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  320. tmp | CICONTROL_ENABLETS, 1, 0);
  321. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  322. return 0;
  323. }
  324. static void ciintf_interrupt(unsigned long data)
  325. {
  326. struct budget_ci *budget_ci = (struct budget_ci *) data;
  327. struct saa7146_dev *saa = budget_ci->budget.dev;
  328. unsigned int flags;
  329. // ensure we don't get spurious IRQs during initialisation
  330. if (!budget_ci->budget.ci_present)
  331. return;
  332. // read the CAM status
  333. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  334. if (flags & CICONTROL_CAMDETECT) {
  335. // GPIO should be set to trigger on falling edge if a CAM is present
  336. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  337. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  338. // CAM insertion IRQ
  339. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  340. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  341. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  342. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  343. // CAM ready (reset completed)
  344. budget_ci->slot_status = SLOTSTATUS_READY;
  345. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  346. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  347. // FR/DA IRQ
  348. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  349. }
  350. } else {
  351. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  352. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  353. // the CAM might not actually be ready yet.
  354. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  355. // generate a CAM removal IRQ if we haven't already
  356. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  357. // CAM removal IRQ
  358. budget_ci->slot_status = SLOTSTATUS_NONE;
  359. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  360. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  361. }
  362. }
  363. }
  364. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  365. {
  366. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  367. unsigned int flags;
  368. // ensure we don't get spurious IRQs during initialisation
  369. if (!budget_ci->budget.ci_present)
  370. return -EINVAL;
  371. // read the CAM status
  372. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  373. if (flags & CICONTROL_CAMDETECT) {
  374. // mark it as present if it wasn't before
  375. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  376. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  377. }
  378. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  379. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  380. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  381. budget_ci->slot_status = SLOTSTATUS_READY;
  382. }
  383. }
  384. } else {
  385. budget_ci->slot_status = SLOTSTATUS_NONE;
  386. }
  387. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  388. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  389. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  390. }
  391. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  392. }
  393. return 0;
  394. }
  395. static int ciintf_init(struct budget_ci *budget_ci)
  396. {
  397. struct saa7146_dev *saa = budget_ci->budget.dev;
  398. int flags;
  399. int result;
  400. int ci_version;
  401. int ca_flags;
  402. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  403. // enable DEBI pins
  404. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800);
  405. // test if it is there
  406. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  407. if ((ci_version & 0xa0) != 0xa0) {
  408. result = -ENODEV;
  409. goto error;
  410. }
  411. // determine whether a CAM is present or not
  412. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  413. budget_ci->slot_status = SLOTSTATUS_NONE;
  414. if (flags & CICONTROL_CAMDETECT)
  415. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  416. // version 0xa2 of the CI firmware doesn't generate interrupts
  417. if (ci_version == 0xa2) {
  418. ca_flags = 0;
  419. budget_ci->ci_irq = 0;
  420. } else {
  421. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  422. DVB_CA_EN50221_FLAG_IRQ_FR |
  423. DVB_CA_EN50221_FLAG_IRQ_DA;
  424. budget_ci->ci_irq = 1;
  425. }
  426. // register CI interface
  427. budget_ci->ca.owner = THIS_MODULE;
  428. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  429. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  430. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  431. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  432. budget_ci->ca.slot_reset = ciintf_slot_reset;
  433. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  434. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  435. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  436. budget_ci->ca.data = budget_ci;
  437. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  438. &budget_ci->ca,
  439. ca_flags, 1)) != 0) {
  440. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  441. goto error;
  442. }
  443. // Setup CI slot IRQ
  444. if (budget_ci->ci_irq) {
  445. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  446. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  447. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  448. } else {
  449. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  450. }
  451. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03);
  452. }
  453. // enable interface
  454. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  455. CICONTROL_RESET, 1, 0);
  456. // success!
  457. printk("budget_ci: CI interface initialised\n");
  458. budget_ci->budget.ci_present = 1;
  459. // forge a fake CI IRQ so the CAM state is setup correctly
  460. if (budget_ci->ci_irq) {
  461. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  462. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  463. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  464. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  465. }
  466. return 0;
  467. error:
  468. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  469. return result;
  470. }
  471. static void ciintf_deinit(struct budget_ci *budget_ci)
  472. {
  473. struct saa7146_dev *saa = budget_ci->budget.dev;
  474. // disable CI interrupts
  475. if (budget_ci->ci_irq) {
  476. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03);
  477. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  478. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  479. }
  480. // reset interface
  481. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  482. msleep(1);
  483. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  484. CICONTROL_RESET, 1, 0);
  485. // disable TS data stream to CI interface
  486. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  487. // release the CA device
  488. dvb_ca_en50221_release(&budget_ci->ca);
  489. // disable DEBI pins
  490. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  491. }
  492. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  493. {
  494. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  495. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  496. if (*isr & MASK_06)
  497. tasklet_schedule(&budget_ci->ir.msp430_irq_tasklet);
  498. if (*isr & MASK_10)
  499. ttpci_budget_irq10_handler(dev, isr);
  500. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  501. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  502. }
  503. static u8 philips_su1278_tt_inittab[] = {
  504. 0x01, 0x0f,
  505. 0x02, 0x30,
  506. 0x03, 0x00,
  507. 0x04, 0x5b,
  508. 0x05, 0x85,
  509. 0x06, 0x02,
  510. 0x07, 0x00,
  511. 0x08, 0x02,
  512. 0x09, 0x00,
  513. 0x0C, 0x01,
  514. 0x0D, 0x81,
  515. 0x0E, 0x44,
  516. 0x0f, 0x14,
  517. 0x10, 0x3c,
  518. 0x11, 0x84,
  519. 0x12, 0xda,
  520. 0x13, 0x97,
  521. 0x14, 0x95,
  522. 0x15, 0xc9,
  523. 0x16, 0x19,
  524. 0x17, 0x8c,
  525. 0x18, 0x59,
  526. 0x19, 0xf8,
  527. 0x1a, 0xfe,
  528. 0x1c, 0x7f,
  529. 0x1d, 0x00,
  530. 0x1e, 0x00,
  531. 0x1f, 0x50,
  532. 0x20, 0x00,
  533. 0x21, 0x00,
  534. 0x22, 0x00,
  535. 0x23, 0x00,
  536. 0x28, 0x00,
  537. 0x29, 0x28,
  538. 0x2a, 0x14,
  539. 0x2b, 0x0f,
  540. 0x2c, 0x09,
  541. 0x2d, 0x09,
  542. 0x31, 0x1f,
  543. 0x32, 0x19,
  544. 0x33, 0xfc,
  545. 0x34, 0x93,
  546. 0xff, 0xff
  547. };
  548. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  549. {
  550. stv0299_writereg(fe, 0x0e, 0x44);
  551. if (srate >= 10000000) {
  552. stv0299_writereg(fe, 0x13, 0x97);
  553. stv0299_writereg(fe, 0x14, 0x95);
  554. stv0299_writereg(fe, 0x15, 0xc9);
  555. stv0299_writereg(fe, 0x17, 0x8c);
  556. stv0299_writereg(fe, 0x1a, 0xfe);
  557. stv0299_writereg(fe, 0x1c, 0x7f);
  558. stv0299_writereg(fe, 0x2d, 0x09);
  559. } else {
  560. stv0299_writereg(fe, 0x13, 0x99);
  561. stv0299_writereg(fe, 0x14, 0x8d);
  562. stv0299_writereg(fe, 0x15, 0xce);
  563. stv0299_writereg(fe, 0x17, 0x43);
  564. stv0299_writereg(fe, 0x1a, 0x1d);
  565. stv0299_writereg(fe, 0x1c, 0x12);
  566. stv0299_writereg(fe, 0x2d, 0x05);
  567. }
  568. stv0299_writereg(fe, 0x0e, 0x23);
  569. stv0299_writereg(fe, 0x0f, 0x94);
  570. stv0299_writereg(fe, 0x10, 0x39);
  571. stv0299_writereg(fe, 0x15, 0xc9);
  572. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  573. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  574. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  575. return 0;
  576. }
  577. static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe,
  578. struct dvb_frontend_parameters *params)
  579. {
  580. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  581. u32 div;
  582. u8 buf[4];
  583. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  584. if ((params->frequency < 950000) || (params->frequency > 2150000))
  585. return -EINVAL;
  586. div = (params->frequency + (500 - 1)) / 500; // round correctly
  587. buf[0] = (div >> 8) & 0x7f;
  588. buf[1] = div & 0xff;
  589. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  590. buf[3] = 0x20;
  591. if (params->u.qpsk.symbol_rate < 4000000)
  592. buf[3] |= 1;
  593. if (params->frequency < 1250000)
  594. buf[3] |= 0;
  595. else if (params->frequency < 1550000)
  596. buf[3] |= 0x40;
  597. else if (params->frequency < 2050000)
  598. buf[3] |= 0x80;
  599. else if (params->frequency < 2150000)
  600. buf[3] |= 0xC0;
  601. if (fe->ops.i2c_gate_ctrl)
  602. fe->ops.i2c_gate_ctrl(fe, 1);
  603. if (i2c_transfer(&budget_ci->budget.i2c_adap, &msg, 1) != 1)
  604. return -EIO;
  605. return 0;
  606. }
  607. static struct stv0299_config philips_su1278_tt_config = {
  608. .demod_address = 0x68,
  609. .inittab = philips_su1278_tt_inittab,
  610. .mclk = 64000000UL,
  611. .invert = 0,
  612. .skip_reinit = 1,
  613. .lock_output = STV0229_LOCKOUTPUT_1,
  614. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  615. .min_delay_ms = 50,
  616. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  617. };
  618. static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
  619. {
  620. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  621. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  622. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  623. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  624. sizeof(td1316_init) };
  625. // setup PLL configuration
  626. if (fe->ops.i2c_gate_ctrl)
  627. fe->ops.i2c_gate_ctrl(fe, 1);
  628. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  629. return -EIO;
  630. msleep(1);
  631. // disable the mc44BC374c (do not check for errors)
  632. tuner_msg.addr = 0x65;
  633. tuner_msg.buf = disable_mc44BC374c;
  634. tuner_msg.len = sizeof(disable_mc44BC374c);
  635. if (fe->ops.i2c_gate_ctrl)
  636. fe->ops.i2c_gate_ctrl(fe, 1);
  637. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  638. if (fe->ops.i2c_gate_ctrl)
  639. fe->ops.i2c_gate_ctrl(fe, 1);
  640. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  641. }
  642. return 0;
  643. }
  644. static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  645. {
  646. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  647. u8 tuner_buf[4];
  648. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  649. int tuner_frequency = 0;
  650. u8 band, cp, filter;
  651. // determine charge pump
  652. tuner_frequency = params->frequency + 36130000;
  653. if (tuner_frequency < 87000000)
  654. return -EINVAL;
  655. else if (tuner_frequency < 130000000)
  656. cp = 3;
  657. else if (tuner_frequency < 160000000)
  658. cp = 5;
  659. else if (tuner_frequency < 200000000)
  660. cp = 6;
  661. else if (tuner_frequency < 290000000)
  662. cp = 3;
  663. else if (tuner_frequency < 420000000)
  664. cp = 5;
  665. else if (tuner_frequency < 480000000)
  666. cp = 6;
  667. else if (tuner_frequency < 620000000)
  668. cp = 3;
  669. else if (tuner_frequency < 830000000)
  670. cp = 5;
  671. else if (tuner_frequency < 895000000)
  672. cp = 7;
  673. else
  674. return -EINVAL;
  675. // determine band
  676. if (params->frequency < 49000000)
  677. return -EINVAL;
  678. else if (params->frequency < 159000000)
  679. band = 1;
  680. else if (params->frequency < 444000000)
  681. band = 2;
  682. else if (params->frequency < 861000000)
  683. band = 4;
  684. else
  685. return -EINVAL;
  686. // setup PLL filter and TDA9889
  687. switch (params->u.ofdm.bandwidth) {
  688. case BANDWIDTH_6_MHZ:
  689. tda1004x_writereg(fe, 0x0C, 0x14);
  690. filter = 0;
  691. break;
  692. case BANDWIDTH_7_MHZ:
  693. tda1004x_writereg(fe, 0x0C, 0x80);
  694. filter = 0;
  695. break;
  696. case BANDWIDTH_8_MHZ:
  697. tda1004x_writereg(fe, 0x0C, 0x14);
  698. filter = 1;
  699. break;
  700. default:
  701. return -EINVAL;
  702. }
  703. // calculate divisor
  704. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  705. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  706. // setup tuner buffer
  707. tuner_buf[0] = tuner_frequency >> 8;
  708. tuner_buf[1] = tuner_frequency & 0xff;
  709. tuner_buf[2] = 0xca;
  710. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  711. if (fe->ops.i2c_gate_ctrl)
  712. fe->ops.i2c_gate_ctrl(fe, 1);
  713. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  714. return -EIO;
  715. msleep(1);
  716. return 0;
  717. }
  718. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  719. const struct firmware **fw, char *name)
  720. {
  721. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  722. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  723. }
  724. static struct tda1004x_config philips_tdm1316l_config = {
  725. .demod_address = 0x8,
  726. .invert = 0,
  727. .invert_oclk = 0,
  728. .xtal_freq = TDA10046_XTAL_4M,
  729. .agc_config = TDA10046_AGC_DEFAULT,
  730. .if_freq = TDA10046_FREQ_3617,
  731. .request_firmware = philips_tdm1316l_request_firmware,
  732. };
  733. static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  734. {
  735. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  736. u8 tuner_buf[5];
  737. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  738. .flags = 0,
  739. .buf = tuner_buf,
  740. .len = sizeof(tuner_buf) };
  741. int tuner_frequency = 0;
  742. u8 band, cp, filter;
  743. // determine charge pump
  744. tuner_frequency = params->frequency + 36125000;
  745. if (tuner_frequency < 87000000)
  746. return -EINVAL;
  747. else if (tuner_frequency < 130000000) {
  748. cp = 3;
  749. band = 1;
  750. } else if (tuner_frequency < 160000000) {
  751. cp = 5;
  752. band = 1;
  753. } else if (tuner_frequency < 200000000) {
  754. cp = 6;
  755. band = 2;
  756. } else if (tuner_frequency < 290000000) {
  757. cp = 3;
  758. band = 2;
  759. } else if (tuner_frequency < 420000000) {
  760. cp = 5;
  761. band = 2;
  762. } else if (tuner_frequency < 480000000) {
  763. cp = 6;
  764. band = 2;
  765. } else if (tuner_frequency < 620000000) {
  766. cp = 3;
  767. band = 4;
  768. } else if (tuner_frequency < 830000000) {
  769. cp = 5;
  770. band = 4;
  771. } else if (tuner_frequency < 895000000) {
  772. cp = 7;
  773. band = 4;
  774. } else
  775. return -EINVAL;
  776. // assume PLL filter should always be 8MHz for the moment.
  777. filter = 1;
  778. // calculate divisor
  779. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  780. // setup tuner buffer
  781. tuner_buf[0] = tuner_frequency >> 8;
  782. tuner_buf[1] = tuner_frequency & 0xff;
  783. tuner_buf[2] = 0xc8;
  784. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  785. tuner_buf[4] = 0x80;
  786. if (fe->ops.i2c_gate_ctrl)
  787. fe->ops.i2c_gate_ctrl(fe, 1);
  788. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  789. return -EIO;
  790. msleep(50);
  791. if (fe->ops.i2c_gate_ctrl)
  792. fe->ops.i2c_gate_ctrl(fe, 1);
  793. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  794. return -EIO;
  795. msleep(1);
  796. return 0;
  797. }
  798. static u8 dvbc_philips_tdm1316l_inittab[] = {
  799. 0x80, 0x01,
  800. 0x80, 0x00,
  801. 0x81, 0x01,
  802. 0x81, 0x00,
  803. 0x00, 0x09,
  804. 0x01, 0x69,
  805. 0x03, 0x00,
  806. 0x04, 0x00,
  807. 0x07, 0x00,
  808. 0x08, 0x00,
  809. 0x20, 0x00,
  810. 0x21, 0x40,
  811. 0x22, 0x00,
  812. 0x23, 0x00,
  813. 0x24, 0x40,
  814. 0x25, 0x88,
  815. 0x30, 0xff,
  816. 0x31, 0x00,
  817. 0x32, 0xff,
  818. 0x33, 0x00,
  819. 0x34, 0x50,
  820. 0x35, 0x7f,
  821. 0x36, 0x00,
  822. 0x37, 0x20,
  823. 0x38, 0x00,
  824. 0x40, 0x1c,
  825. 0x41, 0xff,
  826. 0x42, 0x29,
  827. 0x43, 0x20,
  828. 0x44, 0xff,
  829. 0x45, 0x00,
  830. 0x46, 0x00,
  831. 0x49, 0x04,
  832. 0x4a, 0x00,
  833. 0x4b, 0x7b,
  834. 0x52, 0x30,
  835. 0x55, 0xae,
  836. 0x56, 0x47,
  837. 0x57, 0xe1,
  838. 0x58, 0x3a,
  839. 0x5a, 0x1e,
  840. 0x5b, 0x34,
  841. 0x60, 0x00,
  842. 0x63, 0x00,
  843. 0x64, 0x00,
  844. 0x65, 0x00,
  845. 0x66, 0x00,
  846. 0x67, 0x00,
  847. 0x68, 0x00,
  848. 0x69, 0x00,
  849. 0x6a, 0x02,
  850. 0x6b, 0x00,
  851. 0x70, 0xff,
  852. 0x71, 0x00,
  853. 0x72, 0x00,
  854. 0x73, 0x00,
  855. 0x74, 0x0c,
  856. 0x80, 0x00,
  857. 0x81, 0x00,
  858. 0x82, 0x00,
  859. 0x83, 0x00,
  860. 0x84, 0x04,
  861. 0x85, 0x80,
  862. 0x86, 0x24,
  863. 0x87, 0x78,
  864. 0x88, 0x10,
  865. 0x89, 0x00,
  866. 0x90, 0x01,
  867. 0x91, 0x01,
  868. 0xa0, 0x04,
  869. 0xa1, 0x00,
  870. 0xa2, 0x00,
  871. 0xb0, 0x91,
  872. 0xb1, 0x0b,
  873. 0xc0, 0x53,
  874. 0xc1, 0x70,
  875. 0xc2, 0x12,
  876. 0xd0, 0x00,
  877. 0xd1, 0x00,
  878. 0xd2, 0x00,
  879. 0xd3, 0x00,
  880. 0xd4, 0x00,
  881. 0xd5, 0x00,
  882. 0xde, 0x00,
  883. 0xdf, 0x00,
  884. 0x61, 0x38,
  885. 0x62, 0x0a,
  886. 0x53, 0x13,
  887. 0x59, 0x08,
  888. 0xff, 0xff,
  889. };
  890. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  891. .demod_address = 0x1c,
  892. .inittab = dvbc_philips_tdm1316l_inittab,
  893. .invert = 0,
  894. .stop_during_read = 1,
  895. };
  896. static void frontend_init(struct budget_ci *budget_ci)
  897. {
  898. switch (budget_ci->budget.dev->pci->subsystem_device) {
  899. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  900. budget_ci->budget.dvb_frontend =
  901. dvb_attach(stv0299_attach, &alps_bsru6_config, &budget_ci->budget.i2c_adap);
  902. if (budget_ci->budget.dvb_frontend) {
  903. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  904. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  905. break;
  906. }
  907. break;
  908. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  909. budget_ci->budget.dvb_frontend =
  910. dvb_attach(stv0299_attach, &philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  911. if (budget_ci->budget.dvb_frontend) {
  912. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_su1278_tt_tuner_set_params;
  913. break;
  914. }
  915. break;
  916. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  917. budget_ci->tuner_pll_address = 0x61;
  918. budget_ci->budget.dvb_frontend =
  919. dvb_attach(stv0297_attach, &dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  920. if (budget_ci->budget.dvb_frontend) {
  921. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = dvbc_philips_tdm1316l_tuner_set_params;
  922. break;
  923. }
  924. break;
  925. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  926. budget_ci->tuner_pll_address = 0x63;
  927. budget_ci->budget.dvb_frontend =
  928. dvb_attach(tda10045_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  929. if (budget_ci->budget.dvb_frontend) {
  930. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  931. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  932. break;
  933. }
  934. break;
  935. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  936. budget_ci->tuner_pll_address = 0x60;
  937. philips_tdm1316l_config.invert = 1;
  938. budget_ci->budget.dvb_frontend =
  939. dvb_attach(tda10046_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  940. if (budget_ci->budget.dvb_frontend) {
  941. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  942. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  943. break;
  944. }
  945. break;
  946. case 0x1017: // TT S-1500 PCI
  947. budget_ci->budget.dvb_frontend = dvb_attach(stv0299_attach, &alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  948. if (budget_ci->budget.dvb_frontend) {
  949. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  950. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  951. budget_ci->budget.dvb_frontend->ops.dishnetwork_send_legacy_command = NULL;
  952. if (dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0) == NULL) {
  953. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  954. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  955. budget_ci->budget.dvb_frontend = NULL;
  956. }
  957. }
  958. break;
  959. }
  960. if (budget_ci->budget.dvb_frontend == NULL) {
  961. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  962. budget_ci->budget.dev->pci->vendor,
  963. budget_ci->budget.dev->pci->device,
  964. budget_ci->budget.dev->pci->subsystem_vendor,
  965. budget_ci->budget.dev->pci->subsystem_device);
  966. } else {
  967. if (dvb_register_frontend
  968. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  969. printk("budget-ci: Frontend registration failed!\n");
  970. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  971. budget_ci->budget.dvb_frontend = NULL;
  972. }
  973. }
  974. }
  975. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  976. {
  977. struct budget_ci *budget_ci;
  978. int err;
  979. budget_ci = kzalloc(sizeof(struct budget_ci), GFP_KERNEL);
  980. if (!budget_ci) {
  981. err = -ENOMEM;
  982. goto out1;
  983. }
  984. dprintk(2, "budget_ci: %p\n", budget_ci);
  985. dev->ext_priv = budget_ci;
  986. err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE);
  987. if (err)
  988. goto out2;
  989. err = msp430_ir_init(budget_ci);
  990. if (err)
  991. goto out3;
  992. ciintf_init(budget_ci);
  993. budget_ci->budget.dvb_adapter.priv = budget_ci;
  994. frontend_init(budget_ci);
  995. ttpci_budget_init_hooks(&budget_ci->budget);
  996. return 0;
  997. out3:
  998. ttpci_budget_deinit(&budget_ci->budget);
  999. out2:
  1000. kfree(budget_ci);
  1001. out1:
  1002. return err;
  1003. }
  1004. static int budget_ci_detach(struct saa7146_dev *dev)
  1005. {
  1006. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  1007. struct saa7146_dev *saa = budget_ci->budget.dev;
  1008. int err;
  1009. if (budget_ci->budget.ci_present)
  1010. ciintf_deinit(budget_ci);
  1011. msp430_ir_deinit(budget_ci);
  1012. if (budget_ci->budget.dvb_frontend) {
  1013. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  1014. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  1015. }
  1016. err = ttpci_budget_deinit(&budget_ci->budget);
  1017. // disable frontend and CI interface
  1018. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  1019. kfree(budget_ci);
  1020. return err;
  1021. }
  1022. static struct saa7146_extension budget_extension;
  1023. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  1024. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  1025. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  1026. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  1027. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  1028. static struct pci_device_id pci_tbl[] = {
  1029. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  1030. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  1031. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  1032. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  1033. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  1034. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  1035. {
  1036. .vendor = 0,
  1037. }
  1038. };
  1039. MODULE_DEVICE_TABLE(pci, pci_tbl);
  1040. static struct saa7146_extension budget_extension = {
  1041. .name = "budget_ci dvb",
  1042. .flags = SAA7146_I2C_SHORT_DELAY,
  1043. .module = THIS_MODULE,
  1044. .pci_tbl = &pci_tbl[0],
  1045. .attach = budget_ci_attach,
  1046. .detach = budget_ci_detach,
  1047. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  1048. .irq_func = budget_ci_irq,
  1049. };
  1050. static int __init budget_ci_init(void)
  1051. {
  1052. return saa7146_register_extension(&budget_extension);
  1053. }
  1054. static void __exit budget_ci_exit(void)
  1055. {
  1056. saa7146_unregister_extension(&budget_extension);
  1057. }
  1058. module_init(budget_ci_init);
  1059. module_exit(budget_ci_exit);
  1060. MODULE_LICENSE("GPL");
  1061. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  1062. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  1063. "budget PCI DVB cards w/ CI-module produced by "
  1064. "Siemens, Technotrend, Hauppauge");