omap2430.c 11 KB

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  1. /*
  2. * Copyright (C) 2005-2007 by Texas Instruments
  3. * Some code has been taken from tusb6010.c
  4. * Copyrights for that are attributable to:
  5. * Copyright (C) 2006 Nokia Corporation
  6. * Tony Lindgren <tony@atomide.com>
  7. *
  8. * This file is part of the Inventra Controller Driver for Linux.
  9. *
  10. * The Inventra Controller Driver for Linux is free software; you
  11. * can redistribute it and/or modify it under the terms of the GNU
  12. * General Public License version 2 as published by the Free Software
  13. * Foundation.
  14. *
  15. * The Inventra Controller Driver for Linux is distributed in
  16. * the hope that it will be useful, but WITHOUT ANY WARRANTY;
  17. * without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
  19. * License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with The Inventra Controller Driver for Linux ; if not,
  23. * write to the Free Software Foundation, Inc., 59 Temple Place,
  24. * Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/kernel.h>
  29. #include <linux/sched.h>
  30. #include <linux/init.h>
  31. #include <linux/list.h>
  32. #include <linux/clk.h>
  33. #include <linux/io.h>
  34. #include <linux/platform_device.h>
  35. #include <linux/dma-mapping.h>
  36. #include "musb_core.h"
  37. #include "omap2430.h"
  38. struct omap2430_glue {
  39. struct device *dev;
  40. struct platform_device *musb;
  41. struct clk *clk;
  42. };
  43. static struct timer_list musb_idle_timer;
  44. static void musb_do_idle(unsigned long _musb)
  45. {
  46. struct musb *musb = (void *)_musb;
  47. unsigned long flags;
  48. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  49. u8 power;
  50. #endif
  51. u8 devctl;
  52. spin_lock_irqsave(&musb->lock, flags);
  53. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  54. switch (musb->xceiv->state) {
  55. case OTG_STATE_A_WAIT_BCON:
  56. devctl &= ~MUSB_DEVCTL_SESSION;
  57. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  58. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  59. if (devctl & MUSB_DEVCTL_BDEVICE) {
  60. musb->xceiv->state = OTG_STATE_B_IDLE;
  61. MUSB_DEV_MODE(musb);
  62. } else {
  63. musb->xceiv->state = OTG_STATE_A_IDLE;
  64. MUSB_HST_MODE(musb);
  65. }
  66. break;
  67. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  68. case OTG_STATE_A_SUSPEND:
  69. /* finish RESUME signaling? */
  70. if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
  71. power = musb_readb(musb->mregs, MUSB_POWER);
  72. power &= ~MUSB_POWER_RESUME;
  73. DBG(1, "root port resume stopped, power %02x\n", power);
  74. musb_writeb(musb->mregs, MUSB_POWER, power);
  75. musb->is_active = 1;
  76. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
  77. | MUSB_PORT_STAT_RESUME);
  78. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  79. usb_hcd_poll_rh_status(musb_to_hcd(musb));
  80. /* NOTE: it might really be A_WAIT_BCON ... */
  81. musb->xceiv->state = OTG_STATE_A_HOST;
  82. }
  83. break;
  84. #endif
  85. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  86. case OTG_STATE_A_HOST:
  87. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  88. if (devctl & MUSB_DEVCTL_BDEVICE)
  89. musb->xceiv->state = OTG_STATE_B_IDLE;
  90. else
  91. musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
  92. #endif
  93. default:
  94. break;
  95. }
  96. spin_unlock_irqrestore(&musb->lock, flags);
  97. }
  98. static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
  99. {
  100. unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
  101. static unsigned long last_timer;
  102. if (timeout == 0)
  103. timeout = default_timeout;
  104. /* Never idle if active, or when VBUS timeout is not set as host */
  105. if (musb->is_active || ((musb->a_wait_bcon == 0)
  106. && (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
  107. DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
  108. del_timer(&musb_idle_timer);
  109. last_timer = jiffies;
  110. return;
  111. }
  112. if (time_after(last_timer, timeout)) {
  113. if (!timer_pending(&musb_idle_timer))
  114. last_timer = timeout;
  115. else {
  116. DBG(4, "Longer idle timer already pending, ignoring\n");
  117. return;
  118. }
  119. }
  120. last_timer = timeout;
  121. DBG(4, "%s inactive, for idle timer for %lu ms\n",
  122. otg_state_string(musb),
  123. (unsigned long)jiffies_to_msecs(timeout - jiffies));
  124. mod_timer(&musb_idle_timer, timeout);
  125. }
  126. static void omap2430_musb_enable(struct musb *musb)
  127. {
  128. }
  129. static void omap2430_musb_disable(struct musb *musb)
  130. {
  131. }
  132. static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
  133. {
  134. u8 devctl;
  135. /* HDRC controls CPEN, but beware current surges during device
  136. * connect. They can trigger transient overcurrent conditions
  137. * that must be ignored.
  138. */
  139. devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  140. if (is_on) {
  141. musb->is_active = 1;
  142. musb->xceiv->default_a = 1;
  143. musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
  144. devctl |= MUSB_DEVCTL_SESSION;
  145. MUSB_HST_MODE(musb);
  146. } else {
  147. musb->is_active = 0;
  148. /* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
  149. * jumping right to B_IDLE...
  150. */
  151. musb->xceiv->default_a = 0;
  152. musb->xceiv->state = OTG_STATE_B_IDLE;
  153. devctl &= ~MUSB_DEVCTL_SESSION;
  154. MUSB_DEV_MODE(musb);
  155. }
  156. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  157. DBG(1, "VBUS %s, devctl %02x "
  158. /* otg %3x conf %08x prcm %08x */ "\n",
  159. otg_state_string(musb),
  160. musb_readb(musb->mregs, MUSB_DEVCTL));
  161. }
  162. static int omap2430_musb_resume(struct musb *musb);
  163. static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
  164. {
  165. u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
  166. devctl |= MUSB_DEVCTL_SESSION;
  167. musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
  168. return 0;
  169. }
  170. static int omap2430_musb_init(struct musb *musb)
  171. {
  172. u32 l;
  173. struct device *dev = musb->controller;
  174. struct musb_hdrc_platform_data *plat = dev->platform_data;
  175. struct omap_musb_board_data *data = plat->board_data;
  176. /* We require some kind of external transceiver, hooked
  177. * up through ULPI. TWL4030-family PMICs include one,
  178. * which needs a driver, drivers aren't always needed.
  179. */
  180. musb->xceiv = otg_get_transceiver();
  181. if (!musb->xceiv) {
  182. pr_err("HS USB OTG: no transceiver configured\n");
  183. return -ENODEV;
  184. }
  185. omap2430_musb_resume(musb);
  186. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  187. l &= ~ENABLEWAKEUP; /* disable wakeup */
  188. l &= ~NOSTDBY; /* remove possible nostdby */
  189. l |= SMARTSTDBY; /* enable smart standby */
  190. l &= ~AUTOIDLE; /* disable auto idle */
  191. l &= ~NOIDLE; /* remove possible noidle */
  192. l |= SMARTIDLE; /* enable smart idle */
  193. /*
  194. * MUSB AUTOIDLE don't work in 3430.
  195. * Workaround by Richard Woodruff/TI
  196. */
  197. if (!cpu_is_omap3430())
  198. l |= AUTOIDLE; /* enable auto idle */
  199. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  200. l = musb_readl(musb->mregs, OTG_INTERFSEL);
  201. if (data->interface_type == MUSB_INTERFACE_UTMI) {
  202. /* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
  203. l &= ~ULPI_12PIN; /* Disable ULPI */
  204. l |= UTMI_8BIT; /* Enable UTMI */
  205. } else {
  206. l |= ULPI_12PIN;
  207. }
  208. musb_writel(musb->mregs, OTG_INTERFSEL, l);
  209. pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
  210. "sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
  211. musb_readl(musb->mregs, OTG_REVISION),
  212. musb_readl(musb->mregs, OTG_SYSCONFIG),
  213. musb_readl(musb->mregs, OTG_SYSSTATUS),
  214. musb_readl(musb->mregs, OTG_INTERFSEL),
  215. musb_readl(musb->mregs, OTG_SIMENABLE));
  216. if (is_host_enabled(musb))
  217. musb->board_set_vbus = omap2430_musb_set_vbus;
  218. setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
  219. return 0;
  220. }
  221. #ifdef CONFIG_PM
  222. void musb_platform_save_context(struct musb *musb,
  223. struct musb_context_registers *musb_context)
  224. {
  225. musb_context->otg_sysconfig = musb_readl(musb->mregs, OTG_SYSCONFIG);
  226. musb_context->otg_forcestandby = musb_readl(musb->mregs, OTG_FORCESTDBY);
  227. }
  228. void musb_platform_restore_context(struct musb *musb,
  229. struct musb_context_registers *musb_context)
  230. {
  231. musb_writel(musb->mregs, OTG_SYSCONFIG, musb_context->otg_sysconfig);
  232. musb_writel(musb->mregs, OTG_FORCESTDBY, musb_context->otg_forcestandby);
  233. }
  234. #endif
  235. static int omap2430_musb_suspend(struct musb *musb)
  236. {
  237. u32 l;
  238. /* in any role */
  239. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  240. l |= ENABLEFORCE; /* enable MSTANDBY */
  241. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  242. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  243. l |= ENABLEWAKEUP; /* enable wakeup */
  244. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  245. otg_set_suspend(musb->xceiv, 1);
  246. return 0;
  247. }
  248. static int omap2430_musb_resume(struct musb *musb)
  249. {
  250. u32 l;
  251. otg_set_suspend(musb->xceiv, 0);
  252. l = musb_readl(musb->mregs, OTG_SYSCONFIG);
  253. l &= ~ENABLEWAKEUP; /* disable wakeup */
  254. musb_writel(musb->mregs, OTG_SYSCONFIG, l);
  255. l = musb_readl(musb->mregs, OTG_FORCESTDBY);
  256. l &= ~ENABLEFORCE; /* disable MSTANDBY */
  257. musb_writel(musb->mregs, OTG_FORCESTDBY, l);
  258. return 0;
  259. }
  260. static int omap2430_musb_exit(struct musb *musb)
  261. {
  262. omap2430_musb_suspend(musb);
  263. otg_put_transceiver(musb->xceiv);
  264. return 0;
  265. }
  266. static const struct musb_platform_ops omap2430_ops = {
  267. .init = omap2430_musb_init,
  268. .exit = omap2430_musb_exit,
  269. .suspend = omap2430_musb_suspend,
  270. .resume = omap2430_musb_resume,
  271. .enable = omap2430_musb_enable,
  272. .disable = omap2430_musb_disable,
  273. .set_mode = omap2430_musb_set_mode,
  274. .try_idle = omap2430_musb_try_idle,
  275. .set_vbus = omap2430_musb_set_vbus,
  276. };
  277. static u64 omap2430_dmamask = DMA_BIT_MASK(32);
  278. static int __init omap2430_probe(struct platform_device *pdev)
  279. {
  280. struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
  281. struct platform_device *musb;
  282. struct omap2430_glue *glue;
  283. struct clk *clk;
  284. int ret = -ENOMEM;
  285. glue = kzalloc(sizeof(*glue), GFP_KERNEL);
  286. if (!glue) {
  287. dev_err(&pdev->dev, "failed to allocate glue context\n");
  288. goto err0;
  289. }
  290. musb = platform_device_alloc("musb-hdrc", -1);
  291. if (!musb) {
  292. dev_err(&pdev->dev, "failed to allocate musb device\n");
  293. goto err1;
  294. }
  295. clk = clk_get(&pdev->dev, "ick");
  296. if (IS_ERR(clk)) {
  297. dev_err(&pdev->dev, "failed to get clock\n");
  298. ret = PTR_ERR(clk);
  299. goto err2;
  300. }
  301. ret = clk_enable(clk);
  302. if (ret) {
  303. dev_err(&pdev->dev, "failed to enable clock\n");
  304. goto err3;
  305. }
  306. musb->dev.parent = &pdev->dev;
  307. musb->dev.dma_mask = &omap2430_dmamask;
  308. musb->dev.coherent_dma_mask = omap2430_dmamask;
  309. glue->dev = &pdev->dev;
  310. glue->musb = musb;
  311. glue->clk = clk;
  312. pdata->platform_ops = &omap2430_ops;
  313. platform_set_drvdata(pdev, glue);
  314. ret = platform_device_add_resources(musb, pdev->resource,
  315. pdev->num_resources);
  316. if (ret) {
  317. dev_err(&pdev->dev, "failed to add resources\n");
  318. goto err4;
  319. }
  320. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  321. if (ret) {
  322. dev_err(&pdev->dev, "failed to add platform_data\n");
  323. goto err4;
  324. }
  325. ret = platform_device_add(musb);
  326. if (ret) {
  327. dev_err(&pdev->dev, "failed to register musb device\n");
  328. goto err4;
  329. }
  330. return 0;
  331. err4:
  332. clk_disable(clk);
  333. err3:
  334. clk_put(clk);
  335. err2:
  336. platform_device_put(musb);
  337. err1:
  338. kfree(glue);
  339. err0:
  340. return ret;
  341. }
  342. static int __exit omap2430_remove(struct platform_device *pdev)
  343. {
  344. struct omap2430_glue *glue = platform_get_drvdata(pdev);
  345. platform_device_del(glue->musb);
  346. platform_device_put(glue->musb);
  347. clk_disable(glue->clk);
  348. clk_put(glue->clk);
  349. kfree(glue);
  350. return 0;
  351. }
  352. static struct platform_driver omap2430_driver = {
  353. .remove = __exit_p(omap2430_remove),
  354. .driver = {
  355. .name = "musb-omap2430",
  356. },
  357. };
  358. MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
  359. MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
  360. MODULE_LICENSE("GPL v2");
  361. static int __init omap2430_init(void)
  362. {
  363. return platform_driver_probe(&omap2430_driver, omap2430_probe);
  364. }
  365. subsys_initcall(omap2430_init);
  366. static void __exit omap2430_exit(void)
  367. {
  368. platform_driver_unregister(&omap2430_driver);
  369. }
  370. module_exit(omap2430_exit);