w6692.c 35 KB

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  1. /*
  2. * w6692.c mISDN driver for Winbond w6692 based cards
  3. *
  4. * Author Karsten Keil <kkeil@suse.de>
  5. * based on the w6692 I4L driver from Petr Novak <petr.novak@i.cz>
  6. *
  7. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21. *
  22. */
  23. #include <linux/interrupt.h>
  24. #include <linux/module.h>
  25. #include <linux/pci.h>
  26. #include <linux/delay.h>
  27. #include <linux/mISDNhw.h>
  28. #include <linux/slab.h>
  29. #include "w6692.h"
  30. #define W6692_REV "2.0"
  31. #define DBUSY_TIMER_VALUE 80
  32. enum {
  33. W6692_ASUS,
  34. W6692_WINBOND,
  35. W6692_USR
  36. };
  37. /* private data in the PCI devices list */
  38. struct w6692map {
  39. u_int subtype;
  40. char *name;
  41. };
  42. static const struct w6692map w6692_map[] =
  43. {
  44. {W6692_ASUS, "Dynalink/AsusCom IS64PH"},
  45. {W6692_WINBOND, "Winbond W6692"},
  46. {W6692_USR, "USR W6692"}
  47. };
  48. #ifndef PCI_VENDOR_ID_USR
  49. #define PCI_VENDOR_ID_USR 0x16ec
  50. #define PCI_DEVICE_ID_USR_6692 0x3409
  51. #endif
  52. struct w6692_ch {
  53. struct bchannel bch;
  54. u32 addr;
  55. struct timer_list timer;
  56. u8 b_mode;
  57. };
  58. struct w6692_hw {
  59. struct list_head list;
  60. struct pci_dev *pdev;
  61. char name[MISDN_MAX_IDLEN];
  62. u32 irq;
  63. u32 irqcnt;
  64. u32 addr;
  65. u32 fmask; /* feature mask - bit set per card nr */
  66. int subtype;
  67. spinlock_t lock; /* hw lock */
  68. u8 imask;
  69. u8 pctl;
  70. u8 xaddr;
  71. u8 xdata;
  72. u8 state;
  73. struct w6692_ch bc[2];
  74. struct dchannel dch;
  75. char log[64];
  76. };
  77. static LIST_HEAD(Cards);
  78. static DEFINE_RWLOCK(card_lock); /* protect Cards */
  79. static int w6692_cnt;
  80. static int debug;
  81. static u32 led;
  82. static u32 pots;
  83. static void
  84. _set_debug(struct w6692_hw *card)
  85. {
  86. card->dch.debug = debug;
  87. card->bc[0].bch.debug = debug;
  88. card->bc[1].bch.debug = debug;
  89. }
  90. static int
  91. set_debug(const char *val, struct kernel_param *kp)
  92. {
  93. int ret;
  94. struct w6692_hw *card;
  95. ret = param_set_uint(val, kp);
  96. if (!ret) {
  97. read_lock(&card_lock);
  98. list_for_each_entry(card, &Cards, list)
  99. _set_debug(card);
  100. read_unlock(&card_lock);
  101. }
  102. return ret;
  103. }
  104. MODULE_AUTHOR("Karsten Keil");
  105. MODULE_LICENSE("GPL v2");
  106. MODULE_VERSION(W6692_REV);
  107. module_param_call(debug, set_debug, param_get_uint, &debug, S_IRUGO | S_IWUSR);
  108. MODULE_PARM_DESC(debug, "W6692 debug mask");
  109. module_param(led, uint, S_IRUGO | S_IWUSR);
  110. MODULE_PARM_DESC(led, "W6692 LED support bitmask (one bit per card)");
  111. module_param(pots, uint, S_IRUGO | S_IWUSR);
  112. MODULE_PARM_DESC(pots, "W6692 POTS support bitmask (one bit per card)");
  113. static inline u8
  114. ReadW6692(struct w6692_hw *card, u8 offset)
  115. {
  116. return inb(card->addr + offset);
  117. }
  118. static inline void
  119. WriteW6692(struct w6692_hw *card, u8 offset, u8 value)
  120. {
  121. outb(value, card->addr + offset);
  122. }
  123. static inline u8
  124. ReadW6692B(struct w6692_ch *bc, u8 offset)
  125. {
  126. return inb(bc->addr + offset);
  127. }
  128. static inline void
  129. WriteW6692B(struct w6692_ch *bc, u8 offset, u8 value)
  130. {
  131. outb(value, bc->addr + offset);
  132. }
  133. static void
  134. enable_hwirq(struct w6692_hw *card)
  135. {
  136. WriteW6692(card, W_IMASK, card->imask);
  137. }
  138. static void
  139. disable_hwirq(struct w6692_hw *card)
  140. {
  141. WriteW6692(card, W_IMASK, 0xff);
  142. }
  143. static const char *W6692Ver[] = {"V00", "V01", "V10", "V11"};
  144. static void
  145. W6692Version(struct w6692_hw *card)
  146. {
  147. int val;
  148. val = ReadW6692(card, W_D_RBCH);
  149. pr_notice("%s: Winbond W6692 version: %s\n", card->name,
  150. W6692Ver[(val >> 6) & 3]);
  151. }
  152. static void
  153. w6692_led_handler(struct w6692_hw *card, int on)
  154. {
  155. if ((!(card->fmask & led)) || card->subtype == W6692_USR)
  156. return;
  157. if (on) {
  158. card->xdata &= 0xfb; /* LED ON */
  159. WriteW6692(card, W_XDATA, card->xdata);
  160. } else {
  161. card->xdata |= 0x04; /* LED OFF */
  162. WriteW6692(card, W_XDATA, card->xdata);
  163. }
  164. }
  165. static void
  166. ph_command(struct w6692_hw *card, u8 cmd)
  167. {
  168. pr_debug("%s: ph_command %x\n", card->name, cmd);
  169. WriteW6692(card, W_CIX, cmd);
  170. }
  171. static void
  172. W6692_new_ph(struct w6692_hw *card)
  173. {
  174. if (card->state == W_L1CMD_RST)
  175. ph_command(card, W_L1CMD_DRC);
  176. schedule_event(&card->dch, FLG_PHCHANGE);
  177. }
  178. static void
  179. W6692_ph_bh(struct dchannel *dch)
  180. {
  181. struct w6692_hw *card = dch->hw;
  182. switch (card->state) {
  183. case W_L1CMD_RST:
  184. dch->state = 0;
  185. l1_event(dch->l1, HW_RESET_IND);
  186. break;
  187. case W_L1IND_CD:
  188. dch->state = 3;
  189. l1_event(dch->l1, HW_DEACT_CNF);
  190. break;
  191. case W_L1IND_DRD:
  192. dch->state = 3;
  193. l1_event(dch->l1, HW_DEACT_IND);
  194. break;
  195. case W_L1IND_CE:
  196. dch->state = 4;
  197. l1_event(dch->l1, HW_POWERUP_IND);
  198. break;
  199. case W_L1IND_LD:
  200. if (dch->state <= 5) {
  201. dch->state = 5;
  202. l1_event(dch->l1, ANYSIGNAL);
  203. } else {
  204. dch->state = 8;
  205. l1_event(dch->l1, LOSTFRAMING);
  206. }
  207. break;
  208. case W_L1IND_ARD:
  209. dch->state = 6;
  210. l1_event(dch->l1, INFO2);
  211. break;
  212. case W_L1IND_AI8:
  213. dch->state = 7;
  214. l1_event(dch->l1, INFO4_P8);
  215. break;
  216. case W_L1IND_AI10:
  217. dch->state = 7;
  218. l1_event(dch->l1, INFO4_P10);
  219. break;
  220. default:
  221. pr_debug("%s: TE unknown state %02x dch state %02x\n",
  222. card->name, card->state, dch->state);
  223. break;
  224. }
  225. pr_debug("%s: TE newstate %02x\n", card->name, dch->state);
  226. }
  227. static void
  228. W6692_empty_Dfifo(struct w6692_hw *card, int count)
  229. {
  230. struct dchannel *dch = &card->dch;
  231. u8 *ptr;
  232. pr_debug("%s: empty_Dfifo %d\n", card->name, count);
  233. if (!dch->rx_skb) {
  234. dch->rx_skb = mI_alloc_skb(card->dch.maxlen, GFP_ATOMIC);
  235. if (!dch->rx_skb) {
  236. pr_info("%s: D receive out of memory\n", card->name);
  237. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  238. return;
  239. }
  240. }
  241. if ((dch->rx_skb->len + count) >= dch->maxlen) {
  242. pr_debug("%s: empty_Dfifo overrun %d\n", card->name,
  243. dch->rx_skb->len + count);
  244. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  245. return;
  246. }
  247. ptr = skb_put(dch->rx_skb, count);
  248. insb(card->addr + W_D_RFIFO, ptr, count);
  249. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK);
  250. if (debug & DEBUG_HW_DFIFO) {
  251. snprintf(card->log, 63, "D-recv %s %d ",
  252. card->name, count);
  253. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  254. }
  255. }
  256. static void
  257. W6692_fill_Dfifo(struct w6692_hw *card)
  258. {
  259. struct dchannel *dch = &card->dch;
  260. int count;
  261. u8 *ptr;
  262. u8 cmd = W_D_CMDR_XMS;
  263. pr_debug("%s: fill_Dfifo\n", card->name);
  264. if (!dch->tx_skb)
  265. return;
  266. count = dch->tx_skb->len - dch->tx_idx;
  267. if (count <= 0)
  268. return;
  269. if (count > W_D_FIFO_THRESH)
  270. count = W_D_FIFO_THRESH;
  271. else
  272. cmd |= W_D_CMDR_XME;
  273. ptr = dch->tx_skb->data + dch->tx_idx;
  274. dch->tx_idx += count;
  275. outsb(card->addr + W_D_XFIFO, ptr, count);
  276. WriteW6692(card, W_D_CMDR, cmd);
  277. if (test_and_set_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  278. pr_debug("%s: fill_Dfifo dbusytimer running\n", card->name);
  279. del_timer(&dch->timer);
  280. }
  281. init_timer(&dch->timer);
  282. dch->timer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ) / 1000);
  283. add_timer(&dch->timer);
  284. if (debug & DEBUG_HW_DFIFO) {
  285. snprintf(card->log, 63, "D-send %s %d ",
  286. card->name, count);
  287. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  288. }
  289. }
  290. static void
  291. d_retransmit(struct w6692_hw *card)
  292. {
  293. struct dchannel *dch = &card->dch;
  294. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  295. del_timer(&dch->timer);
  296. #ifdef FIXME
  297. if (test_and_clear_bit(FLG_L1_BUSY, &dch->Flags))
  298. dchannel_sched_event(dch, D_CLEARBUSY);
  299. #endif
  300. if (test_bit(FLG_TX_BUSY, &dch->Flags)) {
  301. /* Restart frame */
  302. dch->tx_idx = 0;
  303. W6692_fill_Dfifo(card);
  304. } else if (dch->tx_skb) { /* should not happen */
  305. pr_info("%s: %s without TX_BUSY\n", card->name, __func__);
  306. test_and_set_bit(FLG_TX_BUSY, &dch->Flags);
  307. dch->tx_idx = 0;
  308. W6692_fill_Dfifo(card);
  309. } else {
  310. pr_info("%s: XDU no TX_BUSY\n", card->name);
  311. if (get_next_dframe(dch))
  312. W6692_fill_Dfifo(card);
  313. }
  314. }
  315. static void
  316. handle_rxD(struct w6692_hw *card) {
  317. u8 stat;
  318. int count;
  319. stat = ReadW6692(card, W_D_RSTA);
  320. if (stat & (W_D_RSTA_RDOV | W_D_RSTA_CRCE | W_D_RSTA_RMB)) {
  321. if (stat & W_D_RSTA_RDOV) {
  322. pr_debug("%s: D-channel RDOV\n", card->name);
  323. #ifdef ERROR_STATISTIC
  324. card->dch.err_rx++;
  325. #endif
  326. }
  327. if (stat & W_D_RSTA_CRCE) {
  328. pr_debug("%s: D-channel CRC error\n", card->name);
  329. #ifdef ERROR_STATISTIC
  330. card->dch.err_crc++;
  331. #endif
  332. }
  333. if (stat & W_D_RSTA_RMB) {
  334. pr_debug("%s: D-channel ABORT\n", card->name);
  335. #ifdef ERROR_STATISTIC
  336. card->dch.err_rx++;
  337. #endif
  338. }
  339. if (card->dch.rx_skb)
  340. dev_kfree_skb(card->dch.rx_skb);
  341. card->dch.rx_skb = NULL;
  342. WriteW6692(card, W_D_CMDR, W_D_CMDR_RACK | W_D_CMDR_RRST);
  343. } else {
  344. count = ReadW6692(card, W_D_RBCL) & (W_D_FIFO_THRESH - 1);
  345. if (count == 0)
  346. count = W_D_FIFO_THRESH;
  347. W6692_empty_Dfifo(card, count);
  348. recv_Dchannel(&card->dch);
  349. }
  350. }
  351. static void
  352. handle_txD(struct w6692_hw *card) {
  353. if (test_and_clear_bit(FLG_BUSY_TIMER, &card->dch.Flags))
  354. del_timer(&card->dch.timer);
  355. if (card->dch.tx_skb && card->dch.tx_idx < card->dch.tx_skb->len) {
  356. W6692_fill_Dfifo(card);
  357. } else {
  358. if (card->dch.tx_skb)
  359. dev_kfree_skb(card->dch.tx_skb);
  360. if (get_next_dframe(&card->dch))
  361. W6692_fill_Dfifo(card);
  362. }
  363. }
  364. static void
  365. handle_statusD(struct w6692_hw *card)
  366. {
  367. struct dchannel *dch = &card->dch;
  368. u8 exval, v1, cir;
  369. exval = ReadW6692(card, W_D_EXIR);
  370. pr_debug("%s: D_EXIR %02x\n", card->name, exval);
  371. if (exval & (W_D_EXI_XDUN | W_D_EXI_XCOL)) {
  372. /* Transmit underrun/collision */
  373. pr_debug("%s: D-channel underrun/collision\n", card->name);
  374. #ifdef ERROR_STATISTIC
  375. dch->err_tx++;
  376. #endif
  377. d_retransmit(card);
  378. }
  379. if (exval & W_D_EXI_RDOV) { /* RDOV */
  380. pr_debug("%s: D-channel RDOV\n", card->name);
  381. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST);
  382. }
  383. if (exval & W_D_EXI_TIN2) /* TIN2 - never */
  384. pr_debug("%s: spurious TIN2 interrupt\n", card->name);
  385. if (exval & W_D_EXI_MOC) { /* MOC - not supported */
  386. v1 = ReadW6692(card, W_MOSR);
  387. pr_debug("%s: spurious MOC interrupt MOSR %02x\n",
  388. card->name, v1);
  389. }
  390. if (exval & W_D_EXI_ISC) { /* ISC - Level1 change */
  391. cir = ReadW6692(card, W_CIR);
  392. pr_debug("%s: ISC CIR %02X\n", card->name, cir);
  393. if (cir & W_CIR_ICC) {
  394. v1 = cir & W_CIR_COD_MASK;
  395. pr_debug("%s: ph_state_change %x -> %x\n", card->name,
  396. dch->state, v1);
  397. card->state = v1;
  398. if (card->fmask & led) {
  399. switch (v1) {
  400. case W_L1IND_AI8:
  401. case W_L1IND_AI10:
  402. w6692_led_handler(card, 1);
  403. break;
  404. default:
  405. w6692_led_handler(card, 0);
  406. break;
  407. }
  408. }
  409. W6692_new_ph(card);
  410. }
  411. if (cir & W_CIR_SCC) {
  412. v1 = ReadW6692(card, W_SQR);
  413. pr_debug("%s: SCC SQR %02X\n", card->name, v1);
  414. }
  415. }
  416. if (exval & W_D_EXI_WEXP)
  417. pr_debug("%s: spurious WEXP interrupt!\n", card->name);
  418. if (exval & W_D_EXI_TEXP)
  419. pr_debug("%s: spurious TEXP interrupt!\n", card->name);
  420. }
  421. static void
  422. W6692_empty_Bfifo(struct w6692_ch *wch, int count)
  423. {
  424. struct w6692_hw *card = wch->bch.hw;
  425. u8 *ptr;
  426. int maxlen;
  427. pr_debug("%s: empty_Bfifo %d\n", card->name, count);
  428. if (unlikely(wch->bch.state == ISDN_P_NONE)) {
  429. pr_debug("%s: empty_Bfifo ISDN_P_NONE\n", card->name);
  430. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  431. if (wch->bch.rx_skb)
  432. skb_trim(wch->bch.rx_skb, 0);
  433. return;
  434. }
  435. maxlen = bchannel_get_rxbuf(&wch->bch, count);
  436. if (maxlen < 0) {
  437. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  438. if (wch->bch.rx_skb)
  439. skb_trim(wch->bch.rx_skb, 0);
  440. pr_warning("%s.B%d: No bufferspace for %d bytes\n",
  441. card->name, wch->bch.nr, count);
  442. return;
  443. }
  444. ptr = skb_put(wch->bch.rx_skb, count);
  445. insb(wch->addr + W_B_RFIFO, ptr, count);
  446. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RACT);
  447. if (debug & DEBUG_HW_DFIFO) {
  448. snprintf(card->log, 63, "B%1d-recv %s %d ",
  449. wch->bch.nr, card->name, count);
  450. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  451. }
  452. }
  453. static void
  454. W6692_fill_Bfifo(struct w6692_ch *wch)
  455. {
  456. struct w6692_hw *card = wch->bch.hw;
  457. int count;
  458. u8 *ptr, cmd = W_B_CMDR_RACT | W_B_CMDR_XMS;
  459. pr_debug("%s: fill Bfifo\n", card->name);
  460. if (!wch->bch.tx_skb)
  461. return;
  462. count = wch->bch.tx_skb->len - wch->bch.tx_idx;
  463. if (count <= 0)
  464. return;
  465. ptr = wch->bch.tx_skb->data + wch->bch.tx_idx;
  466. if (count > W_B_FIFO_THRESH)
  467. count = W_B_FIFO_THRESH;
  468. else if (test_bit(FLG_HDLC, &wch->bch.Flags))
  469. cmd |= W_B_CMDR_XME;
  470. pr_debug("%s: fill Bfifo%d/%d\n", card->name,
  471. count, wch->bch.tx_idx);
  472. wch->bch.tx_idx += count;
  473. outsb(wch->addr + W_B_XFIFO, ptr, count);
  474. WriteW6692B(wch, W_B_CMDR, cmd);
  475. if (debug & DEBUG_HW_DFIFO) {
  476. snprintf(card->log, 63, "B%1d-send %s %d ",
  477. wch->bch.nr, card->name, count);
  478. print_hex_dump_bytes(card->log, DUMP_PREFIX_OFFSET, ptr, count);
  479. }
  480. }
  481. #if 0
  482. static int
  483. setvolume(struct w6692_ch *wch, int mic, struct sk_buff *skb)
  484. {
  485. struct w6692_hw *card = wch->bch.hw;
  486. u16 *vol = (u16 *)skb->data;
  487. u8 val;
  488. if ((!(card->fmask & pots)) ||
  489. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  490. return -ENODEV;
  491. if (skb->len < 2)
  492. return -EINVAL;
  493. if (*vol > 7)
  494. return -EINVAL;
  495. val = *vol & 7;
  496. val = 7 - val;
  497. if (mic) {
  498. val <<= 3;
  499. card->xaddr &= 0xc7;
  500. } else {
  501. card->xaddr &= 0xf8;
  502. }
  503. card->xaddr |= val;
  504. WriteW6692(card, W_XADDR, card->xaddr);
  505. return 0;
  506. }
  507. static int
  508. enable_pots(struct w6692_ch *wch)
  509. {
  510. struct w6692_hw *card = wch->bch.hw;
  511. if ((!(card->fmask & pots)) ||
  512. !test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  513. return -ENODEV;
  514. wch->b_mode |= W_B_MODE_EPCM | W_B_MODE_BSW0;
  515. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  516. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  517. card->pctl |= ((wch->bch.nr & 2) ? W_PCTL_PCX : 0);
  518. WriteW6692(card, W_PCTL, card->pctl);
  519. return 0;
  520. }
  521. #endif
  522. static int
  523. disable_pots(struct w6692_ch *wch)
  524. {
  525. struct w6692_hw *card = wch->bch.hw;
  526. if (!(card->fmask & pots))
  527. return -ENODEV;
  528. wch->b_mode &= ~(W_B_MODE_EPCM | W_B_MODE_BSW0);
  529. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  530. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  531. W_B_CMDR_XRST);
  532. return 0;
  533. }
  534. static int
  535. w6692_mode(struct w6692_ch *wch, u32 pr)
  536. {
  537. struct w6692_hw *card;
  538. card = wch->bch.hw;
  539. pr_debug("%s: B%d protocol %x-->%x\n", card->name,
  540. wch->bch.nr, wch->bch.state, pr);
  541. switch (pr) {
  542. case ISDN_P_NONE:
  543. if ((card->fmask & pots) && (wch->b_mode & W_B_MODE_EPCM))
  544. disable_pots(wch);
  545. wch->b_mode = 0;
  546. mISDN_clear_bchannel(&wch->bch);
  547. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  548. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  549. test_and_clear_bit(FLG_HDLC, &wch->bch.Flags);
  550. test_and_clear_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  551. break;
  552. case ISDN_P_B_RAW:
  553. wch->b_mode = W_B_MODE_MMS;
  554. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  555. WriteW6692B(wch, W_B_EXIM, 0);
  556. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  557. W_B_CMDR_XRST);
  558. test_and_set_bit(FLG_TRANSPARENT, &wch->bch.Flags);
  559. break;
  560. case ISDN_P_B_HDLC:
  561. wch->b_mode = W_B_MODE_ITF;
  562. WriteW6692B(wch, W_B_MODE, wch->b_mode);
  563. WriteW6692B(wch, W_B_ADM1, 0xff);
  564. WriteW6692B(wch, W_B_ADM2, 0xff);
  565. WriteW6692B(wch, W_B_EXIM, 0);
  566. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_RACT |
  567. W_B_CMDR_XRST);
  568. test_and_set_bit(FLG_HDLC, &wch->bch.Flags);
  569. break;
  570. default:
  571. pr_info("%s: protocol %x not known\n", card->name, pr);
  572. return -ENOPROTOOPT;
  573. }
  574. wch->bch.state = pr;
  575. return 0;
  576. }
  577. static void
  578. send_next(struct w6692_ch *wch)
  579. {
  580. if (wch->bch.tx_skb && wch->bch.tx_idx < wch->bch.tx_skb->len) {
  581. W6692_fill_Bfifo(wch);
  582. } else {
  583. if (wch->bch.tx_skb)
  584. dev_kfree_skb(wch->bch.tx_skb);
  585. if (get_next_bframe(&wch->bch))
  586. W6692_fill_Bfifo(wch);
  587. }
  588. }
  589. static void
  590. W6692B_interrupt(struct w6692_hw *card, int ch)
  591. {
  592. struct w6692_ch *wch = &card->bc[ch];
  593. int count;
  594. u8 stat, star = 0;
  595. stat = ReadW6692B(wch, W_B_EXIR);
  596. pr_debug("%s: B%d EXIR %02x\n", card->name, wch->bch.nr, stat);
  597. if (stat & W_B_EXI_RME) {
  598. star = ReadW6692B(wch, W_B_STAR);
  599. if (star & (W_B_STAR_RDOV | W_B_STAR_CRCE | W_B_STAR_RMB)) {
  600. if ((star & W_B_STAR_RDOV) &&
  601. test_bit(FLG_ACTIVE, &wch->bch.Flags)) {
  602. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  603. wch->bch.nr, wch->bch.state);
  604. #ifdef ERROR_STATISTIC
  605. wch->bch.err_rdo++;
  606. #endif
  607. }
  608. if (test_bit(FLG_HDLC, &wch->bch.Flags)) {
  609. if (star & W_B_STAR_CRCE) {
  610. pr_debug("%s: B%d CRC error\n",
  611. card->name, wch->bch.nr);
  612. #ifdef ERROR_STATISTIC
  613. wch->bch.err_crc++;
  614. #endif
  615. }
  616. if (star & W_B_STAR_RMB) {
  617. pr_debug("%s: B%d message abort\n",
  618. card->name, wch->bch.nr);
  619. #ifdef ERROR_STATISTIC
  620. wch->bch.err_inv++;
  621. #endif
  622. }
  623. }
  624. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  625. W_B_CMDR_RRST | W_B_CMDR_RACT);
  626. if (wch->bch.rx_skb)
  627. skb_trim(wch->bch.rx_skb, 0);
  628. } else {
  629. count = ReadW6692B(wch, W_B_RBCL) &
  630. (W_B_FIFO_THRESH - 1);
  631. if (count == 0)
  632. count = W_B_FIFO_THRESH;
  633. W6692_empty_Bfifo(wch, count);
  634. recv_Bchannel(&wch->bch, 0, false);
  635. }
  636. }
  637. if (stat & W_B_EXI_RMR) {
  638. if (!(stat & W_B_EXI_RME))
  639. star = ReadW6692B(wch, W_B_STAR);
  640. if (star & W_B_STAR_RDOV) {
  641. pr_debug("%s: B%d RDOV proto=%x\n", card->name,
  642. wch->bch.nr, wch->bch.state);
  643. #ifdef ERROR_STATISTIC
  644. wch->bch.err_rdo++;
  645. #endif
  646. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  647. W_B_CMDR_RRST | W_B_CMDR_RACT);
  648. } else {
  649. W6692_empty_Bfifo(wch, W_B_FIFO_THRESH);
  650. if (test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  651. recv_Bchannel(&wch->bch, 0, false);
  652. }
  653. }
  654. if (stat & W_B_EXI_RDOV) {
  655. /* only if it is not handled yet */
  656. if (!(star & W_B_STAR_RDOV)) {
  657. pr_debug("%s: B%d RDOV IRQ proto=%x\n", card->name,
  658. wch->bch.nr, wch->bch.state);
  659. #ifdef ERROR_STATISTIC
  660. wch->bch.err_rdo++;
  661. #endif
  662. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_RACK |
  663. W_B_CMDR_RRST | W_B_CMDR_RACT);
  664. }
  665. }
  666. if (stat & W_B_EXI_XFR) {
  667. if (!(stat & (W_B_EXI_RME | W_B_EXI_RMR))) {
  668. star = ReadW6692B(wch, W_B_STAR);
  669. pr_debug("%s: B%d star %02x\n", card->name,
  670. wch->bch.nr, star);
  671. }
  672. if (star & W_B_STAR_XDOW) {
  673. pr_debug("%s: B%d XDOW proto=%x\n", card->name,
  674. wch->bch.nr, wch->bch.state);
  675. #ifdef ERROR_STATISTIC
  676. wch->bch.err_xdu++;
  677. #endif
  678. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST |
  679. W_B_CMDR_RACT);
  680. /* resend */
  681. if (wch->bch.tx_skb) {
  682. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  683. wch->bch.tx_idx = 0;
  684. }
  685. }
  686. send_next(wch);
  687. if (stat & W_B_EXI_XDUN)
  688. return; /* handle XDOW only once */
  689. }
  690. if (stat & W_B_EXI_XDUN) {
  691. pr_debug("%s: B%d XDUN proto=%x\n", card->name,
  692. wch->bch.nr, wch->bch.state);
  693. #ifdef ERROR_STATISTIC
  694. wch->bch.err_xdu++;
  695. #endif
  696. WriteW6692B(wch, W_B_CMDR, W_B_CMDR_XRST | W_B_CMDR_RACT);
  697. /* resend */
  698. if (wch->bch.tx_skb) {
  699. if (!test_bit(FLG_TRANSPARENT, &wch->bch.Flags))
  700. wch->bch.tx_idx = 0;
  701. }
  702. send_next(wch);
  703. }
  704. }
  705. static irqreturn_t
  706. w6692_irq(int intno, void *dev_id)
  707. {
  708. struct w6692_hw *card = dev_id;
  709. u8 ista;
  710. spin_lock(&card->lock);
  711. ista = ReadW6692(card, W_ISTA);
  712. if ((ista | card->imask) == card->imask) {
  713. /* possible a shared IRQ reqest */
  714. spin_unlock(&card->lock);
  715. return IRQ_NONE;
  716. }
  717. card->irqcnt++;
  718. pr_debug("%s: ista %02x\n", card->name, ista);
  719. ista &= ~card->imask;
  720. if (ista & W_INT_B1_EXI)
  721. W6692B_interrupt(card, 0);
  722. if (ista & W_INT_B2_EXI)
  723. W6692B_interrupt(card, 1);
  724. if (ista & W_INT_D_RME)
  725. handle_rxD(card);
  726. if (ista & W_INT_D_RMR)
  727. W6692_empty_Dfifo(card, W_D_FIFO_THRESH);
  728. if (ista & W_INT_D_XFR)
  729. handle_txD(card);
  730. if (ista & W_INT_D_EXI)
  731. handle_statusD(card);
  732. if (ista & (W_INT_XINT0 | W_INT_XINT1)) /* XINT0/1 - never */
  733. pr_debug("%s: W6692 spurious XINT!\n", card->name);
  734. /* End IRQ Handler */
  735. spin_unlock(&card->lock);
  736. return IRQ_HANDLED;
  737. }
  738. static void
  739. dbusy_timer_handler(struct dchannel *dch)
  740. {
  741. struct w6692_hw *card = dch->hw;
  742. int rbch, star;
  743. u_long flags;
  744. if (test_bit(FLG_BUSY_TIMER, &dch->Flags)) {
  745. spin_lock_irqsave(&card->lock, flags);
  746. rbch = ReadW6692(card, W_D_RBCH);
  747. star = ReadW6692(card, W_D_STAR);
  748. pr_debug("%s: D-Channel Busy RBCH %02x STAR %02x\n",
  749. card->name, rbch, star);
  750. if (star & W_D_STAR_XBZ) /* D-Channel Busy */
  751. test_and_set_bit(FLG_L1_BUSY, &dch->Flags);
  752. else {
  753. /* discard frame; reset transceiver */
  754. test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags);
  755. if (dch->tx_idx)
  756. dch->tx_idx = 0;
  757. else
  758. pr_info("%s: W6692 D-Channel Busy no tx_idx\n",
  759. card->name);
  760. /* Transmitter reset */
  761. WriteW6692(card, W_D_CMDR, W_D_CMDR_XRST);
  762. }
  763. spin_unlock_irqrestore(&card->lock, flags);
  764. }
  765. }
  766. void initW6692(struct w6692_hw *card)
  767. {
  768. u8 val;
  769. card->dch.timer.function = (void *)dbusy_timer_handler;
  770. card->dch.timer.data = (u_long)&card->dch;
  771. init_timer(&card->dch.timer);
  772. w6692_mode(&card->bc[0], ISDN_P_NONE);
  773. w6692_mode(&card->bc[1], ISDN_P_NONE);
  774. WriteW6692(card, W_D_CTL, 0x00);
  775. disable_hwirq(card);
  776. WriteW6692(card, W_D_SAM, 0xff);
  777. WriteW6692(card, W_D_TAM, 0xff);
  778. WriteW6692(card, W_D_MODE, W_D_MODE_RACT);
  779. card->state = W_L1CMD_RST;
  780. ph_command(card, W_L1CMD_RST);
  781. ph_command(card, W_L1CMD_ECK);
  782. /* enable all IRQ but extern */
  783. card->imask = 0x18;
  784. WriteW6692(card, W_D_EXIM, 0x00);
  785. WriteW6692B(&card->bc[0], W_B_EXIM, 0);
  786. WriteW6692B(&card->bc[1], W_B_EXIM, 0);
  787. /* Reset D-chan receiver and transmitter */
  788. WriteW6692(card, W_D_CMDR, W_D_CMDR_RRST | W_D_CMDR_XRST);
  789. /* Reset B-chan receiver and transmitter */
  790. WriteW6692B(&card->bc[0], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  791. WriteW6692B(&card->bc[1], W_B_CMDR, W_B_CMDR_RRST | W_B_CMDR_XRST);
  792. /* enable peripheral */
  793. if (card->subtype == W6692_USR) {
  794. /* seems that USR implemented some power control features
  795. * Pin 79 is connected to the oscilator circuit so we
  796. * have to handle it here
  797. */
  798. card->pctl = 0x80;
  799. card->xdata = 0;
  800. WriteW6692(card, W_PCTL, card->pctl);
  801. WriteW6692(card, W_XDATA, card->xdata);
  802. } else {
  803. card->pctl = W_PCTL_OE5 | W_PCTL_OE4 | W_PCTL_OE2 |
  804. W_PCTL_OE1 | W_PCTL_OE0;
  805. card->xaddr = 0x00;/* all sw off */
  806. if (card->fmask & pots)
  807. card->xdata |= 0x06; /* POWER UP/ LED OFF / ALAW */
  808. if (card->fmask & led)
  809. card->xdata |= 0x04; /* LED OFF */
  810. if ((card->fmask & pots) || (card->fmask & led)) {
  811. WriteW6692(card, W_PCTL, card->pctl);
  812. WriteW6692(card, W_XADDR, card->xaddr);
  813. WriteW6692(card, W_XDATA, card->xdata);
  814. val = ReadW6692(card, W_XADDR);
  815. if (debug & DEBUG_HW)
  816. pr_notice("%s: W_XADDR=%02x\n",
  817. card->name, val);
  818. }
  819. }
  820. }
  821. static void
  822. reset_w6692(struct w6692_hw *card)
  823. {
  824. WriteW6692(card, W_D_CTL, W_D_CTL_SRST);
  825. mdelay(10);
  826. WriteW6692(card, W_D_CTL, 0);
  827. }
  828. static int
  829. init_card(struct w6692_hw *card)
  830. {
  831. int cnt = 3;
  832. u_long flags;
  833. spin_lock_irqsave(&card->lock, flags);
  834. disable_hwirq(card);
  835. spin_unlock_irqrestore(&card->lock, flags);
  836. if (request_irq(card->irq, w6692_irq, IRQF_SHARED, card->name, card)) {
  837. pr_info("%s: couldn't get interrupt %d\n", card->name,
  838. card->irq);
  839. return -EIO;
  840. }
  841. while (cnt--) {
  842. spin_lock_irqsave(&card->lock, flags);
  843. initW6692(card);
  844. enable_hwirq(card);
  845. spin_unlock_irqrestore(&card->lock, flags);
  846. /* Timeout 10ms */
  847. msleep_interruptible(10);
  848. if (debug & DEBUG_HW)
  849. pr_notice("%s: IRQ %d count %d\n", card->name,
  850. card->irq, card->irqcnt);
  851. if (!card->irqcnt) {
  852. pr_info("%s: IRQ(%d) getting no IRQs during init %d\n",
  853. card->name, card->irq, 3 - cnt);
  854. reset_w6692(card);
  855. } else
  856. return 0;
  857. }
  858. free_irq(card->irq, card);
  859. return -EIO;
  860. }
  861. static int
  862. w6692_l2l1B(struct mISDNchannel *ch, struct sk_buff *skb)
  863. {
  864. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  865. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  866. struct w6692_hw *card = bch->hw;
  867. int ret = -EINVAL;
  868. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  869. unsigned long flags;
  870. switch (hh->prim) {
  871. case PH_DATA_REQ:
  872. spin_lock_irqsave(&card->lock, flags);
  873. ret = bchannel_senddata(bch, skb);
  874. if (ret > 0) { /* direct TX */
  875. ret = 0;
  876. W6692_fill_Bfifo(bc);
  877. }
  878. spin_unlock_irqrestore(&card->lock, flags);
  879. return ret;
  880. case PH_ACTIVATE_REQ:
  881. spin_lock_irqsave(&card->lock, flags);
  882. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  883. ret = w6692_mode(bc, ch->protocol);
  884. else
  885. ret = 0;
  886. spin_unlock_irqrestore(&card->lock, flags);
  887. if (!ret)
  888. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  889. NULL, GFP_KERNEL);
  890. break;
  891. case PH_DEACTIVATE_REQ:
  892. spin_lock_irqsave(&card->lock, flags);
  893. mISDN_clear_bchannel(bch);
  894. w6692_mode(bc, ISDN_P_NONE);
  895. spin_unlock_irqrestore(&card->lock, flags);
  896. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  897. NULL, GFP_KERNEL);
  898. ret = 0;
  899. break;
  900. default:
  901. pr_info("%s: %s unknown prim(%x,%x)\n",
  902. card->name, __func__, hh->prim, hh->id);
  903. ret = -EINVAL;
  904. }
  905. if (!ret)
  906. dev_kfree_skb(skb);
  907. return ret;
  908. }
  909. static int
  910. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  911. {
  912. return mISDN_ctrl_bchannel(bch, cq);
  913. }
  914. static int
  915. open_bchannel(struct w6692_hw *card, struct channel_req *rq)
  916. {
  917. struct bchannel *bch;
  918. if (rq->adr.channel == 0 || rq->adr.channel > 2)
  919. return -EINVAL;
  920. if (rq->protocol == ISDN_P_NONE)
  921. return -EINVAL;
  922. bch = &card->bc[rq->adr.channel - 1].bch;
  923. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  924. return -EBUSY; /* b-channel can be only open once */
  925. test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
  926. bch->ch.protocol = rq->protocol;
  927. rq->ch = &bch->ch;
  928. return 0;
  929. }
  930. static int
  931. channel_ctrl(struct w6692_hw *card, struct mISDN_ctrl_req *cq)
  932. {
  933. int ret = 0;
  934. switch (cq->op) {
  935. case MISDN_CTRL_GETOP:
  936. cq->op = MISDN_CTRL_L1_TIMER3;
  937. break;
  938. case MISDN_CTRL_L1_TIMER3:
  939. ret = l1_event(card->dch.l1, HW_TIMER3_VALUE | (cq->p1 & 0xff));
  940. break;
  941. default:
  942. pr_info("%s: unknown CTRL OP %x\n", card->name, cq->op);
  943. ret = -EINVAL;
  944. break;
  945. }
  946. return ret;
  947. }
  948. static int
  949. w6692_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  950. {
  951. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  952. struct w6692_ch *bc = container_of(bch, struct w6692_ch, bch);
  953. struct w6692_hw *card = bch->hw;
  954. int ret = -EINVAL;
  955. u_long flags;
  956. pr_debug("%s: %s cmd:%x %p\n", card->name, __func__, cmd, arg);
  957. switch (cmd) {
  958. case CLOSE_CHANNEL:
  959. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  960. spin_lock_irqsave(&card->lock, flags);
  961. mISDN_freebchannel(bch);
  962. w6692_mode(bc, ISDN_P_NONE);
  963. spin_unlock_irqrestore(&card->lock, flags);
  964. ch->protocol = ISDN_P_NONE;
  965. ch->peer = NULL;
  966. module_put(THIS_MODULE);
  967. ret = 0;
  968. break;
  969. case CONTROL_CHANNEL:
  970. ret = channel_bctrl(bch, arg);
  971. break;
  972. default:
  973. pr_info("%s: %s unknown prim(%x)\n",
  974. card->name, __func__, cmd);
  975. }
  976. return ret;
  977. }
  978. static int
  979. w6692_l2l1D(struct mISDNchannel *ch, struct sk_buff *skb)
  980. {
  981. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  982. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  983. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  984. int ret = -EINVAL;
  985. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  986. u32 id;
  987. u_long flags;
  988. switch (hh->prim) {
  989. case PH_DATA_REQ:
  990. spin_lock_irqsave(&card->lock, flags);
  991. ret = dchannel_senddata(dch, skb);
  992. if (ret > 0) { /* direct TX */
  993. id = hh->id; /* skb can be freed */
  994. W6692_fill_Dfifo(card);
  995. ret = 0;
  996. spin_unlock_irqrestore(&card->lock, flags);
  997. queue_ch_frame(ch, PH_DATA_CNF, id, NULL);
  998. } else
  999. spin_unlock_irqrestore(&card->lock, flags);
  1000. return ret;
  1001. case PH_ACTIVATE_REQ:
  1002. ret = l1_event(dch->l1, hh->prim);
  1003. break;
  1004. case PH_DEACTIVATE_REQ:
  1005. test_and_clear_bit(FLG_L2_ACTIVATED, &dch->Flags);
  1006. ret = l1_event(dch->l1, hh->prim);
  1007. break;
  1008. }
  1009. if (!ret)
  1010. dev_kfree_skb(skb);
  1011. return ret;
  1012. }
  1013. static int
  1014. w6692_l1callback(struct dchannel *dch, u32 cmd)
  1015. {
  1016. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1017. u_long flags;
  1018. pr_debug("%s: cmd(%x) state(%02x)\n", card->name, cmd, card->state);
  1019. switch (cmd) {
  1020. case INFO3_P8:
  1021. spin_lock_irqsave(&card->lock, flags);
  1022. ph_command(card, W_L1CMD_AR8);
  1023. spin_unlock_irqrestore(&card->lock, flags);
  1024. break;
  1025. case INFO3_P10:
  1026. spin_lock_irqsave(&card->lock, flags);
  1027. ph_command(card, W_L1CMD_AR10);
  1028. spin_unlock_irqrestore(&card->lock, flags);
  1029. break;
  1030. case HW_RESET_REQ:
  1031. spin_lock_irqsave(&card->lock, flags);
  1032. if (card->state != W_L1IND_DRD)
  1033. ph_command(card, W_L1CMD_RST);
  1034. ph_command(card, W_L1CMD_ECK);
  1035. spin_unlock_irqrestore(&card->lock, flags);
  1036. break;
  1037. case HW_DEACT_REQ:
  1038. skb_queue_purge(&dch->squeue);
  1039. if (dch->tx_skb) {
  1040. dev_kfree_skb(dch->tx_skb);
  1041. dch->tx_skb = NULL;
  1042. }
  1043. dch->tx_idx = 0;
  1044. if (dch->rx_skb) {
  1045. dev_kfree_skb(dch->rx_skb);
  1046. dch->rx_skb = NULL;
  1047. }
  1048. test_and_clear_bit(FLG_TX_BUSY, &dch->Flags);
  1049. if (test_and_clear_bit(FLG_BUSY_TIMER, &dch->Flags))
  1050. del_timer(&dch->timer);
  1051. break;
  1052. case HW_POWERUP_REQ:
  1053. spin_lock_irqsave(&card->lock, flags);
  1054. ph_command(card, W_L1CMD_ECK);
  1055. spin_unlock_irqrestore(&card->lock, flags);
  1056. break;
  1057. case PH_ACTIVATE_IND:
  1058. test_and_set_bit(FLG_ACTIVE, &dch->Flags);
  1059. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1060. GFP_ATOMIC);
  1061. break;
  1062. case PH_DEACTIVATE_IND:
  1063. test_and_clear_bit(FLG_ACTIVE, &dch->Flags);
  1064. _queue_data(&dch->dev.D, cmd, MISDN_ID_ANY, 0, NULL,
  1065. GFP_ATOMIC);
  1066. break;
  1067. default:
  1068. pr_debug("%s: %s unknown command %x\n", card->name,
  1069. __func__, cmd);
  1070. return -1;
  1071. }
  1072. return 0;
  1073. }
  1074. static int
  1075. open_dchannel(struct w6692_hw *card, struct channel_req *rq)
  1076. {
  1077. pr_debug("%s: %s dev(%d) open from %p\n", card->name, __func__,
  1078. card->dch.dev.id, __builtin_return_address(1));
  1079. if (rq->protocol != ISDN_P_TE_S0)
  1080. return -EINVAL;
  1081. if (rq->adr.channel == 1)
  1082. /* E-Channel not supported */
  1083. return -EINVAL;
  1084. rq->ch = &card->dch.dev.D;
  1085. rq->ch->protocol = rq->protocol;
  1086. if (card->dch.state == 7)
  1087. _queue_data(rq->ch, PH_ACTIVATE_IND, MISDN_ID_ANY,
  1088. 0, NULL, GFP_KERNEL);
  1089. return 0;
  1090. }
  1091. static int
  1092. w6692_dctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1093. {
  1094. struct mISDNdevice *dev = container_of(ch, struct mISDNdevice, D);
  1095. struct dchannel *dch = container_of(dev, struct dchannel, dev);
  1096. struct w6692_hw *card = container_of(dch, struct w6692_hw, dch);
  1097. struct channel_req *rq;
  1098. int err = 0;
  1099. pr_debug("%s: DCTRL: %x %p\n", card->name, cmd, arg);
  1100. switch (cmd) {
  1101. case OPEN_CHANNEL:
  1102. rq = arg;
  1103. if (rq->protocol == ISDN_P_TE_S0)
  1104. err = open_dchannel(card, rq);
  1105. else
  1106. err = open_bchannel(card, rq);
  1107. if (err)
  1108. break;
  1109. if (!try_module_get(THIS_MODULE))
  1110. pr_info("%s: cannot get module\n", card->name);
  1111. break;
  1112. case CLOSE_CHANNEL:
  1113. pr_debug("%s: dev(%d) close from %p\n", card->name,
  1114. dch->dev.id, __builtin_return_address(0));
  1115. module_put(THIS_MODULE);
  1116. break;
  1117. case CONTROL_CHANNEL:
  1118. err = channel_ctrl(card, arg);
  1119. break;
  1120. default:
  1121. pr_debug("%s: unknown DCTRL command %x\n", card->name, cmd);
  1122. return -EINVAL;
  1123. }
  1124. return err;
  1125. }
  1126. static int
  1127. setup_w6692(struct w6692_hw *card)
  1128. {
  1129. u32 val;
  1130. if (!request_region(card->addr, 256, card->name)) {
  1131. pr_info("%s: config port %x-%x already in use\n", card->name,
  1132. card->addr, card->addr + 255);
  1133. return -EIO;
  1134. }
  1135. W6692Version(card);
  1136. card->bc[0].addr = card->addr;
  1137. card->bc[1].addr = card->addr + 0x40;
  1138. val = ReadW6692(card, W_ISTA);
  1139. if (debug & DEBUG_HW)
  1140. pr_notice("%s ISTA=%02x\n", card->name, val);
  1141. val = ReadW6692(card, W_IMASK);
  1142. if (debug & DEBUG_HW)
  1143. pr_notice("%s IMASK=%02x\n", card->name, val);
  1144. val = ReadW6692(card, W_D_EXIR);
  1145. if (debug & DEBUG_HW)
  1146. pr_notice("%s D_EXIR=%02x\n", card->name, val);
  1147. val = ReadW6692(card, W_D_EXIM);
  1148. if (debug & DEBUG_HW)
  1149. pr_notice("%s D_EXIM=%02x\n", card->name, val);
  1150. val = ReadW6692(card, W_D_RSTA);
  1151. if (debug & DEBUG_HW)
  1152. pr_notice("%s D_RSTA=%02x\n", card->name, val);
  1153. return 0;
  1154. }
  1155. static void
  1156. release_card(struct w6692_hw *card)
  1157. {
  1158. u_long flags;
  1159. spin_lock_irqsave(&card->lock, flags);
  1160. disable_hwirq(card);
  1161. w6692_mode(&card->bc[0], ISDN_P_NONE);
  1162. w6692_mode(&card->bc[1], ISDN_P_NONE);
  1163. if ((card->fmask & led) || card->subtype == W6692_USR) {
  1164. card->xdata |= 0x04; /* LED OFF */
  1165. WriteW6692(card, W_XDATA, card->xdata);
  1166. }
  1167. spin_unlock_irqrestore(&card->lock, flags);
  1168. free_irq(card->irq, card);
  1169. l1_event(card->dch.l1, CLOSE_CHANNEL);
  1170. mISDN_unregister_device(&card->dch.dev);
  1171. release_region(card->addr, 256);
  1172. mISDN_freebchannel(&card->bc[1].bch);
  1173. mISDN_freebchannel(&card->bc[0].bch);
  1174. mISDN_freedchannel(&card->dch);
  1175. write_lock_irqsave(&card_lock, flags);
  1176. list_del(&card->list);
  1177. write_unlock_irqrestore(&card_lock, flags);
  1178. pci_disable_device(card->pdev);
  1179. pci_set_drvdata(card->pdev, NULL);
  1180. kfree(card);
  1181. }
  1182. static int
  1183. setup_instance(struct w6692_hw *card)
  1184. {
  1185. int i, err;
  1186. u_long flags;
  1187. snprintf(card->name, MISDN_MAX_IDLEN - 1, "w6692.%d", w6692_cnt + 1);
  1188. write_lock_irqsave(&card_lock, flags);
  1189. list_add_tail(&card->list, &Cards);
  1190. write_unlock_irqrestore(&card_lock, flags);
  1191. card->fmask = (1 << w6692_cnt);
  1192. _set_debug(card);
  1193. spin_lock_init(&card->lock);
  1194. mISDN_initdchannel(&card->dch, MAX_DFRAME_LEN_L1, W6692_ph_bh);
  1195. card->dch.dev.Dprotocols = (1 << ISDN_P_TE_S0);
  1196. card->dch.dev.D.send = w6692_l2l1D;
  1197. card->dch.dev.D.ctrl = w6692_dctrl;
  1198. card->dch.dev.Bprotocols = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1199. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
  1200. card->dch.hw = card;
  1201. card->dch.dev.nrbchan = 2;
  1202. for (i = 0; i < 2; i++) {
  1203. mISDN_initbchannel(&card->bc[i].bch, MAX_DATA_MEM,
  1204. W_B_FIFO_THRESH);
  1205. card->bc[i].bch.hw = card;
  1206. card->bc[i].bch.nr = i + 1;
  1207. card->bc[i].bch.ch.nr = i + 1;
  1208. card->bc[i].bch.ch.send = w6692_l2l1B;
  1209. card->bc[i].bch.ch.ctrl = w6692_bctrl;
  1210. set_channelmap(i + 1, card->dch.dev.channelmap);
  1211. list_add(&card->bc[i].bch.ch.list, &card->dch.dev.bchannels);
  1212. }
  1213. err = setup_w6692(card);
  1214. if (err)
  1215. goto error_setup;
  1216. err = mISDN_register_device(&card->dch.dev, &card->pdev->dev,
  1217. card->name);
  1218. if (err)
  1219. goto error_reg;
  1220. err = init_card(card);
  1221. if (err)
  1222. goto error_init;
  1223. err = create_l1(&card->dch, w6692_l1callback);
  1224. if (!err) {
  1225. w6692_cnt++;
  1226. pr_notice("W6692 %d cards installed\n", w6692_cnt);
  1227. return 0;
  1228. }
  1229. free_irq(card->irq, card);
  1230. error_init:
  1231. mISDN_unregister_device(&card->dch.dev);
  1232. error_reg:
  1233. release_region(card->addr, 256);
  1234. error_setup:
  1235. mISDN_freebchannel(&card->bc[1].bch);
  1236. mISDN_freebchannel(&card->bc[0].bch);
  1237. mISDN_freedchannel(&card->dch);
  1238. write_lock_irqsave(&card_lock, flags);
  1239. list_del(&card->list);
  1240. write_unlock_irqrestore(&card_lock, flags);
  1241. kfree(card);
  1242. return err;
  1243. }
  1244. static int __devinit
  1245. w6692_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1246. {
  1247. int err = -ENOMEM;
  1248. struct w6692_hw *card;
  1249. struct w6692map *m = (struct w6692map *)ent->driver_data;
  1250. card = kzalloc(sizeof(struct w6692_hw), GFP_KERNEL);
  1251. if (!card) {
  1252. pr_info("No kmem for w6692 card\n");
  1253. return err;
  1254. }
  1255. card->pdev = pdev;
  1256. card->subtype = m->subtype;
  1257. err = pci_enable_device(pdev);
  1258. if (err) {
  1259. kfree(card);
  1260. return err;
  1261. }
  1262. printk(KERN_INFO "mISDN_w6692: found adapter %s at %s\n",
  1263. m->name, pci_name(pdev));
  1264. card->addr = pci_resource_start(pdev, 1);
  1265. card->irq = pdev->irq;
  1266. pci_set_drvdata(pdev, card);
  1267. err = setup_instance(card);
  1268. if (err)
  1269. pci_set_drvdata(pdev, NULL);
  1270. return err;
  1271. }
  1272. static void __devexit
  1273. w6692_remove_pci(struct pci_dev *pdev)
  1274. {
  1275. struct w6692_hw *card = pci_get_drvdata(pdev);
  1276. if (card)
  1277. release_card(card);
  1278. else
  1279. if (debug)
  1280. pr_notice("%s: drvdata already removed\n", __func__);
  1281. }
  1282. static struct pci_device_id w6692_ids[] = {
  1283. { PCI_VENDOR_ID_DYNALINK, PCI_DEVICE_ID_DYNALINK_IS64PH,
  1284. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[0]},
  1285. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1286. PCI_VENDOR_ID_USR, PCI_DEVICE_ID_USR_6692, 0, 0,
  1287. (ulong)&w6692_map[2]},
  1288. { PCI_VENDOR_ID_WINBOND2, PCI_DEVICE_ID_WINBOND2_6692,
  1289. PCI_ANY_ID, PCI_ANY_ID, 0, 0, (ulong)&w6692_map[1]},
  1290. { }
  1291. };
  1292. MODULE_DEVICE_TABLE(pci, w6692_ids);
  1293. static struct pci_driver w6692_driver = {
  1294. .name = "w6692",
  1295. .probe = w6692_probe,
  1296. .remove = __devexit_p(w6692_remove_pci),
  1297. .id_table = w6692_ids,
  1298. };
  1299. static int __init w6692_init(void)
  1300. {
  1301. int err;
  1302. pr_notice("Winbond W6692 PCI driver Rev. %s\n", W6692_REV);
  1303. err = pci_register_driver(&w6692_driver);
  1304. return err;
  1305. }
  1306. static void __exit w6692_cleanup(void)
  1307. {
  1308. pci_unregister_driver(&w6692_driver);
  1309. }
  1310. module_init(w6692_init);
  1311. module_exit(w6692_cleanup);