mISDNisar.c 42 KB

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  1. /*
  2. * mISDNisar.c ISAR (Siemens PSB 7110) specific functions
  3. *
  4. * Author Karsten Keil (keil@isdn4linux.de)
  5. *
  6. * Copyright 2009 by Karsten Keil <keil@isdn4linux.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. *
  21. */
  22. /* define this to enable static debug messages, if you kernel supports
  23. * dynamic debugging, you should use debugfs for this
  24. */
  25. /* #define DEBUG */
  26. #include <linux/gfp.h>
  27. #include <linux/delay.h>
  28. #include <linux/vmalloc.h>
  29. #include <linux/mISDNhw.h>
  30. #include <linux/module.h>
  31. #include "isar.h"
  32. #define ISAR_REV "2.1"
  33. MODULE_AUTHOR("Karsten Keil");
  34. MODULE_LICENSE("GPL v2");
  35. MODULE_VERSION(ISAR_REV);
  36. #define DEBUG_HW_FIRMWARE_FIFO 0x10000
  37. static const u8 faxmodulation_s[] = "3,24,48,72,73,74,96,97,98,121,122,145,146";
  38. static const u8 faxmodulation[] = {3, 24, 48, 72, 73, 74, 96, 97, 98, 121,
  39. 122, 145, 146};
  40. #define FAXMODCNT 13
  41. static void isar_setup(struct isar_hw *);
  42. static inline int
  43. waitforHIA(struct isar_hw *isar, int timeout)
  44. {
  45. int t = timeout;
  46. u8 val = isar->read_reg(isar->hw, ISAR_HIA);
  47. while ((val & 1) && t) {
  48. udelay(1);
  49. t--;
  50. val = isar->read_reg(isar->hw, ISAR_HIA);
  51. }
  52. pr_debug("%s: HIA after %dus\n", isar->name, timeout - t);
  53. return timeout;
  54. }
  55. /*
  56. * send msg to ISAR mailbox
  57. * if msg is NULL use isar->buf
  58. */
  59. static int
  60. send_mbox(struct isar_hw *isar, u8 his, u8 creg, u8 len, u8 *msg)
  61. {
  62. if (!waitforHIA(isar, 1000))
  63. return 0;
  64. pr_debug("send_mbox(%02x,%02x,%d)\n", his, creg, len);
  65. isar->write_reg(isar->hw, ISAR_CTRL_H, creg);
  66. isar->write_reg(isar->hw, ISAR_CTRL_L, len);
  67. isar->write_reg(isar->hw, ISAR_WADR, 0);
  68. if (!msg)
  69. msg = isar->buf;
  70. if (msg && len) {
  71. isar->write_fifo(isar->hw, ISAR_MBOX, msg, len);
  72. if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
  73. int l = 0;
  74. while (l < (int)len) {
  75. hex_dump_to_buffer(msg + l, len - l, 32, 1,
  76. isar->log, 256, 1);
  77. pr_debug("%s: %s %02x: %s\n", isar->name,
  78. __func__, l, isar->log);
  79. l += 32;
  80. }
  81. }
  82. }
  83. isar->write_reg(isar->hw, ISAR_HIS, his);
  84. waitforHIA(isar, 1000);
  85. return 1;
  86. }
  87. /*
  88. * receive message from ISAR mailbox
  89. * if msg is NULL use isar->buf
  90. */
  91. static void
  92. rcv_mbox(struct isar_hw *isar, u8 *msg)
  93. {
  94. if (!msg)
  95. msg = isar->buf;
  96. isar->write_reg(isar->hw, ISAR_RADR, 0);
  97. if (msg && isar->clsb) {
  98. isar->read_fifo(isar->hw, ISAR_MBOX, msg, isar->clsb);
  99. if (isar->ch[0].bch.debug & DEBUG_HW_BFIFO) {
  100. int l = 0;
  101. while (l < (int)isar->clsb) {
  102. hex_dump_to_buffer(msg + l, isar->clsb - l, 32,
  103. 1, isar->log, 256, 1);
  104. pr_debug("%s: %s %02x: %s\n", isar->name,
  105. __func__, l, isar->log);
  106. l += 32;
  107. }
  108. }
  109. }
  110. isar->write_reg(isar->hw, ISAR_IIA, 0);
  111. }
  112. static inline void
  113. get_irq_infos(struct isar_hw *isar)
  114. {
  115. isar->iis = isar->read_reg(isar->hw, ISAR_IIS);
  116. isar->cmsb = isar->read_reg(isar->hw, ISAR_CTRL_H);
  117. isar->clsb = isar->read_reg(isar->hw, ISAR_CTRL_L);
  118. pr_debug("%s: rcv_mbox(%02x,%02x,%d)\n", isar->name,
  119. isar->iis, isar->cmsb, isar->clsb);
  120. }
  121. /*
  122. * poll answer message from ISAR mailbox
  123. * should be used only with ISAR IRQs disabled before DSP was started
  124. *
  125. */
  126. static int
  127. poll_mbox(struct isar_hw *isar, int maxdelay)
  128. {
  129. int t = maxdelay;
  130. u8 irq;
  131. irq = isar->read_reg(isar->hw, ISAR_IRQBIT);
  132. while (t && !(irq & ISAR_IRQSTA)) {
  133. udelay(1);
  134. t--;
  135. }
  136. if (t) {
  137. get_irq_infos(isar);
  138. rcv_mbox(isar, NULL);
  139. }
  140. pr_debug("%s: pulled %d bytes after %d us\n",
  141. isar->name, isar->clsb, maxdelay - t);
  142. return t;
  143. }
  144. static int
  145. ISARVersion(struct isar_hw *isar)
  146. {
  147. int ver;
  148. /* disable ISAR IRQ */
  149. isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
  150. isar->buf[0] = ISAR_MSG_HWVER;
  151. isar->buf[1] = 0;
  152. isar->buf[2] = 1;
  153. if (!send_mbox(isar, ISAR_HIS_VNR, 0, 3, NULL))
  154. return -1;
  155. if (!poll_mbox(isar, 1000))
  156. return -2;
  157. if (isar->iis == ISAR_IIS_VNR) {
  158. if (isar->clsb == 1) {
  159. ver = isar->buf[0] & 0xf;
  160. return ver;
  161. }
  162. return -3;
  163. }
  164. return -4;
  165. }
  166. static int
  167. load_firmware(struct isar_hw *isar, const u8 *buf, int size)
  168. {
  169. u32 saved_debug = isar->ch[0].bch.debug;
  170. int ret, cnt;
  171. u8 nom, noc;
  172. u16 left, val, *sp = (u16 *)buf;
  173. u8 *mp;
  174. u_long flags;
  175. struct {
  176. u16 sadr;
  177. u16 len;
  178. u16 d_key;
  179. } blk_head;
  180. if (1 != isar->version) {
  181. pr_err("%s: ISAR wrong version %d firmware download aborted\n",
  182. isar->name, isar->version);
  183. return -EINVAL;
  184. }
  185. if (!(saved_debug & DEBUG_HW_FIRMWARE_FIFO))
  186. isar->ch[0].bch.debug &= ~DEBUG_HW_BFIFO;
  187. pr_debug("%s: load firmware %d words (%d bytes)\n",
  188. isar->name, size / 2, size);
  189. cnt = 0;
  190. size /= 2;
  191. /* disable ISAR IRQ */
  192. spin_lock_irqsave(isar->hwlock, flags);
  193. isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
  194. spin_unlock_irqrestore(isar->hwlock, flags);
  195. while (cnt < size) {
  196. blk_head.sadr = le16_to_cpu(*sp++);
  197. blk_head.len = le16_to_cpu(*sp++);
  198. blk_head.d_key = le16_to_cpu(*sp++);
  199. cnt += 3;
  200. pr_debug("ISAR firmware block (%#x,%d,%#x)\n",
  201. blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
  202. left = blk_head.len;
  203. if (cnt + left > size) {
  204. pr_info("%s: firmware error have %d need %d words\n",
  205. isar->name, size, cnt + left);
  206. ret = -EINVAL;
  207. goto reterrflg;
  208. }
  209. spin_lock_irqsave(isar->hwlock, flags);
  210. if (!send_mbox(isar, ISAR_HIS_DKEY, blk_head.d_key & 0xff,
  211. 0, NULL)) {
  212. pr_info("ISAR send_mbox dkey failed\n");
  213. ret = -ETIME;
  214. goto reterror;
  215. }
  216. if (!poll_mbox(isar, 1000)) {
  217. pr_warning("ISAR poll_mbox dkey failed\n");
  218. ret = -ETIME;
  219. goto reterror;
  220. }
  221. spin_unlock_irqrestore(isar->hwlock, flags);
  222. if ((isar->iis != ISAR_IIS_DKEY) || isar->cmsb || isar->clsb) {
  223. pr_info("ISAR wrong dkey response (%x,%x,%x)\n",
  224. isar->iis, isar->cmsb, isar->clsb);
  225. ret = 1;
  226. goto reterrflg;
  227. }
  228. while (left > 0) {
  229. if (left > 126)
  230. noc = 126;
  231. else
  232. noc = left;
  233. nom = (2 * noc) + 3;
  234. mp = isar->buf;
  235. /* the ISAR is big endian */
  236. *mp++ = blk_head.sadr >> 8;
  237. *mp++ = blk_head.sadr & 0xFF;
  238. left -= noc;
  239. cnt += noc;
  240. *mp++ = noc;
  241. pr_debug("%s: load %3d words at %04x\n", isar->name,
  242. noc, blk_head.sadr);
  243. blk_head.sadr += noc;
  244. while (noc) {
  245. val = le16_to_cpu(*sp++);
  246. *mp++ = val >> 8;
  247. *mp++ = val & 0xFF;
  248. noc--;
  249. }
  250. spin_lock_irqsave(isar->hwlock, flags);
  251. if (!send_mbox(isar, ISAR_HIS_FIRM, 0, nom, NULL)) {
  252. pr_info("ISAR send_mbox prog failed\n");
  253. ret = -ETIME;
  254. goto reterror;
  255. }
  256. if (!poll_mbox(isar, 1000)) {
  257. pr_info("ISAR poll_mbox prog failed\n");
  258. ret = -ETIME;
  259. goto reterror;
  260. }
  261. spin_unlock_irqrestore(isar->hwlock, flags);
  262. if ((isar->iis != ISAR_IIS_FIRM) ||
  263. isar->cmsb || isar->clsb) {
  264. pr_info("ISAR wrong prog response (%x,%x,%x)\n",
  265. isar->iis, isar->cmsb, isar->clsb);
  266. ret = -EIO;
  267. goto reterrflg;
  268. }
  269. }
  270. pr_debug("%s: ISAR firmware block %d words loaded\n",
  271. isar->name, blk_head.len);
  272. }
  273. isar->ch[0].bch.debug = saved_debug;
  274. /* 10ms delay */
  275. cnt = 10;
  276. while (cnt--)
  277. mdelay(1);
  278. isar->buf[0] = 0xff;
  279. isar->buf[1] = 0xfe;
  280. isar->bstat = 0;
  281. spin_lock_irqsave(isar->hwlock, flags);
  282. if (!send_mbox(isar, ISAR_HIS_STDSP, 0, 2, NULL)) {
  283. pr_info("ISAR send_mbox start dsp failed\n");
  284. ret = -ETIME;
  285. goto reterror;
  286. }
  287. if (!poll_mbox(isar, 1000)) {
  288. pr_info("ISAR poll_mbox start dsp failed\n");
  289. ret = -ETIME;
  290. goto reterror;
  291. }
  292. if ((isar->iis != ISAR_IIS_STDSP) || isar->cmsb || isar->clsb) {
  293. pr_info("ISAR wrong start dsp response (%x,%x,%x)\n",
  294. isar->iis, isar->cmsb, isar->clsb);
  295. ret = -EIO;
  296. goto reterror;
  297. } else
  298. pr_debug("%s: ISAR start dsp success\n", isar->name);
  299. /* NORMAL mode entered */
  300. /* Enable IRQs of ISAR */
  301. isar->write_reg(isar->hw, ISAR_IRQBIT, ISAR_IRQSTA);
  302. spin_unlock_irqrestore(isar->hwlock, flags);
  303. cnt = 1000; /* max 1s */
  304. while ((!isar->bstat) && cnt) {
  305. mdelay(1);
  306. cnt--;
  307. }
  308. if (!cnt) {
  309. pr_info("ISAR no general status event received\n");
  310. ret = -ETIME;
  311. goto reterrflg;
  312. } else
  313. pr_debug("%s: ISAR general status event %x\n",
  314. isar->name, isar->bstat);
  315. /* 10ms delay */
  316. cnt = 10;
  317. while (cnt--)
  318. mdelay(1);
  319. isar->iis = 0;
  320. spin_lock_irqsave(isar->hwlock, flags);
  321. if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
  322. pr_info("ISAR send_mbox self tst failed\n");
  323. ret = -ETIME;
  324. goto reterror;
  325. }
  326. spin_unlock_irqrestore(isar->hwlock, flags);
  327. cnt = 10000; /* max 100 ms */
  328. while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
  329. udelay(10);
  330. cnt--;
  331. }
  332. mdelay(1);
  333. if (!cnt) {
  334. pr_info("ISAR no self tst response\n");
  335. ret = -ETIME;
  336. goto reterrflg;
  337. }
  338. if ((isar->cmsb == ISAR_CTRL_STST) && (isar->clsb == 1)
  339. && (isar->buf[0] == 0))
  340. pr_debug("%s: ISAR selftest OK\n", isar->name);
  341. else {
  342. pr_info("ISAR selftest not OK %x/%x/%x\n",
  343. isar->cmsb, isar->clsb, isar->buf[0]);
  344. ret = -EIO;
  345. goto reterrflg;
  346. }
  347. spin_lock_irqsave(isar->hwlock, flags);
  348. isar->iis = 0;
  349. if (!send_mbox(isar, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
  350. pr_info("ISAR RQST SVN failed\n");
  351. ret = -ETIME;
  352. goto reterror;
  353. }
  354. spin_unlock_irqrestore(isar->hwlock, flags);
  355. cnt = 30000; /* max 300 ms */
  356. while ((isar->iis != ISAR_IIS_DIAG) && cnt) {
  357. udelay(10);
  358. cnt--;
  359. }
  360. mdelay(1);
  361. if (!cnt) {
  362. pr_info("ISAR no SVN response\n");
  363. ret = -ETIME;
  364. goto reterrflg;
  365. } else {
  366. if ((isar->cmsb == ISAR_CTRL_SWVER) && (isar->clsb == 1)) {
  367. pr_notice("%s: ISAR software version %#x\n",
  368. isar->name, isar->buf[0]);
  369. } else {
  370. pr_info("%s: ISAR wrong swver response (%x,%x)"
  371. " cnt(%d)\n", isar->name, isar->cmsb,
  372. isar->clsb, cnt);
  373. ret = -EIO;
  374. goto reterrflg;
  375. }
  376. }
  377. spin_lock_irqsave(isar->hwlock, flags);
  378. isar_setup(isar);
  379. spin_unlock_irqrestore(isar->hwlock, flags);
  380. ret = 0;
  381. reterrflg:
  382. spin_lock_irqsave(isar->hwlock, flags);
  383. reterror:
  384. isar->ch[0].bch.debug = saved_debug;
  385. if (ret)
  386. /* disable ISAR IRQ */
  387. isar->write_reg(isar->hw, ISAR_IRQBIT, 0);
  388. spin_unlock_irqrestore(isar->hwlock, flags);
  389. return ret;
  390. }
  391. static inline void
  392. deliver_status(struct isar_ch *ch, int status)
  393. {
  394. pr_debug("%s: HL->LL FAXIND %x\n", ch->is->name, status);
  395. _queue_data(&ch->bch.ch, PH_CONTROL_IND, status, 0, NULL, GFP_ATOMIC);
  396. }
  397. static inline void
  398. isar_rcv_frame(struct isar_ch *ch)
  399. {
  400. u8 *ptr;
  401. int maxlen;
  402. if (!ch->is->clsb) {
  403. pr_debug("%s; ISAR zero len frame\n", ch->is->name);
  404. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  405. return;
  406. }
  407. switch (ch->bch.state) {
  408. case ISDN_P_NONE:
  409. pr_debug("%s: ISAR protocol 0 spurious IIS_RDATA %x/%x/%x\n",
  410. ch->is->name, ch->is->iis, ch->is->cmsb, ch->is->clsb);
  411. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  412. break;
  413. case ISDN_P_B_RAW:
  414. case ISDN_P_B_L2DTMF:
  415. case ISDN_P_B_MODEM_ASYNC:
  416. maxlen = bchannel_get_rxbuf(&ch->bch, ch->is->clsb);
  417. if (maxlen < 0) {
  418. pr_warning("%s.B%d: No bufferspace for %d bytes\n",
  419. ch->is->name, ch->bch.nr, ch->is->clsb);
  420. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  421. break;
  422. }
  423. rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
  424. recv_Bchannel(&ch->bch, 0, false);
  425. break;
  426. case ISDN_P_B_HDLC:
  427. maxlen = bchannel_get_rxbuf(&ch->bch, ch->is->clsb);
  428. if (maxlen < 0) {
  429. pr_warning("%s.B%d: No bufferspace for %d bytes\n",
  430. ch->is->name, ch->bch.nr, ch->is->clsb);
  431. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  432. break;
  433. }
  434. if (ch->is->cmsb & HDLC_ERROR) {
  435. pr_debug("%s: ISAR frame error %x len %d\n",
  436. ch->is->name, ch->is->cmsb, ch->is->clsb);
  437. #ifdef ERROR_STATISTIC
  438. if (ch->is->cmsb & HDLC_ERR_RER)
  439. ch->bch.err_inv++;
  440. if (ch->is->cmsb & HDLC_ERR_CER)
  441. ch->bch.err_crc++;
  442. #endif
  443. skb_trim(ch->bch.rx_skb, 0);
  444. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  445. break;
  446. }
  447. if (ch->is->cmsb & HDLC_FSD)
  448. skb_trim(ch->bch.rx_skb, 0);
  449. ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
  450. rcv_mbox(ch->is, ptr);
  451. if (ch->is->cmsb & HDLC_FED) {
  452. if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
  453. pr_debug("%s: ISAR frame to short %d\n",
  454. ch->is->name, ch->bch.rx_skb->len);
  455. skb_trim(ch->bch.rx_skb, 0);
  456. break;
  457. }
  458. skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
  459. recv_Bchannel(&ch->bch, 0, false);
  460. }
  461. break;
  462. case ISDN_P_B_T30_FAX:
  463. if (ch->state != STFAX_ACTIV) {
  464. pr_debug("%s: isar_rcv_frame: not ACTIV\n",
  465. ch->is->name);
  466. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  467. if (ch->bch.rx_skb)
  468. skb_trim(ch->bch.rx_skb, 0);
  469. break;
  470. }
  471. if (!ch->bch.rx_skb) {
  472. ch->bch.rx_skb = mI_alloc_skb(ch->bch.maxlen,
  473. GFP_ATOMIC);
  474. if (unlikely(!ch->bch.rx_skb)) {
  475. pr_info("%s: B receive out of memory\n",
  476. __func__);
  477. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  478. break;
  479. }
  480. }
  481. if (ch->cmd == PCTRL_CMD_FRM) {
  482. rcv_mbox(ch->is, skb_put(ch->bch.rx_skb, ch->is->clsb));
  483. pr_debug("%s: isar_rcv_frame: %d\n",
  484. ch->is->name, ch->bch.rx_skb->len);
  485. if (ch->is->cmsb & SART_NMD) { /* ABORT */
  486. pr_debug("%s: isar_rcv_frame: no more data\n",
  487. ch->is->name);
  488. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  489. send_mbox(ch->is, SET_DPS(ch->dpath) |
  490. ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
  491. 0, NULL);
  492. ch->state = STFAX_ESCAPE;
  493. /* set_skb_flag(skb, DF_NOMOREDATA); */
  494. }
  495. recv_Bchannel(&ch->bch, 0, false);
  496. if (ch->is->cmsb & SART_NMD)
  497. deliver_status(ch, HW_MOD_NOCARR);
  498. break;
  499. }
  500. if (ch->cmd != PCTRL_CMD_FRH) {
  501. pr_debug("%s: isar_rcv_frame: unknown fax mode %x\n",
  502. ch->is->name, ch->cmd);
  503. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  504. if (ch->bch.rx_skb)
  505. skb_trim(ch->bch.rx_skb, 0);
  506. break;
  507. }
  508. /* PCTRL_CMD_FRH */
  509. if ((ch->bch.rx_skb->len + ch->is->clsb) >
  510. (ch->bch.maxlen + 2)) {
  511. pr_info("%s: %s incoming packet too large\n",
  512. ch->is->name, __func__);
  513. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  514. skb_trim(ch->bch.rx_skb, 0);
  515. break;
  516. } else if (ch->is->cmsb & HDLC_ERROR) {
  517. pr_info("%s: ISAR frame error %x len %d\n",
  518. ch->is->name, ch->is->cmsb, ch->is->clsb);
  519. skb_trim(ch->bch.rx_skb, 0);
  520. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  521. break;
  522. }
  523. if (ch->is->cmsb & HDLC_FSD)
  524. skb_trim(ch->bch.rx_skb, 0);
  525. ptr = skb_put(ch->bch.rx_skb, ch->is->clsb);
  526. rcv_mbox(ch->is, ptr);
  527. if (ch->is->cmsb & HDLC_FED) {
  528. if (ch->bch.rx_skb->len < 3) { /* last 2 are the FCS */
  529. pr_info("%s: ISAR frame to short %d\n",
  530. ch->is->name, ch->bch.rx_skb->len);
  531. skb_trim(ch->bch.rx_skb, 0);
  532. break;
  533. }
  534. skb_trim(ch->bch.rx_skb, ch->bch.rx_skb->len - 2);
  535. recv_Bchannel(&ch->bch, 0, false);
  536. }
  537. if (ch->is->cmsb & SART_NMD) { /* ABORT */
  538. pr_debug("%s: isar_rcv_frame: no more data\n",
  539. ch->is->name);
  540. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  541. if (ch->bch.rx_skb)
  542. skb_trim(ch->bch.rx_skb, 0);
  543. send_mbox(ch->is, SET_DPS(ch->dpath) |
  544. ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
  545. ch->state = STFAX_ESCAPE;
  546. deliver_status(ch, HW_MOD_NOCARR);
  547. }
  548. break;
  549. default:
  550. pr_info("isar_rcv_frame protocol (%x)error\n", ch->bch.state);
  551. ch->is->write_reg(ch->is->hw, ISAR_IIA, 0);
  552. break;
  553. }
  554. }
  555. static void
  556. isar_fill_fifo(struct isar_ch *ch)
  557. {
  558. int count;
  559. u8 msb;
  560. u8 *ptr;
  561. pr_debug("%s: ch%d tx_skb %p tx_idx %d\n",
  562. ch->is->name, ch->bch.nr, ch->bch.tx_skb, ch->bch.tx_idx);
  563. if (!ch->bch.tx_skb)
  564. return;
  565. count = ch->bch.tx_skb->len - ch->bch.tx_idx;
  566. if (count <= 0)
  567. return;
  568. if (!(ch->is->bstat &
  569. (ch->dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
  570. return;
  571. if (count > ch->mml) {
  572. msb = 0;
  573. count = ch->mml;
  574. } else {
  575. msb = HDLC_FED;
  576. }
  577. ptr = ch->bch.tx_skb->data + ch->bch.tx_idx;
  578. if (!ch->bch.tx_idx) {
  579. pr_debug("%s: frame start\n", ch->is->name);
  580. if ((ch->bch.state == ISDN_P_B_T30_FAX) &&
  581. (ch->cmd == PCTRL_CMD_FTH)) {
  582. if (count > 1) {
  583. if ((ptr[0] == 0xff) && (ptr[1] == 0x13)) {
  584. /* last frame */
  585. test_and_set_bit(FLG_LASTDATA,
  586. &ch->bch.Flags);
  587. pr_debug("%s: set LASTDATA\n",
  588. ch->is->name);
  589. if (msb == HDLC_FED)
  590. test_and_set_bit(FLG_DLEETX,
  591. &ch->bch.Flags);
  592. }
  593. }
  594. }
  595. msb |= HDLC_FST;
  596. }
  597. ch->bch.tx_idx += count;
  598. switch (ch->bch.state) {
  599. case ISDN_P_NONE:
  600. pr_info("%s: wrong protocol 0\n", __func__);
  601. break;
  602. case ISDN_P_B_RAW:
  603. case ISDN_P_B_L2DTMF:
  604. case ISDN_P_B_MODEM_ASYNC:
  605. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  606. 0, count, ptr);
  607. break;
  608. case ISDN_P_B_HDLC:
  609. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  610. msb, count, ptr);
  611. break;
  612. case ISDN_P_B_T30_FAX:
  613. if (ch->state != STFAX_ACTIV)
  614. pr_debug("%s: not ACTIV\n", ch->is->name);
  615. else if (ch->cmd == PCTRL_CMD_FTH)
  616. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  617. msb, count, ptr);
  618. else if (ch->cmd == PCTRL_CMD_FTM)
  619. send_mbox(ch->is, SET_DPS(ch->dpath) | ISAR_HIS_SDATA,
  620. 0, count, ptr);
  621. else
  622. pr_debug("%s: not FTH/FTM\n", ch->is->name);
  623. break;
  624. default:
  625. pr_info("%s: protocol(%x) error\n",
  626. __func__, ch->bch.state);
  627. break;
  628. }
  629. }
  630. static inline struct isar_ch *
  631. sel_bch_isar(struct isar_hw *isar, u8 dpath)
  632. {
  633. struct isar_ch *base = &isar->ch[0];
  634. if ((!dpath) || (dpath > 2))
  635. return NULL;
  636. if (base->dpath == dpath)
  637. return base;
  638. base++;
  639. if (base->dpath == dpath)
  640. return base;
  641. return NULL;
  642. }
  643. static void
  644. send_next(struct isar_ch *ch)
  645. {
  646. pr_debug("%s: %s ch%d tx_skb %p tx_idx %d\n",
  647. ch->is->name, __func__, ch->bch.nr,
  648. ch->bch.tx_skb, ch->bch.tx_idx);
  649. if (ch->bch.state == ISDN_P_B_T30_FAX) {
  650. if (ch->cmd == PCTRL_CMD_FTH) {
  651. if (test_bit(FLG_LASTDATA, &ch->bch.Flags)) {
  652. pr_debug("set NMD_DATA\n");
  653. test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
  654. }
  655. } else if (ch->cmd == PCTRL_CMD_FTM) {
  656. if (test_bit(FLG_DLEETX, &ch->bch.Flags)) {
  657. test_and_set_bit(FLG_LASTDATA, &ch->bch.Flags);
  658. test_and_set_bit(FLG_NMD_DATA, &ch->bch.Flags);
  659. }
  660. }
  661. }
  662. if (ch->bch.tx_skb)
  663. dev_kfree_skb(ch->bch.tx_skb);
  664. if (get_next_bframe(&ch->bch)) {
  665. isar_fill_fifo(ch);
  666. } else {
  667. if (test_and_clear_bit(FLG_DLEETX, &ch->bch.Flags)) {
  668. if (test_and_clear_bit(FLG_LASTDATA,
  669. &ch->bch.Flags)) {
  670. if (test_and_clear_bit(FLG_NMD_DATA,
  671. &ch->bch.Flags)) {
  672. u8 zd = 0;
  673. send_mbox(ch->is, SET_DPS(ch->dpath) |
  674. ISAR_HIS_SDATA, 0x01, 1, &zd);
  675. }
  676. test_and_set_bit(FLG_LL_OK, &ch->bch.Flags);
  677. } else {
  678. deliver_status(ch, HW_MOD_CONNECT);
  679. }
  680. }
  681. }
  682. }
  683. static void
  684. check_send(struct isar_hw *isar, u8 rdm)
  685. {
  686. struct isar_ch *ch;
  687. pr_debug("%s: rdm %x\n", isar->name, rdm);
  688. if (rdm & BSTAT_RDM1) {
  689. ch = sel_bch_isar(isar, 1);
  690. if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
  691. if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
  692. ch->bch.tx_idx))
  693. isar_fill_fifo(ch);
  694. else
  695. send_next(ch);
  696. }
  697. }
  698. if (rdm & BSTAT_RDM2) {
  699. ch = sel_bch_isar(isar, 2);
  700. if (ch && test_bit(FLG_ACTIVE, &ch->bch.Flags)) {
  701. if (ch->bch.tx_skb && (ch->bch.tx_skb->len >
  702. ch->bch.tx_idx))
  703. isar_fill_fifo(ch);
  704. else
  705. send_next(ch);
  706. }
  707. }
  708. }
  709. const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", "NODEF4",
  710. "300", "600", "1200", "2400", "4800", "7200",
  711. "9600nt", "9600t", "12000", "14400", "WRONG"};
  712. const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
  713. "Bell103", "V23", "Bell202", "V17", "V29", "V27ter"};
  714. static void
  715. isar_pump_status_rsp(struct isar_ch *ch) {
  716. u8 ril = ch->is->buf[0];
  717. u8 rim;
  718. if (!test_and_clear_bit(ISAR_RATE_REQ, &ch->is->Flags))
  719. return;
  720. if (ril > 14) {
  721. pr_info("%s: wrong pstrsp ril=%d\n", ch->is->name, ril);
  722. ril = 15;
  723. }
  724. switch (ch->is->buf[1]) {
  725. case 0:
  726. rim = 0;
  727. break;
  728. case 0x20:
  729. rim = 2;
  730. break;
  731. case 0x40:
  732. rim = 3;
  733. break;
  734. case 0x41:
  735. rim = 4;
  736. break;
  737. case 0x51:
  738. rim = 5;
  739. break;
  740. case 0x61:
  741. rim = 6;
  742. break;
  743. case 0x71:
  744. rim = 7;
  745. break;
  746. case 0x82:
  747. rim = 8;
  748. break;
  749. case 0x92:
  750. rim = 9;
  751. break;
  752. case 0xa2:
  753. rim = 10;
  754. break;
  755. default:
  756. rim = 1;
  757. break;
  758. }
  759. sprintf(ch->conmsg, "%s %s", dmril[ril], dmrim[rim]);
  760. pr_debug("%s: pump strsp %s\n", ch->is->name, ch->conmsg);
  761. }
  762. static void
  763. isar_pump_statev_modem(struct isar_ch *ch, u8 devt) {
  764. u8 dps = SET_DPS(ch->dpath);
  765. switch (devt) {
  766. case PSEV_10MS_TIMER:
  767. pr_debug("%s: pump stev TIMER\n", ch->is->name);
  768. break;
  769. case PSEV_CON_ON:
  770. pr_debug("%s: pump stev CONNECT\n", ch->is->name);
  771. deliver_status(ch, HW_MOD_CONNECT);
  772. break;
  773. case PSEV_CON_OFF:
  774. pr_debug("%s: pump stev NO CONNECT\n", ch->is->name);
  775. send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
  776. deliver_status(ch, HW_MOD_NOCARR);
  777. break;
  778. case PSEV_V24_OFF:
  779. pr_debug("%s: pump stev V24 OFF\n", ch->is->name);
  780. break;
  781. case PSEV_CTS_ON:
  782. pr_debug("%s: pump stev CTS ON\n", ch->is->name);
  783. break;
  784. case PSEV_CTS_OFF:
  785. pr_debug("%s pump stev CTS OFF\n", ch->is->name);
  786. break;
  787. case PSEV_DCD_ON:
  788. pr_debug("%s: pump stev CARRIER ON\n", ch->is->name);
  789. test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
  790. send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
  791. break;
  792. case PSEV_DCD_OFF:
  793. pr_debug("%s: pump stev CARRIER OFF\n", ch->is->name);
  794. break;
  795. case PSEV_DSR_ON:
  796. pr_debug("%s: pump stev DSR ON\n", ch->is->name);
  797. break;
  798. case PSEV_DSR_OFF:
  799. pr_debug("%s: pump stev DSR_OFF\n", ch->is->name);
  800. break;
  801. case PSEV_REM_RET:
  802. pr_debug("%s: pump stev REMOTE RETRAIN\n", ch->is->name);
  803. break;
  804. case PSEV_REM_REN:
  805. pr_debug("%s: pump stev REMOTE RENEGOTIATE\n", ch->is->name);
  806. break;
  807. case PSEV_GSTN_CLR:
  808. pr_debug("%s: pump stev GSTN CLEAR\n", ch->is->name);
  809. break;
  810. default:
  811. pr_info("u%s: unknown pump stev %x\n", ch->is->name, devt);
  812. break;
  813. }
  814. }
  815. static void
  816. isar_pump_statev_fax(struct isar_ch *ch, u8 devt) {
  817. u8 dps = SET_DPS(ch->dpath);
  818. u8 p1;
  819. switch (devt) {
  820. case PSEV_10MS_TIMER:
  821. pr_debug("%s: pump stev TIMER\n", ch->is->name);
  822. break;
  823. case PSEV_RSP_READY:
  824. pr_debug("%s: pump stev RSP_READY\n", ch->is->name);
  825. ch->state = STFAX_READY;
  826. deliver_status(ch, HW_MOD_READY);
  827. #ifdef AUTOCON
  828. if (test_bit(BC_FLG_ORIG, &ch->bch.Flags))
  829. isar_pump_cmd(bch, HW_MOD_FRH, 3);
  830. else
  831. isar_pump_cmd(bch, HW_MOD_FTH, 3);
  832. #endif
  833. break;
  834. case PSEV_LINE_TX_H:
  835. if (ch->state == STFAX_LINE) {
  836. pr_debug("%s: pump stev LINE_TX_H\n", ch->is->name);
  837. ch->state = STFAX_CONT;
  838. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  839. PCTRL_CMD_CONT, 0, NULL);
  840. } else {
  841. pr_debug("%s: pump stev LINE_TX_H wrong st %x\n",
  842. ch->is->name, ch->state);
  843. }
  844. break;
  845. case PSEV_LINE_RX_H:
  846. if (ch->state == STFAX_LINE) {
  847. pr_debug("%s: pump stev LINE_RX_H\n", ch->is->name);
  848. ch->state = STFAX_CONT;
  849. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  850. PCTRL_CMD_CONT, 0, NULL);
  851. } else {
  852. pr_debug("%s: pump stev LINE_RX_H wrong st %x\n",
  853. ch->is->name, ch->state);
  854. }
  855. break;
  856. case PSEV_LINE_TX_B:
  857. if (ch->state == STFAX_LINE) {
  858. pr_debug("%s: pump stev LINE_TX_B\n", ch->is->name);
  859. ch->state = STFAX_CONT;
  860. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  861. PCTRL_CMD_CONT, 0, NULL);
  862. } else {
  863. pr_debug("%s: pump stev LINE_TX_B wrong st %x\n",
  864. ch->is->name, ch->state);
  865. }
  866. break;
  867. case PSEV_LINE_RX_B:
  868. if (ch->state == STFAX_LINE) {
  869. pr_debug("%s: pump stev LINE_RX_B\n", ch->is->name);
  870. ch->state = STFAX_CONT;
  871. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  872. PCTRL_CMD_CONT, 0, NULL);
  873. } else {
  874. pr_debug("%s: pump stev LINE_RX_B wrong st %x\n",
  875. ch->is->name, ch->state);
  876. }
  877. break;
  878. case PSEV_RSP_CONN:
  879. if (ch->state == STFAX_CONT) {
  880. pr_debug("%s: pump stev RSP_CONN\n", ch->is->name);
  881. ch->state = STFAX_ACTIV;
  882. test_and_set_bit(ISAR_RATE_REQ, &ch->is->Flags);
  883. send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
  884. if (ch->cmd == PCTRL_CMD_FTH) {
  885. int delay = (ch->mod == 3) ? 1000 : 200;
  886. /* 1s (200 ms) Flags before data */
  887. if (test_and_set_bit(FLG_FTI_RUN,
  888. &ch->bch.Flags))
  889. del_timer(&ch->ftimer);
  890. ch->ftimer.expires =
  891. jiffies + ((delay * HZ) / 1000);
  892. test_and_set_bit(FLG_LL_CONN,
  893. &ch->bch.Flags);
  894. add_timer(&ch->ftimer);
  895. } else {
  896. deliver_status(ch, HW_MOD_CONNECT);
  897. }
  898. } else {
  899. pr_debug("%s: pump stev RSP_CONN wrong st %x\n",
  900. ch->is->name, ch->state);
  901. }
  902. break;
  903. case PSEV_FLAGS_DET:
  904. pr_debug("%s: pump stev FLAGS_DET\n", ch->is->name);
  905. break;
  906. case PSEV_RSP_DISC:
  907. pr_debug("%s: pump stev RSP_DISC state(%d)\n",
  908. ch->is->name, ch->state);
  909. if (ch->state == STFAX_ESCAPE) {
  910. p1 = 5;
  911. switch (ch->newcmd) {
  912. case 0:
  913. ch->state = STFAX_READY;
  914. break;
  915. case PCTRL_CMD_FTM:
  916. p1 = 2;
  917. case PCTRL_CMD_FTH:
  918. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  919. PCTRL_CMD_SILON, 1, &p1);
  920. ch->state = STFAX_SILDET;
  921. break;
  922. case PCTRL_CMD_FRH:
  923. case PCTRL_CMD_FRM:
  924. ch->mod = ch->newmod;
  925. p1 = ch->newmod;
  926. ch->newmod = 0;
  927. ch->cmd = ch->newcmd;
  928. ch->newcmd = 0;
  929. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  930. ch->cmd, 1, &p1);
  931. ch->state = STFAX_LINE;
  932. ch->try_mod = 3;
  933. break;
  934. default:
  935. pr_debug("%s: RSP_DISC unknown newcmd %x\n",
  936. ch->is->name, ch->newcmd);
  937. break;
  938. }
  939. } else if (ch->state == STFAX_ACTIV) {
  940. if (test_and_clear_bit(FLG_LL_OK, &ch->bch.Flags))
  941. deliver_status(ch, HW_MOD_OK);
  942. else if (ch->cmd == PCTRL_CMD_FRM)
  943. deliver_status(ch, HW_MOD_NOCARR);
  944. else
  945. deliver_status(ch, HW_MOD_FCERROR);
  946. ch->state = STFAX_READY;
  947. } else if (ch->state != STFAX_SILDET) {
  948. /* ignore in STFAX_SILDET */
  949. ch->state = STFAX_READY;
  950. deliver_status(ch, HW_MOD_FCERROR);
  951. }
  952. break;
  953. case PSEV_RSP_SILDET:
  954. pr_debug("%s: pump stev RSP_SILDET\n", ch->is->name);
  955. if (ch->state == STFAX_SILDET) {
  956. ch->mod = ch->newmod;
  957. p1 = ch->newmod;
  958. ch->newmod = 0;
  959. ch->cmd = ch->newcmd;
  960. ch->newcmd = 0;
  961. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  962. ch->cmd, 1, &p1);
  963. ch->state = STFAX_LINE;
  964. ch->try_mod = 3;
  965. }
  966. break;
  967. case PSEV_RSP_SILOFF:
  968. pr_debug("%s: pump stev RSP_SILOFF\n", ch->is->name);
  969. break;
  970. case PSEV_RSP_FCERR:
  971. if (ch->state == STFAX_LINE) {
  972. pr_debug("%s: pump stev RSP_FCERR try %d\n",
  973. ch->is->name, ch->try_mod);
  974. if (ch->try_mod--) {
  975. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL,
  976. ch->cmd, 1, &ch->mod);
  977. break;
  978. }
  979. }
  980. pr_debug("%s: pump stev RSP_FCERR\n", ch->is->name);
  981. ch->state = STFAX_ESCAPE;
  982. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC,
  983. 0, NULL);
  984. deliver_status(ch, HW_MOD_FCERROR);
  985. break;
  986. default:
  987. break;
  988. }
  989. }
  990. void
  991. mISDNisar_irq(struct isar_hw *isar)
  992. {
  993. struct isar_ch *ch;
  994. get_irq_infos(isar);
  995. switch (isar->iis & ISAR_IIS_MSCMSD) {
  996. case ISAR_IIS_RDATA:
  997. ch = sel_bch_isar(isar, isar->iis >> 6);
  998. if (ch)
  999. isar_rcv_frame(ch);
  1000. else {
  1001. pr_debug("%s: ISAR spurious IIS_RDATA %x/%x/%x\n",
  1002. isar->name, isar->iis, isar->cmsb,
  1003. isar->clsb);
  1004. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1005. }
  1006. break;
  1007. case ISAR_IIS_GSTEV:
  1008. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1009. isar->bstat |= isar->cmsb;
  1010. check_send(isar, isar->cmsb);
  1011. break;
  1012. case ISAR_IIS_BSTEV:
  1013. #ifdef ERROR_STATISTIC
  1014. ch = sel_bch_isar(isar, isar->iis >> 6);
  1015. if (ch) {
  1016. if (isar->cmsb == BSTEV_TBO)
  1017. ch->bch.err_tx++;
  1018. if (isar->cmsb == BSTEV_RBO)
  1019. ch->bch.err_rdo++;
  1020. }
  1021. #endif
  1022. pr_debug("%s: Buffer STEV dpath%d msb(%x)\n",
  1023. isar->name, isar->iis >> 6, isar->cmsb);
  1024. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1025. break;
  1026. case ISAR_IIS_PSTEV:
  1027. ch = sel_bch_isar(isar, isar->iis >> 6);
  1028. if (ch) {
  1029. rcv_mbox(isar, NULL);
  1030. if (ch->bch.state == ISDN_P_B_MODEM_ASYNC)
  1031. isar_pump_statev_modem(ch, isar->cmsb);
  1032. else if (ch->bch.state == ISDN_P_B_T30_FAX)
  1033. isar_pump_statev_fax(ch, isar->cmsb);
  1034. else if (ch->bch.state == ISDN_P_B_RAW) {
  1035. int tt;
  1036. tt = isar->cmsb | 0x30;
  1037. if (tt == 0x3e)
  1038. tt = '*';
  1039. else if (tt == 0x3f)
  1040. tt = '#';
  1041. else if (tt > '9')
  1042. tt += 7;
  1043. tt |= DTMF_TONE_VAL;
  1044. _queue_data(&ch->bch.ch, PH_CONTROL_IND,
  1045. MISDN_ID_ANY, sizeof(tt), &tt,
  1046. GFP_ATOMIC);
  1047. } else
  1048. pr_debug("%s: ISAR IIS_PSTEV pm %d sta %x\n",
  1049. isar->name, ch->bch.state,
  1050. isar->cmsb);
  1051. } else {
  1052. pr_debug("%s: ISAR spurious IIS_PSTEV %x/%x/%x\n",
  1053. isar->name, isar->iis, isar->cmsb,
  1054. isar->clsb);
  1055. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1056. }
  1057. break;
  1058. case ISAR_IIS_PSTRSP:
  1059. ch = sel_bch_isar(isar, isar->iis >> 6);
  1060. if (ch) {
  1061. rcv_mbox(isar, NULL);
  1062. isar_pump_status_rsp(ch);
  1063. } else {
  1064. pr_debug("%s: ISAR spurious IIS_PSTRSP %x/%x/%x\n",
  1065. isar->name, isar->iis, isar->cmsb,
  1066. isar->clsb);
  1067. isar->write_reg(isar->hw, ISAR_IIA, 0);
  1068. }
  1069. break;
  1070. case ISAR_IIS_DIAG:
  1071. case ISAR_IIS_BSTRSP:
  1072. case ISAR_IIS_IOM2RSP:
  1073. rcv_mbox(isar, NULL);
  1074. break;
  1075. case ISAR_IIS_INVMSG:
  1076. rcv_mbox(isar, NULL);
  1077. pr_debug("%s: invalid msg his:%x\n", isar->name, isar->cmsb);
  1078. break;
  1079. default:
  1080. rcv_mbox(isar, NULL);
  1081. pr_debug("%s: unhandled msg iis(%x) ctrl(%x/%x)\n",
  1082. isar->name, isar->iis, isar->cmsb, isar->clsb);
  1083. break;
  1084. }
  1085. }
  1086. EXPORT_SYMBOL(mISDNisar_irq);
  1087. static void
  1088. ftimer_handler(unsigned long data)
  1089. {
  1090. struct isar_ch *ch = (struct isar_ch *)data;
  1091. pr_debug("%s: ftimer flags %lx\n", ch->is->name, ch->bch.Flags);
  1092. test_and_clear_bit(FLG_FTI_RUN, &ch->bch.Flags);
  1093. if (test_and_clear_bit(FLG_LL_CONN, &ch->bch.Flags))
  1094. deliver_status(ch, HW_MOD_CONNECT);
  1095. }
  1096. static void
  1097. setup_pump(struct isar_ch *ch) {
  1098. u8 dps = SET_DPS(ch->dpath);
  1099. u8 ctrl, param[6];
  1100. switch (ch->bch.state) {
  1101. case ISDN_P_NONE:
  1102. case ISDN_P_B_RAW:
  1103. case ISDN_P_B_HDLC:
  1104. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
  1105. break;
  1106. case ISDN_P_B_L2DTMF:
  1107. if (test_bit(FLG_DTMFSEND, &ch->bch.Flags)) {
  1108. param[0] = 5; /* TOA 5 db */
  1109. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
  1110. PMOD_DTMF_TRANS, 1, param);
  1111. } else {
  1112. param[0] = 40; /* REL -46 dbm */
  1113. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG,
  1114. PMOD_DTMF, 1, param);
  1115. }
  1116. case ISDN_P_B_MODEM_ASYNC:
  1117. ctrl = PMOD_DATAMODEM;
  1118. if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
  1119. ctrl |= PCTRL_ORIG;
  1120. param[5] = PV32P6_CTN;
  1121. } else {
  1122. param[5] = PV32P6_ATN;
  1123. }
  1124. param[0] = 6; /* 6 db */
  1125. param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
  1126. PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
  1127. param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
  1128. param[3] = PV32P4_UT144;
  1129. param[4] = PV32P5_UT144;
  1130. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
  1131. break;
  1132. case ISDN_P_B_T30_FAX:
  1133. ctrl = PMOD_FAX;
  1134. if (test_bit(FLG_ORIGIN, &ch->bch.Flags)) {
  1135. ctrl |= PCTRL_ORIG;
  1136. param[1] = PFAXP2_CTN;
  1137. } else {
  1138. param[1] = PFAXP2_ATN;
  1139. }
  1140. param[0] = 6; /* 6 db */
  1141. send_mbox(ch->is, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
  1142. ch->state = STFAX_NULL;
  1143. ch->newcmd = 0;
  1144. ch->newmod = 0;
  1145. test_and_set_bit(FLG_FTI_RUN, &ch->bch.Flags);
  1146. break;
  1147. }
  1148. udelay(1000);
  1149. send_mbox(ch->is, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
  1150. udelay(1000);
  1151. }
  1152. static void
  1153. setup_sart(struct isar_ch *ch) {
  1154. u8 dps = SET_DPS(ch->dpath);
  1155. u8 ctrl, param[2] = {0, 0};
  1156. switch (ch->bch.state) {
  1157. case ISDN_P_NONE:
  1158. send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE,
  1159. 0, NULL);
  1160. break;
  1161. case ISDN_P_B_RAW:
  1162. case ISDN_P_B_L2DTMF:
  1163. send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_BINARY,
  1164. 2, param);
  1165. break;
  1166. case ISDN_P_B_HDLC:
  1167. case ISDN_P_B_T30_FAX:
  1168. send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, SMODE_HDLC,
  1169. 1, param);
  1170. break;
  1171. case ISDN_P_B_MODEM_ASYNC:
  1172. ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
  1173. param[0] = S_P1_CHS_8;
  1174. param[1] = S_P2_BFT_DEF;
  1175. send_mbox(ch->is, dps | ISAR_HIS_SARTCFG, ctrl, 2, param);
  1176. break;
  1177. }
  1178. udelay(1000);
  1179. send_mbox(ch->is, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
  1180. udelay(1000);
  1181. }
  1182. static void
  1183. setup_iom2(struct isar_ch *ch) {
  1184. u8 dps = SET_DPS(ch->dpath);
  1185. u8 cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD, 0, 0, 0, 0};
  1186. if (ch->bch.nr == 2) {
  1187. msg[1] = 1;
  1188. msg[3] = 1;
  1189. }
  1190. switch (ch->bch.state) {
  1191. case ISDN_P_NONE:
  1192. cmsb = 0;
  1193. /* dummy slot */
  1194. msg[1] = ch->dpath + 2;
  1195. msg[3] = ch->dpath + 2;
  1196. break;
  1197. case ISDN_P_B_RAW:
  1198. case ISDN_P_B_HDLC:
  1199. break;
  1200. case ISDN_P_B_MODEM_ASYNC:
  1201. case ISDN_P_B_T30_FAX:
  1202. cmsb |= IOM_CTRL_RCV;
  1203. case ISDN_P_B_L2DTMF:
  1204. if (test_bit(FLG_DTMFSEND, &ch->bch.Flags))
  1205. cmsb |= IOM_CTRL_RCV;
  1206. cmsb |= IOM_CTRL_ALAW;
  1207. break;
  1208. }
  1209. send_mbox(ch->is, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
  1210. udelay(1000);
  1211. send_mbox(ch->is, dps | ISAR_HIS_IOM2REQ, 0, 0, NULL);
  1212. udelay(1000);
  1213. }
  1214. static int
  1215. modeisar(struct isar_ch *ch, u32 bprotocol)
  1216. {
  1217. /* Here we are selecting the best datapath for requested protocol */
  1218. if (ch->bch.state == ISDN_P_NONE) { /* New Setup */
  1219. switch (bprotocol) {
  1220. case ISDN_P_NONE: /* init */
  1221. if (!ch->dpath)
  1222. /* no init for dpath 0 */
  1223. return 0;
  1224. test_and_clear_bit(FLG_HDLC, &ch->bch.Flags);
  1225. test_and_clear_bit(FLG_TRANSPARENT, &ch->bch.Flags);
  1226. break;
  1227. case ISDN_P_B_RAW:
  1228. case ISDN_P_B_HDLC:
  1229. /* best is datapath 2 */
  1230. if (!test_and_set_bit(ISAR_DP2_USE, &ch->is->Flags))
  1231. ch->dpath = 2;
  1232. else if (!test_and_set_bit(ISAR_DP1_USE,
  1233. &ch->is->Flags))
  1234. ch->dpath = 1;
  1235. else {
  1236. pr_info("modeisar both pathes in use\n");
  1237. return -EBUSY;
  1238. }
  1239. if (bprotocol == ISDN_P_B_HDLC)
  1240. test_and_set_bit(FLG_HDLC, &ch->bch.Flags);
  1241. else
  1242. test_and_set_bit(FLG_TRANSPARENT,
  1243. &ch->bch.Flags);
  1244. break;
  1245. case ISDN_P_B_MODEM_ASYNC:
  1246. case ISDN_P_B_T30_FAX:
  1247. case ISDN_P_B_L2DTMF:
  1248. /* only datapath 1 */
  1249. if (!test_and_set_bit(ISAR_DP1_USE, &ch->is->Flags))
  1250. ch->dpath = 1;
  1251. else {
  1252. pr_info("%s: ISAR modeisar analog functions"
  1253. "only with DP1\n", ch->is->name);
  1254. return -EBUSY;
  1255. }
  1256. break;
  1257. default:
  1258. pr_info("%s: protocol not known %x\n", ch->is->name,
  1259. bprotocol);
  1260. return -ENOPROTOOPT;
  1261. }
  1262. }
  1263. pr_debug("%s: ISAR ch%d dp%d protocol %x->%x\n", ch->is->name,
  1264. ch->bch.nr, ch->dpath, ch->bch.state, bprotocol);
  1265. ch->bch.state = bprotocol;
  1266. setup_pump(ch);
  1267. setup_iom2(ch);
  1268. setup_sart(ch);
  1269. if (ch->bch.state == ISDN_P_NONE) {
  1270. /* Clear resources */
  1271. if (ch->dpath == 1)
  1272. test_and_clear_bit(ISAR_DP1_USE, &ch->is->Flags);
  1273. else if (ch->dpath == 2)
  1274. test_and_clear_bit(ISAR_DP2_USE, &ch->is->Flags);
  1275. ch->dpath = 0;
  1276. ch->is->ctrl(ch->is->hw, HW_DEACT_IND, ch->bch.nr);
  1277. } else
  1278. ch->is->ctrl(ch->is->hw, HW_ACTIVATE_IND, ch->bch.nr);
  1279. return 0;
  1280. }
  1281. static void
  1282. isar_pump_cmd(struct isar_ch *ch, u32 cmd, u8 para)
  1283. {
  1284. u8 dps = SET_DPS(ch->dpath);
  1285. u8 ctrl = 0, nom = 0, p1 = 0;
  1286. pr_debug("%s: isar_pump_cmd %x/%x state(%x)\n",
  1287. ch->is->name, cmd, para, ch->bch.state);
  1288. switch (cmd) {
  1289. case HW_MOD_FTM:
  1290. if (ch->state == STFAX_READY) {
  1291. p1 = para;
  1292. ctrl = PCTRL_CMD_FTM;
  1293. nom = 1;
  1294. ch->state = STFAX_LINE;
  1295. ch->cmd = ctrl;
  1296. ch->mod = para;
  1297. ch->newmod = 0;
  1298. ch->newcmd = 0;
  1299. ch->try_mod = 3;
  1300. } else if ((ch->state == STFAX_ACTIV) &&
  1301. (ch->cmd == PCTRL_CMD_FTM) && (ch->mod == para))
  1302. deliver_status(ch, HW_MOD_CONNECT);
  1303. else {
  1304. ch->newmod = para;
  1305. ch->newcmd = PCTRL_CMD_FTM;
  1306. nom = 0;
  1307. ctrl = PCTRL_CMD_ESC;
  1308. ch->state = STFAX_ESCAPE;
  1309. }
  1310. break;
  1311. case HW_MOD_FTH:
  1312. if (ch->state == STFAX_READY) {
  1313. p1 = para;
  1314. ctrl = PCTRL_CMD_FTH;
  1315. nom = 1;
  1316. ch->state = STFAX_LINE;
  1317. ch->cmd = ctrl;
  1318. ch->mod = para;
  1319. ch->newmod = 0;
  1320. ch->newcmd = 0;
  1321. ch->try_mod = 3;
  1322. } else if ((ch->state == STFAX_ACTIV) &&
  1323. (ch->cmd == PCTRL_CMD_FTH) && (ch->mod == para))
  1324. deliver_status(ch, HW_MOD_CONNECT);
  1325. else {
  1326. ch->newmod = para;
  1327. ch->newcmd = PCTRL_CMD_FTH;
  1328. nom = 0;
  1329. ctrl = PCTRL_CMD_ESC;
  1330. ch->state = STFAX_ESCAPE;
  1331. }
  1332. break;
  1333. case HW_MOD_FRM:
  1334. if (ch->state == STFAX_READY) {
  1335. p1 = para;
  1336. ctrl = PCTRL_CMD_FRM;
  1337. nom = 1;
  1338. ch->state = STFAX_LINE;
  1339. ch->cmd = ctrl;
  1340. ch->mod = para;
  1341. ch->newmod = 0;
  1342. ch->newcmd = 0;
  1343. ch->try_mod = 3;
  1344. } else if ((ch->state == STFAX_ACTIV) &&
  1345. (ch->cmd == PCTRL_CMD_FRM) && (ch->mod == para))
  1346. deliver_status(ch, HW_MOD_CONNECT);
  1347. else {
  1348. ch->newmod = para;
  1349. ch->newcmd = PCTRL_CMD_FRM;
  1350. nom = 0;
  1351. ctrl = PCTRL_CMD_ESC;
  1352. ch->state = STFAX_ESCAPE;
  1353. }
  1354. break;
  1355. case HW_MOD_FRH:
  1356. if (ch->state == STFAX_READY) {
  1357. p1 = para;
  1358. ctrl = PCTRL_CMD_FRH;
  1359. nom = 1;
  1360. ch->state = STFAX_LINE;
  1361. ch->cmd = ctrl;
  1362. ch->mod = para;
  1363. ch->newmod = 0;
  1364. ch->newcmd = 0;
  1365. ch->try_mod = 3;
  1366. } else if ((ch->state == STFAX_ACTIV) &&
  1367. (ch->cmd == PCTRL_CMD_FRH) && (ch->mod == para))
  1368. deliver_status(ch, HW_MOD_CONNECT);
  1369. else {
  1370. ch->newmod = para;
  1371. ch->newcmd = PCTRL_CMD_FRH;
  1372. nom = 0;
  1373. ctrl = PCTRL_CMD_ESC;
  1374. ch->state = STFAX_ESCAPE;
  1375. }
  1376. break;
  1377. case PCTRL_CMD_TDTMF:
  1378. p1 = para;
  1379. nom = 1;
  1380. ctrl = PCTRL_CMD_TDTMF;
  1381. break;
  1382. }
  1383. if (ctrl)
  1384. send_mbox(ch->is, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
  1385. }
  1386. static void
  1387. isar_setup(struct isar_hw *isar)
  1388. {
  1389. u8 msg;
  1390. int i;
  1391. /* Dpath 1, 2 */
  1392. msg = 61;
  1393. for (i = 0; i < 2; i++) {
  1394. /* Buffer Config */
  1395. send_mbox(isar, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
  1396. ISAR_HIS_P12CFG, 4, 1, &msg);
  1397. isar->ch[i].mml = msg;
  1398. isar->ch[i].bch.state = 0;
  1399. isar->ch[i].dpath = i + 1;
  1400. modeisar(&isar->ch[i], ISDN_P_NONE);
  1401. }
  1402. }
  1403. static int
  1404. isar_l2l1(struct mISDNchannel *ch, struct sk_buff *skb)
  1405. {
  1406. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  1407. struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
  1408. int ret = -EINVAL;
  1409. struct mISDNhead *hh = mISDN_HEAD_P(skb);
  1410. u32 id, *val;
  1411. u_long flags;
  1412. switch (hh->prim) {
  1413. case PH_DATA_REQ:
  1414. spin_lock_irqsave(ich->is->hwlock, flags);
  1415. ret = bchannel_senddata(bch, skb);
  1416. if (ret > 0) { /* direct TX */
  1417. ret = 0;
  1418. isar_fill_fifo(ich);
  1419. }
  1420. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1421. return ret;
  1422. case PH_ACTIVATE_REQ:
  1423. spin_lock_irqsave(ich->is->hwlock, flags);
  1424. if (!test_and_set_bit(FLG_ACTIVE, &bch->Flags))
  1425. ret = modeisar(ich, ch->protocol);
  1426. else
  1427. ret = 0;
  1428. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1429. if (!ret)
  1430. _queue_data(ch, PH_ACTIVATE_IND, MISDN_ID_ANY, 0,
  1431. NULL, GFP_KERNEL);
  1432. break;
  1433. case PH_DEACTIVATE_REQ:
  1434. spin_lock_irqsave(ich->is->hwlock, flags);
  1435. mISDN_clear_bchannel(bch);
  1436. modeisar(ich, ISDN_P_NONE);
  1437. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1438. _queue_data(ch, PH_DEACTIVATE_IND, MISDN_ID_ANY, 0,
  1439. NULL, GFP_KERNEL);
  1440. ret = 0;
  1441. break;
  1442. case PH_CONTROL_REQ:
  1443. val = (u32 *)skb->data;
  1444. pr_debug("%s: PH_CONTROL | REQUEST %x/%x\n", ich->is->name,
  1445. hh->id, *val);
  1446. if ((hh->id == 0) && ((*val & ~DTMF_TONE_MASK) ==
  1447. DTMF_TONE_VAL)) {
  1448. if (bch->state == ISDN_P_B_L2DTMF) {
  1449. char tt = *val & DTMF_TONE_MASK;
  1450. if (tt == '*')
  1451. tt = 0x1e;
  1452. else if (tt == '#')
  1453. tt = 0x1f;
  1454. else if (tt > '9')
  1455. tt -= 7;
  1456. tt &= 0x1f;
  1457. spin_lock_irqsave(ich->is->hwlock, flags);
  1458. isar_pump_cmd(ich, PCTRL_CMD_TDTMF, tt);
  1459. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1460. } else {
  1461. pr_info("%s: DTMF send wrong protocol %x\n",
  1462. __func__, bch->state);
  1463. return -EINVAL;
  1464. }
  1465. } else if ((hh->id == HW_MOD_FRM) || (hh->id == HW_MOD_FRH) ||
  1466. (hh->id == HW_MOD_FTM) || (hh->id == HW_MOD_FTH)) {
  1467. for (id = 0; id < FAXMODCNT; id++)
  1468. if (faxmodulation[id] == *val)
  1469. break;
  1470. if ((FAXMODCNT > id) &&
  1471. test_bit(FLG_INITIALIZED, &bch->Flags)) {
  1472. pr_debug("%s: isar: new mod\n", ich->is->name);
  1473. isar_pump_cmd(ich, hh->id, *val);
  1474. ret = 0;
  1475. } else {
  1476. pr_info("%s: wrong modulation\n",
  1477. ich->is->name);
  1478. ret = -EINVAL;
  1479. }
  1480. } else if (hh->id == HW_MOD_LASTDATA)
  1481. test_and_set_bit(FLG_DLEETX, &bch->Flags);
  1482. else {
  1483. pr_info("%s: unknown PH_CONTROL_REQ %x\n",
  1484. ich->is->name, hh->id);
  1485. ret = -EINVAL;
  1486. }
  1487. default:
  1488. pr_info("%s: %s unknown prim(%x,%x)\n",
  1489. ich->is->name, __func__, hh->prim, hh->id);
  1490. ret = -EINVAL;
  1491. }
  1492. if (!ret)
  1493. dev_kfree_skb(skb);
  1494. return ret;
  1495. }
  1496. static int
  1497. channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
  1498. {
  1499. return mISDN_ctrl_bchannel(bch, cq);
  1500. }
  1501. static int
  1502. isar_bctrl(struct mISDNchannel *ch, u32 cmd, void *arg)
  1503. {
  1504. struct bchannel *bch = container_of(ch, struct bchannel, ch);
  1505. struct isar_ch *ich = container_of(bch, struct isar_ch, bch);
  1506. int ret = -EINVAL;
  1507. u_long flags;
  1508. pr_debug("%s: %s cmd:%x %p\n", ich->is->name, __func__, cmd, arg);
  1509. switch (cmd) {
  1510. case CLOSE_CHANNEL:
  1511. test_and_clear_bit(FLG_OPEN, &bch->Flags);
  1512. spin_lock_irqsave(ich->is->hwlock, flags);
  1513. mISDN_freebchannel(bch);
  1514. modeisar(ich, ISDN_P_NONE);
  1515. spin_unlock_irqrestore(ich->is->hwlock, flags);
  1516. ch->protocol = ISDN_P_NONE;
  1517. ch->peer = NULL;
  1518. module_put(ich->is->owner);
  1519. ret = 0;
  1520. break;
  1521. case CONTROL_CHANNEL:
  1522. ret = channel_bctrl(bch, arg);
  1523. break;
  1524. default:
  1525. pr_info("%s: %s unknown prim(%x)\n",
  1526. ich->is->name, __func__, cmd);
  1527. }
  1528. return ret;
  1529. }
  1530. static void
  1531. free_isar(struct isar_hw *isar)
  1532. {
  1533. modeisar(&isar->ch[0], ISDN_P_NONE);
  1534. modeisar(&isar->ch[1], ISDN_P_NONE);
  1535. del_timer(&isar->ch[0].ftimer);
  1536. del_timer(&isar->ch[1].ftimer);
  1537. test_and_clear_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
  1538. test_and_clear_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
  1539. }
  1540. static int
  1541. init_isar(struct isar_hw *isar)
  1542. {
  1543. int cnt = 3;
  1544. while (cnt--) {
  1545. isar->version = ISARVersion(isar);
  1546. if (isar->ch[0].bch.debug & DEBUG_HW)
  1547. pr_notice("%s: Testing version %d (%d time)\n",
  1548. isar->name, isar->version, 3 - cnt);
  1549. if (isar->version == 1)
  1550. break;
  1551. isar->ctrl(isar->hw, HW_RESET_REQ, 0);
  1552. }
  1553. if (isar->version != 1)
  1554. return -EINVAL;
  1555. isar->ch[0].ftimer.function = &ftimer_handler;
  1556. isar->ch[0].ftimer.data = (long)&isar->ch[0];
  1557. init_timer(&isar->ch[0].ftimer);
  1558. test_and_set_bit(FLG_INITIALIZED, &isar->ch[0].bch.Flags);
  1559. isar->ch[1].ftimer.function = &ftimer_handler;
  1560. isar->ch[1].ftimer.data = (long)&isar->ch[1];
  1561. init_timer(&isar->ch[1].ftimer);
  1562. test_and_set_bit(FLG_INITIALIZED, &isar->ch[1].bch.Flags);
  1563. return 0;
  1564. }
  1565. static int
  1566. isar_open(struct isar_hw *isar, struct channel_req *rq)
  1567. {
  1568. struct bchannel *bch;
  1569. if (rq->adr.channel == 0 || rq->adr.channel > 2)
  1570. return -EINVAL;
  1571. if (rq->protocol == ISDN_P_NONE)
  1572. return -EINVAL;
  1573. bch = &isar->ch[rq->adr.channel - 1].bch;
  1574. if (test_and_set_bit(FLG_OPEN, &bch->Flags))
  1575. return -EBUSY; /* b-channel can be only open once */
  1576. test_and_clear_bit(FLG_FILLEMPTY, &bch->Flags);
  1577. bch->ch.protocol = rq->protocol;
  1578. rq->ch = &bch->ch;
  1579. return 0;
  1580. }
  1581. u32
  1582. mISDNisar_init(struct isar_hw *isar, void *hw)
  1583. {
  1584. u32 ret, i;
  1585. isar->hw = hw;
  1586. for (i = 0; i < 2; i++) {
  1587. isar->ch[i].bch.nr = i + 1;
  1588. mISDN_initbchannel(&isar->ch[i].bch, MAX_DATA_MEM, 32);
  1589. isar->ch[i].bch.ch.nr = i + 1;
  1590. isar->ch[i].bch.ch.send = &isar_l2l1;
  1591. isar->ch[i].bch.ch.ctrl = isar_bctrl;
  1592. isar->ch[i].bch.hw = hw;
  1593. isar->ch[i].is = isar;
  1594. }
  1595. isar->init = &init_isar;
  1596. isar->release = &free_isar;
  1597. isar->firmware = &load_firmware;
  1598. isar->open = &isar_open;
  1599. ret = (1 << (ISDN_P_B_RAW & ISDN_P_B_MASK)) |
  1600. (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)) |
  1601. (1 << (ISDN_P_B_L2DTMF & ISDN_P_B_MASK)) |
  1602. (1 << (ISDN_P_B_MODEM_ASYNC & ISDN_P_B_MASK)) |
  1603. (1 << (ISDN_P_B_T30_FAX & ISDN_P_B_MASK));
  1604. return ret;
  1605. }
  1606. EXPORT_SYMBOL(mISDNisar_init);
  1607. static int __init isar_mod_init(void)
  1608. {
  1609. pr_notice("mISDN: ISAR driver Rev. %s\n", ISAR_REV);
  1610. return 0;
  1611. }
  1612. static void __exit isar_mod_cleanup(void)
  1613. {
  1614. pr_notice("mISDN: ISAR module unloaded\n");
  1615. }
  1616. module_init(isar_mod_init);
  1617. module_exit(isar_mod_cleanup);