mpc52xx_uart.c 30 KB

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  1. /*
  2. * Driver for the PSC of the Freescale MPC52xx PSCs configured as UARTs.
  3. *
  4. * FIXME According to the usermanual the status bits in the status register
  5. * are only updated when the peripherals access the FIFO and not when the
  6. * CPU access them. So since we use this bits to know when we stop writing
  7. * and reading, they may not be updated in-time and a race condition may
  8. * exists. But I haven't be able to prove this and I don't care. But if
  9. * any problem arises, it might worth checking. The TX/RX FIFO Stats
  10. * registers should be used in addition.
  11. * Update: Actually, they seem updated ... At least the bits we use.
  12. *
  13. *
  14. * Maintainer : Sylvain Munaut <tnt@246tNt.com>
  15. *
  16. * Some of the code has been inspired/copied from the 2.4 code written
  17. * by Dale Farnsworth <dfarnsworth@mvista.com>.
  18. *
  19. * Copyright (C) 2006 Secret Lab Technologies Ltd.
  20. * Grant Likely <grant.likely@secretlab.ca>
  21. * Copyright (C) 2004-2006 Sylvain Munaut <tnt@246tNt.com>
  22. * Copyright (C) 2003 MontaVista, Software, Inc.
  23. *
  24. * This file is licensed under the terms of the GNU General Public License
  25. * version 2. This program is licensed "as is" without any warranty of any
  26. * kind, whether express or implied.
  27. */
  28. /* Platform device Usage :
  29. *
  30. * Since PSCs can have multiple function, the correct driver for each one
  31. * is selected by calling mpc52xx_match_psc_function(...). The function
  32. * handled by this driver is "uart".
  33. *
  34. * The driver init all necessary registers to place the PSC in uart mode without
  35. * DCD. However, the pin multiplexing aren't changed and should be set either
  36. * by the bootloader or in the platform init code.
  37. *
  38. * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
  39. * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  40. * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  41. * fpr the console code : without this 1:1 mapping, at early boot time, when we
  42. * are parsing the kernel args console=ttyPSC?, we wouldn't know which PSC it
  43. * will be mapped to.
  44. */
  45. /* OF Platform device Usage :
  46. *
  47. * This driver is only used for PSCs configured in uart mode. The device
  48. * tree will have a node for each PSC in uart mode w/ device_type = "serial"
  49. * and "mpc52xx-psc-uart" in the compatible string
  50. *
  51. * By default, PSC devices are enumerated in the order they are found. However
  52. * a particular PSC number can be forces by adding 'device_no = <port#>'
  53. * to the device node.
  54. *
  55. * The driver init all necessary registers to place the PSC in uart mode without
  56. * DCD. However, the pin multiplexing aren't changed and should be set either
  57. * by the bootloader or in the platform init code.
  58. */
  59. #undef DEBUG
  60. #include <linux/device.h>
  61. #include <linux/module.h>
  62. #include <linux/tty.h>
  63. #include <linux/serial.h>
  64. #include <linux/sysrq.h>
  65. #include <linux/console.h>
  66. #include <asm/delay.h>
  67. #include <asm/io.h>
  68. #if defined(CONFIG_PPC_MERGE)
  69. #include <asm/of_platform.h>
  70. #else
  71. #include <linux/platform_device.h>
  72. #endif
  73. #include <asm/mpc52xx.h>
  74. #include <asm/mpc52xx_psc.h>
  75. #if defined(CONFIG_SERIAL_MPC52xx_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  76. #define SUPPORT_SYSRQ
  77. #endif
  78. #include <linux/serial_core.h>
  79. /* We've been assigned a range on the "Low-density serial ports" major */
  80. #define SERIAL_PSC_MAJOR 204
  81. #define SERIAL_PSC_MINOR 148
  82. #define ISR_PASS_LIMIT 256 /* Max number of iteration in the interrupt */
  83. static struct uart_port mpc52xx_uart_ports[MPC52xx_PSC_MAXNUM];
  84. /* Rem: - We use the read_status_mask as a shadow of
  85. * psc->mpc52xx_psc_imr
  86. * - It's important that is array is all zero on start as we
  87. * use it to know if it's initialized or not ! If it's not sure
  88. * it's cleared, then a memset(...,0,...) should be added to
  89. * the console_init
  90. */
  91. #if defined(CONFIG_PPC_MERGE)
  92. /* lookup table for matching device nodes to index numbers */
  93. static struct device_node *mpc52xx_uart_nodes[MPC52xx_PSC_MAXNUM];
  94. static void mpc52xx_uart_of_enumerate(void);
  95. #endif
  96. #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
  97. /* Forward declaration of the interruption handling routine */
  98. static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
  99. /* Simple macro to test if a port is console or not. This one is taken
  100. * for serial_core.c and maybe should be moved to serial_core.h ? */
  101. #ifdef CONFIG_SERIAL_CORE_CONSOLE
  102. #define uart_console(port) ((port)->cons && (port)->cons->index == (port)->line)
  103. #else
  104. #define uart_console(port) (0)
  105. #endif
  106. #if defined(CONFIG_PPC_MERGE)
  107. static struct of_device_id mpc52xx_uart_of_match[] = {
  108. { .type = "serial", .compatible = "mpc52xx-psc-uart", },
  109. { .type = "serial", .compatible = "mpc5200-psc", }, /* Efika only! */
  110. {},
  111. };
  112. #endif
  113. /* ======================================================================== */
  114. /* UART operations */
  115. /* ======================================================================== */
  116. static unsigned int
  117. mpc52xx_uart_tx_empty(struct uart_port *port)
  118. {
  119. int status = in_be16(&PSC(port)->mpc52xx_psc_status);
  120. return (status & MPC52xx_PSC_SR_TXEMP) ? TIOCSER_TEMT : 0;
  121. }
  122. static void
  123. mpc52xx_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
  124. {
  125. /* Not implemented */
  126. }
  127. static unsigned int
  128. mpc52xx_uart_get_mctrl(struct uart_port *port)
  129. {
  130. /* Not implemented */
  131. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  132. }
  133. static void
  134. mpc52xx_uart_stop_tx(struct uart_port *port)
  135. {
  136. /* port->lock taken by caller */
  137. port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
  138. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  139. }
  140. static void
  141. mpc52xx_uart_start_tx(struct uart_port *port)
  142. {
  143. /* port->lock taken by caller */
  144. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  145. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  146. }
  147. static void
  148. mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
  149. {
  150. unsigned long flags;
  151. spin_lock_irqsave(&port->lock, flags);
  152. port->x_char = ch;
  153. if (ch) {
  154. /* Make sure tx interrupts are on */
  155. /* Truly necessary ??? They should be anyway */
  156. port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
  157. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  158. }
  159. spin_unlock_irqrestore(&port->lock, flags);
  160. }
  161. static void
  162. mpc52xx_uart_stop_rx(struct uart_port *port)
  163. {
  164. /* port->lock taken by caller */
  165. port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
  166. out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
  167. }
  168. static void
  169. mpc52xx_uart_enable_ms(struct uart_port *port)
  170. {
  171. /* Not implemented */
  172. }
  173. static void
  174. mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
  175. {
  176. unsigned long flags;
  177. spin_lock_irqsave(&port->lock, flags);
  178. if ( ctl == -1 )
  179. out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
  180. else
  181. out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
  182. spin_unlock_irqrestore(&port->lock, flags);
  183. }
  184. static int
  185. mpc52xx_uart_startup(struct uart_port *port)
  186. {
  187. struct mpc52xx_psc __iomem *psc = PSC(port);
  188. int ret;
  189. /* Request IRQ */
  190. ret = request_irq(port->irq, mpc52xx_uart_int,
  191. IRQF_DISABLED | IRQF_SAMPLE_RANDOM, "mpc52xx_psc_uart", port);
  192. if (ret)
  193. return ret;
  194. /* Reset/activate the port, clear and enable interrupts */
  195. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  196. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  197. out_be32(&psc->sicr,0); /* UART mode DCD ignored */
  198. out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
  199. out_8(&psc->rfcntl, 0x00);
  200. out_be16(&psc->rfalarm, 0x1ff);
  201. out_8(&psc->tfcntl, 0x07);
  202. out_be16(&psc->tfalarm, 0x80);
  203. port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
  204. out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
  205. out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
  206. out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
  207. return 0;
  208. }
  209. static void
  210. mpc52xx_uart_shutdown(struct uart_port *port)
  211. {
  212. struct mpc52xx_psc __iomem *psc = PSC(port);
  213. /* Shut down the port, interrupt and all */
  214. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  215. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  216. port->read_status_mask = 0;
  217. out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
  218. /* Release interrupt */
  219. free_irq(port->irq, port);
  220. }
  221. static void
  222. mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
  223. struct ktermios *old)
  224. {
  225. struct mpc52xx_psc __iomem *psc = PSC(port);
  226. unsigned long flags;
  227. unsigned char mr1, mr2;
  228. unsigned short ctr;
  229. unsigned int j, baud, quot;
  230. /* Prepare what we're gonna write */
  231. mr1 = 0;
  232. switch (new->c_cflag & CSIZE) {
  233. case CS5: mr1 |= MPC52xx_PSC_MODE_5_BITS;
  234. break;
  235. case CS6: mr1 |= MPC52xx_PSC_MODE_6_BITS;
  236. break;
  237. case CS7: mr1 |= MPC52xx_PSC_MODE_7_BITS;
  238. break;
  239. case CS8:
  240. default: mr1 |= MPC52xx_PSC_MODE_8_BITS;
  241. }
  242. if (new->c_cflag & PARENB) {
  243. mr1 |= (new->c_cflag & PARODD) ?
  244. MPC52xx_PSC_MODE_PARODD : MPC52xx_PSC_MODE_PAREVEN;
  245. } else
  246. mr1 |= MPC52xx_PSC_MODE_PARNONE;
  247. mr2 = 0;
  248. if (new->c_cflag & CSTOPB)
  249. mr2 |= MPC52xx_PSC_MODE_TWO_STOP;
  250. else
  251. mr2 |= ((new->c_cflag & CSIZE) == CS5) ?
  252. MPC52xx_PSC_MODE_ONE_STOP_5_BITS :
  253. MPC52xx_PSC_MODE_ONE_STOP;
  254. baud = uart_get_baud_rate(port, new, old, 0, port->uartclk/16);
  255. quot = uart_get_divisor(port, baud);
  256. ctr = quot & 0xffff;
  257. /* Get the lock */
  258. spin_lock_irqsave(&port->lock, flags);
  259. /* Update the per-port timeout */
  260. uart_update_timeout(port, new->c_cflag, baud);
  261. /* Do our best to flush TX & RX, so we don't loose anything */
  262. /* But we don't wait indefinitly ! */
  263. j = 5000000; /* Maximum wait */
  264. /* FIXME Can't receive chars since set_termios might be called at early
  265. * boot for the console, all stuff is not yet ready to receive at that
  266. * time and that just makes the kernel oops */
  267. /* while (j-- && mpc52xx_uart_int_rx_chars(port)); */
  268. while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
  269. --j)
  270. udelay(1);
  271. if (!j)
  272. printk( KERN_ERR "mpc52xx_uart.c: "
  273. "Unable to flush RX & TX fifos in-time in set_termios."
  274. "Some chars may have been lost.\n" );
  275. /* Reset the TX & RX */
  276. out_8(&psc->command,MPC52xx_PSC_RST_RX);
  277. out_8(&psc->command,MPC52xx_PSC_RST_TX);
  278. /* Send new mode settings */
  279. out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
  280. out_8(&psc->mode,mr1);
  281. out_8(&psc->mode,mr2);
  282. out_8(&psc->ctur,ctr >> 8);
  283. out_8(&psc->ctlr,ctr & 0xff);
  284. /* Reenable TX & RX */
  285. out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
  286. out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
  287. /* We're all set, release the lock */
  288. spin_unlock_irqrestore(&port->lock, flags);
  289. }
  290. static const char *
  291. mpc52xx_uart_type(struct uart_port *port)
  292. {
  293. return port->type == PORT_MPC52xx ? "MPC52xx PSC" : NULL;
  294. }
  295. static void
  296. mpc52xx_uart_release_port(struct uart_port *port)
  297. {
  298. if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
  299. iounmap(port->membase);
  300. port->membase = NULL;
  301. }
  302. release_mem_region(port->mapbase, sizeof(struct mpc52xx_psc));
  303. }
  304. static int
  305. mpc52xx_uart_request_port(struct uart_port *port)
  306. {
  307. int err;
  308. if (port->flags & UPF_IOREMAP) /* Need to remap ? */
  309. port->membase = ioremap(port->mapbase,
  310. sizeof(struct mpc52xx_psc));
  311. if (!port->membase)
  312. return -EINVAL;
  313. err = request_mem_region(port->mapbase, sizeof(struct mpc52xx_psc),
  314. "mpc52xx_psc_uart") != NULL ? 0 : -EBUSY;
  315. if (err && (port->flags & UPF_IOREMAP)) {
  316. iounmap(port->membase);
  317. port->membase = NULL;
  318. }
  319. return err;
  320. }
  321. static void
  322. mpc52xx_uart_config_port(struct uart_port *port, int flags)
  323. {
  324. if ( (flags & UART_CONFIG_TYPE) &&
  325. (mpc52xx_uart_request_port(port) == 0) )
  326. port->type = PORT_MPC52xx;
  327. }
  328. static int
  329. mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
  330. {
  331. if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
  332. return -EINVAL;
  333. if ( (ser->irq != port->irq) ||
  334. (ser->io_type != SERIAL_IO_MEM) ||
  335. (ser->baud_base != port->uartclk) ||
  336. (ser->iomem_base != (void*)port->mapbase) ||
  337. (ser->hub6 != 0 ) )
  338. return -EINVAL;
  339. return 0;
  340. }
  341. static struct uart_ops mpc52xx_uart_ops = {
  342. .tx_empty = mpc52xx_uart_tx_empty,
  343. .set_mctrl = mpc52xx_uart_set_mctrl,
  344. .get_mctrl = mpc52xx_uart_get_mctrl,
  345. .stop_tx = mpc52xx_uart_stop_tx,
  346. .start_tx = mpc52xx_uart_start_tx,
  347. .send_xchar = mpc52xx_uart_send_xchar,
  348. .stop_rx = mpc52xx_uart_stop_rx,
  349. .enable_ms = mpc52xx_uart_enable_ms,
  350. .break_ctl = mpc52xx_uart_break_ctl,
  351. .startup = mpc52xx_uart_startup,
  352. .shutdown = mpc52xx_uart_shutdown,
  353. .set_termios = mpc52xx_uart_set_termios,
  354. /* .pm = mpc52xx_uart_pm, Not supported yet */
  355. /* .set_wake = mpc52xx_uart_set_wake, Not supported yet */
  356. .type = mpc52xx_uart_type,
  357. .release_port = mpc52xx_uart_release_port,
  358. .request_port = mpc52xx_uart_request_port,
  359. .config_port = mpc52xx_uart_config_port,
  360. .verify_port = mpc52xx_uart_verify_port
  361. };
  362. /* ======================================================================== */
  363. /* Interrupt handling */
  364. /* ======================================================================== */
  365. static inline int
  366. mpc52xx_uart_int_rx_chars(struct uart_port *port)
  367. {
  368. struct tty_struct *tty = port->info->tty;
  369. unsigned char ch, flag;
  370. unsigned short status;
  371. /* While we can read, do so ! */
  372. while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
  373. MPC52xx_PSC_SR_RXRDY) {
  374. /* Get the char */
  375. ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
  376. /* Handle sysreq char */
  377. #ifdef SUPPORT_SYSRQ
  378. if (uart_handle_sysrq_char(port, ch)) {
  379. port->sysrq = 0;
  380. continue;
  381. }
  382. #endif
  383. /* Store it */
  384. flag = TTY_NORMAL;
  385. port->icount.rx++;
  386. if ( status & (MPC52xx_PSC_SR_PE |
  387. MPC52xx_PSC_SR_FE |
  388. MPC52xx_PSC_SR_RB) ) {
  389. if (status & MPC52xx_PSC_SR_RB) {
  390. flag = TTY_BREAK;
  391. uart_handle_break(port);
  392. } else if (status & MPC52xx_PSC_SR_PE)
  393. flag = TTY_PARITY;
  394. else if (status & MPC52xx_PSC_SR_FE)
  395. flag = TTY_FRAME;
  396. /* Clear error condition */
  397. out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
  398. }
  399. tty_insert_flip_char(tty, ch, flag);
  400. if (status & MPC52xx_PSC_SR_OE) {
  401. /*
  402. * Overrun is special, since it's
  403. * reported immediately, and doesn't
  404. * affect the current character
  405. */
  406. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  407. }
  408. }
  409. tty_flip_buffer_push(tty);
  410. return in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_RXRDY;
  411. }
  412. static inline int
  413. mpc52xx_uart_int_tx_chars(struct uart_port *port)
  414. {
  415. struct circ_buf *xmit = &port->info->xmit;
  416. /* Process out of band chars */
  417. if (port->x_char) {
  418. out_8(&PSC(port)->mpc52xx_psc_buffer_8, port->x_char);
  419. port->icount.tx++;
  420. port->x_char = 0;
  421. return 1;
  422. }
  423. /* Nothing to do ? */
  424. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  425. mpc52xx_uart_stop_tx(port);
  426. return 0;
  427. }
  428. /* Send chars */
  429. while (in_be16(&PSC(port)->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXRDY) {
  430. out_8(&PSC(port)->mpc52xx_psc_buffer_8, xmit->buf[xmit->tail]);
  431. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  432. port->icount.tx++;
  433. if (uart_circ_empty(xmit))
  434. break;
  435. }
  436. /* Wake up */
  437. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  438. uart_write_wakeup(port);
  439. /* Maybe we're done after all */
  440. if (uart_circ_empty(xmit)) {
  441. mpc52xx_uart_stop_tx(port);
  442. return 0;
  443. }
  444. return 1;
  445. }
  446. static irqreturn_t
  447. mpc52xx_uart_int(int irq, void *dev_id)
  448. {
  449. struct uart_port *port = dev_id;
  450. unsigned long pass = ISR_PASS_LIMIT;
  451. unsigned int keepgoing;
  452. unsigned short status;
  453. spin_lock(&port->lock);
  454. /* While we have stuff to do, we continue */
  455. do {
  456. /* If we don't find anything to do, we stop */
  457. keepgoing = 0;
  458. /* Read status */
  459. status = in_be16(&PSC(port)->mpc52xx_psc_isr);
  460. status &= port->read_status_mask;
  461. /* Do we need to receive chars ? */
  462. /* For this RX interrupts must be on and some chars waiting */
  463. if ( status & MPC52xx_PSC_IMR_RXRDY )
  464. keepgoing |= mpc52xx_uart_int_rx_chars(port);
  465. /* Do we need to send chars ? */
  466. /* For this, TX must be ready and TX interrupt enabled */
  467. if ( status & MPC52xx_PSC_IMR_TXRDY )
  468. keepgoing |= mpc52xx_uart_int_tx_chars(port);
  469. /* Limit number of iteration */
  470. if ( !(--pass) )
  471. keepgoing = 0;
  472. } while (keepgoing);
  473. spin_unlock(&port->lock);
  474. return IRQ_HANDLED;
  475. }
  476. /* ======================================================================== */
  477. /* Console ( if applicable ) */
  478. /* ======================================================================== */
  479. #ifdef CONFIG_SERIAL_MPC52xx_CONSOLE
  480. static void __init
  481. mpc52xx_console_get_options(struct uart_port *port,
  482. int *baud, int *parity, int *bits, int *flow)
  483. {
  484. struct mpc52xx_psc __iomem *psc = PSC(port);
  485. unsigned char mr1;
  486. pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
  487. /* Read the mode registers */
  488. out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
  489. mr1 = in_8(&psc->mode);
  490. /* CT{U,L}R are write-only ! */
  491. *baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  492. #if !defined(CONFIG_PPC_MERGE)
  493. if (__res.bi_baudrate)
  494. *baud = __res.bi_baudrate;
  495. #endif
  496. /* Parse them */
  497. switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
  498. case MPC52xx_PSC_MODE_5_BITS: *bits = 5; break;
  499. case MPC52xx_PSC_MODE_6_BITS: *bits = 6; break;
  500. case MPC52xx_PSC_MODE_7_BITS: *bits = 7; break;
  501. case MPC52xx_PSC_MODE_8_BITS:
  502. default: *bits = 8;
  503. }
  504. if (mr1 & MPC52xx_PSC_MODE_PARNONE)
  505. *parity = 'n';
  506. else
  507. *parity = mr1 & MPC52xx_PSC_MODE_PARODD ? 'o' : 'e';
  508. }
  509. static void
  510. mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
  511. {
  512. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  513. struct mpc52xx_psc __iomem *psc = PSC(port);
  514. unsigned int i, j;
  515. /* Disable interrupts */
  516. out_be16(&psc->mpc52xx_psc_imr, 0);
  517. /* Wait the TX buffer to be empty */
  518. j = 5000000; /* Maximum wait */
  519. while (!(in_be16(&psc->mpc52xx_psc_status) & MPC52xx_PSC_SR_TXEMP) &&
  520. --j)
  521. udelay(1);
  522. /* Write all the chars */
  523. for (i = 0; i < count; i++, s++) {
  524. /* Line return handling */
  525. if (*s == '\n')
  526. out_8(&psc->mpc52xx_psc_buffer_8, '\r');
  527. /* Send the char */
  528. out_8(&psc->mpc52xx_psc_buffer_8, *s);
  529. /* Wait the TX buffer to be empty */
  530. j = 20000; /* Maximum wait */
  531. while (!(in_be16(&psc->mpc52xx_psc_status) &
  532. MPC52xx_PSC_SR_TXEMP) && --j)
  533. udelay(1);
  534. }
  535. /* Restore interrupt state */
  536. out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
  537. }
  538. #if !defined(CONFIG_PPC_MERGE)
  539. static int __init
  540. mpc52xx_console_setup(struct console *co, char *options)
  541. {
  542. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  543. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  544. int bits = 8;
  545. int parity = 'n';
  546. int flow = 'n';
  547. if (co->index < 0 || co->index >= MPC52xx_PSC_MAXNUM)
  548. return -EINVAL;
  549. /* Basic port init. Needed since we use some uart_??? func before
  550. * real init for early access */
  551. spin_lock_init(&port->lock);
  552. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  553. port->ops = &mpc52xx_uart_ops;
  554. port->mapbase = MPC52xx_PA(MPC52xx_PSCx_OFFSET(co->index+1));
  555. /* We ioremap ourself */
  556. port->membase = ioremap(port->mapbase, MPC52xx_PSC_SIZE);
  557. if (port->membase == NULL)
  558. return -EINVAL;
  559. /* Setup the port parameters accoding to options */
  560. if (options)
  561. uart_parse_options(options, &baud, &parity, &bits, &flow);
  562. else
  563. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  564. return uart_set_options(port, co, baud, parity, bits, flow);
  565. }
  566. #else
  567. static int __init
  568. mpc52xx_console_setup(struct console *co, char *options)
  569. {
  570. struct uart_port *port = &mpc52xx_uart_ports[co->index];
  571. struct device_node *np = mpc52xx_uart_nodes[co->index];
  572. unsigned int ipb_freq;
  573. struct resource res;
  574. int ret;
  575. int baud = CONFIG_SERIAL_MPC52xx_CONSOLE_BAUD;
  576. int bits = 8;
  577. int parity = 'n';
  578. int flow = 'n';
  579. pr_debug("mpc52xx_console_setup co=%p, co->index=%i, options=%s\n",
  580. co, co->index, options);
  581. if ((co->index < 0) || (co->index > MPC52xx_PSC_MAXNUM)) {
  582. pr_debug("PSC%x out of range\n", co->index);
  583. return -EINVAL;
  584. }
  585. if (!np) {
  586. pr_debug("PSC%x not found in device tree\n", co->index);
  587. return -EINVAL;
  588. }
  589. pr_debug("Console on ttyPSC%x is %s\n",
  590. co->index, mpc52xx_uart_nodes[co->index]->full_name);
  591. /* Fetch register locations */
  592. if ((ret = of_address_to_resource(np, 0, &res)) != 0) {
  593. pr_debug("Could not get resources for PSC%x\n", co->index);
  594. return ret;
  595. }
  596. /* Search for bus-frequency property in this node or a parent */
  597. if ((ipb_freq = mpc52xx_find_ipb_freq(np)) == 0) {
  598. pr_debug("Could not find IPB bus frequency!\n");
  599. return -EINVAL;
  600. }
  601. /* Basic port init. Needed since we use some uart_??? func before
  602. * real init for early access */
  603. spin_lock_init(&port->lock);
  604. port->uartclk = ipb_freq / 2;
  605. port->ops = &mpc52xx_uart_ops;
  606. port->mapbase = res.start;
  607. port->membase = ioremap(res.start, sizeof(struct mpc52xx_psc));
  608. port->irq = irq_of_parse_and_map(np, 0);
  609. if (port->membase == NULL)
  610. return -EINVAL;
  611. pr_debug("mpc52xx-psc uart at %lx, mapped to %p, irq=%x, freq=%i\n",
  612. port->mapbase, port->membase, port->irq, port->uartclk);
  613. /* Setup the port parameters accoding to options */
  614. if (options)
  615. uart_parse_options(options, &baud, &parity, &bits, &flow);
  616. else
  617. mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
  618. pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
  619. baud, bits, parity, flow);
  620. return uart_set_options(port, co, baud, parity, bits, flow);
  621. }
  622. #endif /* defined(CONFIG_PPC_MERGE) */
  623. static struct uart_driver mpc52xx_uart_driver;
  624. static struct console mpc52xx_console = {
  625. .name = "ttyPSC",
  626. .write = mpc52xx_console_write,
  627. .device = uart_console_device,
  628. .setup = mpc52xx_console_setup,
  629. .flags = CON_PRINTBUFFER,
  630. .index = -1, /* Specified on the cmdline (e.g. console=ttyPSC0 ) */
  631. .data = &mpc52xx_uart_driver,
  632. };
  633. static int __init
  634. mpc52xx_console_init(void)
  635. {
  636. mpc52xx_uart_of_enumerate();
  637. register_console(&mpc52xx_console);
  638. return 0;
  639. }
  640. console_initcall(mpc52xx_console_init);
  641. #define MPC52xx_PSC_CONSOLE &mpc52xx_console
  642. #else
  643. #define MPC52xx_PSC_CONSOLE NULL
  644. #endif
  645. /* ======================================================================== */
  646. /* UART Driver */
  647. /* ======================================================================== */
  648. static struct uart_driver mpc52xx_uart_driver = {
  649. .owner = THIS_MODULE,
  650. .driver_name = "mpc52xx_psc_uart",
  651. .dev_name = "ttyPSC",
  652. .major = SERIAL_PSC_MAJOR,
  653. .minor = SERIAL_PSC_MINOR,
  654. .nr = MPC52xx_PSC_MAXNUM,
  655. .cons = MPC52xx_PSC_CONSOLE,
  656. };
  657. #if !defined(CONFIG_PPC_MERGE)
  658. /* ======================================================================== */
  659. /* Platform Driver */
  660. /* ======================================================================== */
  661. static int __devinit
  662. mpc52xx_uart_probe(struct platform_device *dev)
  663. {
  664. struct resource *res = dev->resource;
  665. struct uart_port *port = NULL;
  666. int i, idx, ret;
  667. /* Check validity & presence */
  668. idx = dev->id;
  669. if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
  670. return -EINVAL;
  671. if (!mpc52xx_match_psc_function(idx,"uart"))
  672. return -ENODEV;
  673. /* Init the port structure */
  674. port = &mpc52xx_uart_ports[idx];
  675. spin_lock_init(&port->lock);
  676. port->uartclk = __res.bi_ipbfreq / 2; /* Look at CTLR doc */
  677. port->fifosize = 512;
  678. port->iotype = UPIO_MEM;
  679. port->flags = UPF_BOOT_AUTOCONF |
  680. ( uart_console(port) ? 0 : UPF_IOREMAP );
  681. port->line = idx;
  682. port->ops = &mpc52xx_uart_ops;
  683. port->dev = &dev->dev;
  684. /* Search for IRQ and mapbase */
  685. for (i=0 ; i<dev->num_resources ; i++, res++) {
  686. if (res->flags & IORESOURCE_MEM)
  687. port->mapbase = res->start;
  688. else if (res->flags & IORESOURCE_IRQ)
  689. port->irq = res->start;
  690. }
  691. if (!port->irq || !port->mapbase)
  692. return -EINVAL;
  693. /* Add the port to the uart sub-system */
  694. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  695. if (!ret)
  696. platform_set_drvdata(dev, (void*)port);
  697. return ret;
  698. }
  699. static int
  700. mpc52xx_uart_remove(struct platform_device *dev)
  701. {
  702. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  703. platform_set_drvdata(dev, NULL);
  704. if (port)
  705. uart_remove_one_port(&mpc52xx_uart_driver, port);
  706. return 0;
  707. }
  708. #ifdef CONFIG_PM
  709. static int
  710. mpc52xx_uart_suspend(struct platform_device *dev, pm_message_t state)
  711. {
  712. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  713. if (port)
  714. uart_suspend_port(&mpc52xx_uart_driver, port);
  715. return 0;
  716. }
  717. static int
  718. mpc52xx_uart_resume(struct platform_device *dev)
  719. {
  720. struct uart_port *port = (struct uart_port *) platform_get_drvdata(dev);
  721. if (port)
  722. uart_resume_port(&mpc52xx_uart_driver, port);
  723. return 0;
  724. }
  725. #endif
  726. static struct platform_driver mpc52xx_uart_platform_driver = {
  727. .probe = mpc52xx_uart_probe,
  728. .remove = mpc52xx_uart_remove,
  729. #ifdef CONFIG_PM
  730. .suspend = mpc52xx_uart_suspend,
  731. .resume = mpc52xx_uart_resume,
  732. #endif
  733. .driver = {
  734. .name = "mpc52xx-psc",
  735. },
  736. };
  737. #endif /* !defined(CONFIG_PPC_MERGE) */
  738. #if defined(CONFIG_PPC_MERGE)
  739. /* ======================================================================== */
  740. /* OF Platform Driver */
  741. /* ======================================================================== */
  742. static int __devinit
  743. mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
  744. {
  745. int idx = -1;
  746. unsigned int ipb_freq;
  747. struct uart_port *port = NULL;
  748. struct resource res;
  749. int ret;
  750. dev_dbg(&op->dev, "mpc52xx_uart_probe(op=%p, match=%p)\n", op, match);
  751. /* Check validity & presence */
  752. for (idx = 0; idx < MPC52xx_PSC_MAXNUM; idx++)
  753. if (mpc52xx_uart_nodes[idx] == op->node)
  754. break;
  755. if (idx >= MPC52xx_PSC_MAXNUM)
  756. return -EINVAL;
  757. pr_debug("Found %s assigned to ttyPSC%x\n",
  758. mpc52xx_uart_nodes[idx]->full_name, idx);
  759. /* Search for bus-frequency property in this node or a parent */
  760. if ((ipb_freq = mpc52xx_find_ipb_freq(op->node)) == 0) {
  761. dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
  762. return -EINVAL;
  763. }
  764. /* Init the port structure */
  765. port = &mpc52xx_uart_ports[idx];
  766. spin_lock_init(&port->lock);
  767. port->uartclk = ipb_freq / 2;
  768. port->fifosize = 512;
  769. port->iotype = UPIO_MEM;
  770. port->flags = UPF_BOOT_AUTOCONF |
  771. ( uart_console(port) ? 0 : UPF_IOREMAP );
  772. port->line = idx;
  773. port->ops = &mpc52xx_uart_ops;
  774. port->dev = &op->dev;
  775. /* Search for IRQ and mapbase */
  776. if ((ret = of_address_to_resource(op->node, 0, &res)) != 0)
  777. return ret;
  778. port->mapbase = res.start;
  779. port->irq = irq_of_parse_and_map(op->node, 0);
  780. dev_dbg(&op->dev, "mpc52xx-psc uart at %lx, irq=%x, freq=%i\n",
  781. port->mapbase, port->irq, port->uartclk);
  782. if ((port->irq==NO_IRQ) || !port->mapbase) {
  783. printk(KERN_ERR "Could not allocate resources for PSC\n");
  784. return -EINVAL;
  785. }
  786. /* Add the port to the uart sub-system */
  787. ret = uart_add_one_port(&mpc52xx_uart_driver, port);
  788. if (!ret)
  789. dev_set_drvdata(&op->dev, (void*)port);
  790. return ret;
  791. }
  792. static int
  793. mpc52xx_uart_of_remove(struct of_device *op)
  794. {
  795. struct uart_port *port = dev_get_drvdata(&op->dev);
  796. dev_set_drvdata(&op->dev, NULL);
  797. if (port)
  798. uart_remove_one_port(&mpc52xx_uart_driver, port);
  799. return 0;
  800. }
  801. #ifdef CONFIG_PM
  802. static int
  803. mpc52xx_uart_of_suspend(struct of_device *op, pm_message_t state)
  804. {
  805. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  806. if (port)
  807. uart_suspend_port(&mpc52xx_uart_driver, port);
  808. return 0;
  809. }
  810. static int
  811. mpc52xx_uart_of_resume(struct of_device *op)
  812. {
  813. struct uart_port *port = (struct uart_port *) dev_get_drvdata(&op->dev);
  814. if (port)
  815. uart_resume_port(&mpc52xx_uart_driver, port);
  816. return 0;
  817. }
  818. #endif
  819. static void
  820. mpc52xx_uart_of_assign(struct device_node *np, int idx)
  821. {
  822. int free_idx = -1;
  823. int i;
  824. /* Find the first free node */
  825. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  826. if (mpc52xx_uart_nodes[i] == NULL) {
  827. free_idx = i;
  828. break;
  829. }
  830. }
  831. if ((idx < 0) || (idx >= MPC52xx_PSC_MAXNUM))
  832. idx = free_idx;
  833. if (idx < 0)
  834. return; /* No free slot; abort */
  835. /* If the slot is already occupied, then swap slots */
  836. if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
  837. mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
  838. mpc52xx_uart_nodes[i] = np;
  839. }
  840. static void
  841. mpc52xx_uart_of_enumerate(void)
  842. {
  843. static int enum_done = 0;
  844. struct device_node *np;
  845. const unsigned int *devno;
  846. int i;
  847. if (enum_done)
  848. return;
  849. for_each_node_by_type(np, "serial") {
  850. if (!of_match_node(mpc52xx_uart_of_match, np))
  851. continue;
  852. /* Is a particular device number requested? */
  853. devno = get_property(np, "device_no", NULL);
  854. mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1);
  855. }
  856. enum_done = 1;
  857. for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
  858. if (mpc52xx_uart_nodes[i])
  859. pr_debug("%s assigned to ttyPSC%x\n",
  860. mpc52xx_uart_nodes[i]->full_name, i);
  861. }
  862. }
  863. MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
  864. static struct of_platform_driver mpc52xx_uart_of_driver = {
  865. .owner = THIS_MODULE,
  866. .name = "mpc52xx-psc-uart",
  867. .match_table = mpc52xx_uart_of_match,
  868. .probe = mpc52xx_uart_of_probe,
  869. .remove = mpc52xx_uart_of_remove,
  870. #ifdef CONFIG_PM
  871. .suspend = mpc52xx_uart_of_suspend,
  872. .resume = mpc52xx_uart_of_resume,
  873. #endif
  874. .driver = {
  875. .name = "mpc52xx-psc-uart",
  876. },
  877. };
  878. #endif /* defined(CONFIG_PPC_MERGE) */
  879. /* ======================================================================== */
  880. /* Module */
  881. /* ======================================================================== */
  882. static int __init
  883. mpc52xx_uart_init(void)
  884. {
  885. int ret;
  886. printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
  887. if ((ret = uart_register_driver(&mpc52xx_uart_driver)) != 0) {
  888. printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
  889. __FILE__, ret);
  890. return ret;
  891. }
  892. #if defined(CONFIG_PPC_MERGE)
  893. mpc52xx_uart_of_enumerate();
  894. ret = of_register_platform_driver(&mpc52xx_uart_of_driver);
  895. if (ret) {
  896. printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n",
  897. __FILE__, ret);
  898. uart_unregister_driver(&mpc52xx_uart_driver);
  899. return ret;
  900. }
  901. #else
  902. ret = platform_driver_register(&mpc52xx_uart_platform_driver);
  903. if (ret) {
  904. printk(KERN_ERR "%s: platform_driver_register failed (%i)\n",
  905. __FILE__, ret);
  906. uart_unregister_driver(&mpc52xx_uart_driver);
  907. return ret;
  908. }
  909. #endif
  910. return 0;
  911. }
  912. static void __exit
  913. mpc52xx_uart_exit(void)
  914. {
  915. #if defined(CONFIG_PPC_MERGE)
  916. of_unregister_platform_driver(&mpc52xx_uart_of_driver);
  917. #else
  918. platform_driver_unregister(&mpc52xx_uart_platform_driver);
  919. #endif
  920. uart_unregister_driver(&mpc52xx_uart_driver);
  921. }
  922. module_init(mpc52xx_uart_init);
  923. module_exit(mpc52xx_uart_exit);
  924. MODULE_AUTHOR("Sylvain Munaut <tnt@246tNt.com>");
  925. MODULE_DESCRIPTION("Freescale MPC52xx PSC UART");
  926. MODULE_LICENSE("GPL");