fsmc.h 4.0 KB

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  1. /*
  2. * incude/mtd/fsmc.h
  3. *
  4. * ST Microelectronics
  5. * Flexible Static Memory Controller (FSMC)
  6. * platform data interface and header file
  7. *
  8. * Copyright © 2010 ST Microelectronics
  9. * Vipin Kumar <vipin.kumar@st.com>
  10. *
  11. * This file is licensed under the terms of the GNU General Public
  12. * License version 2. This program is licensed "as is" without any
  13. * warranty of any kind, whether express or implied.
  14. */
  15. #ifndef __MTD_FSMC_H
  16. #define __MTD_FSMC_H
  17. #include <linux/io.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/mtd/physmap.h>
  20. #include <linux/types.h>
  21. #include <linux/mtd/partitions.h>
  22. #include <asm/param.h>
  23. #define FSMC_NAND_BW8 1
  24. #define FSMC_NAND_BW16 2
  25. #define FSMC_MAX_NOR_BANKS 4
  26. #define FSMC_MAX_NAND_BANKS 4
  27. #define FSMC_FLASH_WIDTH8 1
  28. #define FSMC_FLASH_WIDTH16 2
  29. struct fsmc_nor_bank_regs {
  30. uint32_t ctrl;
  31. uint32_t ctrl_tim;
  32. };
  33. /* ctrl register definitions */
  34. #define BANK_ENABLE (1 << 0)
  35. #define MUXED (1 << 1)
  36. #define NOR_DEV (2 << 2)
  37. #define WIDTH_8 (0 << 4)
  38. #define WIDTH_16 (1 << 4)
  39. #define RSTPWRDWN (1 << 6)
  40. #define WPROT (1 << 7)
  41. #define WRT_ENABLE (1 << 12)
  42. #define WAIT_ENB (1 << 13)
  43. /* ctrl_tim register definitions */
  44. struct fsmc_nand_bank_regs {
  45. uint32_t pc;
  46. uint32_t sts;
  47. uint32_t comm;
  48. uint32_t attrib;
  49. uint32_t ioata;
  50. uint32_t ecc1;
  51. uint32_t ecc2;
  52. uint32_t ecc3;
  53. };
  54. #define FSMC_NOR_REG_SIZE 0x40
  55. struct fsmc_regs {
  56. struct fsmc_nor_bank_regs nor_bank_regs[FSMC_MAX_NOR_BANKS];
  57. uint8_t reserved_1[0x40 - 0x20];
  58. struct fsmc_nand_bank_regs bank_regs[FSMC_MAX_NAND_BANKS];
  59. uint8_t reserved_2[0xfe0 - 0xc0];
  60. uint32_t peripid0; /* 0xfe0 */
  61. uint32_t peripid1; /* 0xfe4 */
  62. uint32_t peripid2; /* 0xfe8 */
  63. uint32_t peripid3; /* 0xfec */
  64. uint32_t pcellid0; /* 0xff0 */
  65. uint32_t pcellid1; /* 0xff4 */
  66. uint32_t pcellid2; /* 0xff8 */
  67. uint32_t pcellid3; /* 0xffc */
  68. };
  69. #define FSMC_BUSY_WAIT_TIMEOUT (1 * HZ)
  70. /* pc register definitions */
  71. #define FSMC_RESET (1 << 0)
  72. #define FSMC_WAITON (1 << 1)
  73. #define FSMC_ENABLE (1 << 2)
  74. #define FSMC_DEVTYPE_NAND (1 << 3)
  75. #define FSMC_DEVWID_8 (0 << 4)
  76. #define FSMC_DEVWID_16 (1 << 4)
  77. #define FSMC_ECCEN (1 << 6)
  78. #define FSMC_ECCPLEN_512 (0 << 7)
  79. #define FSMC_ECCPLEN_256 (1 << 7)
  80. #define FSMC_TCLR_1 (1 << 9)
  81. #define FSMC_TAR_1 (1 << 13)
  82. /* sts register definitions */
  83. #define FSMC_CODE_RDY (1 << 15)
  84. /* comm register definitions */
  85. #define FSMC_TSET_0 (0 << 0)
  86. #define FSMC_TWAIT_6 (6 << 8)
  87. #define FSMC_THOLD_4 (4 << 16)
  88. #define FSMC_THIZ_1 (1 << 24)
  89. /*
  90. * There are 13 bytes of ecc for every 512 byte block in FSMC version 8
  91. * and it has to be read consecutively and immediately after the 512
  92. * byte data block for hardware to generate the error bit offsets
  93. * Managing the ecc bytes in the following way is easier. This way is
  94. * similar to oobfree structure maintained already in u-boot nand driver
  95. */
  96. #define MAX_ECCPLACE_ENTRIES 32
  97. struct fsmc_nand_eccplace {
  98. uint8_t offset;
  99. uint8_t length;
  100. };
  101. struct fsmc_eccplace {
  102. struct fsmc_nand_eccplace eccplace[MAX_ECCPLACE_ENTRIES];
  103. };
  104. /**
  105. * fsmc_nand_platform_data - platform specific NAND controller config
  106. * @partitions: partition table for the platform, use a default fallback
  107. * if this is NULL
  108. * @nr_partitions: the number of partitions in the previous entry
  109. * @options: different options for the driver
  110. * @width: bus width
  111. * @bank: default bank
  112. * @select_bank: callback to select a certain bank, this is
  113. * platform-specific. If the controller only supports one bank
  114. * this may be set to NULL
  115. */
  116. struct fsmc_nand_platform_data {
  117. struct mtd_partition *partitions;
  118. unsigned int nr_partitions;
  119. unsigned int options;
  120. unsigned int width;
  121. unsigned int bank;
  122. /* CLE, ALE offsets */
  123. unsigned long cle_off;
  124. unsigned long ale_off;
  125. void (*select_bank)(uint32_t bank, uint32_t busw);
  126. };
  127. extern int __init fsmc_nor_init(struct platform_device *pdev,
  128. unsigned long base, uint32_t bank, uint32_t width);
  129. extern void __init fsmc_init_board_info(struct platform_device *pdev,
  130. struct mtd_partition *partitions, unsigned int nr_partitions,
  131. unsigned int width);
  132. #endif /* __MTD_FSMC_H */