s3c-pcm.c 12 KB

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  1. /* sound/soc/s3c24xx/s3c-pcm.c
  2. *
  3. * ALSA SoC Audio Layer - S3C PCM-Controller driver
  4. *
  5. * Copyright (c) 2009 Samsung Electronics Co. Ltd
  6. * Author: Jaswinder Singh <jassi.brar@samsung.com>
  7. * based upon I2S drivers by Ben Dooks.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/init.h>
  14. #include <linux/module.h>
  15. #include <linux/device.h>
  16. #include <linux/delay.h>
  17. #include <linux/clk.h>
  18. #include <linux/kernel.h>
  19. #include <linux/gpio.h>
  20. #include <linux/io.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/initval.h>
  25. #include <sound/soc.h>
  26. #include <plat/audio.h>
  27. #include <plat/dma.h>
  28. #include "s3c-dma.h"
  29. #include "s3c-pcm.h"
  30. static struct s3c2410_dma_client s3c_pcm_dma_client_out = {
  31. .name = "PCM Stereo out"
  32. };
  33. static struct s3c2410_dma_client s3c_pcm_dma_client_in = {
  34. .name = "PCM Stereo in"
  35. };
  36. static struct s3c_dma_params s3c_pcm_stereo_out[] = {
  37. [0] = {
  38. .client = &s3c_pcm_dma_client_out,
  39. .dma_size = 4,
  40. },
  41. [1] = {
  42. .client = &s3c_pcm_dma_client_out,
  43. .dma_size = 4,
  44. },
  45. };
  46. static struct s3c_dma_params s3c_pcm_stereo_in[] = {
  47. [0] = {
  48. .client = &s3c_pcm_dma_client_in,
  49. .dma_size = 4,
  50. },
  51. [1] = {
  52. .client = &s3c_pcm_dma_client_in,
  53. .dma_size = 4,
  54. },
  55. };
  56. static struct s3c_pcm_info s3c_pcm[2];
  57. static inline struct s3c_pcm_info *to_info(struct snd_soc_dai *cpu_dai)
  58. {
  59. return cpu_dai->private_data;
  60. }
  61. static void s3c_pcm_snd_txctrl(struct s3c_pcm_info *pcm, int on)
  62. {
  63. void __iomem *regs = pcm->regs;
  64. u32 ctl, clkctl;
  65. clkctl = readl(regs + S3C_PCM_CLKCTL);
  66. ctl = readl(regs + S3C_PCM_CTL);
  67. ctl &= ~(S3C_PCM_CTL_TXDIPSTICK_MASK
  68. << S3C_PCM_CTL_TXDIPSTICK_SHIFT);
  69. if (on) {
  70. ctl |= S3C_PCM_CTL_TXDMA_EN;
  71. ctl |= S3C_PCM_CTL_TXFIFO_EN;
  72. ctl |= S3C_PCM_CTL_ENABLE;
  73. ctl |= (0x20<<S3C_PCM_CTL_TXDIPSTICK_SHIFT);
  74. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  75. } else {
  76. ctl &= ~S3C_PCM_CTL_TXDMA_EN;
  77. ctl &= ~S3C_PCM_CTL_TXFIFO_EN;
  78. if (!(ctl & S3C_PCM_CTL_RXFIFO_EN)) {
  79. ctl &= ~S3C_PCM_CTL_ENABLE;
  80. if (!pcm->idleclk)
  81. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  82. }
  83. }
  84. writel(clkctl, regs + S3C_PCM_CLKCTL);
  85. writel(ctl, regs + S3C_PCM_CTL);
  86. }
  87. static void s3c_pcm_snd_rxctrl(struct s3c_pcm_info *pcm, int on)
  88. {
  89. void __iomem *regs = pcm->regs;
  90. u32 ctl, clkctl;
  91. ctl = readl(regs + S3C_PCM_CTL);
  92. clkctl = readl(regs + S3C_PCM_CLKCTL);
  93. if (on) {
  94. ctl |= S3C_PCM_CTL_RXDMA_EN;
  95. ctl |= S3C_PCM_CTL_RXFIFO_EN;
  96. ctl |= S3C_PCM_CTL_ENABLE;
  97. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  98. } else {
  99. ctl &= ~S3C_PCM_CTL_RXDMA_EN;
  100. ctl &= ~S3C_PCM_CTL_RXFIFO_EN;
  101. if (!(ctl & S3C_PCM_CTL_TXFIFO_EN)) {
  102. ctl &= ~S3C_PCM_CTL_ENABLE;
  103. if (!pcm->idleclk)
  104. clkctl |= S3C_PCM_CLKCTL_SERCLK_EN;
  105. }
  106. }
  107. writel(clkctl, regs + S3C_PCM_CLKCTL);
  108. writel(ctl, regs + S3C_PCM_CTL);
  109. }
  110. static int s3c_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
  111. struct snd_soc_dai *dai)
  112. {
  113. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  114. struct s3c_pcm_info *pcm = to_info(rtd->dai->cpu_dai);
  115. unsigned long flags;
  116. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  117. switch (cmd) {
  118. case SNDRV_PCM_TRIGGER_START:
  119. case SNDRV_PCM_TRIGGER_RESUME:
  120. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  121. spin_lock_irqsave(&pcm->lock, flags);
  122. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  123. s3c_pcm_snd_rxctrl(pcm, 1);
  124. else
  125. s3c_pcm_snd_txctrl(pcm, 1);
  126. spin_unlock_irqrestore(&pcm->lock, flags);
  127. break;
  128. case SNDRV_PCM_TRIGGER_STOP:
  129. case SNDRV_PCM_TRIGGER_SUSPEND:
  130. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  131. spin_lock_irqsave(&pcm->lock, flags);
  132. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  133. s3c_pcm_snd_rxctrl(pcm, 0);
  134. else
  135. s3c_pcm_snd_txctrl(pcm, 0);
  136. spin_unlock_irqrestore(&pcm->lock, flags);
  137. break;
  138. default:
  139. return -EINVAL;
  140. }
  141. return 0;
  142. }
  143. static int s3c_pcm_hw_params(struct snd_pcm_substream *substream,
  144. struct snd_pcm_hw_params *params,
  145. struct snd_soc_dai *socdai)
  146. {
  147. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  148. struct snd_soc_dai_link *dai = rtd->dai;
  149. struct s3c_pcm_info *pcm = to_info(dai->cpu_dai);
  150. void __iomem *regs = pcm->regs;
  151. struct clk *clk;
  152. int sclk_div, sync_div;
  153. unsigned long flags;
  154. u32 clkctl;
  155. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  156. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  157. dai->cpu_dai->dma_data = pcm->dma_playback;
  158. else
  159. dai->cpu_dai->dma_data = pcm->dma_capture;
  160. /* Strictly check for sample size */
  161. switch (params_format(params)) {
  162. case SNDRV_PCM_FORMAT_S16_LE:
  163. break;
  164. default:
  165. return -EINVAL;
  166. }
  167. spin_lock_irqsave(&pcm->lock, flags);
  168. /* Get hold of the PCMSOURCE_CLK */
  169. clkctl = readl(regs + S3C_PCM_CLKCTL);
  170. if (clkctl & S3C_PCM_CLKCTL_SERCLKSEL_PCLK)
  171. clk = pcm->pclk;
  172. else
  173. clk = pcm->cclk;
  174. /* Set the SCLK divider */
  175. sclk_div = clk_get_rate(clk) / pcm->sclk_per_fs /
  176. params_rate(params) / 2 - 1;
  177. clkctl &= ~(S3C_PCM_CLKCTL_SCLKDIV_MASK
  178. << S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
  179. clkctl |= ((sclk_div & S3C_PCM_CLKCTL_SCLKDIV_MASK)
  180. << S3C_PCM_CLKCTL_SCLKDIV_SHIFT);
  181. /* Set the SYNC divider */
  182. sync_div = pcm->sclk_per_fs - 1;
  183. clkctl &= ~(S3C_PCM_CLKCTL_SYNCDIV_MASK
  184. << S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
  185. clkctl |= ((sync_div & S3C_PCM_CLKCTL_SYNCDIV_MASK)
  186. << S3C_PCM_CLKCTL_SYNCDIV_SHIFT);
  187. writel(clkctl, regs + S3C_PCM_CLKCTL);
  188. spin_unlock_irqrestore(&pcm->lock, flags);
  189. dev_dbg(pcm->dev, "PCMSOURCE_CLK-%lu SCLK=%ufs \
  190. SCLK_DIV=%d SYNC_DIV=%d\n",
  191. clk_get_rate(clk), pcm->sclk_per_fs,
  192. sclk_div, sync_div);
  193. return 0;
  194. }
  195. static int s3c_pcm_set_fmt(struct snd_soc_dai *cpu_dai,
  196. unsigned int fmt)
  197. {
  198. struct s3c_pcm_info *pcm = to_info(cpu_dai);
  199. void __iomem *regs = pcm->regs;
  200. unsigned long flags;
  201. int ret = 0;
  202. u32 ctl;
  203. dev_dbg(pcm->dev, "Entered %s\n", __func__);
  204. spin_lock_irqsave(&pcm->lock, flags);
  205. ctl = readl(regs + S3C_PCM_CTL);
  206. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  207. case SND_SOC_DAIFMT_NB_NF:
  208. /* Nothing to do, NB_NF by default */
  209. break;
  210. default:
  211. dev_err(pcm->dev, "Unsupported clock inversion!\n");
  212. ret = -EINVAL;
  213. goto exit;
  214. }
  215. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  216. case SND_SOC_DAIFMT_CBS_CFS:
  217. /* Nothing to do, Master by default */
  218. break;
  219. default:
  220. dev_err(pcm->dev, "Unsupported master/slave format!\n");
  221. ret = -EINVAL;
  222. goto exit;
  223. }
  224. switch (fmt & SND_SOC_DAIFMT_CLOCK_MASK) {
  225. case SND_SOC_DAIFMT_CONT:
  226. pcm->idleclk = 1;
  227. break;
  228. case SND_SOC_DAIFMT_GATED:
  229. pcm->idleclk = 0;
  230. break;
  231. default:
  232. dev_err(pcm->dev, "Invalid Clock gating request!\n");
  233. ret = -EINVAL;
  234. goto exit;
  235. }
  236. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  237. case SND_SOC_DAIFMT_DSP_A:
  238. ctl |= S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
  239. ctl |= S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
  240. break;
  241. case SND_SOC_DAIFMT_DSP_B:
  242. ctl &= ~S3C_PCM_CTL_TXMSB_AFTER_FSYNC;
  243. ctl &= ~S3C_PCM_CTL_RXMSB_AFTER_FSYNC;
  244. break;
  245. default:
  246. dev_err(pcm->dev, "Unsupported data format!\n");
  247. ret = -EINVAL;
  248. goto exit;
  249. }
  250. writel(ctl, regs + S3C_PCM_CTL);
  251. exit:
  252. spin_unlock_irqrestore(&pcm->lock, flags);
  253. return ret;
  254. }
  255. static int s3c_pcm_set_clkdiv(struct snd_soc_dai *cpu_dai,
  256. int div_id, int div)
  257. {
  258. struct s3c_pcm_info *pcm = to_info(cpu_dai);
  259. switch (div_id) {
  260. case S3C_PCM_SCLK_PER_FS:
  261. pcm->sclk_per_fs = div;
  262. break;
  263. default:
  264. return -EINVAL;
  265. }
  266. return 0;
  267. }
  268. static int s3c_pcm_set_sysclk(struct snd_soc_dai *cpu_dai,
  269. int clk_id, unsigned int freq, int dir)
  270. {
  271. struct s3c_pcm_info *pcm = to_info(cpu_dai);
  272. void __iomem *regs = pcm->regs;
  273. u32 clkctl = readl(regs + S3C_PCM_CLKCTL);
  274. switch (clk_id) {
  275. case S3C_PCM_CLKSRC_PCLK:
  276. clkctl |= S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
  277. break;
  278. case S3C_PCM_CLKSRC_MUX:
  279. clkctl &= ~S3C_PCM_CLKCTL_SERCLKSEL_PCLK;
  280. if (clk_get_rate(pcm->cclk) != freq)
  281. clk_set_rate(pcm->cclk, freq);
  282. break;
  283. default:
  284. return -EINVAL;
  285. }
  286. writel(clkctl, regs + S3C_PCM_CLKCTL);
  287. return 0;
  288. }
  289. static struct snd_soc_dai_ops s3c_pcm_dai_ops = {
  290. .set_sysclk = s3c_pcm_set_sysclk,
  291. .set_clkdiv = s3c_pcm_set_clkdiv,
  292. .trigger = s3c_pcm_trigger,
  293. .hw_params = s3c_pcm_hw_params,
  294. .set_fmt = s3c_pcm_set_fmt,
  295. };
  296. #define S3C_PCM_RATES SNDRV_PCM_RATE_8000_96000
  297. #define S3C_PCM_DECLARE(n) \
  298. { \
  299. .name = "samsung-pcm", \
  300. .id = (n), \
  301. .symmetric_rates = 1, \
  302. .ops = &s3c_pcm_dai_ops, \
  303. .playback = { \
  304. .channels_min = 2, \
  305. .channels_max = 2, \
  306. .rates = S3C_PCM_RATES, \
  307. .formats = SNDRV_PCM_FMTBIT_S16_LE, \
  308. }, \
  309. .capture = { \
  310. .channels_min = 2, \
  311. .channels_max = 2, \
  312. .rates = S3C_PCM_RATES, \
  313. .formats = SNDRV_PCM_FMTBIT_S16_LE, \
  314. }, \
  315. }
  316. struct snd_soc_dai s3c_pcm_dai[] = {
  317. S3C_PCM_DECLARE(0),
  318. S3C_PCM_DECLARE(1),
  319. };
  320. EXPORT_SYMBOL_GPL(s3c_pcm_dai);
  321. static __devinit int s3c_pcm_dev_probe(struct platform_device *pdev)
  322. {
  323. struct s3c_pcm_info *pcm;
  324. struct snd_soc_dai *dai;
  325. struct resource *mem_res, *dmatx_res, *dmarx_res;
  326. struct s3c_audio_pdata *pcm_pdata;
  327. int ret;
  328. /* Check for valid device index */
  329. if ((pdev->id < 0) || pdev->id >= ARRAY_SIZE(s3c_pcm)) {
  330. dev_err(&pdev->dev, "id %d out of range\n", pdev->id);
  331. return -EINVAL;
  332. }
  333. pcm_pdata = pdev->dev.platform_data;
  334. /* Check for availability of necessary resource */
  335. dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  336. if (!dmatx_res) {
  337. dev_err(&pdev->dev, "Unable to get PCM-TX dma resource\n");
  338. return -ENXIO;
  339. }
  340. dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  341. if (!dmarx_res) {
  342. dev_err(&pdev->dev, "Unable to get PCM-RX dma resource\n");
  343. return -ENXIO;
  344. }
  345. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  346. if (!mem_res) {
  347. dev_err(&pdev->dev, "Unable to get register resource\n");
  348. return -ENXIO;
  349. }
  350. if (pcm_pdata && pcm_pdata->cfg_gpio && pcm_pdata->cfg_gpio(pdev)) {
  351. dev_err(&pdev->dev, "Unable to configure gpio\n");
  352. return -EINVAL;
  353. }
  354. pcm = &s3c_pcm[pdev->id];
  355. pcm->dev = &pdev->dev;
  356. spin_lock_init(&pcm->lock);
  357. dai = &s3c_pcm_dai[pdev->id];
  358. dai->dev = &pdev->dev;
  359. /* Default is 128fs */
  360. pcm->sclk_per_fs = 128;
  361. pcm->cclk = clk_get(&pdev->dev, "audio-bus");
  362. if (IS_ERR(pcm->cclk)) {
  363. dev_err(&pdev->dev, "failed to get audio-bus\n");
  364. ret = PTR_ERR(pcm->cclk);
  365. goto err1;
  366. }
  367. clk_enable(pcm->cclk);
  368. /* record our pcm structure for later use in the callbacks */
  369. dai->private_data = pcm;
  370. if (!request_mem_region(mem_res->start,
  371. resource_size(mem_res), "samsung-pcm")) {
  372. dev_err(&pdev->dev, "Unable to request register region\n");
  373. ret = -EBUSY;
  374. goto err2;
  375. }
  376. pcm->regs = ioremap(mem_res->start, 0x100);
  377. if (pcm->regs == NULL) {
  378. dev_err(&pdev->dev, "cannot ioremap registers\n");
  379. ret = -ENXIO;
  380. goto err3;
  381. }
  382. pcm->pclk = clk_get(&pdev->dev, "pcm");
  383. if (IS_ERR(pcm->pclk)) {
  384. dev_err(&pdev->dev, "failed to get pcm_clock\n");
  385. ret = -ENOENT;
  386. goto err4;
  387. }
  388. clk_enable(pcm->pclk);
  389. ret = snd_soc_register_dai(dai);
  390. if (ret != 0) {
  391. dev_err(&pdev->dev, "failed to get pcm_clock\n");
  392. goto err5;
  393. }
  394. s3c_pcm_stereo_in[pdev->id].dma_addr = mem_res->start
  395. + S3C_PCM_RXFIFO;
  396. s3c_pcm_stereo_out[pdev->id].dma_addr = mem_res->start
  397. + S3C_PCM_TXFIFO;
  398. s3c_pcm_stereo_in[pdev->id].channel = dmarx_res->start;
  399. s3c_pcm_stereo_out[pdev->id].channel = dmatx_res->start;
  400. pcm->dma_capture = &s3c_pcm_stereo_in[pdev->id];
  401. pcm->dma_playback = &s3c_pcm_stereo_out[pdev->id];
  402. return 0;
  403. err5:
  404. clk_disable(pcm->pclk);
  405. clk_put(pcm->pclk);
  406. err4:
  407. iounmap(pcm->regs);
  408. err3:
  409. release_mem_region(mem_res->start, resource_size(mem_res));
  410. err2:
  411. clk_disable(pcm->cclk);
  412. clk_put(pcm->cclk);
  413. err1:
  414. return ret;
  415. }
  416. static __devexit int s3c_pcm_dev_remove(struct platform_device *pdev)
  417. {
  418. struct s3c_pcm_info *pcm = &s3c_pcm[pdev->id];
  419. struct resource *mem_res;
  420. iounmap(pcm->regs);
  421. mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  422. release_mem_region(mem_res->start, resource_size(mem_res));
  423. clk_disable(pcm->cclk);
  424. clk_disable(pcm->pclk);
  425. clk_put(pcm->pclk);
  426. clk_put(pcm->cclk);
  427. return 0;
  428. }
  429. static struct platform_driver s3c_pcm_driver = {
  430. .probe = s3c_pcm_dev_probe,
  431. .remove = s3c_pcm_dev_remove,
  432. .driver = {
  433. .name = "samsung-pcm",
  434. .owner = THIS_MODULE,
  435. },
  436. };
  437. static int __init s3c_pcm_init(void)
  438. {
  439. return platform_driver_register(&s3c_pcm_driver);
  440. }
  441. module_init(s3c_pcm_init);
  442. static void __exit s3c_pcm_exit(void)
  443. {
  444. platform_driver_unregister(&s3c_pcm_driver);
  445. }
  446. module_exit(s3c_pcm_exit);
  447. /* Module information */
  448. MODULE_AUTHOR("Jaswinder Singh, <jassi.brar@samsung.com>");
  449. MODULE_DESCRIPTION("S3C PCM Controller Driver");
  450. MODULE_LICENSE("GPL");