wm8523.c 16 KB

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  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <sound/core.h>
  22. #include <sound/pcm.h>
  23. #include <sound/pcm_params.h>
  24. #include <sound/soc.h>
  25. #include <sound/soc-dapm.h>
  26. #include <sound/initval.h>
  27. #include <sound/tlv.h>
  28. #include "wm8523.h"
  29. static struct snd_soc_codec *wm8523_codec;
  30. struct snd_soc_codec_device soc_codec_dev_wm8523;
  31. #define WM8523_NUM_SUPPLIES 2
  32. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  33. "AVDD",
  34. "LINEVDD",
  35. };
  36. #define WM8523_NUM_RATES 7
  37. /* codec private data */
  38. struct wm8523_priv {
  39. struct snd_soc_codec codec;
  40. u16 reg_cache[WM8523_REGISTER_COUNT];
  41. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  42. unsigned int sysclk;
  43. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  44. struct snd_pcm_hw_constraint_list rate_constraint;
  45. };
  46. static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
  47. 0x8523, /* R0 - DEVICE_ID */
  48. 0x0001, /* R1 - REVISION */
  49. 0x0000, /* R2 - PSCTRL1 */
  50. 0x1812, /* R3 - AIF_CTRL1 */
  51. 0x0000, /* R4 - AIF_CTRL2 */
  52. 0x0001, /* R5 - DAC_CTRL3 */
  53. 0x0190, /* R6 - DAC_GAINL */
  54. 0x0190, /* R7 - DAC_GAINR */
  55. 0x0000, /* R8 - ZERO_DETECT */
  56. };
  57. static int wm8523_volatile_register(unsigned int reg)
  58. {
  59. switch (reg) {
  60. case WM8523_DEVICE_ID:
  61. case WM8523_REVISION:
  62. return 1;
  63. default:
  64. return 0;
  65. }
  66. }
  67. static int wm8523_reset(struct snd_soc_codec *codec)
  68. {
  69. return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
  70. }
  71. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  72. static const char *wm8523_zd_count_text[] = {
  73. "1024",
  74. "2048",
  75. };
  76. static const struct soc_enum wm8523_zc_count =
  77. SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
  78. static const struct snd_kcontrol_new wm8523_snd_controls[] = {
  79. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  80. 0, 448, 0, dac_tlv),
  81. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  82. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  83. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  84. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  85. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  86. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  87. };
  88. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  89. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  90. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  91. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  92. };
  93. static const struct snd_soc_dapm_route intercon[] = {
  94. { "LINEVOUTL", NULL, "DAC" },
  95. { "LINEVOUTR", NULL, "DAC" },
  96. };
  97. static int wm8523_add_widgets(struct snd_soc_codec *codec)
  98. {
  99. snd_soc_dapm_new_controls(codec, wm8523_dapm_widgets,
  100. ARRAY_SIZE(wm8523_dapm_widgets));
  101. snd_soc_dapm_add_routes(codec, intercon, ARRAY_SIZE(intercon));
  102. return 0;
  103. }
  104. static struct {
  105. int value;
  106. int ratio;
  107. } lrclk_ratios[WM8523_NUM_RATES] = {
  108. { 1, 128 },
  109. { 2, 192 },
  110. { 3, 256 },
  111. { 4, 384 },
  112. { 5, 512 },
  113. { 6, 768 },
  114. { 7, 1152 },
  115. };
  116. static int wm8523_startup(struct snd_pcm_substream *substream,
  117. struct snd_soc_dai *dai)
  118. {
  119. struct snd_soc_codec *codec = dai->codec;
  120. struct wm8523_priv *wm8523 = codec->private_data;
  121. /* The set of sample rates that can be supported depends on the
  122. * MCLK supplied to the CODEC - enforce this.
  123. */
  124. if (!wm8523->sysclk) {
  125. dev_err(codec->dev,
  126. "No MCLK configured, call set_sysclk() on init\n");
  127. return -EINVAL;
  128. }
  129. return 0;
  130. snd_pcm_hw_constraint_list(substream->runtime, 0,
  131. SNDRV_PCM_HW_PARAM_RATE,
  132. &wm8523->rate_constraint);
  133. return 0;
  134. }
  135. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  136. struct snd_pcm_hw_params *params,
  137. struct snd_soc_dai *dai)
  138. {
  139. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  140. struct snd_soc_device *socdev = rtd->socdev;
  141. struct snd_soc_codec *codec = socdev->card->codec;
  142. struct wm8523_priv *wm8523 = codec->private_data;
  143. int i;
  144. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  145. u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
  146. /* Find a supported LRCLK ratio */
  147. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  148. if (wm8523->sysclk / params_rate(params) ==
  149. lrclk_ratios[i].ratio)
  150. break;
  151. }
  152. /* Should never happen, should be handled by constraints */
  153. if (i == ARRAY_SIZE(lrclk_ratios)) {
  154. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  155. wm8523->sysclk / params_rate(params));
  156. return -EINVAL;
  157. }
  158. aifctrl2 &= ~WM8523_SR_MASK;
  159. aifctrl2 |= lrclk_ratios[i].value;
  160. aifctrl1 &= ~WM8523_WL_MASK;
  161. switch (params_format(params)) {
  162. case SNDRV_PCM_FORMAT_S16_LE:
  163. break;
  164. case SNDRV_PCM_FORMAT_S20_3LE:
  165. aifctrl1 |= 0x8;
  166. break;
  167. case SNDRV_PCM_FORMAT_S24_LE:
  168. aifctrl1 |= 0x10;
  169. break;
  170. case SNDRV_PCM_FORMAT_S32_LE:
  171. aifctrl1 |= 0x18;
  172. break;
  173. }
  174. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  175. snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  176. return 0;
  177. }
  178. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  179. int clk_id, unsigned int freq, int dir)
  180. {
  181. struct snd_soc_codec *codec = codec_dai->codec;
  182. struct wm8523_priv *wm8523 = codec->private_data;
  183. unsigned int val;
  184. int i;
  185. wm8523->sysclk = freq;
  186. wm8523->rate_constraint.count = 0;
  187. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  188. val = freq / lrclk_ratios[i].ratio;
  189. /* Check that it's a standard rate since core can't
  190. * cope with others and having the odd rates confuses
  191. * constraint matching.
  192. */
  193. switch (val) {
  194. case 8000:
  195. case 11025:
  196. case 16000:
  197. case 22050:
  198. case 32000:
  199. case 44100:
  200. case 48000:
  201. case 64000:
  202. case 88200:
  203. case 96000:
  204. case 176400:
  205. case 192000:
  206. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  207. val);
  208. wm8523->rate_constraint_list[i] = val;
  209. wm8523->rate_constraint.count++;
  210. break;
  211. default:
  212. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  213. val);
  214. }
  215. }
  216. /* Need at least one supported rate... */
  217. if (wm8523->rate_constraint.count == 0)
  218. return -EINVAL;
  219. return 0;
  220. }
  221. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  222. unsigned int fmt)
  223. {
  224. struct snd_soc_codec *codec = codec_dai->codec;
  225. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  226. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  227. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  228. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  229. case SND_SOC_DAIFMT_CBM_CFM:
  230. aifctrl1 |= WM8523_AIF_MSTR;
  231. break;
  232. case SND_SOC_DAIFMT_CBS_CFS:
  233. break;
  234. default:
  235. return -EINVAL;
  236. }
  237. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  238. case SND_SOC_DAIFMT_I2S:
  239. aifctrl1 |= 0x0002;
  240. break;
  241. case SND_SOC_DAIFMT_RIGHT_J:
  242. break;
  243. case SND_SOC_DAIFMT_LEFT_J:
  244. aifctrl1 |= 0x0001;
  245. break;
  246. case SND_SOC_DAIFMT_DSP_A:
  247. aifctrl1 |= 0x0003;
  248. break;
  249. case SND_SOC_DAIFMT_DSP_B:
  250. aifctrl1 |= 0x0023;
  251. break;
  252. default:
  253. return -EINVAL;
  254. }
  255. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  256. case SND_SOC_DAIFMT_NB_NF:
  257. break;
  258. case SND_SOC_DAIFMT_IB_IF:
  259. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  260. break;
  261. case SND_SOC_DAIFMT_IB_NF:
  262. aifctrl1 |= WM8523_BCLK_INV;
  263. break;
  264. case SND_SOC_DAIFMT_NB_IF:
  265. aifctrl1 |= WM8523_LRCLK_INV;
  266. break;
  267. default:
  268. return -EINVAL;
  269. }
  270. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  271. return 0;
  272. }
  273. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  274. enum snd_soc_bias_level level)
  275. {
  276. struct wm8523_priv *wm8523 = codec->private_data;
  277. int ret, i;
  278. switch (level) {
  279. case SND_SOC_BIAS_ON:
  280. break;
  281. case SND_SOC_BIAS_PREPARE:
  282. /* Full power on */
  283. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  284. WM8523_SYS_ENA_MASK, 3);
  285. break;
  286. case SND_SOC_BIAS_STANDBY:
  287. if (codec->bias_level == SND_SOC_BIAS_OFF) {
  288. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  289. wm8523->supplies);
  290. if (ret != 0) {
  291. dev_err(codec->dev,
  292. "Failed to enable supplies: %d\n",
  293. ret);
  294. return ret;
  295. }
  296. /* Initial power up */
  297. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  298. WM8523_SYS_ENA_MASK, 1);
  299. /* Sync back default/cached values */
  300. for (i = WM8523_AIF_CTRL1;
  301. i < WM8523_MAX_REGISTER; i++)
  302. snd_soc_write(codec, i, wm8523->reg_cache[i]);
  303. msleep(100);
  304. }
  305. /* Power up to mute */
  306. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  307. WM8523_SYS_ENA_MASK, 2);
  308. break;
  309. case SND_SOC_BIAS_OFF:
  310. /* The chip runs through the power down sequence for us. */
  311. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  312. WM8523_SYS_ENA_MASK, 0);
  313. msleep(100);
  314. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  315. wm8523->supplies);
  316. break;
  317. }
  318. codec->bias_level = level;
  319. return 0;
  320. }
  321. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  322. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  323. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  324. static struct snd_soc_dai_ops wm8523_dai_ops = {
  325. .startup = wm8523_startup,
  326. .hw_params = wm8523_hw_params,
  327. .set_sysclk = wm8523_set_dai_sysclk,
  328. .set_fmt = wm8523_set_dai_fmt,
  329. };
  330. struct snd_soc_dai wm8523_dai = {
  331. .name = "WM8523",
  332. .playback = {
  333. .stream_name = "Playback",
  334. .channels_min = 2, /* Mono modes not yet supported */
  335. .channels_max = 2,
  336. .rates = WM8523_RATES,
  337. .formats = WM8523_FORMATS,
  338. },
  339. .ops = &wm8523_dai_ops,
  340. };
  341. EXPORT_SYMBOL_GPL(wm8523_dai);
  342. #ifdef CONFIG_PM
  343. static int wm8523_suspend(struct platform_device *pdev, pm_message_t state)
  344. {
  345. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  346. struct snd_soc_codec *codec = socdev->card->codec;
  347. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  348. return 0;
  349. }
  350. static int wm8523_resume(struct platform_device *pdev)
  351. {
  352. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  353. struct snd_soc_codec *codec = socdev->card->codec;
  354. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  355. return 0;
  356. }
  357. #else
  358. #define wm8523_suspend NULL
  359. #define wm8523_resume NULL
  360. #endif
  361. static int wm8523_probe(struct platform_device *pdev)
  362. {
  363. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  364. struct snd_soc_codec *codec;
  365. int ret = 0;
  366. if (wm8523_codec == NULL) {
  367. dev_err(&pdev->dev, "Codec device not registered\n");
  368. return -ENODEV;
  369. }
  370. socdev->card->codec = wm8523_codec;
  371. codec = wm8523_codec;
  372. /* register pcms */
  373. ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
  374. if (ret < 0) {
  375. dev_err(codec->dev, "failed to create pcms: %d\n", ret);
  376. goto pcm_err;
  377. }
  378. snd_soc_add_controls(codec, wm8523_snd_controls,
  379. ARRAY_SIZE(wm8523_snd_controls));
  380. wm8523_add_widgets(codec);
  381. return ret;
  382. pcm_err:
  383. return ret;
  384. }
  385. static int wm8523_remove(struct platform_device *pdev)
  386. {
  387. struct snd_soc_device *socdev = platform_get_drvdata(pdev);
  388. snd_soc_free_pcms(socdev);
  389. snd_soc_dapm_free(socdev);
  390. return 0;
  391. }
  392. struct snd_soc_codec_device soc_codec_dev_wm8523 = {
  393. .probe = wm8523_probe,
  394. .remove = wm8523_remove,
  395. .suspend = wm8523_suspend,
  396. .resume = wm8523_resume,
  397. };
  398. EXPORT_SYMBOL_GPL(soc_codec_dev_wm8523);
  399. static int wm8523_register(struct wm8523_priv *wm8523,
  400. enum snd_soc_control_type control)
  401. {
  402. int ret;
  403. struct snd_soc_codec *codec = &wm8523->codec;
  404. int i;
  405. if (wm8523_codec) {
  406. dev_err(codec->dev, "Another WM8523 is registered\n");
  407. return -EINVAL;
  408. }
  409. mutex_init(&codec->mutex);
  410. INIT_LIST_HEAD(&codec->dapm_widgets);
  411. INIT_LIST_HEAD(&codec->dapm_paths);
  412. codec->private_data = wm8523;
  413. codec->name = "WM8523";
  414. codec->owner = THIS_MODULE;
  415. codec->bias_level = SND_SOC_BIAS_OFF;
  416. codec->set_bias_level = wm8523_set_bias_level;
  417. codec->dai = &wm8523_dai;
  418. codec->num_dai = 1;
  419. codec->reg_cache_size = WM8523_REGISTER_COUNT;
  420. codec->reg_cache = &wm8523->reg_cache;
  421. codec->volatile_register = wm8523_volatile_register;
  422. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  423. wm8523->rate_constraint.count =
  424. ARRAY_SIZE(wm8523->rate_constraint_list);
  425. memcpy(codec->reg_cache, wm8523_reg, sizeof(wm8523_reg));
  426. ret = snd_soc_codec_set_cache_io(codec, 8, 16, control);
  427. if (ret != 0) {
  428. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  429. goto err;
  430. }
  431. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  432. wm8523->supplies[i].supply = wm8523_supply_names[i];
  433. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
  434. wm8523->supplies);
  435. if (ret != 0) {
  436. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  437. goto err;
  438. }
  439. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  440. wm8523->supplies);
  441. if (ret != 0) {
  442. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  443. goto err_get;
  444. }
  445. ret = snd_soc_read(codec, WM8523_DEVICE_ID);
  446. if (ret < 0) {
  447. dev_err(codec->dev, "Failed to read ID register\n");
  448. goto err_enable;
  449. }
  450. if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
  451. dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
  452. ret = -EINVAL;
  453. goto err_enable;
  454. }
  455. ret = snd_soc_read(codec, WM8523_REVISION);
  456. if (ret < 0) {
  457. dev_err(codec->dev, "Failed to read revision register\n");
  458. goto err_enable;
  459. }
  460. dev_info(codec->dev, "revision %c\n",
  461. (ret & WM8523_CHIP_REV_MASK) + 'A');
  462. ret = wm8523_reset(codec);
  463. if (ret < 0) {
  464. dev_err(codec->dev, "Failed to issue reset\n");
  465. goto err_enable;
  466. }
  467. wm8523_dai.dev = codec->dev;
  468. /* Change some default settings - latch VU and enable ZC */
  469. wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
  470. wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
  471. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  472. /* Bias level configuration will have done an extra enable */
  473. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  474. wm8523_codec = codec;
  475. ret = snd_soc_register_codec(codec);
  476. if (ret != 0) {
  477. dev_err(codec->dev, "Failed to register codec: %d\n", ret);
  478. return ret;
  479. }
  480. ret = snd_soc_register_dai(&wm8523_dai);
  481. if (ret != 0) {
  482. dev_err(codec->dev, "Failed to register DAI: %d\n", ret);
  483. snd_soc_unregister_codec(codec);
  484. return ret;
  485. }
  486. return 0;
  487. err_enable:
  488. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  489. err_get:
  490. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  491. err:
  492. kfree(wm8523);
  493. return ret;
  494. }
  495. static void wm8523_unregister(struct wm8523_priv *wm8523)
  496. {
  497. wm8523_set_bias_level(&wm8523->codec, SND_SOC_BIAS_OFF);
  498. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  499. snd_soc_unregister_dai(&wm8523_dai);
  500. snd_soc_unregister_codec(&wm8523->codec);
  501. kfree(wm8523);
  502. wm8523_codec = NULL;
  503. }
  504. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  505. static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
  506. const struct i2c_device_id *id)
  507. {
  508. struct wm8523_priv *wm8523;
  509. struct snd_soc_codec *codec;
  510. wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
  511. if (wm8523 == NULL)
  512. return -ENOMEM;
  513. codec = &wm8523->codec;
  514. codec->hw_write = (hw_write_t)i2c_master_send;
  515. i2c_set_clientdata(i2c, wm8523);
  516. codec->control_data = i2c;
  517. codec->dev = &i2c->dev;
  518. return wm8523_register(wm8523, SND_SOC_I2C);
  519. }
  520. static __devexit int wm8523_i2c_remove(struct i2c_client *client)
  521. {
  522. struct wm8523_priv *wm8523 = i2c_get_clientdata(client);
  523. wm8523_unregister(wm8523);
  524. return 0;
  525. }
  526. static const struct i2c_device_id wm8523_i2c_id[] = {
  527. { "wm8523", 0 },
  528. { }
  529. };
  530. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  531. static struct i2c_driver wm8523_i2c_driver = {
  532. .driver = {
  533. .name = "WM8523",
  534. .owner = THIS_MODULE,
  535. },
  536. .probe = wm8523_i2c_probe,
  537. .remove = __devexit_p(wm8523_i2c_remove),
  538. .id_table = wm8523_i2c_id,
  539. };
  540. #endif
  541. static int __init wm8523_modinit(void)
  542. {
  543. int ret;
  544. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  545. ret = i2c_add_driver(&wm8523_i2c_driver);
  546. if (ret != 0) {
  547. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  548. ret);
  549. }
  550. #endif
  551. return 0;
  552. }
  553. module_init(wm8523_modinit);
  554. static void __exit wm8523_exit(void)
  555. {
  556. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  557. i2c_del_driver(&wm8523_i2c_driver);
  558. #endif
  559. }
  560. module_exit(wm8523_exit);
  561. MODULE_DESCRIPTION("ASoC WM8523 driver");
  562. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  563. MODULE_LICENSE("GPL");