aureon.c 62 KB

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  1. /*
  2. * ALSA driver for ICEnsemble VT1724 (Envy24HT)
  3. *
  4. * Lowlevel functions for Terratec Aureon cards
  5. *
  6. * Copyright (c) 2003 Takashi Iwai <tiwai@suse.de>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. *
  23. * NOTES:
  24. *
  25. * - we reuse the struct snd_akm4xxx record for storing the wm8770 codec data.
  26. * both wm and akm codecs are pretty similar, so we can integrate
  27. * both controls in the future, once if wm codecs are reused in
  28. * many boards.
  29. *
  30. * - DAC digital volumes are not implemented in the mixer.
  31. * if they show better response than DAC analog volumes, we can use them
  32. * instead.
  33. *
  34. * Lowlevel functions for AudioTrak Prodigy 7.1 (and possibly 192) cards
  35. * Copyright (c) 2003 Dimitromanolakis Apostolos <apostol@cs.utoronto.ca>
  36. *
  37. * version 0.82: Stable / not all features work yet (no communication with AC97 secondary)
  38. * added 64x/128x oversampling switch (should be 64x only for 96khz)
  39. * fixed some recording labels (still need to check the rest)
  40. * recording is working probably thanks to correct wm8770 initialization
  41. *
  42. * version 0.5: Initial release:
  43. * working: analog output, mixer, headphone amplifier switch
  44. * not working: prety much everything else, at least i could verify that
  45. * we have no digital output, no capture, pretty bad clicks and poops
  46. * on mixer switch and other coll stuff.
  47. */
  48. #include <linux/io.h>
  49. #include <linux/delay.h>
  50. #include <linux/interrupt.h>
  51. #include <linux/init.h>
  52. #include <linux/slab.h>
  53. #include <linux/mutex.h>
  54. #include <sound/core.h>
  55. #include "ice1712.h"
  56. #include "envy24ht.h"
  57. #include "aureon.h"
  58. #include <sound/tlv.h>
  59. /* AC97 register cache for Aureon */
  60. struct aureon_spec {
  61. unsigned short stac9744[64];
  62. unsigned int cs8415_mux;
  63. unsigned short master[2];
  64. unsigned short vol[8];
  65. unsigned char pca9554_out;
  66. };
  67. /* WM8770 registers */
  68. #define WM_DAC_ATTEN 0x00 /* DAC1-8 analog attenuation */
  69. #define WM_DAC_MASTER_ATTEN 0x08 /* DAC master analog attenuation */
  70. #define WM_DAC_DIG_ATTEN 0x09 /* DAC1-8 digital attenuation */
  71. #define WM_DAC_DIG_MASTER_ATTEN 0x11 /* DAC master digital attenuation */
  72. #define WM_PHASE_SWAP 0x12 /* DAC phase */
  73. #define WM_DAC_CTRL1 0x13 /* DAC control bits */
  74. #define WM_MUTE 0x14 /* mute controls */
  75. #define WM_DAC_CTRL2 0x15 /* de-emphasis and zefo-flag */
  76. #define WM_INT_CTRL 0x16 /* interface control */
  77. #define WM_MASTER 0x17 /* master clock and mode */
  78. #define WM_POWERDOWN 0x18 /* power-down controls */
  79. #define WM_ADC_GAIN 0x19 /* ADC gain L(19)/R(1a) */
  80. #define WM_ADC_MUX 0x1b /* input MUX */
  81. #define WM_OUT_MUX1 0x1c /* output MUX */
  82. #define WM_OUT_MUX2 0x1e /* output MUX */
  83. #define WM_RESET 0x1f /* software reset */
  84. /* CS8415A registers */
  85. #define CS8415_CTRL1 0x01
  86. #define CS8415_CTRL2 0x02
  87. #define CS8415_QSUB 0x14
  88. #define CS8415_RATIO 0x1E
  89. #define CS8415_C_BUFFER 0x20
  90. #define CS8415_ID 0x7F
  91. /* PCA9554 registers */
  92. #define PCA9554_DEV 0x40 /* I2C device address */
  93. #define PCA9554_IN 0x00 /* input port */
  94. #define PCA9554_OUT 0x01 /* output port */
  95. #define PCA9554_INVERT 0x02 /* input invert */
  96. #define PCA9554_DIR 0x03 /* port directions */
  97. /*
  98. * Aureon Universe additional controls using PCA9554
  99. */
  100. /*
  101. * Send data to pca9554
  102. */
  103. static void aureon_pca9554_write(struct snd_ice1712 *ice, unsigned char reg,
  104. unsigned char data)
  105. {
  106. unsigned int tmp;
  107. int i, j;
  108. unsigned char dev = PCA9554_DEV; /* ID 0100000, write */
  109. unsigned char val = 0;
  110. tmp = snd_ice1712_gpio_read(ice);
  111. snd_ice1712_gpio_set_mask(ice, ~(AUREON_SPI_MOSI|AUREON_SPI_CLK|
  112. AUREON_WM_RW|AUREON_WM_CS|
  113. AUREON_CS8415_CS));
  114. tmp |= AUREON_WM_RW;
  115. tmp |= AUREON_CS8415_CS | AUREON_WM_CS; /* disable SPI devices */
  116. tmp &= ~AUREON_SPI_MOSI;
  117. tmp &= ~AUREON_SPI_CLK;
  118. snd_ice1712_gpio_write(ice, tmp);
  119. udelay(50);
  120. /*
  121. * send i2c stop condition and start condition
  122. * to obtain sane state
  123. */
  124. tmp |= AUREON_SPI_CLK;
  125. snd_ice1712_gpio_write(ice, tmp);
  126. udelay(50);
  127. tmp |= AUREON_SPI_MOSI;
  128. snd_ice1712_gpio_write(ice, tmp);
  129. udelay(100);
  130. tmp &= ~AUREON_SPI_MOSI;
  131. snd_ice1712_gpio_write(ice, tmp);
  132. udelay(50);
  133. tmp &= ~AUREON_SPI_CLK;
  134. snd_ice1712_gpio_write(ice, tmp);
  135. udelay(100);
  136. /*
  137. * send device address, command and value,
  138. * skipping ack cycles inbetween
  139. */
  140. for (j = 0; j < 3; j++) {
  141. switch (j) {
  142. case 0:
  143. val = dev;
  144. break;
  145. case 1:
  146. val = reg;
  147. break;
  148. case 2:
  149. val = data;
  150. break;
  151. }
  152. for (i = 7; i >= 0; i--) {
  153. tmp &= ~AUREON_SPI_CLK;
  154. snd_ice1712_gpio_write(ice, tmp);
  155. udelay(40);
  156. if (val & (1 << i))
  157. tmp |= AUREON_SPI_MOSI;
  158. else
  159. tmp &= ~AUREON_SPI_MOSI;
  160. snd_ice1712_gpio_write(ice, tmp);
  161. udelay(40);
  162. tmp |= AUREON_SPI_CLK;
  163. snd_ice1712_gpio_write(ice, tmp);
  164. udelay(40);
  165. }
  166. tmp &= ~AUREON_SPI_CLK;
  167. snd_ice1712_gpio_write(ice, tmp);
  168. udelay(40);
  169. tmp |= AUREON_SPI_CLK;
  170. snd_ice1712_gpio_write(ice, tmp);
  171. udelay(40);
  172. tmp &= ~AUREON_SPI_CLK;
  173. snd_ice1712_gpio_write(ice, tmp);
  174. udelay(40);
  175. }
  176. tmp &= ~AUREON_SPI_CLK;
  177. snd_ice1712_gpio_write(ice, tmp);
  178. udelay(40);
  179. tmp &= ~AUREON_SPI_MOSI;
  180. snd_ice1712_gpio_write(ice, tmp);
  181. udelay(40);
  182. tmp |= AUREON_SPI_CLK;
  183. snd_ice1712_gpio_write(ice, tmp);
  184. udelay(50);
  185. tmp |= AUREON_SPI_MOSI;
  186. snd_ice1712_gpio_write(ice, tmp);
  187. udelay(100);
  188. }
  189. static int aureon_universe_inmux_info(struct snd_kcontrol *kcontrol,
  190. struct snd_ctl_elem_info *uinfo)
  191. {
  192. char *texts[3] = {"Internal Aux", "Wavetable", "Rear Line-In"};
  193. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  194. uinfo->count = 1;
  195. uinfo->value.enumerated.items = 3;
  196. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  197. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  198. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  199. return 0;
  200. }
  201. static int aureon_universe_inmux_get(struct snd_kcontrol *kcontrol,
  202. struct snd_ctl_elem_value *ucontrol)
  203. {
  204. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  205. struct aureon_spec *spec = ice->spec;
  206. ucontrol->value.enumerated.item[0] = spec->pca9554_out;
  207. return 0;
  208. }
  209. static int aureon_universe_inmux_put(struct snd_kcontrol *kcontrol,
  210. struct snd_ctl_elem_value *ucontrol)
  211. {
  212. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  213. struct aureon_spec *spec = ice->spec;
  214. unsigned char oval, nval;
  215. int change;
  216. nval = ucontrol->value.enumerated.item[0];
  217. if (nval >= 3)
  218. return -EINVAL;
  219. snd_ice1712_save_gpio_status(ice);
  220. oval = spec->pca9554_out;
  221. change = (oval != nval);
  222. if (change) {
  223. aureon_pca9554_write(ice, PCA9554_OUT, nval);
  224. spec->pca9554_out = nval;
  225. }
  226. snd_ice1712_restore_gpio_status(ice);
  227. return change;
  228. }
  229. static void aureon_ac97_write(struct snd_ice1712 *ice, unsigned short reg,
  230. unsigned short val)
  231. {
  232. struct aureon_spec *spec = ice->spec;
  233. unsigned int tmp;
  234. /* Send address to XILINX chip */
  235. tmp = (snd_ice1712_gpio_read(ice) & ~0xFF) | (reg & 0x7F);
  236. snd_ice1712_gpio_write(ice, tmp);
  237. udelay(10);
  238. tmp |= AUREON_AC97_ADDR;
  239. snd_ice1712_gpio_write(ice, tmp);
  240. udelay(10);
  241. tmp &= ~AUREON_AC97_ADDR;
  242. snd_ice1712_gpio_write(ice, tmp);
  243. udelay(10);
  244. /* Send low-order byte to XILINX chip */
  245. tmp &= ~AUREON_AC97_DATA_MASK;
  246. tmp |= val & AUREON_AC97_DATA_MASK;
  247. snd_ice1712_gpio_write(ice, tmp);
  248. udelay(10);
  249. tmp |= AUREON_AC97_DATA_LOW;
  250. snd_ice1712_gpio_write(ice, tmp);
  251. udelay(10);
  252. tmp &= ~AUREON_AC97_DATA_LOW;
  253. snd_ice1712_gpio_write(ice, tmp);
  254. udelay(10);
  255. /* Send high-order byte to XILINX chip */
  256. tmp &= ~AUREON_AC97_DATA_MASK;
  257. tmp |= (val >> 8) & AUREON_AC97_DATA_MASK;
  258. snd_ice1712_gpio_write(ice, tmp);
  259. udelay(10);
  260. tmp |= AUREON_AC97_DATA_HIGH;
  261. snd_ice1712_gpio_write(ice, tmp);
  262. udelay(10);
  263. tmp &= ~AUREON_AC97_DATA_HIGH;
  264. snd_ice1712_gpio_write(ice, tmp);
  265. udelay(10);
  266. /* Instruct XILINX chip to parse the data to the STAC9744 chip */
  267. tmp |= AUREON_AC97_COMMIT;
  268. snd_ice1712_gpio_write(ice, tmp);
  269. udelay(10);
  270. tmp &= ~AUREON_AC97_COMMIT;
  271. snd_ice1712_gpio_write(ice, tmp);
  272. udelay(10);
  273. /* Store the data in out private buffer */
  274. spec->stac9744[(reg & 0x7F) >> 1] = val;
  275. }
  276. static unsigned short aureon_ac97_read(struct snd_ice1712 *ice, unsigned short reg)
  277. {
  278. struct aureon_spec *spec = ice->spec;
  279. return spec->stac9744[(reg & 0x7F) >> 1];
  280. }
  281. /*
  282. * Initialize STAC9744 chip
  283. */
  284. static int aureon_ac97_init(struct snd_ice1712 *ice)
  285. {
  286. struct aureon_spec *spec = ice->spec;
  287. int i;
  288. static const unsigned short ac97_defaults[] = {
  289. 0x00, 0x9640,
  290. 0x02, 0x8000,
  291. 0x04, 0x8000,
  292. 0x06, 0x8000,
  293. 0x0C, 0x8008,
  294. 0x0E, 0x8008,
  295. 0x10, 0x8808,
  296. 0x12, 0x8808,
  297. 0x14, 0x8808,
  298. 0x16, 0x8808,
  299. 0x18, 0x8808,
  300. 0x1C, 0x8000,
  301. 0x26, 0x000F,
  302. 0x28, 0x0201,
  303. 0x2C, 0xBB80,
  304. 0x32, 0xBB80,
  305. 0x7C, 0x8384,
  306. 0x7E, 0x7644,
  307. (unsigned short)-1
  308. };
  309. unsigned int tmp;
  310. /* Cold reset */
  311. tmp = (snd_ice1712_gpio_read(ice) | AUREON_AC97_RESET) & ~AUREON_AC97_DATA_MASK;
  312. snd_ice1712_gpio_write(ice, tmp);
  313. udelay(3);
  314. tmp &= ~AUREON_AC97_RESET;
  315. snd_ice1712_gpio_write(ice, tmp);
  316. udelay(3);
  317. tmp |= AUREON_AC97_RESET;
  318. snd_ice1712_gpio_write(ice, tmp);
  319. udelay(3);
  320. memset(&spec->stac9744, 0, sizeof(spec->stac9744));
  321. for (i = 0; ac97_defaults[i] != (unsigned short)-1; i += 2)
  322. spec->stac9744[(ac97_defaults[i]) >> 1] = ac97_defaults[i+1];
  323. /* Unmute AC'97 master volume permanently - muting is done by WM8770 */
  324. aureon_ac97_write(ice, AC97_MASTER, 0x0000);
  325. return 0;
  326. }
  327. #define AUREON_AC97_STEREO 0x80
  328. /*
  329. * AC'97 volume controls
  330. */
  331. static int aureon_ac97_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  332. {
  333. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  334. uinfo->count = kcontrol->private_value & AUREON_AC97_STEREO ? 2 : 1;
  335. uinfo->value.integer.min = 0;
  336. uinfo->value.integer.max = 31;
  337. return 0;
  338. }
  339. static int aureon_ac97_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  340. {
  341. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  342. unsigned short vol;
  343. mutex_lock(&ice->gpio_mutex);
  344. vol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  345. ucontrol->value.integer.value[0] = 0x1F - (vol & 0x1F);
  346. if (kcontrol->private_value & AUREON_AC97_STEREO)
  347. ucontrol->value.integer.value[1] = 0x1F - ((vol >> 8) & 0x1F);
  348. mutex_unlock(&ice->gpio_mutex);
  349. return 0;
  350. }
  351. static int aureon_ac97_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  352. {
  353. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  354. unsigned short ovol, nvol;
  355. int change;
  356. snd_ice1712_save_gpio_status(ice);
  357. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  358. nvol = (0x1F - ucontrol->value.integer.value[0]) & 0x001F;
  359. if (kcontrol->private_value & AUREON_AC97_STEREO)
  360. nvol |= ((0x1F - ucontrol->value.integer.value[1]) << 8) & 0x1F00;
  361. nvol |= ovol & ~0x1F1F;
  362. change = (ovol != nvol);
  363. if (change)
  364. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  365. snd_ice1712_restore_gpio_status(ice);
  366. return change;
  367. }
  368. /*
  369. * AC'97 mute controls
  370. */
  371. #define aureon_ac97_mute_info snd_ctl_boolean_mono_info
  372. static int aureon_ac97_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  373. {
  374. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  375. mutex_lock(&ice->gpio_mutex);
  376. ucontrol->value.integer.value[0] = aureon_ac97_read(ice,
  377. kcontrol->private_value & 0x7F) & 0x8000 ? 0 : 1;
  378. mutex_unlock(&ice->gpio_mutex);
  379. return 0;
  380. }
  381. static int aureon_ac97_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  382. {
  383. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  384. unsigned short ovol, nvol;
  385. int change;
  386. snd_ice1712_save_gpio_status(ice);
  387. ovol = aureon_ac97_read(ice, kcontrol->private_value & 0x7F);
  388. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x8000) | (ovol & ~0x8000);
  389. change = (ovol != nvol);
  390. if (change)
  391. aureon_ac97_write(ice, kcontrol->private_value & 0x7F, nvol);
  392. snd_ice1712_restore_gpio_status(ice);
  393. return change;
  394. }
  395. /*
  396. * AC'97 mute controls
  397. */
  398. #define aureon_ac97_micboost_info snd_ctl_boolean_mono_info
  399. static int aureon_ac97_micboost_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  400. {
  401. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  402. mutex_lock(&ice->gpio_mutex);
  403. ucontrol->value.integer.value[0] = aureon_ac97_read(ice, AC97_MIC) & 0x0020 ? 0 : 1;
  404. mutex_unlock(&ice->gpio_mutex);
  405. return 0;
  406. }
  407. static int aureon_ac97_micboost_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  408. {
  409. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  410. unsigned short ovol, nvol;
  411. int change;
  412. snd_ice1712_save_gpio_status(ice);
  413. ovol = aureon_ac97_read(ice, AC97_MIC);
  414. nvol = (ucontrol->value.integer.value[0] ? 0x0000 : 0x0020) | (ovol & ~0x0020);
  415. change = (ovol != nvol);
  416. if (change)
  417. aureon_ac97_write(ice, AC97_MIC, nvol);
  418. snd_ice1712_restore_gpio_status(ice);
  419. return change;
  420. }
  421. /*
  422. * write data in the SPI mode
  423. */
  424. static void aureon_spi_write(struct snd_ice1712 *ice, unsigned int cs, unsigned int data, int bits)
  425. {
  426. unsigned int tmp;
  427. int i;
  428. unsigned int mosi, clk;
  429. tmp = snd_ice1712_gpio_read(ice);
  430. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  431. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) {
  432. snd_ice1712_gpio_set_mask(ice, ~(PRODIGY_SPI_MOSI|PRODIGY_SPI_CLK|PRODIGY_WM_CS));
  433. mosi = PRODIGY_SPI_MOSI;
  434. clk = PRODIGY_SPI_CLK;
  435. } else {
  436. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RW|AUREON_SPI_MOSI|AUREON_SPI_CLK|
  437. AUREON_WM_CS|AUREON_CS8415_CS));
  438. mosi = AUREON_SPI_MOSI;
  439. clk = AUREON_SPI_CLK;
  440. tmp |= AUREON_WM_RW;
  441. }
  442. tmp &= ~cs;
  443. snd_ice1712_gpio_write(ice, tmp);
  444. udelay(1);
  445. for (i = bits - 1; i >= 0; i--) {
  446. tmp &= ~clk;
  447. snd_ice1712_gpio_write(ice, tmp);
  448. udelay(1);
  449. if (data & (1 << i))
  450. tmp |= mosi;
  451. else
  452. tmp &= ~mosi;
  453. snd_ice1712_gpio_write(ice, tmp);
  454. udelay(1);
  455. tmp |= clk;
  456. snd_ice1712_gpio_write(ice, tmp);
  457. udelay(1);
  458. }
  459. tmp &= ~clk;
  460. tmp |= cs;
  461. snd_ice1712_gpio_write(ice, tmp);
  462. udelay(1);
  463. tmp |= clk;
  464. snd_ice1712_gpio_write(ice, tmp);
  465. udelay(1);
  466. }
  467. /*
  468. * Read data in SPI mode
  469. */
  470. static void aureon_spi_read(struct snd_ice1712 *ice, unsigned int cs,
  471. unsigned int data, int bits, unsigned char *buffer, int size)
  472. {
  473. int i, j;
  474. unsigned int tmp;
  475. tmp = (snd_ice1712_gpio_read(ice) & ~AUREON_SPI_CLK) | AUREON_CS8415_CS|AUREON_WM_CS;
  476. snd_ice1712_gpio_write(ice, tmp);
  477. tmp &= ~cs;
  478. snd_ice1712_gpio_write(ice, tmp);
  479. udelay(1);
  480. for (i = bits-1; i >= 0; i--) {
  481. if (data & (1 << i))
  482. tmp |= AUREON_SPI_MOSI;
  483. else
  484. tmp &= ~AUREON_SPI_MOSI;
  485. snd_ice1712_gpio_write(ice, tmp);
  486. udelay(1);
  487. tmp |= AUREON_SPI_CLK;
  488. snd_ice1712_gpio_write(ice, tmp);
  489. udelay(1);
  490. tmp &= ~AUREON_SPI_CLK;
  491. snd_ice1712_gpio_write(ice, tmp);
  492. udelay(1);
  493. }
  494. for (j = 0; j < size; j++) {
  495. unsigned char outdata = 0;
  496. for (i = 7; i >= 0; i--) {
  497. tmp = snd_ice1712_gpio_read(ice);
  498. outdata <<= 1;
  499. outdata |= (tmp & AUREON_SPI_MISO) ? 1 : 0;
  500. udelay(1);
  501. tmp |= AUREON_SPI_CLK;
  502. snd_ice1712_gpio_write(ice, tmp);
  503. udelay(1);
  504. tmp &= ~AUREON_SPI_CLK;
  505. snd_ice1712_gpio_write(ice, tmp);
  506. udelay(1);
  507. }
  508. buffer[j] = outdata;
  509. }
  510. tmp |= cs;
  511. snd_ice1712_gpio_write(ice, tmp);
  512. }
  513. static unsigned char aureon_cs8415_get(struct snd_ice1712 *ice, int reg)
  514. {
  515. unsigned char val;
  516. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  517. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, &val, 1);
  518. return val;
  519. }
  520. static void aureon_cs8415_read(struct snd_ice1712 *ice, int reg,
  521. unsigned char *buffer, int size)
  522. {
  523. aureon_spi_write(ice, AUREON_CS8415_CS, 0x2000 | reg, 16);
  524. aureon_spi_read(ice, AUREON_CS8415_CS, 0x21, 8, buffer, size);
  525. }
  526. static void aureon_cs8415_put(struct snd_ice1712 *ice, int reg,
  527. unsigned char val)
  528. {
  529. aureon_spi_write(ice, AUREON_CS8415_CS, 0x200000 | (reg << 8) | val, 24);
  530. }
  531. /*
  532. * get the current register value of WM codec
  533. */
  534. static unsigned short wm_get(struct snd_ice1712 *ice, int reg)
  535. {
  536. reg <<= 1;
  537. return ((unsigned short)ice->akm[0].images[reg] << 8) |
  538. ice->akm[0].images[reg + 1];
  539. }
  540. /*
  541. * set the register value of WM codec
  542. */
  543. static void wm_put_nocache(struct snd_ice1712 *ice, int reg, unsigned short val)
  544. {
  545. aureon_spi_write(ice,
  546. ((ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  547. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT) ?
  548. PRODIGY_WM_CS : AUREON_WM_CS),
  549. (reg << 9) | (val & 0x1ff), 16);
  550. }
  551. /*
  552. * set the register value of WM codec and remember it
  553. */
  554. static void wm_put(struct snd_ice1712 *ice, int reg, unsigned short val)
  555. {
  556. wm_put_nocache(ice, reg, val);
  557. reg <<= 1;
  558. ice->akm[0].images[reg] = val >> 8;
  559. ice->akm[0].images[reg + 1] = val;
  560. }
  561. /*
  562. */
  563. #define aureon_mono_bool_info snd_ctl_boolean_mono_info
  564. /*
  565. * AC'97 master playback mute controls (Mute on WM8770 chip)
  566. */
  567. #define aureon_ac97_mmute_info snd_ctl_boolean_mono_info
  568. static int aureon_ac97_mmute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  569. {
  570. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  571. mutex_lock(&ice->gpio_mutex);
  572. ucontrol->value.integer.value[0] = (wm_get(ice, WM_OUT_MUX1) >> 1) & 0x01;
  573. mutex_unlock(&ice->gpio_mutex);
  574. return 0;
  575. }
  576. static int aureon_ac97_mmute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  577. {
  578. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  579. unsigned short ovol, nvol;
  580. int change;
  581. snd_ice1712_save_gpio_status(ice);
  582. ovol = wm_get(ice, WM_OUT_MUX1);
  583. nvol = (ovol & ~0x02) | (ucontrol->value.integer.value[0] ? 0x02 : 0x00);
  584. change = (ovol != nvol);
  585. if (change)
  586. wm_put(ice, WM_OUT_MUX1, nvol);
  587. snd_ice1712_restore_gpio_status(ice);
  588. return change;
  589. }
  590. static const DECLARE_TLV_DB_SCALE(db_scale_wm_dac, -10000, 100, 1);
  591. static const DECLARE_TLV_DB_SCALE(db_scale_wm_pcm, -6400, 50, 1);
  592. static const DECLARE_TLV_DB_SCALE(db_scale_wm_adc, -1200, 100, 0);
  593. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_master, -4650, 150, 0);
  594. static const DECLARE_TLV_DB_SCALE(db_scale_ac97_gain, -3450, 150, 0);
  595. #define WM_VOL_MAX 100
  596. #define WM_VOL_CNT 101 /* 0dB .. -100dB */
  597. #define WM_VOL_MUTE 0x8000
  598. static void wm_set_vol(struct snd_ice1712 *ice, unsigned int index, unsigned short vol, unsigned short master)
  599. {
  600. unsigned char nvol;
  601. if ((master & WM_VOL_MUTE) || (vol & WM_VOL_MUTE))
  602. nvol = 0;
  603. else
  604. nvol = ((vol % WM_VOL_CNT) * (master % WM_VOL_CNT)) /
  605. WM_VOL_MAX;
  606. wm_put(ice, index, nvol);
  607. wm_put_nocache(ice, index, 0x180 | nvol);
  608. }
  609. /*
  610. * DAC mute control
  611. */
  612. #define wm_pcm_mute_info snd_ctl_boolean_mono_info
  613. static int wm_pcm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  614. {
  615. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  616. mutex_lock(&ice->gpio_mutex);
  617. ucontrol->value.integer.value[0] = (wm_get(ice, WM_MUTE) & 0x10) ? 0 : 1;
  618. mutex_unlock(&ice->gpio_mutex);
  619. return 0;
  620. }
  621. static int wm_pcm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  622. {
  623. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  624. unsigned short nval, oval;
  625. int change;
  626. snd_ice1712_save_gpio_status(ice);
  627. oval = wm_get(ice, WM_MUTE);
  628. nval = (oval & ~0x10) | (ucontrol->value.integer.value[0] ? 0 : 0x10);
  629. change = (oval != nval);
  630. if (change)
  631. wm_put(ice, WM_MUTE, nval);
  632. snd_ice1712_restore_gpio_status(ice);
  633. return change;
  634. }
  635. /*
  636. * Master volume attenuation mixer control
  637. */
  638. static int wm_master_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  639. {
  640. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  641. uinfo->count = 2;
  642. uinfo->value.integer.min = 0;
  643. uinfo->value.integer.max = WM_VOL_MAX;
  644. return 0;
  645. }
  646. static int wm_master_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  647. {
  648. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  649. struct aureon_spec *spec = ice->spec;
  650. int i;
  651. for (i = 0; i < 2; i++)
  652. ucontrol->value.integer.value[i] =
  653. spec->master[i] & ~WM_VOL_MUTE;
  654. return 0;
  655. }
  656. static int wm_master_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  657. {
  658. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  659. struct aureon_spec *spec = ice->spec;
  660. int ch, change = 0;
  661. snd_ice1712_save_gpio_status(ice);
  662. for (ch = 0; ch < 2; ch++) {
  663. unsigned int vol = ucontrol->value.integer.value[ch];
  664. if (vol > WM_VOL_MAX)
  665. continue;
  666. vol |= spec->master[ch] & WM_VOL_MUTE;
  667. if (vol != spec->master[ch]) {
  668. int dac;
  669. spec->master[ch] = vol;
  670. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  671. wm_set_vol(ice, WM_DAC_ATTEN + dac + ch,
  672. spec->vol[dac + ch],
  673. spec->master[ch]);
  674. change = 1;
  675. }
  676. }
  677. snd_ice1712_restore_gpio_status(ice);
  678. return change;
  679. }
  680. /*
  681. * DAC volume attenuation mixer control
  682. */
  683. static int wm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  684. {
  685. int voices = kcontrol->private_value >> 8;
  686. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  687. uinfo->count = voices;
  688. uinfo->value.integer.min = 0; /* mute (-101dB) */
  689. uinfo->value.integer.max = WM_VOL_MAX; /* 0dB */
  690. return 0;
  691. }
  692. static int wm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  693. {
  694. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  695. struct aureon_spec *spec = ice->spec;
  696. int i, ofs, voices;
  697. voices = kcontrol->private_value >> 8;
  698. ofs = kcontrol->private_value & 0xff;
  699. for (i = 0; i < voices; i++)
  700. ucontrol->value.integer.value[i] =
  701. spec->vol[ofs+i] & ~WM_VOL_MUTE;
  702. return 0;
  703. }
  704. static int wm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  705. {
  706. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  707. struct aureon_spec *spec = ice->spec;
  708. int i, idx, ofs, voices;
  709. int change = 0;
  710. voices = kcontrol->private_value >> 8;
  711. ofs = kcontrol->private_value & 0xff;
  712. snd_ice1712_save_gpio_status(ice);
  713. for (i = 0; i < voices; i++) {
  714. unsigned int vol = ucontrol->value.integer.value[i];
  715. if (vol > WM_VOL_MAX)
  716. continue;
  717. vol |= spec->vol[ofs+i];
  718. if (vol != spec->vol[ofs+i]) {
  719. spec->vol[ofs+i] = vol;
  720. idx = WM_DAC_ATTEN + ofs + i;
  721. wm_set_vol(ice, idx, spec->vol[ofs + i],
  722. spec->master[i]);
  723. change = 1;
  724. }
  725. }
  726. snd_ice1712_restore_gpio_status(ice);
  727. return change;
  728. }
  729. /*
  730. * WM8770 mute control
  731. */
  732. static int wm_mute_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  733. {
  734. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  735. uinfo->count = kcontrol->private_value >> 8;
  736. uinfo->value.integer.min = 0;
  737. uinfo->value.integer.max = 1;
  738. return 0;
  739. }
  740. static int wm_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  741. {
  742. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  743. struct aureon_spec *spec = ice->spec;
  744. int voices, ofs, i;
  745. voices = kcontrol->private_value >> 8;
  746. ofs = kcontrol->private_value & 0xFF;
  747. for (i = 0; i < voices; i++)
  748. ucontrol->value.integer.value[i] =
  749. (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  750. return 0;
  751. }
  752. static int wm_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  753. {
  754. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  755. struct aureon_spec *spec = ice->spec;
  756. int change = 0, voices, ofs, i;
  757. voices = kcontrol->private_value >> 8;
  758. ofs = kcontrol->private_value & 0xFF;
  759. snd_ice1712_save_gpio_status(ice);
  760. for (i = 0; i < voices; i++) {
  761. int val = (spec->vol[ofs + i] & WM_VOL_MUTE) ? 0 : 1;
  762. if (ucontrol->value.integer.value[i] != val) {
  763. spec->vol[ofs + i] &= ~WM_VOL_MUTE;
  764. spec->vol[ofs + i] |=
  765. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  766. wm_set_vol(ice, ofs + i, spec->vol[ofs + i],
  767. spec->master[i]);
  768. change = 1;
  769. }
  770. }
  771. snd_ice1712_restore_gpio_status(ice);
  772. return change;
  773. }
  774. /*
  775. * WM8770 master mute control
  776. */
  777. #define wm_master_mute_info snd_ctl_boolean_stereo_info
  778. static int wm_master_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  779. {
  780. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  781. struct aureon_spec *spec = ice->spec;
  782. ucontrol->value.integer.value[0] =
  783. (spec->master[0] & WM_VOL_MUTE) ? 0 : 1;
  784. ucontrol->value.integer.value[1] =
  785. (spec->master[1] & WM_VOL_MUTE) ? 0 : 1;
  786. return 0;
  787. }
  788. static int wm_master_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  789. {
  790. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  791. struct aureon_spec *spec = ice->spec;
  792. int change = 0, i;
  793. snd_ice1712_save_gpio_status(ice);
  794. for (i = 0; i < 2; i++) {
  795. int val = (spec->master[i] & WM_VOL_MUTE) ? 0 : 1;
  796. if (ucontrol->value.integer.value[i] != val) {
  797. int dac;
  798. spec->master[i] &= ~WM_VOL_MUTE;
  799. spec->master[i] |=
  800. ucontrol->value.integer.value[i] ? 0 : WM_VOL_MUTE;
  801. for (dac = 0; dac < ice->num_total_dacs; dac += 2)
  802. wm_set_vol(ice, WM_DAC_ATTEN + dac + i,
  803. spec->vol[dac + i],
  804. spec->master[i]);
  805. change = 1;
  806. }
  807. }
  808. snd_ice1712_restore_gpio_status(ice);
  809. return change;
  810. }
  811. /* digital master volume */
  812. #define PCM_0dB 0xff
  813. #define PCM_RES 128 /* -64dB */
  814. #define PCM_MIN (PCM_0dB - PCM_RES)
  815. static int wm_pcm_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  816. {
  817. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  818. uinfo->count = 1;
  819. uinfo->value.integer.min = 0; /* mute (-64dB) */
  820. uinfo->value.integer.max = PCM_RES; /* 0dB */
  821. return 0;
  822. }
  823. static int wm_pcm_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  824. {
  825. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  826. unsigned short val;
  827. mutex_lock(&ice->gpio_mutex);
  828. val = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  829. val = val > PCM_MIN ? (val - PCM_MIN) : 0;
  830. ucontrol->value.integer.value[0] = val;
  831. mutex_unlock(&ice->gpio_mutex);
  832. return 0;
  833. }
  834. static int wm_pcm_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  835. {
  836. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  837. unsigned short ovol, nvol;
  838. int change = 0;
  839. nvol = ucontrol->value.integer.value[0];
  840. if (nvol > PCM_RES)
  841. return -EINVAL;
  842. snd_ice1712_save_gpio_status(ice);
  843. nvol = (nvol ? (nvol + PCM_MIN) : 0) & 0xff;
  844. ovol = wm_get(ice, WM_DAC_DIG_MASTER_ATTEN) & 0xff;
  845. if (ovol != nvol) {
  846. wm_put(ice, WM_DAC_DIG_MASTER_ATTEN, nvol); /* prelatch */
  847. wm_put_nocache(ice, WM_DAC_DIG_MASTER_ATTEN, nvol | 0x100); /* update */
  848. change = 1;
  849. }
  850. snd_ice1712_restore_gpio_status(ice);
  851. return change;
  852. }
  853. /*
  854. * ADC mute control
  855. */
  856. #define wm_adc_mute_info snd_ctl_boolean_stereo_info
  857. static int wm_adc_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  858. {
  859. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  860. unsigned short val;
  861. int i;
  862. mutex_lock(&ice->gpio_mutex);
  863. for (i = 0; i < 2; i++) {
  864. val = wm_get(ice, WM_ADC_GAIN + i);
  865. ucontrol->value.integer.value[i] = ~val>>5 & 0x1;
  866. }
  867. mutex_unlock(&ice->gpio_mutex);
  868. return 0;
  869. }
  870. static int wm_adc_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  871. {
  872. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  873. unsigned short new, old;
  874. int i, change = 0;
  875. snd_ice1712_save_gpio_status(ice);
  876. for (i = 0; i < 2; i++) {
  877. old = wm_get(ice, WM_ADC_GAIN + i);
  878. new = (~ucontrol->value.integer.value[i]<<5&0x20) | (old&~0x20);
  879. if (new != old) {
  880. wm_put(ice, WM_ADC_GAIN + i, new);
  881. change = 1;
  882. }
  883. }
  884. snd_ice1712_restore_gpio_status(ice);
  885. return change;
  886. }
  887. /*
  888. * ADC gain mixer control
  889. */
  890. static int wm_adc_vol_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  891. {
  892. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  893. uinfo->count = 2;
  894. uinfo->value.integer.min = 0; /* -12dB */
  895. uinfo->value.integer.max = 0x1f; /* 19dB */
  896. return 0;
  897. }
  898. static int wm_adc_vol_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  899. {
  900. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  901. int i, idx;
  902. unsigned short vol;
  903. mutex_lock(&ice->gpio_mutex);
  904. for (i = 0; i < 2; i++) {
  905. idx = WM_ADC_GAIN + i;
  906. vol = wm_get(ice, idx) & 0x1f;
  907. ucontrol->value.integer.value[i] = vol;
  908. }
  909. mutex_unlock(&ice->gpio_mutex);
  910. return 0;
  911. }
  912. static int wm_adc_vol_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  913. {
  914. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  915. int i, idx;
  916. unsigned short ovol, nvol;
  917. int change = 0;
  918. snd_ice1712_save_gpio_status(ice);
  919. for (i = 0; i < 2; i++) {
  920. idx = WM_ADC_GAIN + i;
  921. nvol = ucontrol->value.integer.value[i] & 0x1f;
  922. ovol = wm_get(ice, idx);
  923. if ((ovol & 0x1f) != nvol) {
  924. wm_put(ice, idx, nvol | (ovol & ~0x1f));
  925. change = 1;
  926. }
  927. }
  928. snd_ice1712_restore_gpio_status(ice);
  929. return change;
  930. }
  931. /*
  932. * ADC input mux mixer control
  933. */
  934. static int wm_adc_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  935. {
  936. static const char * const texts[] = {
  937. "CD", /* AIN1 */
  938. "Aux", /* AIN2 */
  939. "Line", /* AIN3 */
  940. "Mic", /* AIN4 */
  941. "AC97" /* AIN5 */
  942. };
  943. static const char * const universe_texts[] = {
  944. "Aux1", /* AIN1 */
  945. "CD", /* AIN2 */
  946. "Phono", /* AIN3 */
  947. "Line", /* AIN4 */
  948. "Aux2", /* AIN5 */
  949. "Mic", /* AIN6 */
  950. "Aux3", /* AIN7 */
  951. "AC97" /* AIN8 */
  952. };
  953. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  954. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  955. uinfo->count = 2;
  956. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  957. uinfo->value.enumerated.items = 8;
  958. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  959. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  960. strcpy(uinfo->value.enumerated.name, universe_texts[uinfo->value.enumerated.item]);
  961. } else {
  962. uinfo->value.enumerated.items = 5;
  963. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  964. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  965. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  966. }
  967. return 0;
  968. }
  969. static int wm_adc_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  970. {
  971. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  972. unsigned short val;
  973. mutex_lock(&ice->gpio_mutex);
  974. val = wm_get(ice, WM_ADC_MUX);
  975. ucontrol->value.enumerated.item[0] = val & 7;
  976. ucontrol->value.enumerated.item[1] = (val >> 4) & 7;
  977. mutex_unlock(&ice->gpio_mutex);
  978. return 0;
  979. }
  980. static int wm_adc_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  981. {
  982. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  983. unsigned short oval, nval;
  984. int change;
  985. snd_ice1712_save_gpio_status(ice);
  986. oval = wm_get(ice, WM_ADC_MUX);
  987. nval = oval & ~0x77;
  988. nval |= ucontrol->value.enumerated.item[0] & 7;
  989. nval |= (ucontrol->value.enumerated.item[1] & 7) << 4;
  990. change = (oval != nval);
  991. if (change)
  992. wm_put(ice, WM_ADC_MUX, nval);
  993. snd_ice1712_restore_gpio_status(ice);
  994. return change;
  995. }
  996. /*
  997. * CS8415 Input mux
  998. */
  999. static int aureon_cs8415_mux_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1000. {
  1001. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1002. static const char * const aureon_texts[] = {
  1003. "CD", /* RXP0 */
  1004. "Optical" /* RXP1 */
  1005. };
  1006. static const char * const prodigy_texts[] = {
  1007. "CD",
  1008. "Coax"
  1009. };
  1010. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1011. uinfo->count = 1;
  1012. uinfo->value.enumerated.items = 2;
  1013. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1014. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1015. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71)
  1016. strcpy(uinfo->value.enumerated.name, prodigy_texts[uinfo->value.enumerated.item]);
  1017. else
  1018. strcpy(uinfo->value.enumerated.name, aureon_texts[uinfo->value.enumerated.item]);
  1019. return 0;
  1020. }
  1021. static int aureon_cs8415_mux_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1022. {
  1023. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1024. struct aureon_spec *spec = ice->spec;
  1025. /* snd_ice1712_save_gpio_status(ice); */
  1026. /* val = aureon_cs8415_get(ice, CS8415_CTRL2); */
  1027. ucontrol->value.enumerated.item[0] = spec->cs8415_mux;
  1028. /* snd_ice1712_restore_gpio_status(ice); */
  1029. return 0;
  1030. }
  1031. static int aureon_cs8415_mux_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1032. {
  1033. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1034. struct aureon_spec *spec = ice->spec;
  1035. unsigned short oval, nval;
  1036. int change;
  1037. snd_ice1712_save_gpio_status(ice);
  1038. oval = aureon_cs8415_get(ice, CS8415_CTRL2);
  1039. nval = oval & ~0x07;
  1040. nval |= ucontrol->value.enumerated.item[0] & 7;
  1041. change = (oval != nval);
  1042. if (change)
  1043. aureon_cs8415_put(ice, CS8415_CTRL2, nval);
  1044. snd_ice1712_restore_gpio_status(ice);
  1045. spec->cs8415_mux = ucontrol->value.enumerated.item[0];
  1046. return change;
  1047. }
  1048. static int aureon_cs8415_rate_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1049. {
  1050. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1051. uinfo->count = 1;
  1052. uinfo->value.integer.min = 0;
  1053. uinfo->value.integer.max = 192000;
  1054. return 0;
  1055. }
  1056. static int aureon_cs8415_rate_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1057. {
  1058. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1059. unsigned char ratio;
  1060. ratio = aureon_cs8415_get(ice, CS8415_RATIO);
  1061. ucontrol->value.integer.value[0] = (int)((unsigned int)ratio * 750);
  1062. return 0;
  1063. }
  1064. /*
  1065. * CS8415A Mute
  1066. */
  1067. #define aureon_cs8415_mute_info snd_ctl_boolean_mono_info
  1068. static int aureon_cs8415_mute_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1069. {
  1070. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1071. snd_ice1712_save_gpio_status(ice);
  1072. ucontrol->value.integer.value[0] = (aureon_cs8415_get(ice, CS8415_CTRL1) & 0x20) ? 0 : 1;
  1073. snd_ice1712_restore_gpio_status(ice);
  1074. return 0;
  1075. }
  1076. static int aureon_cs8415_mute_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1077. {
  1078. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1079. unsigned char oval, nval;
  1080. int change;
  1081. snd_ice1712_save_gpio_status(ice);
  1082. oval = aureon_cs8415_get(ice, CS8415_CTRL1);
  1083. if (ucontrol->value.integer.value[0])
  1084. nval = oval & ~0x20;
  1085. else
  1086. nval = oval | 0x20;
  1087. change = (oval != nval);
  1088. if (change)
  1089. aureon_cs8415_put(ice, CS8415_CTRL1, nval);
  1090. snd_ice1712_restore_gpio_status(ice);
  1091. return change;
  1092. }
  1093. /*
  1094. * CS8415A Q-Sub info
  1095. */
  1096. static int aureon_cs8415_qsub_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1097. {
  1098. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  1099. uinfo->count = 10;
  1100. return 0;
  1101. }
  1102. static int aureon_cs8415_qsub_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1103. {
  1104. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1105. snd_ice1712_save_gpio_status(ice);
  1106. aureon_cs8415_read(ice, CS8415_QSUB, ucontrol->value.bytes.data, 10);
  1107. snd_ice1712_restore_gpio_status(ice);
  1108. return 0;
  1109. }
  1110. static int aureon_cs8415_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
  1111. {
  1112. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  1113. uinfo->count = 1;
  1114. return 0;
  1115. }
  1116. static int aureon_cs8415_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1117. {
  1118. memset(ucontrol->value.iec958.status, 0xFF, 24);
  1119. return 0;
  1120. }
  1121. static int aureon_cs8415_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1122. {
  1123. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1124. snd_ice1712_save_gpio_status(ice);
  1125. aureon_cs8415_read(ice, CS8415_C_BUFFER, ucontrol->value.iec958.status, 24);
  1126. snd_ice1712_restore_gpio_status(ice);
  1127. return 0;
  1128. }
  1129. /*
  1130. * Headphone Amplifier
  1131. */
  1132. static int aureon_set_headphone_amp(struct snd_ice1712 *ice, int enable)
  1133. {
  1134. unsigned int tmp, tmp2;
  1135. tmp2 = tmp = snd_ice1712_gpio_read(ice);
  1136. if (enable)
  1137. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1138. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1139. tmp |= AUREON_HP_SEL;
  1140. else
  1141. tmp |= PRODIGY_HP_SEL;
  1142. else
  1143. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1144. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT)
  1145. tmp &= ~AUREON_HP_SEL;
  1146. else
  1147. tmp &= ~PRODIGY_HP_SEL;
  1148. if (tmp != tmp2) {
  1149. snd_ice1712_gpio_write(ice, tmp);
  1150. return 1;
  1151. }
  1152. return 0;
  1153. }
  1154. static int aureon_get_headphone_amp(struct snd_ice1712 *ice)
  1155. {
  1156. unsigned int tmp = snd_ice1712_gpio_read(ice);
  1157. return (tmp & AUREON_HP_SEL) != 0;
  1158. }
  1159. #define aureon_hpamp_info snd_ctl_boolean_mono_info
  1160. static int aureon_hpamp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1161. {
  1162. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1163. ucontrol->value.integer.value[0] = aureon_get_headphone_amp(ice);
  1164. return 0;
  1165. }
  1166. static int aureon_hpamp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1167. {
  1168. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1169. return aureon_set_headphone_amp(ice, ucontrol->value.integer.value[0]);
  1170. }
  1171. /*
  1172. * Deemphasis
  1173. */
  1174. #define aureon_deemp_info snd_ctl_boolean_mono_info
  1175. static int aureon_deemp_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1176. {
  1177. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1178. ucontrol->value.integer.value[0] = (wm_get(ice, WM_DAC_CTRL2) & 0xf) == 0xf;
  1179. return 0;
  1180. }
  1181. static int aureon_deemp_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1182. {
  1183. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1184. int temp, temp2;
  1185. temp2 = temp = wm_get(ice, WM_DAC_CTRL2);
  1186. if (ucontrol->value.integer.value[0])
  1187. temp |= 0xf;
  1188. else
  1189. temp &= ~0xf;
  1190. if (temp != temp2) {
  1191. wm_put(ice, WM_DAC_CTRL2, temp);
  1192. return 1;
  1193. }
  1194. return 0;
  1195. }
  1196. /*
  1197. * ADC Oversampling
  1198. */
  1199. static int aureon_oversampling_info(struct snd_kcontrol *k, struct snd_ctl_elem_info *uinfo)
  1200. {
  1201. static const char * const texts[2] = { "128x", "64x" };
  1202. uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  1203. uinfo->count = 1;
  1204. uinfo->value.enumerated.items = 2;
  1205. if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
  1206. uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
  1207. strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
  1208. return 0;
  1209. }
  1210. static int aureon_oversampling_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1211. {
  1212. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1213. ucontrol->value.enumerated.item[0] = (wm_get(ice, WM_MASTER) & 0x8) == 0x8;
  1214. return 0;
  1215. }
  1216. static int aureon_oversampling_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
  1217. {
  1218. int temp, temp2;
  1219. struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
  1220. temp2 = temp = wm_get(ice, WM_MASTER);
  1221. if (ucontrol->value.enumerated.item[0])
  1222. temp |= 0x8;
  1223. else
  1224. temp &= ~0x8;
  1225. if (temp != temp2) {
  1226. wm_put(ice, WM_MASTER, temp);
  1227. return 1;
  1228. }
  1229. return 0;
  1230. }
  1231. /*
  1232. * mixers
  1233. */
  1234. static struct snd_kcontrol_new aureon_dac_controls[] __devinitdata = {
  1235. {
  1236. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1237. .name = "Master Playback Switch",
  1238. .info = wm_master_mute_info,
  1239. .get = wm_master_mute_get,
  1240. .put = wm_master_mute_put
  1241. },
  1242. {
  1243. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1244. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1245. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1246. .name = "Master Playback Volume",
  1247. .info = wm_master_vol_info,
  1248. .get = wm_master_vol_get,
  1249. .put = wm_master_vol_put,
  1250. .tlv = { .p = db_scale_wm_dac }
  1251. },
  1252. {
  1253. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1254. .name = "Front Playback Switch",
  1255. .info = wm_mute_info,
  1256. .get = wm_mute_get,
  1257. .put = wm_mute_put,
  1258. .private_value = (2 << 8) | 0
  1259. },
  1260. {
  1261. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1262. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1263. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1264. .name = "Front Playback Volume",
  1265. .info = wm_vol_info,
  1266. .get = wm_vol_get,
  1267. .put = wm_vol_put,
  1268. .private_value = (2 << 8) | 0,
  1269. .tlv = { .p = db_scale_wm_dac }
  1270. },
  1271. {
  1272. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1273. .name = "Rear Playback Switch",
  1274. .info = wm_mute_info,
  1275. .get = wm_mute_get,
  1276. .put = wm_mute_put,
  1277. .private_value = (2 << 8) | 2
  1278. },
  1279. {
  1280. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1281. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1282. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1283. .name = "Rear Playback Volume",
  1284. .info = wm_vol_info,
  1285. .get = wm_vol_get,
  1286. .put = wm_vol_put,
  1287. .private_value = (2 << 8) | 2,
  1288. .tlv = { .p = db_scale_wm_dac }
  1289. },
  1290. {
  1291. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1292. .name = "Center Playback Switch",
  1293. .info = wm_mute_info,
  1294. .get = wm_mute_get,
  1295. .put = wm_mute_put,
  1296. .private_value = (1 << 8) | 4
  1297. },
  1298. {
  1299. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1300. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1301. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1302. .name = "Center Playback Volume",
  1303. .info = wm_vol_info,
  1304. .get = wm_vol_get,
  1305. .put = wm_vol_put,
  1306. .private_value = (1 << 8) | 4,
  1307. .tlv = { .p = db_scale_wm_dac }
  1308. },
  1309. {
  1310. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1311. .name = "LFE Playback Switch",
  1312. .info = wm_mute_info,
  1313. .get = wm_mute_get,
  1314. .put = wm_mute_put,
  1315. .private_value = (1 << 8) | 5
  1316. },
  1317. {
  1318. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1319. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1320. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1321. .name = "LFE Playback Volume",
  1322. .info = wm_vol_info,
  1323. .get = wm_vol_get,
  1324. .put = wm_vol_put,
  1325. .private_value = (1 << 8) | 5,
  1326. .tlv = { .p = db_scale_wm_dac }
  1327. },
  1328. {
  1329. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1330. .name = "Side Playback Switch",
  1331. .info = wm_mute_info,
  1332. .get = wm_mute_get,
  1333. .put = wm_mute_put,
  1334. .private_value = (2 << 8) | 6
  1335. },
  1336. {
  1337. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1338. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1339. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1340. .name = "Side Playback Volume",
  1341. .info = wm_vol_info,
  1342. .get = wm_vol_get,
  1343. .put = wm_vol_put,
  1344. .private_value = (2 << 8) | 6,
  1345. .tlv = { .p = db_scale_wm_dac }
  1346. }
  1347. };
  1348. static struct snd_kcontrol_new wm_controls[] __devinitdata = {
  1349. {
  1350. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1351. .name = "PCM Playback Switch",
  1352. .info = wm_pcm_mute_info,
  1353. .get = wm_pcm_mute_get,
  1354. .put = wm_pcm_mute_put
  1355. },
  1356. {
  1357. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1358. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1359. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1360. .name = "PCM Playback Volume",
  1361. .info = wm_pcm_vol_info,
  1362. .get = wm_pcm_vol_get,
  1363. .put = wm_pcm_vol_put,
  1364. .tlv = { .p = db_scale_wm_pcm }
  1365. },
  1366. {
  1367. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1368. .name = "Capture Switch",
  1369. .info = wm_adc_mute_info,
  1370. .get = wm_adc_mute_get,
  1371. .put = wm_adc_mute_put,
  1372. },
  1373. {
  1374. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1375. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1376. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1377. .name = "Capture Volume",
  1378. .info = wm_adc_vol_info,
  1379. .get = wm_adc_vol_get,
  1380. .put = wm_adc_vol_put,
  1381. .tlv = { .p = db_scale_wm_adc }
  1382. },
  1383. {
  1384. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1385. .name = "Capture Source",
  1386. .info = wm_adc_mux_info,
  1387. .get = wm_adc_mux_get,
  1388. .put = wm_adc_mux_put,
  1389. .private_value = 5
  1390. },
  1391. {
  1392. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1393. .name = "External Amplifier",
  1394. .info = aureon_hpamp_info,
  1395. .get = aureon_hpamp_get,
  1396. .put = aureon_hpamp_put
  1397. },
  1398. {
  1399. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1400. .name = "DAC Deemphasis Switch",
  1401. .info = aureon_deemp_info,
  1402. .get = aureon_deemp_get,
  1403. .put = aureon_deemp_put
  1404. },
  1405. {
  1406. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1407. .name = "ADC Oversampling",
  1408. .info = aureon_oversampling_info,
  1409. .get = aureon_oversampling_get,
  1410. .put = aureon_oversampling_put
  1411. }
  1412. };
  1413. static struct snd_kcontrol_new ac97_controls[] __devinitdata = {
  1414. {
  1415. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1416. .name = "AC97 Playback Switch",
  1417. .info = aureon_ac97_mmute_info,
  1418. .get = aureon_ac97_mmute_get,
  1419. .put = aureon_ac97_mmute_put,
  1420. .private_value = AC97_MASTER
  1421. },
  1422. {
  1423. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1424. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1425. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1426. .name = "AC97 Playback Volume",
  1427. .info = aureon_ac97_vol_info,
  1428. .get = aureon_ac97_vol_get,
  1429. .put = aureon_ac97_vol_put,
  1430. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1431. .tlv = { .p = db_scale_ac97_master }
  1432. },
  1433. {
  1434. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1435. .name = "CD Playback Switch",
  1436. .info = aureon_ac97_mute_info,
  1437. .get = aureon_ac97_mute_get,
  1438. .put = aureon_ac97_mute_put,
  1439. .private_value = AC97_CD
  1440. },
  1441. {
  1442. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1443. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1444. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1445. .name = "CD Playback Volume",
  1446. .info = aureon_ac97_vol_info,
  1447. .get = aureon_ac97_vol_get,
  1448. .put = aureon_ac97_vol_put,
  1449. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1450. .tlv = { .p = db_scale_ac97_gain }
  1451. },
  1452. {
  1453. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1454. .name = "Aux Playback Switch",
  1455. .info = aureon_ac97_mute_info,
  1456. .get = aureon_ac97_mute_get,
  1457. .put = aureon_ac97_mute_put,
  1458. .private_value = AC97_AUX,
  1459. },
  1460. {
  1461. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1462. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1463. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1464. .name = "Aux Playback Volume",
  1465. .info = aureon_ac97_vol_info,
  1466. .get = aureon_ac97_vol_get,
  1467. .put = aureon_ac97_vol_put,
  1468. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1469. .tlv = { .p = db_scale_ac97_gain }
  1470. },
  1471. {
  1472. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1473. .name = "Line Playback Switch",
  1474. .info = aureon_ac97_mute_info,
  1475. .get = aureon_ac97_mute_get,
  1476. .put = aureon_ac97_mute_put,
  1477. .private_value = AC97_LINE
  1478. },
  1479. {
  1480. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1481. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1482. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1483. .name = "Line Playback Volume",
  1484. .info = aureon_ac97_vol_info,
  1485. .get = aureon_ac97_vol_get,
  1486. .put = aureon_ac97_vol_put,
  1487. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1488. .tlv = { .p = db_scale_ac97_gain }
  1489. },
  1490. {
  1491. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1492. .name = "Mic Playback Switch",
  1493. .info = aureon_ac97_mute_info,
  1494. .get = aureon_ac97_mute_get,
  1495. .put = aureon_ac97_mute_put,
  1496. .private_value = AC97_MIC
  1497. },
  1498. {
  1499. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1500. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1501. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1502. .name = "Mic Playback Volume",
  1503. .info = aureon_ac97_vol_info,
  1504. .get = aureon_ac97_vol_get,
  1505. .put = aureon_ac97_vol_put,
  1506. .private_value = AC97_MIC,
  1507. .tlv = { .p = db_scale_ac97_gain }
  1508. },
  1509. {
  1510. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1511. .name = "Mic Boost (+20dB)",
  1512. .info = aureon_ac97_micboost_info,
  1513. .get = aureon_ac97_micboost_get,
  1514. .put = aureon_ac97_micboost_put
  1515. }
  1516. };
  1517. static struct snd_kcontrol_new universe_ac97_controls[] __devinitdata = {
  1518. {
  1519. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1520. .name = "AC97 Playback Switch",
  1521. .info = aureon_ac97_mmute_info,
  1522. .get = aureon_ac97_mmute_get,
  1523. .put = aureon_ac97_mmute_put,
  1524. .private_value = AC97_MASTER
  1525. },
  1526. {
  1527. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1528. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1529. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1530. .name = "AC97 Playback Volume",
  1531. .info = aureon_ac97_vol_info,
  1532. .get = aureon_ac97_vol_get,
  1533. .put = aureon_ac97_vol_put,
  1534. .private_value = AC97_MASTER|AUREON_AC97_STEREO,
  1535. .tlv = { .p = db_scale_ac97_master }
  1536. },
  1537. {
  1538. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1539. .name = "CD Playback Switch",
  1540. .info = aureon_ac97_mute_info,
  1541. .get = aureon_ac97_mute_get,
  1542. .put = aureon_ac97_mute_put,
  1543. .private_value = AC97_AUX
  1544. },
  1545. {
  1546. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1547. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1548. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1549. .name = "CD Playback Volume",
  1550. .info = aureon_ac97_vol_info,
  1551. .get = aureon_ac97_vol_get,
  1552. .put = aureon_ac97_vol_put,
  1553. .private_value = AC97_AUX|AUREON_AC97_STEREO,
  1554. .tlv = { .p = db_scale_ac97_gain }
  1555. },
  1556. {
  1557. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1558. .name = "Phono Playback Switch",
  1559. .info = aureon_ac97_mute_info,
  1560. .get = aureon_ac97_mute_get,
  1561. .put = aureon_ac97_mute_put,
  1562. .private_value = AC97_CD
  1563. },
  1564. {
  1565. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1566. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1567. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1568. .name = "Phono Playback Volume",
  1569. .info = aureon_ac97_vol_info,
  1570. .get = aureon_ac97_vol_get,
  1571. .put = aureon_ac97_vol_put,
  1572. .private_value = AC97_CD|AUREON_AC97_STEREO,
  1573. .tlv = { .p = db_scale_ac97_gain }
  1574. },
  1575. {
  1576. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1577. .name = "Line Playback Switch",
  1578. .info = aureon_ac97_mute_info,
  1579. .get = aureon_ac97_mute_get,
  1580. .put = aureon_ac97_mute_put,
  1581. .private_value = AC97_LINE
  1582. },
  1583. {
  1584. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1585. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1586. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1587. .name = "Line Playback Volume",
  1588. .info = aureon_ac97_vol_info,
  1589. .get = aureon_ac97_vol_get,
  1590. .put = aureon_ac97_vol_put,
  1591. .private_value = AC97_LINE|AUREON_AC97_STEREO,
  1592. .tlv = { .p = db_scale_ac97_gain }
  1593. },
  1594. {
  1595. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1596. .name = "Mic Playback Switch",
  1597. .info = aureon_ac97_mute_info,
  1598. .get = aureon_ac97_mute_get,
  1599. .put = aureon_ac97_mute_put,
  1600. .private_value = AC97_MIC
  1601. },
  1602. {
  1603. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1604. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1605. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1606. .name = "Mic Playback Volume",
  1607. .info = aureon_ac97_vol_info,
  1608. .get = aureon_ac97_vol_get,
  1609. .put = aureon_ac97_vol_put,
  1610. .private_value = AC97_MIC,
  1611. .tlv = { .p = db_scale_ac97_gain }
  1612. },
  1613. {
  1614. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1615. .name = "Mic Boost (+20dB)",
  1616. .info = aureon_ac97_micboost_info,
  1617. .get = aureon_ac97_micboost_get,
  1618. .put = aureon_ac97_micboost_put
  1619. },
  1620. {
  1621. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1622. .name = "Aux Playback Switch",
  1623. .info = aureon_ac97_mute_info,
  1624. .get = aureon_ac97_mute_get,
  1625. .put = aureon_ac97_mute_put,
  1626. .private_value = AC97_VIDEO,
  1627. },
  1628. {
  1629. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1630. .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
  1631. SNDRV_CTL_ELEM_ACCESS_TLV_READ),
  1632. .name = "Aux Playback Volume",
  1633. .info = aureon_ac97_vol_info,
  1634. .get = aureon_ac97_vol_get,
  1635. .put = aureon_ac97_vol_put,
  1636. .private_value = AC97_VIDEO|AUREON_AC97_STEREO,
  1637. .tlv = { .p = db_scale_ac97_gain }
  1638. },
  1639. {
  1640. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1641. .name = "Aux Source",
  1642. .info = aureon_universe_inmux_info,
  1643. .get = aureon_universe_inmux_get,
  1644. .put = aureon_universe_inmux_put
  1645. }
  1646. };
  1647. static struct snd_kcontrol_new cs8415_controls[] __devinitdata = {
  1648. {
  1649. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1650. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, SWITCH),
  1651. .info = aureon_cs8415_mute_info,
  1652. .get = aureon_cs8415_mute_get,
  1653. .put = aureon_cs8415_mute_put
  1654. },
  1655. {
  1656. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1657. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Source",
  1658. .info = aureon_cs8415_mux_info,
  1659. .get = aureon_cs8415_mux_get,
  1660. .put = aureon_cs8415_mux_put,
  1661. },
  1662. {
  1663. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1664. .name = SNDRV_CTL_NAME_IEC958("Q-subcode ", CAPTURE, DEFAULT),
  1665. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1666. .info = aureon_cs8415_qsub_info,
  1667. .get = aureon_cs8415_qsub_get,
  1668. },
  1669. {
  1670. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1671. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, MASK),
  1672. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1673. .info = aureon_cs8415_spdif_info,
  1674. .get = aureon_cs8415_mask_get
  1675. },
  1676. {
  1677. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1678. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, DEFAULT),
  1679. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1680. .info = aureon_cs8415_spdif_info,
  1681. .get = aureon_cs8415_spdif_get
  1682. },
  1683. {
  1684. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  1685. .name = SNDRV_CTL_NAME_IEC958("", CAPTURE, NONE) "Rate",
  1686. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  1687. .info = aureon_cs8415_rate_info,
  1688. .get = aureon_cs8415_rate_get
  1689. }
  1690. };
  1691. static int __devinit aureon_add_controls(struct snd_ice1712 *ice)
  1692. {
  1693. unsigned int i, counts;
  1694. int err;
  1695. counts = ARRAY_SIZE(aureon_dac_controls);
  1696. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY)
  1697. counts -= 2; /* no side */
  1698. for (i = 0; i < counts; i++) {
  1699. err = snd_ctl_add(ice->card, snd_ctl_new1(&aureon_dac_controls[i], ice));
  1700. if (err < 0)
  1701. return err;
  1702. }
  1703. for (i = 0; i < ARRAY_SIZE(wm_controls); i++) {
  1704. err = snd_ctl_add(ice->card, snd_ctl_new1(&wm_controls[i], ice));
  1705. if (err < 0)
  1706. return err;
  1707. }
  1708. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON71_UNIVERSE) {
  1709. for (i = 0; i < ARRAY_SIZE(universe_ac97_controls); i++) {
  1710. err = snd_ctl_add(ice->card, snd_ctl_new1(&universe_ac97_controls[i], ice));
  1711. if (err < 0)
  1712. return err;
  1713. }
  1714. } else if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1715. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1716. for (i = 0; i < ARRAY_SIZE(ac97_controls); i++) {
  1717. err = snd_ctl_add(ice->card, snd_ctl_new1(&ac97_controls[i], ice));
  1718. if (err < 0)
  1719. return err;
  1720. }
  1721. }
  1722. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1723. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1724. unsigned char id;
  1725. snd_ice1712_save_gpio_status(ice);
  1726. id = aureon_cs8415_get(ice, CS8415_ID);
  1727. if (id != 0x41)
  1728. snd_printk(KERN_INFO "No CS8415 chip. Skipping CS8415 controls.\n");
  1729. else if ((id & 0x0F) != 0x01)
  1730. snd_printk(KERN_INFO "Detected unsupported CS8415 rev. (%c)\n", (char)((id & 0x0F) + 'A' - 1));
  1731. else {
  1732. for (i = 0; i < ARRAY_SIZE(cs8415_controls); i++) {
  1733. struct snd_kcontrol *kctl;
  1734. err = snd_ctl_add(ice->card, (kctl = snd_ctl_new1(&cs8415_controls[i], ice)));
  1735. if (err < 0)
  1736. return err;
  1737. if (i > 1)
  1738. kctl->id.device = ice->pcm->device;
  1739. }
  1740. }
  1741. snd_ice1712_restore_gpio_status(ice);
  1742. }
  1743. return 0;
  1744. }
  1745. /*
  1746. * initialize the chip
  1747. */
  1748. static int __devinit aureon_init(struct snd_ice1712 *ice)
  1749. {
  1750. static const unsigned short wm_inits_aureon[] = {
  1751. /* These come first to reduce init pop noise */
  1752. 0x1b, 0x044, /* ADC Mux (AC'97 source) */
  1753. 0x1c, 0x00B, /* Out Mux1 (VOUT1 = DAC+AUX, VOUT2 = DAC) */
  1754. 0x1d, 0x009, /* Out Mux2 (VOUT2 = DAC, VOUT3 = DAC) */
  1755. 0x18, 0x000, /* All power-up */
  1756. 0x16, 0x122, /* I2S, normal polarity, 24bit */
  1757. 0x17, 0x022, /* 256fs, slave mode */
  1758. 0x00, 0, /* DAC1 analog mute */
  1759. 0x01, 0, /* DAC2 analog mute */
  1760. 0x02, 0, /* DAC3 analog mute */
  1761. 0x03, 0, /* DAC4 analog mute */
  1762. 0x04, 0, /* DAC5 analog mute */
  1763. 0x05, 0, /* DAC6 analog mute */
  1764. 0x06, 0, /* DAC7 analog mute */
  1765. 0x07, 0, /* DAC8 analog mute */
  1766. 0x08, 0x100, /* master analog mute */
  1767. 0x09, 0xff, /* DAC1 digital full */
  1768. 0x0a, 0xff, /* DAC2 digital full */
  1769. 0x0b, 0xff, /* DAC3 digital full */
  1770. 0x0c, 0xff, /* DAC4 digital full */
  1771. 0x0d, 0xff, /* DAC5 digital full */
  1772. 0x0e, 0xff, /* DAC6 digital full */
  1773. 0x0f, 0xff, /* DAC7 digital full */
  1774. 0x10, 0xff, /* DAC8 digital full */
  1775. 0x11, 0x1ff, /* master digital full */
  1776. 0x12, 0x000, /* phase normal */
  1777. 0x13, 0x090, /* unmute DAC L/R */
  1778. 0x14, 0x000, /* all unmute */
  1779. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1780. 0x19, 0x000, /* -12dB ADC/L */
  1781. 0x1a, 0x000, /* -12dB ADC/R */
  1782. (unsigned short)-1
  1783. };
  1784. static const unsigned short wm_inits_prodigy[] = {
  1785. /* These come first to reduce init pop noise */
  1786. 0x1b, 0x000, /* ADC Mux */
  1787. 0x1c, 0x009, /* Out Mux1 */
  1788. 0x1d, 0x009, /* Out Mux2 */
  1789. 0x18, 0x000, /* All power-up */
  1790. 0x16, 0x022, /* I2S, normal polarity, 24bit, high-pass on */
  1791. 0x17, 0x006, /* 128fs, slave mode */
  1792. 0x00, 0, /* DAC1 analog mute */
  1793. 0x01, 0, /* DAC2 analog mute */
  1794. 0x02, 0, /* DAC3 analog mute */
  1795. 0x03, 0, /* DAC4 analog mute */
  1796. 0x04, 0, /* DAC5 analog mute */
  1797. 0x05, 0, /* DAC6 analog mute */
  1798. 0x06, 0, /* DAC7 analog mute */
  1799. 0x07, 0, /* DAC8 analog mute */
  1800. 0x08, 0x100, /* master analog mute */
  1801. 0x09, 0x7f, /* DAC1 digital full */
  1802. 0x0a, 0x7f, /* DAC2 digital full */
  1803. 0x0b, 0x7f, /* DAC3 digital full */
  1804. 0x0c, 0x7f, /* DAC4 digital full */
  1805. 0x0d, 0x7f, /* DAC5 digital full */
  1806. 0x0e, 0x7f, /* DAC6 digital full */
  1807. 0x0f, 0x7f, /* DAC7 digital full */
  1808. 0x10, 0x7f, /* DAC8 digital full */
  1809. 0x11, 0x1FF, /* master digital full */
  1810. 0x12, 0x000, /* phase normal */
  1811. 0x13, 0x090, /* unmute DAC L/R */
  1812. 0x14, 0x000, /* all unmute */
  1813. 0x15, 0x000, /* no deemphasis, no ZFLG */
  1814. 0x19, 0x000, /* -12dB ADC/L */
  1815. 0x1a, 0x000, /* -12dB ADC/R */
  1816. (unsigned short)-1
  1817. };
  1818. static const unsigned short cs_inits[] = {
  1819. 0x0441, /* RUN */
  1820. 0x0180, /* no mute, OMCK output on RMCK pin */
  1821. 0x0201, /* S/PDIF source on RXP1 */
  1822. 0x0605, /* slave, 24bit, MSB on second OSCLK, SDOUT for right channel when OLRCK is high */
  1823. (unsigned short)-1
  1824. };
  1825. struct aureon_spec *spec;
  1826. unsigned int tmp;
  1827. const unsigned short *p;
  1828. int err, i;
  1829. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1830. if (!spec)
  1831. return -ENOMEM;
  1832. ice->spec = spec;
  1833. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_AUREON51_SKY) {
  1834. ice->num_total_dacs = 6;
  1835. ice->num_total_adcs = 2;
  1836. } else {
  1837. /* aureon 7.1 and prodigy 7.1 */
  1838. ice->num_total_dacs = 8;
  1839. ice->num_total_adcs = 2;
  1840. }
  1841. /* to remeber the register values of CS8415 */
  1842. ice->akm = kzalloc(sizeof(struct snd_akm4xxx), GFP_KERNEL);
  1843. if (!ice->akm)
  1844. return -ENOMEM;
  1845. ice->akm_codecs = 1;
  1846. err = aureon_ac97_init(ice);
  1847. if (err != 0)
  1848. return err;
  1849. snd_ice1712_gpio_set_dir(ice, 0x5fffff); /* fix this for the time being */
  1850. /* reset the wm codec as the SPI mode */
  1851. snd_ice1712_save_gpio_status(ice);
  1852. snd_ice1712_gpio_set_mask(ice, ~(AUREON_WM_RESET|AUREON_WM_CS|AUREON_CS8415_CS|AUREON_HP_SEL));
  1853. tmp = snd_ice1712_gpio_read(ice);
  1854. tmp &= ~AUREON_WM_RESET;
  1855. snd_ice1712_gpio_write(ice, tmp);
  1856. udelay(1);
  1857. tmp |= AUREON_WM_CS | AUREON_CS8415_CS;
  1858. snd_ice1712_gpio_write(ice, tmp);
  1859. udelay(1);
  1860. tmp |= AUREON_WM_RESET;
  1861. snd_ice1712_gpio_write(ice, tmp);
  1862. udelay(1);
  1863. /* initialize WM8770 codec */
  1864. if (ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71 ||
  1865. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71LT ||
  1866. ice->eeprom.subvendor == VT1724_SUBDEVICE_PRODIGY71XT)
  1867. p = wm_inits_prodigy;
  1868. else
  1869. p = wm_inits_aureon;
  1870. for (; *p != (unsigned short)-1; p += 2)
  1871. wm_put(ice, p[0], p[1]);
  1872. /* initialize CS8415A codec */
  1873. if (ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71LT &&
  1874. ice->eeprom.subvendor != VT1724_SUBDEVICE_PRODIGY71XT) {
  1875. for (p = cs_inits; *p != (unsigned short)-1; p++)
  1876. aureon_spi_write(ice, AUREON_CS8415_CS, *p | 0x200000, 24);
  1877. spec->cs8415_mux = 1;
  1878. aureon_set_headphone_amp(ice, 1);
  1879. }
  1880. snd_ice1712_restore_gpio_status(ice);
  1881. /* initialize PCA9554 pin directions & set default input */
  1882. aureon_pca9554_write(ice, PCA9554_DIR, 0x00);
  1883. aureon_pca9554_write(ice, PCA9554_OUT, 0x00); /* internal AUX */
  1884. spec->master[0] = WM_VOL_MUTE;
  1885. spec->master[1] = WM_VOL_MUTE;
  1886. for (i = 0; i < ice->num_total_dacs; i++) {
  1887. spec->vol[i] = WM_VOL_MUTE;
  1888. wm_set_vol(ice, i, spec->vol[i], spec->master[i % 2]);
  1889. }
  1890. return 0;
  1891. }
  1892. /*
  1893. * Aureon boards don't provide the EEPROM data except for the vendor IDs.
  1894. * hence the driver needs to sets up it properly.
  1895. */
  1896. static unsigned char aureon51_eeprom[] __devinitdata = {
  1897. [ICE_EEP2_SYSCONF] = 0x0a, /* clock 512, spdif-in/ADC, 3DACs */
  1898. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1899. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1900. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1901. [ICE_EEP2_GPIO_DIR] = 0xff,
  1902. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1903. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1904. [ICE_EEP2_GPIO_MASK] = 0x00,
  1905. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1906. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1907. [ICE_EEP2_GPIO_STATE] = 0x00,
  1908. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1909. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1910. };
  1911. static unsigned char aureon71_eeprom[] __devinitdata = {
  1912. [ICE_EEP2_SYSCONF] = 0x0b, /* clock 512, spdif-in/ADC, 4DACs */
  1913. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1914. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1915. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1916. [ICE_EEP2_GPIO_DIR] = 0xff,
  1917. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1918. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1919. [ICE_EEP2_GPIO_MASK] = 0x00,
  1920. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1921. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1922. [ICE_EEP2_GPIO_STATE] = 0x00,
  1923. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1924. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1925. };
  1926. #define prodigy71_eeprom aureon71_eeprom
  1927. static unsigned char aureon71_universe_eeprom[] __devinitdata = {
  1928. [ICE_EEP2_SYSCONF] = 0x2b, /* clock 512, mpu401, spdif-in/ADC,
  1929. * 4DACs
  1930. */
  1931. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1932. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1933. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1934. [ICE_EEP2_GPIO_DIR] = 0xff,
  1935. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1936. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1937. [ICE_EEP2_GPIO_MASK] = 0x00,
  1938. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1939. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1940. [ICE_EEP2_GPIO_STATE] = 0x00,
  1941. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1942. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1943. };
  1944. static unsigned char prodigy71lt_eeprom[] __devinitdata = {
  1945. [ICE_EEP2_SYSCONF] = 0x4b, /* clock 384, spdif-in/ADC, 4DACs */
  1946. [ICE_EEP2_ACLINK] = 0x80, /* I2S */
  1947. [ICE_EEP2_I2S] = 0xfc, /* vol, 96k, 24bit, 192k */
  1948. [ICE_EEP2_SPDIF] = 0xc3, /* out-en, out-int, spdif-in */
  1949. [ICE_EEP2_GPIO_DIR] = 0xff,
  1950. [ICE_EEP2_GPIO_DIR1] = 0xff,
  1951. [ICE_EEP2_GPIO_DIR2] = 0x5f,
  1952. [ICE_EEP2_GPIO_MASK] = 0x00,
  1953. [ICE_EEP2_GPIO_MASK1] = 0x00,
  1954. [ICE_EEP2_GPIO_MASK2] = 0x00,
  1955. [ICE_EEP2_GPIO_STATE] = 0x00,
  1956. [ICE_EEP2_GPIO_STATE1] = 0x00,
  1957. [ICE_EEP2_GPIO_STATE2] = 0x00,
  1958. };
  1959. #define prodigy71xt_eeprom prodigy71lt_eeprom
  1960. /* entry point */
  1961. struct snd_ice1712_card_info snd_vt1724_aureon_cards[] __devinitdata = {
  1962. {
  1963. .subvendor = VT1724_SUBDEVICE_AUREON51_SKY,
  1964. .name = "Terratec Aureon 5.1-Sky",
  1965. .model = "aureon51",
  1966. .chip_init = aureon_init,
  1967. .build_controls = aureon_add_controls,
  1968. .eeprom_size = sizeof(aureon51_eeprom),
  1969. .eeprom_data = aureon51_eeprom,
  1970. .driver = "Aureon51",
  1971. },
  1972. {
  1973. .subvendor = VT1724_SUBDEVICE_AUREON71_SPACE,
  1974. .name = "Terratec Aureon 7.1-Space",
  1975. .model = "aureon71",
  1976. .chip_init = aureon_init,
  1977. .build_controls = aureon_add_controls,
  1978. .eeprom_size = sizeof(aureon71_eeprom),
  1979. .eeprom_data = aureon71_eeprom,
  1980. .driver = "Aureon71",
  1981. },
  1982. {
  1983. .subvendor = VT1724_SUBDEVICE_AUREON71_UNIVERSE,
  1984. .name = "Terratec Aureon 7.1-Universe",
  1985. .model = "universe",
  1986. .chip_init = aureon_init,
  1987. .build_controls = aureon_add_controls,
  1988. .eeprom_size = sizeof(aureon71_universe_eeprom),
  1989. .eeprom_data = aureon71_universe_eeprom,
  1990. .driver = "Aureon71Univ", /* keep in 15 letters */
  1991. },
  1992. {
  1993. .subvendor = VT1724_SUBDEVICE_PRODIGY71,
  1994. .name = "Audiotrak Prodigy 7.1",
  1995. .model = "prodigy71",
  1996. .chip_init = aureon_init,
  1997. .build_controls = aureon_add_controls,
  1998. .eeprom_size = sizeof(prodigy71_eeprom),
  1999. .eeprom_data = prodigy71_eeprom,
  2000. .driver = "Prodigy71", /* should be identical with Aureon71 */
  2001. },
  2002. {
  2003. .subvendor = VT1724_SUBDEVICE_PRODIGY71LT,
  2004. .name = "Audiotrak Prodigy 7.1 LT",
  2005. .model = "prodigy71lt",
  2006. .chip_init = aureon_init,
  2007. .build_controls = aureon_add_controls,
  2008. .eeprom_size = sizeof(prodigy71lt_eeprom),
  2009. .eeprom_data = prodigy71lt_eeprom,
  2010. .driver = "Prodigy71LT",
  2011. },
  2012. {
  2013. .subvendor = VT1724_SUBDEVICE_PRODIGY71XT,
  2014. .name = "Audiotrak Prodigy 7.1 XT",
  2015. .model = "prodigy71xt",
  2016. .chip_init = aureon_init,
  2017. .build_controls = aureon_add_controls,
  2018. .eeprom_size = sizeof(prodigy71xt_eeprom),
  2019. .eeprom_data = prodigy71xt_eeprom,
  2020. .driver = "Prodigy71LT",
  2021. },
  2022. { } /* terminator */
  2023. };