patch_intelhdmi.c 28 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020
  1. /*
  2. *
  3. * patch_intelhdmi.c - Patch for Intel HDMI codecs
  4. *
  5. * Copyright(c) 2008 Intel Corporation. All rights reserved.
  6. *
  7. * Authors:
  8. * Jiang Zhe <zhe.jiang@intel.com>
  9. * Wu Fengguang <wfg@linux.intel.com>
  10. *
  11. * Maintained by:
  12. * Wu Fengguang <wfg@linux.intel.com>
  13. *
  14. * This program is free software; you can redistribute it and/or modify it
  15. * under the terms of the GNU General Public License as published by the Free
  16. * Software Foundation; either version 2 of the License, or (at your option)
  17. * any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful, but
  20. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  21. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  22. * for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, write to the Free Software Foundation,
  26. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  27. */
  28. #include <linux/init.h>
  29. #include <linux/delay.h>
  30. #include <linux/slab.h>
  31. #include <sound/core.h>
  32. #include "hda_codec.h"
  33. #include "hda_local.h"
  34. /*
  35. * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  36. * could support two independent pipes, each of them can be connected to one or
  37. * more ports (DVI, HDMI or DisplayPort).
  38. *
  39. * The HDA correspondence of pipes/ports are converter/pin nodes.
  40. */
  41. #define INTEL_HDMI_CVTS 2
  42. #define INTEL_HDMI_PINS 3
  43. static char *intel_hdmi_pcm_names[INTEL_HDMI_CVTS] = {
  44. "INTEL HDMI 0",
  45. "INTEL HDMI 1",
  46. };
  47. struct intel_hdmi_spec {
  48. int num_cvts;
  49. int num_pins;
  50. hda_nid_t cvt[INTEL_HDMI_CVTS+1]; /* audio sources */
  51. hda_nid_t pin[INTEL_HDMI_PINS+1]; /* audio sinks */
  52. /*
  53. * source connection for each pin
  54. */
  55. hda_nid_t pin_cvt[INTEL_HDMI_PINS+1];
  56. /*
  57. * HDMI sink attached to each pin
  58. */
  59. struct hdmi_eld sink_eld[INTEL_HDMI_PINS];
  60. /*
  61. * export one pcm per pipe
  62. */
  63. struct hda_pcm pcm_rec[INTEL_HDMI_CVTS];
  64. };
  65. struct hdmi_audio_infoframe {
  66. u8 type; /* 0x84 */
  67. u8 ver; /* 0x01 */
  68. u8 len; /* 0x0a */
  69. u8 checksum; /* PB0 */
  70. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  71. u8 SS01_SF24;
  72. u8 CXT04;
  73. u8 CA;
  74. u8 LFEPBL01_LSV36_DM_INH7;
  75. u8 reserved[5]; /* PB6 - PB10 */
  76. };
  77. /*
  78. * CEA speaker placement:
  79. *
  80. * FLH FCH FRH
  81. * FLW FL FLC FC FRC FR FRW
  82. *
  83. * LFE
  84. * TC
  85. *
  86. * RL RLC RC RRC RR
  87. *
  88. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  89. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  90. */
  91. enum cea_speaker_placement {
  92. FL = (1 << 0), /* Front Left */
  93. FC = (1 << 1), /* Front Center */
  94. FR = (1 << 2), /* Front Right */
  95. FLC = (1 << 3), /* Front Left Center */
  96. FRC = (1 << 4), /* Front Right Center */
  97. RL = (1 << 5), /* Rear Left */
  98. RC = (1 << 6), /* Rear Center */
  99. RR = (1 << 7), /* Rear Right */
  100. RLC = (1 << 8), /* Rear Left Center */
  101. RRC = (1 << 9), /* Rear Right Center */
  102. LFE = (1 << 10), /* Low Frequency Effect */
  103. FLW = (1 << 11), /* Front Left Wide */
  104. FRW = (1 << 12), /* Front Right Wide */
  105. FLH = (1 << 13), /* Front Left High */
  106. FCH = (1 << 14), /* Front Center High */
  107. FRH = (1 << 15), /* Front Right High */
  108. TC = (1 << 16), /* Top Center */
  109. };
  110. /*
  111. * ELD SA bits in the CEA Speaker Allocation data block
  112. */
  113. static int eld_speaker_allocation_bits[] = {
  114. [0] = FL | FR,
  115. [1] = LFE,
  116. [2] = FC,
  117. [3] = RL | RR,
  118. [4] = RC,
  119. [5] = FLC | FRC,
  120. [6] = RLC | RRC,
  121. /* the following are not defined in ELD yet */
  122. [7] = FLW | FRW,
  123. [8] = FLH | FRH,
  124. [9] = TC,
  125. [10] = FCH,
  126. };
  127. struct cea_channel_speaker_allocation {
  128. int ca_index;
  129. int speakers[8];
  130. /* derived values, just for convenience */
  131. int channels;
  132. int spk_mask;
  133. };
  134. /*
  135. * ALSA sequence is:
  136. *
  137. * surround40 surround41 surround50 surround51 surround71
  138. * ch0 front left = = = =
  139. * ch1 front right = = = =
  140. * ch2 rear left = = = =
  141. * ch3 rear right = = = =
  142. * ch4 LFE center center center
  143. * ch5 LFE LFE
  144. * ch6 side left
  145. * ch7 side right
  146. *
  147. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  148. */
  149. static int hdmi_channel_mapping[0x32][8] = {
  150. /* stereo */
  151. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  152. /* 2.1 */
  153. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  154. /* Dolby Surround */
  155. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  156. /* surround40 */
  157. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  158. /* 4ch */
  159. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  160. /* surround41 */
  161. [0x09] = { 0x00, 0x11, 0x24, 0x34, 0x43, 0xf2, 0xf6, 0xf7 },
  162. /* surround50 */
  163. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  164. /* surround51 */
  165. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  166. /* 7.1 */
  167. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  168. };
  169. /*
  170. * This is an ordered list!
  171. *
  172. * The preceding ones have better chances to be selected by
  173. * hdmi_setup_channel_allocation().
  174. */
  175. static struct cea_channel_speaker_allocation channel_allocations[] = {
  176. /* channel: 7 6 5 4 3 2 1 0 */
  177. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  178. /* 2.1 */
  179. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  180. /* Dolby Surround */
  181. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  182. /* surround40 */
  183. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  184. /* surround41 */
  185. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  186. /* surround50 */
  187. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  188. /* surround51 */
  189. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  190. /* 6.1 */
  191. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  192. /* surround71 */
  193. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  194. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  195. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  196. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  197. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  198. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  199. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  200. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  201. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  202. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  203. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  204. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  205. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  206. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  207. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  208. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  209. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  210. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  211. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  212. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  213. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  214. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  215. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  216. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  217. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  218. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  219. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  220. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  221. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  222. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  223. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  224. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  225. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  226. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  227. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  228. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  229. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  230. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  231. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  232. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  233. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  234. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  235. };
  236. /*
  237. * HDA/HDMI auto parsing
  238. */
  239. static int hda_node_index(hda_nid_t *nids, hda_nid_t nid)
  240. {
  241. int i;
  242. for (i = 0; nids[i]; i++)
  243. if (nids[i] == nid)
  244. return i;
  245. snd_printk(KERN_WARNING "HDMI: nid %d not registered\n", nid);
  246. return -EINVAL;
  247. }
  248. static int intel_hdmi_read_pin_conn(struct hda_codec *codec, hda_nid_t pin_nid)
  249. {
  250. struct intel_hdmi_spec *spec = codec->spec;
  251. hda_nid_t conn_list[HDA_MAX_CONNECTIONS];
  252. int conn_len, curr;
  253. int index;
  254. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  255. snd_printk(KERN_WARNING
  256. "HDMI: pin %d wcaps %#x "
  257. "does not support connection list\n",
  258. pin_nid, get_wcaps(codec, pin_nid));
  259. return -EINVAL;
  260. }
  261. conn_len = snd_hda_get_connections(codec, pin_nid, conn_list,
  262. HDA_MAX_CONNECTIONS);
  263. if (conn_len > 1)
  264. curr = snd_hda_codec_read(codec, pin_nid, 0,
  265. AC_VERB_GET_CONNECT_SEL, 0);
  266. else
  267. curr = 0;
  268. index = hda_node_index(spec->pin, pin_nid);
  269. if (index < 0)
  270. return -EINVAL;
  271. spec->pin_cvt[index] = conn_list[curr];
  272. return 0;
  273. }
  274. static void hdmi_get_show_eld(struct hda_codec *codec, hda_nid_t pin_nid,
  275. struct hdmi_eld *eld)
  276. {
  277. if (!snd_hdmi_get_eld(eld, codec, pin_nid))
  278. snd_hdmi_show_eld(eld);
  279. }
  280. static void hdmi_present_sense(struct hda_codec *codec, hda_nid_t pin_nid,
  281. struct hdmi_eld *eld)
  282. {
  283. int present = snd_hda_pin_sense(codec, pin_nid);
  284. eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  285. eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
  286. if (present & AC_PINSENSE_ELDV)
  287. hdmi_get_show_eld(codec, pin_nid, eld);
  288. }
  289. static int intel_hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  290. {
  291. struct intel_hdmi_spec *spec = codec->spec;
  292. if (spec->num_pins >= INTEL_HDMI_PINS) {
  293. snd_printk(KERN_WARNING
  294. "HDMI: no space for pin %d \n", pin_nid);
  295. return -EINVAL;
  296. }
  297. hdmi_present_sense(codec, pin_nid, &spec->sink_eld[spec->num_pins]);
  298. spec->pin[spec->num_pins] = pin_nid;
  299. spec->num_pins++;
  300. /*
  301. * It is assumed that converter nodes come first in the node list and
  302. * hence have been registered and usable now.
  303. */
  304. return intel_hdmi_read_pin_conn(codec, pin_nid);
  305. }
  306. static int intel_hdmi_add_cvt(struct hda_codec *codec, hda_nid_t nid)
  307. {
  308. struct intel_hdmi_spec *spec = codec->spec;
  309. if (spec->num_cvts >= INTEL_HDMI_CVTS) {
  310. snd_printk(KERN_WARNING
  311. "HDMI: no space for converter %d \n", nid);
  312. return -EINVAL;
  313. }
  314. spec->cvt[spec->num_cvts] = nid;
  315. spec->num_cvts++;
  316. return 0;
  317. }
  318. static int intel_hdmi_parse_codec(struct hda_codec *codec)
  319. {
  320. hda_nid_t nid;
  321. int i, nodes;
  322. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  323. if (!nid || nodes < 0) {
  324. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  325. return -EINVAL;
  326. }
  327. for (i = 0; i < nodes; i++, nid++) {
  328. unsigned int caps;
  329. unsigned int type;
  330. caps = snd_hda_param_read(codec, nid, AC_PAR_AUDIO_WIDGET_CAP);
  331. type = get_wcaps_type(caps);
  332. if (!(caps & AC_WCAP_DIGITAL))
  333. continue;
  334. switch (type) {
  335. case AC_WID_AUD_OUT:
  336. if (intel_hdmi_add_cvt(codec, nid) < 0)
  337. return -EINVAL;
  338. break;
  339. case AC_WID_PIN:
  340. caps = snd_hda_param_read(codec, nid, AC_PAR_PIN_CAP);
  341. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  342. continue;
  343. if (intel_hdmi_add_pin(codec, nid) < 0)
  344. return -EINVAL;
  345. break;
  346. }
  347. }
  348. /*
  349. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  350. * can be lost and presence sense verb will become inaccurate if the
  351. * HDA link is powered off at hot plug or hw initialization time.
  352. */
  353. #ifdef CONFIG_SND_HDA_POWER_SAVE
  354. if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  355. AC_PWRST_EPSS))
  356. codec->bus->power_keep_link_on = 1;
  357. #endif
  358. return 0;
  359. }
  360. /*
  361. * HDMI routines
  362. */
  363. #ifdef BE_PARANOID
  364. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  365. int *packet_index, int *byte_index)
  366. {
  367. int val;
  368. val = snd_hda_codec_read(codec, pin_nid, 0,
  369. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  370. *packet_index = val >> 5;
  371. *byte_index = val & 0x1f;
  372. }
  373. #endif
  374. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  375. int packet_index, int byte_index)
  376. {
  377. int val;
  378. val = (packet_index << 5) | (byte_index & 0x1f);
  379. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  380. }
  381. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  382. unsigned char val)
  383. {
  384. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  385. }
  386. static void hdmi_enable_output(struct hda_codec *codec, hda_nid_t pin_nid)
  387. {
  388. /* Unmute */
  389. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  390. snd_hda_codec_write(codec, pin_nid, 0,
  391. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  392. /* Enable pin out */
  393. snd_hda_codec_write(codec, pin_nid, 0,
  394. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  395. }
  396. /*
  397. * Enable Audio InfoFrame Transmission
  398. */
  399. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  400. hda_nid_t pin_nid)
  401. {
  402. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  403. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  404. AC_DIPXMIT_BEST);
  405. }
  406. /*
  407. * Disable Audio InfoFrame Transmission
  408. */
  409. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  410. hda_nid_t pin_nid)
  411. {
  412. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  413. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  414. AC_DIPXMIT_DISABLE);
  415. }
  416. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t nid)
  417. {
  418. return 1 + snd_hda_codec_read(codec, nid, 0,
  419. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  420. }
  421. static void hdmi_set_channel_count(struct hda_codec *codec,
  422. hda_nid_t nid, int chs)
  423. {
  424. if (chs != hdmi_get_channel_count(codec, nid))
  425. snd_hda_codec_write(codec, nid, 0,
  426. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  427. }
  428. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  429. hda_nid_t pin_nid)
  430. {
  431. #ifdef CONFIG_SND_DEBUG_VERBOSE
  432. int i;
  433. int slot;
  434. for (i = 0; i < 8; i++) {
  435. slot = snd_hda_codec_read(codec, pin_nid, 0,
  436. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  437. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  438. slot >> 4, slot & 0xf);
  439. }
  440. #endif
  441. }
  442. /*
  443. * Audio InfoFrame routines
  444. */
  445. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  446. {
  447. #ifdef CONFIG_SND_DEBUG_VERBOSE
  448. int i;
  449. int size;
  450. size = snd_hdmi_get_eld_size(codec, pin_nid);
  451. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  452. for (i = 0; i < 8; i++) {
  453. size = snd_hda_codec_read(codec, pin_nid, 0,
  454. AC_VERB_GET_HDMI_DIP_SIZE, i);
  455. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  456. }
  457. #endif
  458. }
  459. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  460. {
  461. #ifdef BE_PARANOID
  462. int i, j;
  463. int size;
  464. int pi, bi;
  465. for (i = 0; i < 8; i++) {
  466. size = snd_hda_codec_read(codec, pin_nid, 0,
  467. AC_VERB_GET_HDMI_DIP_SIZE, i);
  468. if (size == 0)
  469. continue;
  470. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  471. for (j = 1; j < 1000; j++) {
  472. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  473. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  474. if (pi != i)
  475. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  476. bi, pi, i);
  477. if (bi == 0) /* byte index wrapped around */
  478. break;
  479. }
  480. snd_printd(KERN_INFO
  481. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  482. i, size, j);
  483. }
  484. #endif
  485. }
  486. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *ai)
  487. {
  488. u8 *bytes = (u8 *)ai;
  489. u8 sum = 0;
  490. int i;
  491. ai->checksum = 0;
  492. for (i = 0; i < sizeof(*ai); i++)
  493. sum += bytes[i];
  494. ai->checksum = - sum;
  495. }
  496. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  497. hda_nid_t pin_nid,
  498. struct hdmi_audio_infoframe *ai)
  499. {
  500. u8 *bytes = (u8 *)ai;
  501. int i;
  502. hdmi_debug_dip_size(codec, pin_nid);
  503. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  504. hdmi_checksum_audio_infoframe(ai);
  505. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  506. for (i = 0; i < sizeof(*ai); i++)
  507. hdmi_write_dip_byte(codec, pin_nid, bytes[i]);
  508. }
  509. /*
  510. * Compute derived values in channel_allocations[].
  511. */
  512. static void init_channel_allocations(void)
  513. {
  514. int i, j;
  515. struct cea_channel_speaker_allocation *p;
  516. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  517. p = channel_allocations + i;
  518. p->channels = 0;
  519. p->spk_mask = 0;
  520. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  521. if (p->speakers[j]) {
  522. p->channels++;
  523. p->spk_mask |= p->speakers[j];
  524. }
  525. }
  526. }
  527. /*
  528. * The transformation takes two steps:
  529. *
  530. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  531. * spk_mask => (channel_allocations[]) => ai->CA
  532. *
  533. * TODO: it could select the wrong CA from multiple candidates.
  534. */
  535. static int hdmi_setup_channel_allocation(struct hda_codec *codec, hda_nid_t nid,
  536. struct hdmi_audio_infoframe *ai)
  537. {
  538. struct intel_hdmi_spec *spec = codec->spec;
  539. struct hdmi_eld *eld;
  540. int i;
  541. int spk_mask = 0;
  542. int channels = 1 + (ai->CC02_CT47 & 0x7);
  543. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  544. /*
  545. * CA defaults to 0 for basic stereo audio
  546. */
  547. if (channels <= 2)
  548. return 0;
  549. i = hda_node_index(spec->pin_cvt, nid);
  550. if (i < 0)
  551. return 0;
  552. eld = &spec->sink_eld[i];
  553. /*
  554. * HDMI sink's ELD info cannot always be retrieved for now, e.g.
  555. * in console or for audio devices. Assume the highest speakers
  556. * configuration, to _not_ prohibit multi-channel audio playback.
  557. */
  558. if (!eld->spk_alloc)
  559. eld->spk_alloc = 0xffff;
  560. /*
  561. * expand ELD's speaker allocation mask
  562. *
  563. * ELD tells the speaker mask in a compact(paired) form,
  564. * expand ELD's notions to match the ones used by Audio InfoFrame.
  565. */
  566. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  567. if (eld->spk_alloc & (1 << i))
  568. spk_mask |= eld_speaker_allocation_bits[i];
  569. }
  570. /* search for the first working match in the CA table */
  571. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  572. if (channels == channel_allocations[i].channels &&
  573. (spk_mask & channel_allocations[i].spk_mask) ==
  574. channel_allocations[i].spk_mask) {
  575. ai->CA = channel_allocations[i].ca_index;
  576. break;
  577. }
  578. }
  579. snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
  580. snd_printdd(KERN_INFO
  581. "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  582. ai->CA, channels, buf);
  583. return ai->CA;
  584. }
  585. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  586. hda_nid_t pin_nid,
  587. struct hdmi_audio_infoframe *ai)
  588. {
  589. int i;
  590. int ca = ai->CA;
  591. int err;
  592. if (hdmi_channel_mapping[ca][1] == 0) {
  593. for (i = 0; i < channel_allocations[ca].channels; i++)
  594. hdmi_channel_mapping[ca][i] = i | (i << 4);
  595. for (; i < 8; i++)
  596. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  597. }
  598. for (i = 0; i < 8; i++) {
  599. err = snd_hda_codec_write(codec, pin_nid, 0,
  600. AC_VERB_SET_HDMI_CHAN_SLOT,
  601. hdmi_channel_mapping[ca][i]);
  602. if (err) {
  603. snd_printdd(KERN_INFO "HDMI: channel mapping failed\n");
  604. break;
  605. }
  606. }
  607. hdmi_debug_channel_mapping(codec, pin_nid);
  608. }
  609. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  610. struct hdmi_audio_infoframe *ai)
  611. {
  612. u8 *bytes = (u8 *)ai;
  613. u8 val;
  614. int i;
  615. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  616. != AC_DIPXMIT_BEST)
  617. return false;
  618. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  619. for (i = 0; i < sizeof(*ai); i++) {
  620. val = snd_hda_codec_read(codec, pin_nid, 0,
  621. AC_VERB_GET_HDMI_DIP_DATA, 0);
  622. if (val != bytes[i])
  623. return false;
  624. }
  625. return true;
  626. }
  627. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, hda_nid_t nid,
  628. struct snd_pcm_substream *substream)
  629. {
  630. struct intel_hdmi_spec *spec = codec->spec;
  631. hda_nid_t pin_nid;
  632. int i;
  633. struct hdmi_audio_infoframe ai = {
  634. .type = 0x84,
  635. .ver = 0x01,
  636. .len = 0x0a,
  637. .CC02_CT47 = substream->runtime->channels - 1,
  638. };
  639. hdmi_setup_channel_allocation(codec, nid, &ai);
  640. for (i = 0; i < spec->num_pins; i++) {
  641. if (spec->pin_cvt[i] != nid)
  642. continue;
  643. if (!spec->sink_eld[i].monitor_present)
  644. continue;
  645. pin_nid = spec->pin[i];
  646. if (!hdmi_infoframe_uptodate(codec, pin_nid, &ai)) {
  647. hdmi_setup_channel_mapping(codec, pin_nid, &ai);
  648. hdmi_stop_infoframe_trans(codec, pin_nid);
  649. hdmi_fill_audio_infoframe(codec, pin_nid, &ai);
  650. hdmi_start_infoframe_trans(codec, pin_nid);
  651. }
  652. }
  653. }
  654. /*
  655. * Unsolicited events
  656. */
  657. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  658. {
  659. struct intel_hdmi_spec *spec = codec->spec;
  660. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  661. int pind = !!(res & AC_UNSOL_RES_PD);
  662. int eldv = !!(res & AC_UNSOL_RES_ELDV);
  663. int index;
  664. printk(KERN_INFO
  665. "HDMI hot plug event: Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  666. tag, pind, eldv);
  667. index = hda_node_index(spec->pin, tag);
  668. if (index < 0)
  669. return;
  670. spec->sink_eld[index].monitor_present = pind;
  671. spec->sink_eld[index].eld_valid = eldv;
  672. if (pind && eldv) {
  673. hdmi_get_show_eld(codec, spec->pin[index], &spec->sink_eld[index]);
  674. /* TODO: do real things about ELD */
  675. }
  676. }
  677. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  678. {
  679. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  680. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  681. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  682. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  683. printk(KERN_INFO
  684. "HDMI CP event: PIN=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  685. tag,
  686. subtag,
  687. cp_state,
  688. cp_ready);
  689. /* TODO */
  690. if (cp_state)
  691. ;
  692. if (cp_ready)
  693. ;
  694. }
  695. static void intel_hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  696. {
  697. struct intel_hdmi_spec *spec = codec->spec;
  698. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  699. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  700. if (hda_node_index(spec->pin, tag) < 0) {
  701. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  702. return;
  703. }
  704. if (subtag == 0)
  705. hdmi_intrinsic_event(codec, res);
  706. else
  707. hdmi_non_intrinsic_event(codec, res);
  708. }
  709. /*
  710. * Callbacks
  711. */
  712. static void hdmi_setup_stream(struct hda_codec *codec, hda_nid_t nid,
  713. u32 stream_tag, int format)
  714. {
  715. int tag;
  716. int fmt;
  717. tag = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0) >> 4;
  718. fmt = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_STREAM_FORMAT, 0);
  719. snd_printdd("hdmi_setup_stream: "
  720. "NID=0x%x, %sstream=0x%x, %sformat=0x%x\n",
  721. nid,
  722. tag == stream_tag ? "" : "new-",
  723. stream_tag,
  724. fmt == format ? "" : "new-",
  725. format);
  726. if (tag != stream_tag)
  727. snd_hda_codec_write(codec, nid, 0,
  728. AC_VERB_SET_CHANNEL_STREAMID, stream_tag << 4);
  729. if (fmt != format)
  730. snd_hda_codec_write(codec, nid, 0,
  731. AC_VERB_SET_STREAM_FORMAT, format);
  732. }
  733. static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  734. struct hda_codec *codec,
  735. unsigned int stream_tag,
  736. unsigned int format,
  737. struct snd_pcm_substream *substream)
  738. {
  739. hdmi_set_channel_count(codec, hinfo->nid,
  740. substream->runtime->channels);
  741. hdmi_setup_audio_infoframe(codec, hinfo->nid, substream);
  742. hdmi_setup_stream(codec, hinfo->nid, stream_tag, format);
  743. return 0;
  744. }
  745. static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  746. struct hda_codec *codec,
  747. struct snd_pcm_substream *substream)
  748. {
  749. return 0;
  750. }
  751. static struct hda_pcm_stream intel_hdmi_pcm_playback = {
  752. .substreams = 1,
  753. .channels_min = 2,
  754. .ops = {
  755. .prepare = intel_hdmi_playback_pcm_prepare,
  756. .cleanup = intel_hdmi_playback_pcm_cleanup,
  757. },
  758. };
  759. static int intel_hdmi_build_pcms(struct hda_codec *codec)
  760. {
  761. struct intel_hdmi_spec *spec = codec->spec;
  762. struct hda_pcm *info = spec->pcm_rec;
  763. int i;
  764. codec->num_pcms = spec->num_cvts;
  765. codec->pcm_info = info;
  766. for (i = 0; i < codec->num_pcms; i++, info++) {
  767. unsigned int chans;
  768. chans = get_wcaps(codec, spec->cvt[i]);
  769. chans = get_wcaps_channels(chans);
  770. info->name = intel_hdmi_pcm_names[i];
  771. info->pcm_type = HDA_PCM_TYPE_HDMI;
  772. info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
  773. intel_hdmi_pcm_playback;
  774. info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->cvt[i];
  775. info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = chans;
  776. }
  777. return 0;
  778. }
  779. static int intel_hdmi_build_controls(struct hda_codec *codec)
  780. {
  781. struct intel_hdmi_spec *spec = codec->spec;
  782. int err;
  783. int i;
  784. for (i = 0; i < codec->num_pcms; i++) {
  785. err = snd_hda_create_spdif_out_ctls(codec, spec->cvt[i]);
  786. if (err < 0)
  787. return err;
  788. }
  789. return 0;
  790. }
  791. static int intel_hdmi_init(struct hda_codec *codec)
  792. {
  793. struct intel_hdmi_spec *spec = codec->spec;
  794. int i;
  795. for (i = 0; spec->pin[i]; i++) {
  796. hdmi_enable_output(codec, spec->pin[i]);
  797. snd_hda_codec_write(codec, spec->pin[i], 0,
  798. AC_VERB_SET_UNSOLICITED_ENABLE,
  799. AC_USRSP_EN | spec->pin[i]);
  800. }
  801. return 0;
  802. }
  803. static void intel_hdmi_free(struct hda_codec *codec)
  804. {
  805. struct intel_hdmi_spec *spec = codec->spec;
  806. int i;
  807. for (i = 0; i < spec->num_pins; i++)
  808. snd_hda_eld_proc_free(codec, &spec->sink_eld[i]);
  809. kfree(spec);
  810. }
  811. static struct hda_codec_ops intel_hdmi_patch_ops = {
  812. .init = intel_hdmi_init,
  813. .free = intel_hdmi_free,
  814. .build_pcms = intel_hdmi_build_pcms,
  815. .build_controls = intel_hdmi_build_controls,
  816. .unsol_event = intel_hdmi_unsol_event,
  817. };
  818. static int patch_intel_hdmi(struct hda_codec *codec)
  819. {
  820. struct intel_hdmi_spec *spec;
  821. int i;
  822. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  823. if (spec == NULL)
  824. return -ENOMEM;
  825. codec->spec = spec;
  826. if (intel_hdmi_parse_codec(codec) < 0) {
  827. codec->spec = NULL;
  828. kfree(spec);
  829. return -EINVAL;
  830. }
  831. codec->patch_ops = intel_hdmi_patch_ops;
  832. for (i = 0; i < spec->num_pins; i++)
  833. snd_hda_eld_proc_new(codec, &spec->sink_eld[i], i);
  834. init_channel_allocations();
  835. return 0;
  836. }
  837. static struct hda_codec_preset snd_hda_preset_intelhdmi[] = {
  838. { .id = 0x808629fb, .name = "G45 DEVCL", .patch = patch_intel_hdmi },
  839. { .id = 0x80862801, .name = "G45 DEVBLC", .patch = patch_intel_hdmi },
  840. { .id = 0x80862802, .name = "G45 DEVCTG", .patch = patch_intel_hdmi },
  841. { .id = 0x80862803, .name = "G45 DEVELK", .patch = patch_intel_hdmi },
  842. { .id = 0x80862804, .name = "G45 DEVIBX", .patch = patch_intel_hdmi },
  843. { .id = 0x80860054, .name = "Q57 DEVIBX", .patch = patch_intel_hdmi },
  844. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_intel_hdmi },
  845. {} /* terminator */
  846. };
  847. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  848. MODULE_ALIAS("snd-hda-codec-id:80862801");
  849. MODULE_ALIAS("snd-hda-codec-id:80862802");
  850. MODULE_ALIAS("snd-hda-codec-id:80862803");
  851. MODULE_ALIAS("snd-hda-codec-id:80862804");
  852. MODULE_ALIAS("snd-hda-codec-id:80860054");
  853. MODULE_ALIAS("snd-hda-codec-id:10951392");
  854. MODULE_LICENSE("GPL");
  855. MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
  856. static struct hda_codec_preset_list intel_list = {
  857. .preset = snd_hda_preset_intelhdmi,
  858. .owner = THIS_MODULE,
  859. };
  860. static int __init patch_intelhdmi_init(void)
  861. {
  862. return snd_hda_add_codec_preset(&intel_list);
  863. }
  864. static void __exit patch_intelhdmi_exit(void)
  865. {
  866. snd_hda_delete_codec_preset(&intel_list);
  867. }
  868. module_init(patch_intelhdmi_init)
  869. module_exit(patch_intelhdmi_exit)