hpwdt.c 19 KB

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  1. /*
  2. * HP WatchDog Driver
  3. * based on
  4. *
  5. * SoftDog 0.05: A Software Watchdog Device
  6. *
  7. * (c) Copyright 2007 Hewlett-Packard Development Company, L.P.
  8. * Thomas Mingarelli <thomas.mingarelli@hp.com>
  9. *
  10. * This program is free software; you can redistribute it and/or
  11. * modify it under the terms of the GNU General Public License
  12. * version 2 as published by the Free Software Foundation
  13. *
  14. */
  15. #include <linux/device.h>
  16. #include <linux/fs.h>
  17. #include <linux/init.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/irq.h>
  21. #include <linux/nmi.h>
  22. #include <linux/kernel.h>
  23. #include <linux/miscdevice.h>
  24. #include <linux/mm.h>
  25. #include <linux/module.h>
  26. #include <linux/kdebug.h>
  27. #include <linux/moduleparam.h>
  28. #include <linux/notifier.h>
  29. #include <linux/pci.h>
  30. #include <linux/pci_ids.h>
  31. #include <linux/reboot.h>
  32. #include <linux/sched.h>
  33. #include <linux/timer.h>
  34. #include <linux/types.h>
  35. #include <linux/uaccess.h>
  36. #include <linux/watchdog.h>
  37. #include <linux/dmi.h>
  38. #include <linux/efi.h>
  39. #include <linux/string.h>
  40. #include <linux/bootmem.h>
  41. #include <linux/slab.h>
  42. #include <asm/desc.h>
  43. #include <asm/cacheflush.h>
  44. #define PCI_BIOS32_SD_VALUE 0x5F32335F /* "_32_" */
  45. #define CRU_BIOS_SIGNATURE_VALUE 0x55524324
  46. #define PCI_BIOS32_PARAGRAPH_LEN 16
  47. #define PCI_ROM_BASE1 0x000F0000
  48. #define ROM_SIZE 0x10000
  49. #define HPWDT_VERSION "1.1.1"
  50. struct bios32_service_dir {
  51. u32 signature;
  52. u32 entry_point;
  53. u8 revision;
  54. u8 length;
  55. u8 checksum;
  56. u8 reserved[5];
  57. };
  58. /* type 212 */
  59. struct smbios_cru64_info {
  60. u8 type;
  61. u8 byte_length;
  62. u16 handle;
  63. u32 signature;
  64. u64 physical_address;
  65. u32 double_length;
  66. u32 double_offset;
  67. };
  68. #define SMBIOS_CRU64_INFORMATION 212
  69. struct cmn_registers {
  70. union {
  71. struct {
  72. u8 ral;
  73. u8 rah;
  74. u16 rea2;
  75. };
  76. u32 reax;
  77. } u1;
  78. union {
  79. struct {
  80. u8 rbl;
  81. u8 rbh;
  82. u8 reb2l;
  83. u8 reb2h;
  84. };
  85. u32 rebx;
  86. } u2;
  87. union {
  88. struct {
  89. u8 rcl;
  90. u8 rch;
  91. u16 rec2;
  92. };
  93. u32 recx;
  94. } u3;
  95. union {
  96. struct {
  97. u8 rdl;
  98. u8 rdh;
  99. u16 red2;
  100. };
  101. u32 redx;
  102. } u4;
  103. u32 resi;
  104. u32 redi;
  105. u16 rds;
  106. u16 res;
  107. u32 reflags;
  108. } __attribute__((packed));
  109. #define DEFAULT_MARGIN 30
  110. static unsigned int soft_margin = DEFAULT_MARGIN; /* in seconds */
  111. static unsigned int reload; /* the computed soft_margin */
  112. static int nowayout = WATCHDOG_NOWAYOUT;
  113. static char expect_release;
  114. static unsigned long hpwdt_is_open;
  115. static unsigned int allow_kdump;
  116. static unsigned int hpwdt_nmi_sourcing;
  117. static unsigned int priority; /* hpwdt at end of die_notify list */
  118. static void __iomem *pci_mem_addr; /* the PCI-memory address */
  119. static unsigned long __iomem *hpwdt_timer_reg;
  120. static unsigned long __iomem *hpwdt_timer_con;
  121. static DEFINE_SPINLOCK(rom_lock);
  122. static void *cru_rom_addr;
  123. static struct cmn_registers cmn_regs;
  124. static struct pci_device_id hpwdt_devices[] = {
  125. { PCI_DEVICE(PCI_VENDOR_ID_COMPAQ, 0xB203) },
  126. { PCI_DEVICE(PCI_VENDOR_ID_HP, 0x3306) },
  127. {0}, /* terminate list */
  128. };
  129. MODULE_DEVICE_TABLE(pci, hpwdt_devices);
  130. extern asmlinkage void asminline_call(struct cmn_registers *pi86Regs,
  131. unsigned long *pRomEntry);
  132. #ifndef CONFIG_X86_64
  133. /* --32 Bit Bios------------------------------------------------------------ */
  134. #define HPWDT_ARCH 32
  135. asm(".text \n\t"
  136. ".align 4 \n"
  137. "asminline_call: \n\t"
  138. "pushl %ebp \n\t"
  139. "movl %esp, %ebp \n\t"
  140. "pusha \n\t"
  141. "pushf \n\t"
  142. "push %es \n\t"
  143. "push %ds \n\t"
  144. "pop %es \n\t"
  145. "movl 8(%ebp),%eax \n\t"
  146. "movl 4(%eax),%ebx \n\t"
  147. "movl 8(%eax),%ecx \n\t"
  148. "movl 12(%eax),%edx \n\t"
  149. "movl 16(%eax),%esi \n\t"
  150. "movl 20(%eax),%edi \n\t"
  151. "movl (%eax),%eax \n\t"
  152. "push %cs \n\t"
  153. "call *12(%ebp) \n\t"
  154. "pushf \n\t"
  155. "pushl %eax \n\t"
  156. "movl 8(%ebp),%eax \n\t"
  157. "movl %ebx,4(%eax) \n\t"
  158. "movl %ecx,8(%eax) \n\t"
  159. "movl %edx,12(%eax) \n\t"
  160. "movl %esi,16(%eax) \n\t"
  161. "movl %edi,20(%eax) \n\t"
  162. "movw %ds,24(%eax) \n\t"
  163. "movw %es,26(%eax) \n\t"
  164. "popl %ebx \n\t"
  165. "movl %ebx,(%eax) \n\t"
  166. "popl %ebx \n\t"
  167. "movl %ebx,28(%eax) \n\t"
  168. "pop %es \n\t"
  169. "popf \n\t"
  170. "popa \n\t"
  171. "leave \n\t"
  172. "ret \n\t"
  173. ".previous");
  174. /*
  175. * cru_detect
  176. *
  177. * Routine Description:
  178. * This function uses the 32-bit BIOS Service Directory record to
  179. * search for a $CRU record.
  180. *
  181. * Return Value:
  182. * 0 : SUCCESS
  183. * <0 : FAILURE
  184. */
  185. static int __devinit cru_detect(unsigned long map_entry,
  186. unsigned long map_offset)
  187. {
  188. void *bios32_map;
  189. unsigned long *bios32_entrypoint;
  190. unsigned long cru_physical_address;
  191. unsigned long cru_length;
  192. unsigned long physical_bios_base = 0;
  193. unsigned long physical_bios_offset = 0;
  194. int retval = -ENODEV;
  195. bios32_map = ioremap(map_entry, (2 * PAGE_SIZE));
  196. if (bios32_map == NULL)
  197. return -ENODEV;
  198. bios32_entrypoint = bios32_map + map_offset;
  199. cmn_regs.u1.reax = CRU_BIOS_SIGNATURE_VALUE;
  200. asminline_call(&cmn_regs, bios32_entrypoint);
  201. if (cmn_regs.u1.ral != 0) {
  202. printk(KERN_WARNING
  203. "hpwdt: Call succeeded but with an error: 0x%x\n",
  204. cmn_regs.u1.ral);
  205. } else {
  206. physical_bios_base = cmn_regs.u2.rebx;
  207. physical_bios_offset = cmn_regs.u4.redx;
  208. cru_length = cmn_regs.u3.recx;
  209. cru_physical_address =
  210. physical_bios_base + physical_bios_offset;
  211. /* If the values look OK, then map it in. */
  212. if ((physical_bios_base + physical_bios_offset)) {
  213. cru_rom_addr =
  214. ioremap(cru_physical_address, cru_length);
  215. if (cru_rom_addr)
  216. retval = 0;
  217. }
  218. printk(KERN_DEBUG "hpwdt: CRU Base Address: 0x%lx\n",
  219. physical_bios_base);
  220. printk(KERN_DEBUG "hpwdt: CRU Offset Address: 0x%lx\n",
  221. physical_bios_offset);
  222. printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
  223. cru_length);
  224. printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n",
  225. (unsigned int)&cru_rom_addr);
  226. }
  227. iounmap(bios32_map);
  228. return retval;
  229. }
  230. /*
  231. * bios_checksum
  232. */
  233. static int __devinit bios_checksum(const char __iomem *ptr, int len)
  234. {
  235. char sum = 0;
  236. int i;
  237. /*
  238. * calculate checksum of size bytes. This should add up
  239. * to zero if we have a valid header.
  240. */
  241. for (i = 0; i < len; i++)
  242. sum += ptr[i];
  243. return ((sum == 0) && (len > 0));
  244. }
  245. /*
  246. * bios32_present
  247. *
  248. * Routine Description:
  249. * This function finds the 32-bit BIOS Service Directory
  250. *
  251. * Return Value:
  252. * 0 : SUCCESS
  253. * <0 : FAILURE
  254. */
  255. static int __devinit bios32_present(const char __iomem *p)
  256. {
  257. struct bios32_service_dir *bios_32_ptr;
  258. int length;
  259. unsigned long map_entry, map_offset;
  260. bios_32_ptr = (struct bios32_service_dir *) p;
  261. /*
  262. * Search for signature by checking equal to the swizzled value
  263. * instead of calling another routine to perform a strcmp.
  264. */
  265. if (bios_32_ptr->signature == PCI_BIOS32_SD_VALUE) {
  266. length = bios_32_ptr->length * PCI_BIOS32_PARAGRAPH_LEN;
  267. if (bios_checksum(p, length)) {
  268. /*
  269. * According to the spec, we're looking for the
  270. * first 4KB-aligned address below the entrypoint
  271. * listed in the header. The Service Directory code
  272. * is guaranteed to occupy no more than 2 4KB pages.
  273. */
  274. map_entry = bios_32_ptr->entry_point & ~(PAGE_SIZE - 1);
  275. map_offset = bios_32_ptr->entry_point - map_entry;
  276. return cru_detect(map_entry, map_offset);
  277. }
  278. }
  279. return -ENODEV;
  280. }
  281. static int __devinit detect_cru_service(void)
  282. {
  283. char __iomem *p, *q;
  284. int rc = -1;
  285. /*
  286. * Search from 0x0f0000 through 0x0fffff, inclusive.
  287. */
  288. p = ioremap(PCI_ROM_BASE1, ROM_SIZE);
  289. if (p == NULL)
  290. return -ENOMEM;
  291. for (q = p; q < p + ROM_SIZE; q += 16) {
  292. rc = bios32_present(q);
  293. if (!rc)
  294. break;
  295. }
  296. iounmap(p);
  297. return rc;
  298. }
  299. #else
  300. /* --64 Bit Bios------------------------------------------------------------ */
  301. #define HPWDT_ARCH 64
  302. asm(".text \n\t"
  303. ".align 4 \n"
  304. "asminline_call: \n\t"
  305. "pushq %rbp \n\t"
  306. "movq %rsp, %rbp \n\t"
  307. "pushq %rax \n\t"
  308. "pushq %rbx \n\t"
  309. "pushq %rdx \n\t"
  310. "pushq %r12 \n\t"
  311. "pushq %r9 \n\t"
  312. "movq %rsi, %r12 \n\t"
  313. "movq %rdi, %r9 \n\t"
  314. "movl 4(%r9),%ebx \n\t"
  315. "movl 8(%r9),%ecx \n\t"
  316. "movl 12(%r9),%edx \n\t"
  317. "movl 16(%r9),%esi \n\t"
  318. "movl 20(%r9),%edi \n\t"
  319. "movl (%r9),%eax \n\t"
  320. "call *%r12 \n\t"
  321. "pushfq \n\t"
  322. "popq %r12 \n\t"
  323. "movl %eax, (%r9) \n\t"
  324. "movl %ebx, 4(%r9) \n\t"
  325. "movl %ecx, 8(%r9) \n\t"
  326. "movl %edx, 12(%r9) \n\t"
  327. "movl %esi, 16(%r9) \n\t"
  328. "movl %edi, 20(%r9) \n\t"
  329. "movq %r12, %rax \n\t"
  330. "movl %eax, 28(%r9) \n\t"
  331. "popq %r9 \n\t"
  332. "popq %r12 \n\t"
  333. "popq %rdx \n\t"
  334. "popq %rbx \n\t"
  335. "popq %rax \n\t"
  336. "leave \n\t"
  337. "ret \n\t"
  338. ".previous");
  339. /*
  340. * dmi_find_cru
  341. *
  342. * Routine Description:
  343. * This function checks whether or not a SMBIOS/DMI record is
  344. * the 64bit CRU info or not
  345. */
  346. static void __devinit dmi_find_cru(const struct dmi_header *dm, void *dummy)
  347. {
  348. struct smbios_cru64_info *smbios_cru64_ptr;
  349. unsigned long cru_physical_address;
  350. if (dm->type == SMBIOS_CRU64_INFORMATION) {
  351. smbios_cru64_ptr = (struct smbios_cru64_info *) dm;
  352. if (smbios_cru64_ptr->signature == CRU_BIOS_SIGNATURE_VALUE) {
  353. cru_physical_address =
  354. smbios_cru64_ptr->physical_address +
  355. smbios_cru64_ptr->double_offset;
  356. cru_rom_addr = ioremap(cru_physical_address,
  357. smbios_cru64_ptr->double_length);
  358. set_memory_x((unsigned long)cru_rom_addr & PAGE_MASK,
  359. smbios_cru64_ptr->double_length >> PAGE_SHIFT);
  360. }
  361. }
  362. }
  363. static int __devinit detect_cru_service(void)
  364. {
  365. cru_rom_addr = NULL;
  366. dmi_walk(dmi_find_cru, NULL);
  367. /* if cru_rom_addr has been set then we found a CRU service */
  368. return ((cru_rom_addr != NULL) ? 0 : -ENODEV);
  369. }
  370. /* ------------------------------------------------------------------------- */
  371. #endif
  372. /*
  373. * Watchdog operations
  374. */
  375. static void hpwdt_start(void)
  376. {
  377. reload = (soft_margin * 1000) / 128;
  378. iowrite16(reload, hpwdt_timer_reg);
  379. iowrite16(0x85, hpwdt_timer_con);
  380. }
  381. static void hpwdt_stop(void)
  382. {
  383. unsigned long data;
  384. data = ioread16(hpwdt_timer_con);
  385. data &= 0xFE;
  386. iowrite16(data, hpwdt_timer_con);
  387. }
  388. static void hpwdt_ping(void)
  389. {
  390. iowrite16(reload, hpwdt_timer_reg);
  391. }
  392. static int hpwdt_change_timer(int new_margin)
  393. {
  394. /* Arbitrary, can't find the card's limits */
  395. if (new_margin < 30 || new_margin > 600) {
  396. printk(KERN_WARNING
  397. "hpwdt: New value passed in is invalid: %d seconds.\n",
  398. new_margin);
  399. return -EINVAL;
  400. }
  401. soft_margin = new_margin;
  402. printk(KERN_DEBUG
  403. "hpwdt: New timer passed in is %d seconds.\n",
  404. new_margin);
  405. reload = (soft_margin * 1000) / 128;
  406. return 0;
  407. }
  408. /*
  409. * NMI Handler
  410. */
  411. static int hpwdt_pretimeout(struct notifier_block *nb, unsigned long ulReason,
  412. void *data)
  413. {
  414. unsigned long rom_pl;
  415. static int die_nmi_called;
  416. if (ulReason != DIE_NMI && ulReason != DIE_NMI_IPI)
  417. return NOTIFY_OK;
  418. if (hpwdt_nmi_sourcing) {
  419. spin_lock_irqsave(&rom_lock, rom_pl);
  420. if (!die_nmi_called)
  421. asminline_call(&cmn_regs, cru_rom_addr);
  422. die_nmi_called = 1;
  423. spin_unlock_irqrestore(&rom_lock, rom_pl);
  424. if (cmn_regs.u1.ral == 0) {
  425. printk(KERN_WARNING "hpwdt: An NMI occurred, "
  426. "but unable to determine source.\n");
  427. } else {
  428. if (allow_kdump)
  429. hpwdt_stop();
  430. panic("An NMI occurred, please see the Integrated "
  431. "Management Log for details.\n");
  432. }
  433. }
  434. return NOTIFY_OK;
  435. }
  436. /*
  437. * /dev/watchdog handling
  438. */
  439. static int hpwdt_open(struct inode *inode, struct file *file)
  440. {
  441. /* /dev/watchdog can only be opened once */
  442. if (test_and_set_bit(0, &hpwdt_is_open))
  443. return -EBUSY;
  444. /* Start the watchdog */
  445. hpwdt_start();
  446. hpwdt_ping();
  447. return nonseekable_open(inode, file);
  448. }
  449. static int hpwdt_release(struct inode *inode, struct file *file)
  450. {
  451. /* Stop the watchdog */
  452. if (expect_release == 42) {
  453. hpwdt_stop();
  454. } else {
  455. printk(KERN_CRIT
  456. "hpwdt: Unexpected close, not stopping watchdog!\n");
  457. hpwdt_ping();
  458. }
  459. expect_release = 0;
  460. /* /dev/watchdog is being closed, make sure it can be re-opened */
  461. clear_bit(0, &hpwdt_is_open);
  462. return 0;
  463. }
  464. static ssize_t hpwdt_write(struct file *file, const char __user *data,
  465. size_t len, loff_t *ppos)
  466. {
  467. /* See if we got the magic character 'V' and reload the timer */
  468. if (len) {
  469. if (!nowayout) {
  470. size_t i;
  471. /* note: just in case someone wrote the magic character
  472. * five months ago... */
  473. expect_release = 0;
  474. /* scan to see whether or not we got the magic char. */
  475. for (i = 0; i != len; i++) {
  476. char c;
  477. if (get_user(c, data + i))
  478. return -EFAULT;
  479. if (c == 'V')
  480. expect_release = 42;
  481. }
  482. }
  483. /* someone wrote to us, we should reload the timer */
  484. hpwdt_ping();
  485. }
  486. return len;
  487. }
  488. static struct watchdog_info ident = {
  489. .options = WDIOF_SETTIMEOUT |
  490. WDIOF_KEEPALIVEPING |
  491. WDIOF_MAGICCLOSE,
  492. .identity = "HP iLO2 HW Watchdog Timer",
  493. };
  494. static long hpwdt_ioctl(struct file *file, unsigned int cmd,
  495. unsigned long arg)
  496. {
  497. void __user *argp = (void __user *)arg;
  498. int __user *p = argp;
  499. int new_margin;
  500. int ret = -ENOTTY;
  501. switch (cmd) {
  502. case WDIOC_GETSUPPORT:
  503. ret = 0;
  504. if (copy_to_user(argp, &ident, sizeof(ident)))
  505. ret = -EFAULT;
  506. break;
  507. case WDIOC_GETSTATUS:
  508. case WDIOC_GETBOOTSTATUS:
  509. ret = put_user(0, p);
  510. break;
  511. case WDIOC_KEEPALIVE:
  512. hpwdt_ping();
  513. ret = 0;
  514. break;
  515. case WDIOC_SETTIMEOUT:
  516. ret = get_user(new_margin, p);
  517. if (ret)
  518. break;
  519. ret = hpwdt_change_timer(new_margin);
  520. if (ret)
  521. break;
  522. hpwdt_ping();
  523. /* Fall */
  524. case WDIOC_GETTIMEOUT:
  525. ret = put_user(soft_margin, p);
  526. break;
  527. }
  528. return ret;
  529. }
  530. /*
  531. * Kernel interfaces
  532. */
  533. static const struct file_operations hpwdt_fops = {
  534. .owner = THIS_MODULE,
  535. .llseek = no_llseek,
  536. .write = hpwdt_write,
  537. .unlocked_ioctl = hpwdt_ioctl,
  538. .open = hpwdt_open,
  539. .release = hpwdt_release,
  540. };
  541. static struct miscdevice hpwdt_miscdev = {
  542. .minor = WATCHDOG_MINOR,
  543. .name = "watchdog",
  544. .fops = &hpwdt_fops,
  545. };
  546. static struct notifier_block die_notifier = {
  547. .notifier_call = hpwdt_pretimeout,
  548. .priority = 0,
  549. };
  550. /*
  551. * Init & Exit
  552. */
  553. #ifdef ARCH_HAS_NMI_WATCHDOG
  554. static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
  555. {
  556. /*
  557. * If nmi_watchdog is turned off then we can turn on
  558. * our nmi sourcing capability.
  559. */
  560. if (!nmi_watchdog_active())
  561. hpwdt_nmi_sourcing = 1;
  562. else
  563. dev_warn(&dev->dev, "NMI sourcing is disabled. To enable this "
  564. "functionality you must reboot with nmi_watchdog=0 "
  565. "and load the hpwdt driver with priority=1.\n");
  566. }
  567. #else
  568. static void __devinit hpwdt_check_nmi_sourcing(struct pci_dev *dev)
  569. {
  570. dev_warn(&dev->dev, "NMI sourcing is disabled. "
  571. "Your kernel does not support a NMI Watchdog.\n");
  572. }
  573. #endif
  574. static int __devinit hpwdt_init_one(struct pci_dev *dev,
  575. const struct pci_device_id *ent)
  576. {
  577. int retval;
  578. /*
  579. * Check if we can do NMI sourcing or not
  580. */
  581. hpwdt_check_nmi_sourcing(dev);
  582. /*
  583. * First let's find out if we are on an iLO2 server. We will
  584. * not run on a legacy ASM box.
  585. * So we only support the G5 ProLiant servers and higher.
  586. */
  587. if (dev->subsystem_vendor != PCI_VENDOR_ID_HP) {
  588. dev_warn(&dev->dev,
  589. "This server does not have an iLO2 ASIC.\n");
  590. return -ENODEV;
  591. }
  592. if (pci_enable_device(dev)) {
  593. dev_warn(&dev->dev,
  594. "Not possible to enable PCI Device: 0x%x:0x%x.\n",
  595. ent->vendor, ent->device);
  596. return -ENODEV;
  597. }
  598. pci_mem_addr = pci_iomap(dev, 1, 0x80);
  599. if (!pci_mem_addr) {
  600. dev_warn(&dev->dev,
  601. "Unable to detect the iLO2 server memory.\n");
  602. retval = -ENOMEM;
  603. goto error_pci_iomap;
  604. }
  605. hpwdt_timer_reg = pci_mem_addr + 0x70;
  606. hpwdt_timer_con = pci_mem_addr + 0x72;
  607. /* Make sure that we have a valid soft_margin */
  608. if (hpwdt_change_timer(soft_margin))
  609. hpwdt_change_timer(DEFAULT_MARGIN);
  610. /*
  611. * We need to map the ROM to get the CRU service.
  612. * For 32 bit Operating Systems we need to go through the 32 Bit
  613. * BIOS Service Directory
  614. * For 64 bit Operating Systems we get that service through SMBIOS.
  615. */
  616. retval = detect_cru_service();
  617. if (retval < 0) {
  618. dev_warn(&dev->dev,
  619. "Unable to detect the %d Bit CRU Service.\n",
  620. HPWDT_ARCH);
  621. goto error_get_cru;
  622. }
  623. /*
  624. * We know this is the only CRU call we need to make so lets keep as
  625. * few instructions as possible once the NMI comes in.
  626. */
  627. cmn_regs.u1.rah = 0x0D;
  628. cmn_regs.u1.ral = 0x02;
  629. /*
  630. * If the priority is set to 1, then we will be put first on the
  631. * die notify list to handle a critical NMI. The default is to
  632. * be last so other users of the NMI signal can function.
  633. */
  634. if (priority)
  635. die_notifier.priority = 0x7FFFFFFF;
  636. retval = register_die_notifier(&die_notifier);
  637. if (retval != 0) {
  638. dev_warn(&dev->dev,
  639. "Unable to register a die notifier (err=%d).\n",
  640. retval);
  641. goto error_die_notifier;
  642. }
  643. retval = misc_register(&hpwdt_miscdev);
  644. if (retval < 0) {
  645. dev_warn(&dev->dev,
  646. "Unable to register miscdev on minor=%d (err=%d).\n",
  647. WATCHDOG_MINOR, retval);
  648. goto error_misc_register;
  649. }
  650. printk(KERN_INFO
  651. "hp Watchdog Timer Driver: %s"
  652. ", timer margin: %d seconds (nowayout=%d)"
  653. ", allow kernel dump: %s (default = 0/OFF)"
  654. ", priority: %s (default = 0/LAST).\n",
  655. HPWDT_VERSION, soft_margin, nowayout,
  656. (allow_kdump == 0) ? "OFF" : "ON",
  657. (priority == 0) ? "LAST" : "FIRST");
  658. return 0;
  659. error_misc_register:
  660. unregister_die_notifier(&die_notifier);
  661. error_die_notifier:
  662. if (cru_rom_addr)
  663. iounmap(cru_rom_addr);
  664. error_get_cru:
  665. pci_iounmap(dev, pci_mem_addr);
  666. error_pci_iomap:
  667. pci_disable_device(dev);
  668. return retval;
  669. }
  670. static void __devexit hpwdt_exit(struct pci_dev *dev)
  671. {
  672. if (!nowayout)
  673. hpwdt_stop();
  674. misc_deregister(&hpwdt_miscdev);
  675. unregister_die_notifier(&die_notifier);
  676. if (cru_rom_addr)
  677. iounmap(cru_rom_addr);
  678. pci_iounmap(dev, pci_mem_addr);
  679. pci_disable_device(dev);
  680. }
  681. static struct pci_driver hpwdt_driver = {
  682. .name = "hpwdt",
  683. .id_table = hpwdt_devices,
  684. .probe = hpwdt_init_one,
  685. .remove = __devexit_p(hpwdt_exit),
  686. };
  687. static void __exit hpwdt_cleanup(void)
  688. {
  689. pci_unregister_driver(&hpwdt_driver);
  690. }
  691. static int __init hpwdt_init(void)
  692. {
  693. return pci_register_driver(&hpwdt_driver);
  694. }
  695. MODULE_AUTHOR("Tom Mingarelli");
  696. MODULE_DESCRIPTION("hp watchdog driver");
  697. MODULE_LICENSE("GPL");
  698. MODULE_VERSION(HPWDT_VERSION);
  699. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
  700. module_param(soft_margin, int, 0);
  701. MODULE_PARM_DESC(soft_margin, "Watchdog timeout in seconds");
  702. module_param(allow_kdump, int, 0);
  703. MODULE_PARM_DESC(allow_kdump, "Start a kernel dump after NMI occurs");
  704. module_param(nowayout, int, 0);
  705. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  706. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  707. module_param(priority, int, 0);
  708. MODULE_PARM_DESC(priority, "The hpwdt driver handles NMIs first or last"
  709. " (default = 0/Last)\n");
  710. module_init(hpwdt_init);
  711. module_exit(hpwdt_cleanup);