mach64_accel.c 11 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426
  1. /*
  2. * ATI Mach64 Hardware Acceleration
  3. */
  4. #include <linux/delay.h>
  5. #include <linux/fb.h>
  6. #include <video/mach64.h>
  7. #include "atyfb.h"
  8. /*
  9. * Generic Mach64 routines
  10. */
  11. /* this is for DMA GUI engine! work in progress */
  12. typedef struct {
  13. u32 frame_buf_offset;
  14. u32 system_mem_addr;
  15. u32 command;
  16. u32 reserved;
  17. } BM_DESCRIPTOR_ENTRY;
  18. #define LAST_DESCRIPTOR (1 << 31)
  19. #define SYSTEM_TO_FRAME_BUFFER 0
  20. static u32 rotation24bpp(u32 dx, u32 direction)
  21. {
  22. u32 rotation;
  23. if (direction & DST_X_LEFT_TO_RIGHT) {
  24. rotation = (dx / 4) % 6;
  25. } else {
  26. rotation = ((dx + 2) / 4) % 6;
  27. }
  28. return ((rotation << 8) | DST_24_ROTATION_ENABLE);
  29. }
  30. void aty_reset_engine(const struct atyfb_par *par)
  31. {
  32. /* reset engine */
  33. aty_st_le32(GEN_TEST_CNTL,
  34. aty_ld_le32(GEN_TEST_CNTL, par) &
  35. ~(GUI_ENGINE_ENABLE | HWCURSOR_ENABLE), par);
  36. /* enable engine */
  37. aty_st_le32(GEN_TEST_CNTL,
  38. aty_ld_le32(GEN_TEST_CNTL, par) | GUI_ENGINE_ENABLE, par);
  39. /* ensure engine is not locked up by clearing any FIFO or */
  40. /* HOST errors */
  41. aty_st_le32(BUS_CNTL,
  42. aty_ld_le32(BUS_CNTL, par) | BUS_HOST_ERR_ACK | BUS_FIFO_ERR_ACK, par);
  43. }
  44. static void reset_GTC_3D_engine(const struct atyfb_par *par)
  45. {
  46. aty_st_le32(SCALE_3D_CNTL, 0xc0, par);
  47. mdelay(GTC_3D_RESET_DELAY);
  48. aty_st_le32(SETUP_CNTL, 0x00, par);
  49. mdelay(GTC_3D_RESET_DELAY);
  50. aty_st_le32(SCALE_3D_CNTL, 0x00, par);
  51. mdelay(GTC_3D_RESET_DELAY);
  52. }
  53. void aty_init_engine(struct atyfb_par *par, struct fb_info *info)
  54. {
  55. u32 pitch_value;
  56. u32 vxres;
  57. /* determine modal information from global mode structure */
  58. pitch_value = info->fix.line_length / (info->var.bits_per_pixel / 8);
  59. vxres = info->var.xres_virtual;
  60. if (info->var.bits_per_pixel == 24) {
  61. /* In 24 bpp, the engine is in 8 bpp - this requires that all */
  62. /* horizontal coordinates and widths must be adjusted */
  63. pitch_value *= 3;
  64. vxres *= 3;
  65. }
  66. /* On GTC (RagePro), we need to reset the 3D engine before */
  67. if (M64_HAS(RESET_3D))
  68. reset_GTC_3D_engine(par);
  69. /* Reset engine, enable, and clear any engine errors */
  70. aty_reset_engine(par);
  71. /* Ensure that vga page pointers are set to zero - the upper */
  72. /* page pointers are set to 1 to handle overflows in the */
  73. /* lower page */
  74. aty_st_le32(MEM_VGA_WP_SEL, 0x00010000, par);
  75. aty_st_le32(MEM_VGA_RP_SEL, 0x00010000, par);
  76. /* ---- Setup standard engine context ---- */
  77. /* All GUI registers here are FIFOed - therefore, wait for */
  78. /* the appropriate number of empty FIFO entries */
  79. wait_for_fifo(14, par);
  80. /* enable all registers to be loaded for context loads */
  81. aty_st_le32(CONTEXT_MASK, 0xFFFFFFFF, par);
  82. /* set destination pitch to modal pitch, set offset to zero */
  83. aty_st_le32(DST_OFF_PITCH, (pitch_value / 8) << 22, par);
  84. /* zero these registers (set them to a known state) */
  85. aty_st_le32(DST_Y_X, 0, par);
  86. aty_st_le32(DST_HEIGHT, 0, par);
  87. aty_st_le32(DST_BRES_ERR, 0, par);
  88. aty_st_le32(DST_BRES_INC, 0, par);
  89. aty_st_le32(DST_BRES_DEC, 0, par);
  90. /* set destination drawing attributes */
  91. aty_st_le32(DST_CNTL, DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
  92. DST_X_LEFT_TO_RIGHT, par);
  93. /* set source pitch to modal pitch, set offset to zero */
  94. aty_st_le32(SRC_OFF_PITCH, (pitch_value / 8) << 22, par);
  95. /* set these registers to a known state */
  96. aty_st_le32(SRC_Y_X, 0, par);
  97. aty_st_le32(SRC_HEIGHT1_WIDTH1, 1, par);
  98. aty_st_le32(SRC_Y_X_START, 0, par);
  99. aty_st_le32(SRC_HEIGHT2_WIDTH2, 1, par);
  100. /* set source pixel retrieving attributes */
  101. aty_st_le32(SRC_CNTL, SRC_LINE_X_LEFT_TO_RIGHT, par);
  102. /* set host attributes */
  103. wait_for_fifo(13, par);
  104. aty_st_le32(HOST_CNTL, 0, par);
  105. /* set pattern attributes */
  106. aty_st_le32(PAT_REG0, 0, par);
  107. aty_st_le32(PAT_REG1, 0, par);
  108. aty_st_le32(PAT_CNTL, 0, par);
  109. /* set scissors to modal size */
  110. aty_st_le32(SC_LEFT, 0, par);
  111. aty_st_le32(SC_TOP, 0, par);
  112. aty_st_le32(SC_BOTTOM, par->crtc.vyres - 1, par);
  113. aty_st_le32(SC_RIGHT, vxres - 1, par);
  114. /* set background color to minimum value (usually BLACK) */
  115. aty_st_le32(DP_BKGD_CLR, 0, par);
  116. /* set foreground color to maximum value (usually WHITE) */
  117. aty_st_le32(DP_FRGD_CLR, 0xFFFFFFFF, par);
  118. /* set write mask to effect all pixel bits */
  119. aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF, par);
  120. /* set foreground mix to overpaint and background mix to */
  121. /* no-effect */
  122. aty_st_le32(DP_MIX, FRGD_MIX_S | BKGD_MIX_D, par);
  123. /* set primary source pixel channel to foreground color */
  124. /* register */
  125. aty_st_le32(DP_SRC, FRGD_SRC_FRGD_CLR, par);
  126. /* set compare functionality to false (no-effect on */
  127. /* destination) */
  128. wait_for_fifo(3, par);
  129. aty_st_le32(CLR_CMP_CLR, 0, par);
  130. aty_st_le32(CLR_CMP_MASK, 0xFFFFFFFF, par);
  131. aty_st_le32(CLR_CMP_CNTL, 0, par);
  132. /* set pixel depth */
  133. wait_for_fifo(2, par);
  134. aty_st_le32(DP_PIX_WIDTH, par->crtc.dp_pix_width, par);
  135. aty_st_le32(DP_CHAIN_MASK, par->crtc.dp_chain_mask, par);
  136. wait_for_fifo(5, par);
  137. aty_st_le32(SCALE_3D_CNTL, 0, par);
  138. aty_st_le32(Z_CNTL, 0, par);
  139. aty_st_le32(CRTC_INT_CNTL, aty_ld_le32(CRTC_INT_CNTL, par) & ~0x20,
  140. par);
  141. aty_st_le32(GUI_TRAJ_CNTL, 0x100023, par);
  142. /* insure engine is idle before leaving */
  143. wait_for_idle(par);
  144. }
  145. /*
  146. * Accelerated functions
  147. */
  148. static inline void draw_rect(s16 x, s16 y, u16 width, u16 height,
  149. struct atyfb_par *par)
  150. {
  151. /* perform rectangle fill */
  152. wait_for_fifo(2, par);
  153. aty_st_le32(DST_Y_X, (x << 16) | y, par);
  154. aty_st_le32(DST_HEIGHT_WIDTH, (width << 16) | height, par);
  155. par->blitter_may_be_busy = 1;
  156. }
  157. void atyfb_copyarea(struct fb_info *info, const struct fb_copyarea *area)
  158. {
  159. struct atyfb_par *par = (struct atyfb_par *) info->par;
  160. u32 dy = area->dy, sy = area->sy, direction = DST_LAST_PEL;
  161. u32 sx = area->sx, dx = area->dx, width = area->width, rotation = 0;
  162. if (par->asleep)
  163. return;
  164. if (!area->width || !area->height)
  165. return;
  166. if (!par->accel_flags) {
  167. cfb_copyarea(info, area);
  168. return;
  169. }
  170. if (info->var.bits_per_pixel == 24) {
  171. /* In 24 bpp, the engine is in 8 bpp - this requires that all */
  172. /* horizontal coordinates and widths must be adjusted */
  173. sx *= 3;
  174. dx *= 3;
  175. width *= 3;
  176. }
  177. if (area->sy < area->dy) {
  178. dy += area->height - 1;
  179. sy += area->height - 1;
  180. } else
  181. direction |= DST_Y_TOP_TO_BOTTOM;
  182. if (sx < dx) {
  183. dx += width - 1;
  184. sx += width - 1;
  185. } else
  186. direction |= DST_X_LEFT_TO_RIGHT;
  187. if (info->var.bits_per_pixel == 24) {
  188. rotation = rotation24bpp(dx, direction);
  189. }
  190. wait_for_fifo(4, par);
  191. aty_st_le32(DP_SRC, FRGD_SRC_BLIT, par);
  192. aty_st_le32(SRC_Y_X, (sx << 16) | sy, par);
  193. aty_st_le32(SRC_HEIGHT1_WIDTH1, (width << 16) | area->height, par);
  194. aty_st_le32(DST_CNTL, direction | rotation, par);
  195. draw_rect(dx, dy, width, area->height, par);
  196. }
  197. void atyfb_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
  198. {
  199. struct atyfb_par *par = (struct atyfb_par *) info->par;
  200. u32 color = rect->color, dx = rect->dx, width = rect->width, rotation = 0;
  201. if (par->asleep)
  202. return;
  203. if (!rect->width || !rect->height)
  204. return;
  205. if (!par->accel_flags) {
  206. cfb_fillrect(info, rect);
  207. return;
  208. }
  209. color |= (rect->color << 8);
  210. color |= (rect->color << 16);
  211. if (info->var.bits_per_pixel == 24) {
  212. /* In 24 bpp, the engine is in 8 bpp - this requires that all */
  213. /* horizontal coordinates and widths must be adjusted */
  214. dx *= 3;
  215. width *= 3;
  216. rotation = rotation24bpp(dx, DST_X_LEFT_TO_RIGHT);
  217. }
  218. wait_for_fifo(3, par);
  219. aty_st_le32(DP_FRGD_CLR, color, par);
  220. aty_st_le32(DP_SRC,
  221. BKGD_SRC_BKGD_CLR | FRGD_SRC_FRGD_CLR | MONO_SRC_ONE,
  222. par);
  223. aty_st_le32(DST_CNTL,
  224. DST_LAST_PEL | DST_Y_TOP_TO_BOTTOM |
  225. DST_X_LEFT_TO_RIGHT | rotation, par);
  226. draw_rect(dx, rect->dy, width, rect->height, par);
  227. }
  228. void atyfb_imageblit(struct fb_info *info, const struct fb_image *image)
  229. {
  230. struct atyfb_par *par = (struct atyfb_par *) info->par;
  231. u32 src_bytes, dx = image->dx, dy = image->dy, width = image->width;
  232. u32 pix_width_save, pix_width, host_cntl, rotation = 0, src, mix;
  233. if (par->asleep)
  234. return;
  235. if (!image->width || !image->height)
  236. return;
  237. if (!par->accel_flags ||
  238. (image->depth != 1 && info->var.bits_per_pixel != image->depth)) {
  239. cfb_imageblit(info, image);
  240. return;
  241. }
  242. pix_width = pix_width_save = aty_ld_le32(DP_PIX_WIDTH, par);
  243. host_cntl = aty_ld_le32(HOST_CNTL, par) | HOST_BYTE_ALIGN;
  244. switch (image->depth) {
  245. case 1:
  246. pix_width &= ~(BYTE_ORDER_MASK | HOST_MASK);
  247. pix_width |= (BYTE_ORDER_MSB_TO_LSB | HOST_1BPP);
  248. break;
  249. case 4:
  250. pix_width &= ~(BYTE_ORDER_MASK | HOST_MASK);
  251. pix_width |= (BYTE_ORDER_MSB_TO_LSB | HOST_4BPP);
  252. break;
  253. case 8:
  254. pix_width &= ~HOST_MASK;
  255. pix_width |= HOST_8BPP;
  256. break;
  257. case 15:
  258. pix_width &= ~HOST_MASK;
  259. pix_width |= HOST_15BPP;
  260. break;
  261. case 16:
  262. pix_width &= ~HOST_MASK;
  263. pix_width |= HOST_16BPP;
  264. break;
  265. case 24:
  266. pix_width &= ~HOST_MASK;
  267. pix_width |= HOST_24BPP;
  268. break;
  269. case 32:
  270. pix_width &= ~HOST_MASK;
  271. pix_width |= HOST_32BPP;
  272. break;
  273. }
  274. if (info->var.bits_per_pixel == 24) {
  275. /* In 24 bpp, the engine is in 8 bpp - this requires that all */
  276. /* horizontal coordinates and widths must be adjusted */
  277. dx *= 3;
  278. width *= 3;
  279. rotation = rotation24bpp(dx, DST_X_LEFT_TO_RIGHT);
  280. pix_width &= ~DST_MASK;
  281. pix_width |= DST_8BPP;
  282. /*
  283. * since Rage 3D IIc we have DP_HOST_TRIPLE_EN bit
  284. * this hwaccelerated triple has an issue with not aligned data
  285. */
  286. if (M64_HAS(HW_TRIPLE) && image->width % 8 == 0)
  287. pix_width |= DP_HOST_TRIPLE_EN;
  288. }
  289. if (image->depth == 1) {
  290. u32 fg, bg;
  291. if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
  292. info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
  293. fg = ((u32*)(info->pseudo_palette))[image->fg_color];
  294. bg = ((u32*)(info->pseudo_palette))[image->bg_color];
  295. } else {
  296. fg = image->fg_color;
  297. bg = image->bg_color;
  298. }
  299. wait_for_fifo(2, par);
  300. aty_st_le32(DP_BKGD_CLR, bg, par);
  301. aty_st_le32(DP_FRGD_CLR, fg, par);
  302. src = MONO_SRC_HOST | FRGD_SRC_FRGD_CLR | BKGD_SRC_BKGD_CLR;
  303. mix = FRGD_MIX_S | BKGD_MIX_S;
  304. } else {
  305. src = MONO_SRC_ONE | FRGD_SRC_HOST;
  306. mix = FRGD_MIX_D_XOR_S | BKGD_MIX_D;
  307. }
  308. wait_for_fifo(6, par);
  309. aty_st_le32(DP_WRITE_MASK, 0xFFFFFFFF, par);
  310. aty_st_le32(DP_PIX_WIDTH, pix_width, par);
  311. aty_st_le32(DP_MIX, mix, par);
  312. aty_st_le32(DP_SRC, src, par);
  313. aty_st_le32(HOST_CNTL, host_cntl, par);
  314. aty_st_le32(DST_CNTL, DST_Y_TOP_TO_BOTTOM | DST_X_LEFT_TO_RIGHT | rotation, par);
  315. draw_rect(dx, dy, width, image->height, par);
  316. src_bytes = (((image->width * image->depth) + 7) / 8) * image->height;
  317. /* manual triple each pixel */
  318. if (info->var.bits_per_pixel == 24 && !(pix_width & DP_HOST_TRIPLE_EN)) {
  319. int inbit, outbit, mult24, byte_id_in_dword, width;
  320. u8 *pbitmapin = (u8*)image->data, *pbitmapout;
  321. u32 hostdword;
  322. for (width = image->width, inbit = 7, mult24 = 0; src_bytes; ) {
  323. for (hostdword = 0, pbitmapout = (u8*)&hostdword, byte_id_in_dword = 0;
  324. byte_id_in_dword < 4 && src_bytes;
  325. byte_id_in_dword++, pbitmapout++) {
  326. for (outbit = 7; outbit >= 0; outbit--) {
  327. *pbitmapout |= (((*pbitmapin >> inbit) & 1) << outbit);
  328. mult24++;
  329. /* next bit */
  330. if (mult24 == 3) {
  331. mult24 = 0;
  332. inbit--;
  333. width--;
  334. }
  335. /* next byte */
  336. if (inbit < 0 || width == 0) {
  337. src_bytes--;
  338. pbitmapin++;
  339. inbit = 7;
  340. if (width == 0) {
  341. width = image->width;
  342. outbit = 0;
  343. }
  344. }
  345. }
  346. }
  347. wait_for_fifo(1, par);
  348. aty_st_le32(HOST_DATA0, hostdword, par);
  349. }
  350. } else {
  351. u32 *pbitmap, dwords = (src_bytes + 3) / 4;
  352. for (pbitmap = (u32*)(image->data); dwords; dwords--, pbitmap++) {
  353. wait_for_fifo(1, par);
  354. aty_st_le32(HOST_DATA0, le32_to_cpup(pbitmap), par);
  355. }
  356. }
  357. /* restore pix_width */
  358. wait_for_fifo(1, par);
  359. aty_st_le32(DP_PIX_WIDTH, pix_width_save, par);
  360. }