musb_core.h 15 KB

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  1. /*
  2. * MUSB OTG driver defines
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #ifndef __MUSB_CORE_H__
  35. #define __MUSB_CORE_H__
  36. #include <linux/slab.h>
  37. #include <linux/list.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/errno.h>
  40. #include <linux/timer.h>
  41. #include <linux/clk.h>
  42. #include <linux/device.h>
  43. #include <linux/usb/ch9.h>
  44. #include <linux/usb/gadget.h>
  45. #include <linux/usb.h>
  46. #include <linux/usb/otg.h>
  47. #include <linux/usb/musb.h>
  48. struct musb;
  49. struct musb_hw_ep;
  50. struct musb_ep;
  51. #include "musb_debug.h"
  52. #include "musb_dma.h"
  53. #include "musb_io.h"
  54. #include "musb_regs.h"
  55. #include "musb_gadget.h"
  56. #include "../core/hcd.h"
  57. #include "musb_host.h"
  58. #ifdef CONFIG_USB_MUSB_OTG
  59. #define is_peripheral_enabled(musb) ((musb)->board_mode != MUSB_HOST)
  60. #define is_host_enabled(musb) ((musb)->board_mode != MUSB_PERIPHERAL)
  61. #define is_otg_enabled(musb) ((musb)->board_mode == MUSB_OTG)
  62. /* NOTE: otg and peripheral-only state machines start at B_IDLE.
  63. * OTG or host-only go to A_IDLE when ID is sensed.
  64. */
  65. #define is_peripheral_active(m) (!(m)->is_host)
  66. #define is_host_active(m) ((m)->is_host)
  67. #else
  68. #define is_peripheral_enabled(musb) is_peripheral_capable()
  69. #define is_host_enabled(musb) is_host_capable()
  70. #define is_otg_enabled(musb) 0
  71. #define is_peripheral_active(musb) is_peripheral_capable()
  72. #define is_host_active(musb) is_host_capable()
  73. #endif
  74. #if defined(CONFIG_USB_MUSB_OTG) || defined(CONFIG_USB_MUSB_PERIPHERAL)
  75. /* for some reason, the "select USB_GADGET_MUSB_HDRC" doesn't always
  76. * override that choice selection (often USB_GADGET_DUMMY_HCD).
  77. */
  78. #ifndef CONFIG_USB_GADGET_MUSB_HDRC
  79. #error bogus Kconfig output ... select CONFIG_USB_GADGET_MUSB_HDRC
  80. #endif
  81. #endif /* need MUSB gadget selection */
  82. #ifndef CONFIG_HAVE_CLK
  83. /* Dummy stub for clk framework */
  84. #define clk_get(dev, id) NULL
  85. #define clk_put(clock) do {} while (0)
  86. #define clk_enable(clock) do {} while (0)
  87. #define clk_disable(clock) do {} while (0)
  88. #endif
  89. #ifdef CONFIG_PROC_FS
  90. #include <linux/fs.h>
  91. #define MUSB_CONFIG_PROC_FS
  92. #endif
  93. /****************************** PERIPHERAL ROLE *****************************/
  94. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  95. #define is_peripheral_capable() (1)
  96. extern irqreturn_t musb_g_ep0_irq(struct musb *);
  97. extern void musb_g_tx(struct musb *, u8);
  98. extern void musb_g_rx(struct musb *, u8);
  99. extern void musb_g_reset(struct musb *);
  100. extern void musb_g_suspend(struct musb *);
  101. extern void musb_g_resume(struct musb *);
  102. extern void musb_g_wakeup(struct musb *);
  103. extern void musb_g_disconnect(struct musb *);
  104. #else
  105. #define is_peripheral_capable() (0)
  106. static inline irqreturn_t musb_g_ep0_irq(struct musb *m) { return IRQ_NONE; }
  107. static inline void musb_g_reset(struct musb *m) {}
  108. static inline void musb_g_suspend(struct musb *m) {}
  109. static inline void musb_g_resume(struct musb *m) {}
  110. static inline void musb_g_wakeup(struct musb *m) {}
  111. static inline void musb_g_disconnect(struct musb *m) {}
  112. #endif
  113. /****************************** HOST ROLE ***********************************/
  114. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  115. #define is_host_capable() (1)
  116. extern irqreturn_t musb_h_ep0_irq(struct musb *);
  117. extern void musb_host_tx(struct musb *, u8);
  118. extern void musb_host_rx(struct musb *, u8);
  119. #else
  120. #define is_host_capable() (0)
  121. static inline irqreturn_t musb_h_ep0_irq(struct musb *m) { return IRQ_NONE; }
  122. static inline void musb_host_tx(struct musb *m, u8 e) {}
  123. static inline void musb_host_rx(struct musb *m, u8 e) {}
  124. #endif
  125. /****************************** CONSTANTS ********************************/
  126. #ifndef MUSB_C_NUM_EPS
  127. #define MUSB_C_NUM_EPS ((u8)16)
  128. #endif
  129. #ifndef MUSB_MAX_END0_PACKET
  130. #define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
  131. #endif
  132. /* host side ep0 states */
  133. enum musb_h_ep0_state {
  134. MUSB_EP0_IDLE,
  135. MUSB_EP0_START, /* expect ack of setup */
  136. MUSB_EP0_IN, /* expect IN DATA */
  137. MUSB_EP0_OUT, /* expect ack of OUT DATA */
  138. MUSB_EP0_STATUS, /* expect ack of STATUS */
  139. } __attribute__ ((packed));
  140. /* peripheral side ep0 states */
  141. enum musb_g_ep0_state {
  142. MUSB_EP0_STAGE_IDLE, /* idle, waiting for SETUP */
  143. MUSB_EP0_STAGE_SETUP, /* received SETUP */
  144. MUSB_EP0_STAGE_TX, /* IN data */
  145. MUSB_EP0_STAGE_RX, /* OUT data */
  146. MUSB_EP0_STAGE_STATUSIN, /* (after OUT data) */
  147. MUSB_EP0_STAGE_STATUSOUT, /* (after IN data) */
  148. MUSB_EP0_STAGE_ACKWAIT, /* after zlp, before statusin */
  149. } __attribute__ ((packed));
  150. /*
  151. * OTG protocol constants. See USB OTG 1.3 spec,
  152. * sections 5.5 "Device Timings" and 6.6.5 "Timers".
  153. */
  154. #define OTG_TIME_A_WAIT_VRISE 100 /* msec (max) */
  155. #define OTG_TIME_A_WAIT_BCON 1100 /* min 1 second */
  156. #define OTG_TIME_A_AIDL_BDIS 200 /* min 200 msec */
  157. #define OTG_TIME_B_ASE0_BRST 100 /* min 3.125 ms */
  158. /*************************** REGISTER ACCESS ********************************/
  159. /* Endpoint registers (other than dynfifo setup) can be accessed either
  160. * directly with the "flat" model, or after setting up an index register.
  161. */
  162. #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \
  163. || defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN)
  164. /* REVISIT indexed access seemed to
  165. * misbehave (on DaVinci) for at least peripheral IN ...
  166. */
  167. #define MUSB_FLAT_REG
  168. #endif
  169. /* TUSB mapping: "flat" plus ep0 special cases */
  170. #if defined(CONFIG_USB_TUSB6010)
  171. #define musb_ep_select(_mbase, _epnum) \
  172. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  173. #define MUSB_EP_OFFSET MUSB_TUSB_OFFSET
  174. /* "flat" mapping: each endpoint has its own i/o address */
  175. #elif defined(MUSB_FLAT_REG)
  176. #define musb_ep_select(_mbase, _epnum) (((void)(_mbase)), ((void)(_epnum)))
  177. #define MUSB_EP_OFFSET MUSB_FLAT_OFFSET
  178. /* "indexed" mapping: INDEX register controls register bank select */
  179. #else
  180. #define musb_ep_select(_mbase, _epnum) \
  181. musb_writeb((_mbase), MUSB_INDEX, (_epnum))
  182. #define MUSB_EP_OFFSET MUSB_INDEXED_OFFSET
  183. #endif
  184. /****************************** FUNCTIONS ********************************/
  185. #define MUSB_HST_MODE(_musb)\
  186. { (_musb)->is_host = true; }
  187. #define MUSB_DEV_MODE(_musb) \
  188. { (_musb)->is_host = false; }
  189. #define test_devctl_hst_mode(_x) \
  190. (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
  191. #define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
  192. /******************************** TYPES *************************************/
  193. /*
  194. * struct musb_hw_ep - endpoint hardware (bidirectional)
  195. *
  196. * Ordered slightly for better cacheline locality.
  197. */
  198. struct musb_hw_ep {
  199. struct musb *musb;
  200. void __iomem *fifo;
  201. void __iomem *regs;
  202. #ifdef CONFIG_USB_TUSB6010
  203. void __iomem *conf;
  204. #endif
  205. /* index in musb->endpoints[] */
  206. u8 epnum;
  207. /* hardware configuration, possibly dynamic */
  208. bool is_shared_fifo;
  209. bool tx_double_buffered;
  210. bool rx_double_buffered;
  211. u16 max_packet_sz_tx;
  212. u16 max_packet_sz_rx;
  213. struct dma_channel *tx_channel;
  214. struct dma_channel *rx_channel;
  215. #ifdef CONFIG_USB_TUSB6010
  216. /* TUSB has "asynchronous" and "synchronous" dma modes */
  217. dma_addr_t fifo_async;
  218. dma_addr_t fifo_sync;
  219. void __iomem *fifo_sync_va;
  220. #endif
  221. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  222. void __iomem *target_regs;
  223. /* currently scheduled peripheral endpoint */
  224. struct musb_qh *in_qh;
  225. struct musb_qh *out_qh;
  226. u8 rx_reinit;
  227. u8 tx_reinit;
  228. #endif
  229. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  230. /* peripheral side */
  231. struct musb_ep ep_in; /* TX */
  232. struct musb_ep ep_out; /* RX */
  233. #endif
  234. };
  235. static inline struct usb_request *next_in_request(struct musb_hw_ep *hw_ep)
  236. {
  237. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  238. return next_request(&hw_ep->ep_in);
  239. #else
  240. return NULL;
  241. #endif
  242. }
  243. static inline struct usb_request *next_out_request(struct musb_hw_ep *hw_ep)
  244. {
  245. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  246. return next_request(&hw_ep->ep_out);
  247. #else
  248. return NULL;
  249. #endif
  250. }
  251. /*
  252. * struct musb - Driver instance data.
  253. */
  254. struct musb {
  255. /* device lock */
  256. spinlock_t lock;
  257. struct clk *clock;
  258. irqreturn_t (*isr)(int, void *);
  259. struct work_struct irq_work;
  260. #define MUSB_HWVERS_MAJOR(x) ((x >> 10) & 0x1f)
  261. #define MUSB_HWVERS_MINOR(x) (x & 0x3ff)
  262. #define MUSB_HWVERS_RC 0x8000
  263. #define MUSB_HWVERS_1300 0x52C
  264. #define MUSB_HWVERS_1400 0x590
  265. #define MUSB_HWVERS_1800 0x720
  266. #define MUSB_HWVERS_2000 0x800
  267. u16 hwvers;
  268. /* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
  269. #define MUSB_PORT_STAT_RESUME (1 << 31)
  270. u32 port1_status;
  271. #ifdef CONFIG_USB_MUSB_HDRC_HCD
  272. unsigned long rh_timer;
  273. enum musb_h_ep0_state ep0_stage;
  274. /* bulk traffic normally dedicates endpoint hardware, and each
  275. * direction has its own ring of host side endpoints.
  276. * we try to progress the transfer at the head of each endpoint's
  277. * queue until it completes or NAKs too much; then we try the next
  278. * endpoint.
  279. */
  280. struct musb_hw_ep *bulk_ep;
  281. struct list_head control; /* of musb_qh */
  282. struct list_head in_bulk; /* of musb_qh */
  283. struct list_head out_bulk; /* of musb_qh */
  284. struct timer_list otg_timer;
  285. #endif
  286. /* called with IRQs blocked; ON/nonzero implies starting a session,
  287. * and waiting at least a_wait_vrise_tmout.
  288. */
  289. void (*board_set_vbus)(struct musb *, int is_on);
  290. struct dma_controller *dma_controller;
  291. struct device *controller;
  292. void __iomem *ctrl_base;
  293. void __iomem *mregs;
  294. #ifdef CONFIG_USB_TUSB6010
  295. dma_addr_t async;
  296. dma_addr_t sync;
  297. void __iomem *sync_va;
  298. #endif
  299. /* passed down from chip/board specific irq handlers */
  300. u8 int_usb;
  301. u16 int_rx;
  302. u16 int_tx;
  303. struct otg_transceiver *xceiv;
  304. int nIrq;
  305. unsigned irq_wake:1;
  306. struct musb_hw_ep endpoints[MUSB_C_NUM_EPS];
  307. #define control_ep endpoints
  308. #define VBUSERR_RETRY_COUNT 3
  309. u16 vbuserr_retry;
  310. u16 epmask;
  311. u8 nr_endpoints;
  312. u8 board_mode; /* enum musb_mode */
  313. int (*board_set_power)(int state);
  314. int (*set_clock)(struct clk *clk, int is_active);
  315. u8 min_power; /* vbus for periph, in mA/2 */
  316. bool is_host;
  317. int a_wait_bcon; /* VBUS timeout in msecs */
  318. unsigned long idle_timeout; /* Next timeout in jiffies */
  319. /* active means connected and not suspended */
  320. unsigned is_active:1;
  321. unsigned is_multipoint:1;
  322. unsigned ignore_disconnect:1; /* during bus resets */
  323. unsigned hb_iso_rx:1; /* high bandwidth iso rx? */
  324. unsigned hb_iso_tx:1; /* high bandwidth iso tx? */
  325. #ifdef C_MP_TX
  326. unsigned bulk_split:1;
  327. #define can_bulk_split(musb,type) \
  328. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
  329. #else
  330. #define can_bulk_split(musb, type) 0
  331. #endif
  332. #ifdef C_MP_RX
  333. unsigned bulk_combine:1;
  334. #define can_bulk_combine(musb,type) \
  335. (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
  336. #else
  337. #define can_bulk_combine(musb, type) 0
  338. #endif
  339. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  340. /* is_suspended means USB B_PERIPHERAL suspend */
  341. unsigned is_suspended:1;
  342. /* may_wakeup means remote wakeup is enabled */
  343. unsigned may_wakeup:1;
  344. /* is_self_powered is reported in device status and the
  345. * config descriptor. is_bus_powered means B_PERIPHERAL
  346. * draws some VBUS current; both can be true.
  347. */
  348. unsigned is_self_powered:1;
  349. unsigned is_bus_powered:1;
  350. unsigned set_address:1;
  351. unsigned test_mode:1;
  352. unsigned softconnect:1;
  353. u8 address;
  354. u8 test_mode_nr;
  355. u16 ackpend; /* ep0 */
  356. enum musb_g_ep0_state ep0_state;
  357. struct usb_gadget g; /* the gadget */
  358. struct usb_gadget_driver *gadget_driver; /* its driver */
  359. #endif
  360. struct musb_hdrc_config *config;
  361. #ifdef MUSB_CONFIG_PROC_FS
  362. struct proc_dir_entry *proc_entry;
  363. #endif
  364. };
  365. static inline void musb_set_vbus(struct musb *musb, int is_on)
  366. {
  367. musb->board_set_vbus(musb, is_on);
  368. }
  369. #ifdef CONFIG_USB_GADGET_MUSB_HDRC
  370. static inline struct musb *gadget_to_musb(struct usb_gadget *g)
  371. {
  372. return container_of(g, struct musb, g);
  373. }
  374. #endif
  375. #ifdef CONFIG_BLACKFIN
  376. static inline int musb_read_fifosize(struct musb *musb,
  377. struct musb_hw_ep *hw_ep, u8 epnum)
  378. {
  379. musb->nr_endpoints++;
  380. musb->epmask |= (1 << epnum);
  381. if (epnum < 5) {
  382. hw_ep->max_packet_sz_tx = 128;
  383. hw_ep->max_packet_sz_rx = 128;
  384. } else {
  385. hw_ep->max_packet_sz_tx = 1024;
  386. hw_ep->max_packet_sz_rx = 1024;
  387. }
  388. hw_ep->is_shared_fifo = false;
  389. return 0;
  390. }
  391. static inline void musb_configure_ep0(struct musb *musb)
  392. {
  393. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  394. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  395. musb->endpoints[0].is_shared_fifo = true;
  396. }
  397. #else
  398. static inline int musb_read_fifosize(struct musb *musb,
  399. struct musb_hw_ep *hw_ep, u8 epnum)
  400. {
  401. void *mbase = musb->mregs;
  402. u8 reg = 0;
  403. /* read from core using indexed model */
  404. reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
  405. /* 0's returned when no more endpoints */
  406. if (!reg)
  407. return -ENODEV;
  408. musb->nr_endpoints++;
  409. musb->epmask |= (1 << epnum);
  410. hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
  411. /* shared TX/RX FIFO? */
  412. if ((reg & 0xf0) == 0xf0) {
  413. hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
  414. hw_ep->is_shared_fifo = true;
  415. return 0;
  416. } else {
  417. hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
  418. hw_ep->is_shared_fifo = false;
  419. }
  420. return 0;
  421. }
  422. static inline void musb_configure_ep0(struct musb *musb)
  423. {
  424. musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
  425. musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
  426. musb->endpoints[0].is_shared_fifo = true;
  427. }
  428. #endif /* CONFIG_BLACKFIN */
  429. /***************************** Glue it together *****************************/
  430. extern const char musb_driver_name[];
  431. extern void musb_start(struct musb *musb);
  432. extern void musb_stop(struct musb *musb);
  433. extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
  434. extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
  435. extern void musb_load_testpacket(struct musb *);
  436. extern irqreturn_t musb_interrupt(struct musb *);
  437. extern void musb_platform_enable(struct musb *musb);
  438. extern void musb_platform_disable(struct musb *musb);
  439. extern void musb_hnp_stop(struct musb *musb);
  440. extern int musb_platform_set_mode(struct musb *musb, u8 musb_mode);
  441. #if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN) || \
  442. defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
  443. extern void musb_platform_try_idle(struct musb *musb, unsigned long timeout);
  444. #else
  445. #define musb_platform_try_idle(x, y) do {} while (0)
  446. #endif
  447. #if defined(CONFIG_USB_TUSB6010) || defined(CONFIG_BLACKFIN)
  448. extern int musb_platform_get_vbus_status(struct musb *musb);
  449. #else
  450. #define musb_platform_get_vbus_status(x) 0
  451. #endif
  452. extern int __init musb_platform_init(struct musb *musb);
  453. extern int musb_platform_exit(struct musb *musb);
  454. #endif /* __MUSB_CORE_H__ */