fhci-tds.c 16 KB

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  1. /*
  2. * Freescale QUICC Engine USB Host Controller Driver
  3. *
  4. * Copyright (c) Freescale Semicondutor, Inc. 2006.
  5. * Shlomi Gridish <gridish@freescale.com>
  6. * Jerry Huang <Chang-Ming.Huang@freescale.com>
  7. * Copyright (c) Logic Product Development, Inc. 2007
  8. * Peter Barada <peterb@logicpd.com>
  9. * Copyright (c) MontaVista Software, Inc. 2008.
  10. * Anton Vorontsov <avorontsov@ru.mvista.com>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. */
  17. #include <linux/kernel.h>
  18. #include <linux/types.h>
  19. #include <linux/errno.h>
  20. #include <linux/list.h>
  21. #include <linux/io.h>
  22. #include <linux/usb.h>
  23. #include "../core/hcd.h"
  24. #include "fhci.h"
  25. #define DUMMY_BD_BUFFER 0xdeadbeef
  26. #define DUMMY2_BD_BUFFER 0xbaadf00d
  27. /* Transaction Descriptors bits */
  28. #define TD_R 0x8000 /* ready bit */
  29. #define TD_W 0x2000 /* wrap bit */
  30. #define TD_I 0x1000 /* interrupt on completion */
  31. #define TD_L 0x0800 /* last */
  32. #define TD_TC 0x0400 /* transmit CRC */
  33. #define TD_CNF 0x0200 /* CNF - Must be always 1 */
  34. #define TD_LSP 0x0100 /* Low-speed transaction */
  35. #define TD_PID 0x00c0 /* packet id */
  36. #define TD_RXER 0x0020 /* Rx error or not */
  37. #define TD_NAK 0x0010 /* No ack. */
  38. #define TD_STAL 0x0008 /* Stall recieved */
  39. #define TD_TO 0x0004 /* time out */
  40. #define TD_UN 0x0002 /* underrun */
  41. #define TD_NO 0x0010 /* Rx Non Octet Aligned Packet */
  42. #define TD_AB 0x0008 /* Frame Aborted */
  43. #define TD_CR 0x0004 /* CRC Error */
  44. #define TD_OV 0x0002 /* Overrun */
  45. #define TD_BOV 0x0001 /* Buffer Overrun */
  46. #define TD_ERRORS (TD_NAK | TD_STAL | TD_TO | TD_UN | \
  47. TD_NO | TD_AB | TD_CR | TD_OV | TD_BOV)
  48. #define TD_PID_DATA0 0x0080 /* Data 0 toggle */
  49. #define TD_PID_DATA1 0x00c0 /* Data 1 toggle */
  50. #define TD_PID_TOGGLE 0x00c0 /* Data 0/1 toggle mask */
  51. #define TD_TOK_SETUP 0x0000
  52. #define TD_TOK_OUT 0x4000
  53. #define TD_TOK_IN 0x8000
  54. #define TD_ISO 0x1000
  55. #define TD_ENDP 0x0780
  56. #define TD_ADDR 0x007f
  57. #define TD_ENDP_SHIFT 7
  58. struct usb_td {
  59. __be16 status;
  60. __be16 length;
  61. __be32 buf_ptr;
  62. __be16 extra;
  63. __be16 reserved;
  64. };
  65. static struct usb_td __iomem *next_bd(struct usb_td __iomem *base,
  66. struct usb_td __iomem *td,
  67. u16 status)
  68. {
  69. if (status & TD_W)
  70. return base;
  71. else
  72. return ++td;
  73. }
  74. void fhci_push_dummy_bd(struct endpoint *ep)
  75. {
  76. if (ep->already_pushed_dummy_bd == false) {
  77. u16 td_status = in_be16(&ep->empty_td->status);
  78. out_be32(&ep->empty_td->buf_ptr, DUMMY_BD_BUFFER);
  79. /* get the next TD in the ring */
  80. ep->empty_td = next_bd(ep->td_base, ep->empty_td, td_status);
  81. ep->already_pushed_dummy_bd = true;
  82. }
  83. }
  84. /* destroy an USB endpoint */
  85. void fhci_ep0_free(struct fhci_usb *usb)
  86. {
  87. struct endpoint *ep;
  88. int size;
  89. ep = usb->ep0;
  90. if (ep) {
  91. if (ep->td_base)
  92. cpm_muram_free(cpm_muram_offset(ep->td_base));
  93. if (ep->conf_frame_Q) {
  94. size = cq_howmany(&ep->conf_frame_Q);
  95. for (; size; size--) {
  96. struct packet *pkt = cq_get(&ep->conf_frame_Q);
  97. kfree(pkt);
  98. }
  99. cq_delete(&ep->conf_frame_Q);
  100. }
  101. if (ep->empty_frame_Q) {
  102. size = cq_howmany(&ep->empty_frame_Q);
  103. for (; size; size--) {
  104. struct packet *pkt = cq_get(&ep->empty_frame_Q);
  105. kfree(pkt);
  106. }
  107. cq_delete(&ep->empty_frame_Q);
  108. }
  109. if (ep->dummy_packets_Q) {
  110. size = cq_howmany(&ep->dummy_packets_Q);
  111. for (; size; size--) {
  112. u8 *buff = cq_get(&ep->dummy_packets_Q);
  113. kfree(buff);
  114. }
  115. cq_delete(&ep->dummy_packets_Q);
  116. }
  117. kfree(ep);
  118. usb->ep0 = NULL;
  119. }
  120. }
  121. /*
  122. * create the endpoint structure
  123. *
  124. * arguments:
  125. * usb A pointer to the data structure of the USB
  126. * data_mem The data memory partition(BUS)
  127. * ring_len TD ring length
  128. */
  129. u32 fhci_create_ep(struct fhci_usb *usb, enum fhci_mem_alloc data_mem,
  130. u32 ring_len)
  131. {
  132. struct endpoint *ep;
  133. struct usb_td __iomem *td;
  134. unsigned long ep_offset;
  135. char *err_for = "enpoint PRAM";
  136. int ep_mem_size;
  137. u32 i;
  138. /* we need at least 3 TDs in the ring */
  139. if (!(ring_len > 2)) {
  140. fhci_err(usb->fhci, "illegal TD ring length parameters\n");
  141. return -EINVAL;
  142. }
  143. ep = kzalloc(sizeof(*ep), GFP_KERNEL);
  144. if (!ep)
  145. return -ENOMEM;
  146. ep_mem_size = ring_len * sizeof(*td) + sizeof(struct fhci_ep_pram);
  147. ep_offset = cpm_muram_alloc(ep_mem_size, 32);
  148. if (IS_ERR_VALUE(ep_offset))
  149. goto err;
  150. ep->td_base = cpm_muram_addr(ep_offset);
  151. /* zero all queue pointers */
  152. if (cq_new(&ep->conf_frame_Q, ring_len + 2) ||
  153. cq_new(&ep->empty_frame_Q, ring_len + 2) ||
  154. cq_new(&ep->dummy_packets_Q, ring_len + 2)) {
  155. err_for = "frame_queues";
  156. goto err;
  157. }
  158. for (i = 0; i < (ring_len + 1); i++) {
  159. struct packet *pkt;
  160. u8 *buff;
  161. pkt = kmalloc(sizeof(*pkt), GFP_KERNEL);
  162. if (!pkt) {
  163. err_for = "frame";
  164. goto err;
  165. }
  166. buff = kmalloc(1028 * sizeof(*buff), GFP_KERNEL);
  167. if (!buff) {
  168. kfree(pkt);
  169. err_for = "buffer";
  170. goto err;
  171. }
  172. cq_put(&ep->empty_frame_Q, pkt);
  173. cq_put(&ep->dummy_packets_Q, buff);
  174. }
  175. /* we put the endpoint parameter RAM right behind the TD ring */
  176. ep->ep_pram_ptr = (void __iomem *)ep->td_base + sizeof(*td) * ring_len;
  177. ep->conf_td = ep->td_base;
  178. ep->empty_td = ep->td_base;
  179. ep->already_pushed_dummy_bd = false;
  180. /* initialize tds */
  181. td = ep->td_base;
  182. for (i = 0; i < ring_len; i++) {
  183. out_be32(&td->buf_ptr, 0);
  184. out_be16(&td->status, 0);
  185. out_be16(&td->length, 0);
  186. out_be16(&td->extra, 0);
  187. td++;
  188. }
  189. td--;
  190. out_be16(&td->status, TD_W); /* for last TD set Wrap bit */
  191. out_be16(&td->length, 0);
  192. /* endpoint structure has been created */
  193. usb->ep0 = ep;
  194. return 0;
  195. err:
  196. fhci_ep0_free(usb);
  197. kfree(ep);
  198. fhci_err(usb->fhci, "no memory for the %s\n", err_for);
  199. return -ENOMEM;
  200. }
  201. /*
  202. * initialize the endpoint register according to the given parameters
  203. *
  204. * artuments:
  205. * usb A pointer to the data strucutre of the USB
  206. * ep A pointer to the endpoint structre
  207. * data_mem The data memory partition(BUS)
  208. */
  209. void fhci_init_ep_registers(struct fhci_usb *usb, struct endpoint *ep,
  210. enum fhci_mem_alloc data_mem)
  211. {
  212. u8 rt;
  213. /* set the endpoint registers according to the endpoint */
  214. out_be16(&usb->fhci->regs->usb_ep[0],
  215. USB_TRANS_CTR | USB_EP_MF | USB_EP_RTE);
  216. out_be16(&usb->fhci->pram->ep_ptr[0],
  217. cpm_muram_offset(ep->ep_pram_ptr));
  218. rt = (BUS_MODE_BO_BE | BUS_MODE_GBL);
  219. #ifdef MULTI_DATA_BUS
  220. if (data_mem == MEM_SECONDARY)
  221. rt |= BUS_MODE_DTB;
  222. #endif
  223. out_8(&ep->ep_pram_ptr->rx_func_code, rt);
  224. out_8(&ep->ep_pram_ptr->tx_func_code, rt);
  225. out_be16(&ep->ep_pram_ptr->rx_buff_len, 1028);
  226. out_be16(&ep->ep_pram_ptr->rx_base, 0);
  227. out_be16(&ep->ep_pram_ptr->tx_base, cpm_muram_offset(ep->td_base));
  228. out_be16(&ep->ep_pram_ptr->rx_bd_ptr, 0);
  229. out_be16(&ep->ep_pram_ptr->tx_bd_ptr, cpm_muram_offset(ep->td_base));
  230. out_be32(&ep->ep_pram_ptr->tx_state, 0);
  231. }
  232. /*
  233. * Collect the submitted frames and inform the application about them
  234. * It is also prepearing the TDs for new frames. If the Tx interrupts
  235. * are diabled, the application should call that routine to get
  236. * confirmation about the submitted frames. Otherwise, the routine is
  237. * called frome the interrupt service routine during the Tx interrupt.
  238. * In that case the application is informed by calling the application
  239. * specific 'fhci_transaction_confirm' routine
  240. */
  241. static void fhci_td_transaction_confirm(struct fhci_usb *usb)
  242. {
  243. struct endpoint *ep = usb->ep0;
  244. struct packet *pkt;
  245. struct usb_td __iomem *td;
  246. u16 extra_data;
  247. u16 td_status;
  248. u16 td_length;
  249. u32 buf;
  250. /*
  251. * collect transmitted BDs from the chip. The routine clears all BDs
  252. * with R bit = 0 and the pointer to data buffer is not NULL, that is
  253. * BDs which point to the transmitted data buffer
  254. */
  255. while (1) {
  256. td = ep->conf_td;
  257. td_status = in_be16(&td->status);
  258. td_length = in_be16(&td->length);
  259. buf = in_be32(&td->buf_ptr);
  260. extra_data = in_be16(&td->extra);
  261. /* check if the TD is empty */
  262. if (!(!(td_status & TD_R) && ((td_status & ~TD_W) || buf)))
  263. break;
  264. /* check if it is a dummy buffer */
  265. else if ((buf == DUMMY_BD_BUFFER) && !(td_status & ~TD_W))
  266. break;
  267. /* mark TD as empty */
  268. clrbits16(&td->status, ~TD_W);
  269. out_be16(&td->length, 0);
  270. out_be32(&td->buf_ptr, 0);
  271. out_be16(&td->extra, 0);
  272. /* advance the TD pointer */
  273. ep->conf_td = next_bd(ep->td_base, ep->conf_td, td_status);
  274. /* check if it is a dummy buffer(type2) */
  275. if ((buf == DUMMY2_BD_BUFFER) && !(td_status & ~TD_W))
  276. continue;
  277. pkt = cq_get(&ep->conf_frame_Q);
  278. if (!pkt)
  279. fhci_err(usb->fhci, "no frame to confirm\n");
  280. if (td_status & TD_ERRORS) {
  281. if (td_status & TD_RXER) {
  282. if (td_status & TD_CR)
  283. pkt->status = USB_TD_RX_ER_CRC;
  284. else if (td_status & TD_AB)
  285. pkt->status = USB_TD_RX_ER_BITSTUFF;
  286. else if (td_status & TD_OV)
  287. pkt->status = USB_TD_RX_ER_OVERUN;
  288. else if (td_status & TD_BOV)
  289. pkt->status = USB_TD_RX_DATA_OVERUN;
  290. else if (td_status & TD_NO)
  291. pkt->status = USB_TD_RX_ER_NONOCT;
  292. else
  293. fhci_err(usb->fhci, "illegal error "
  294. "occured\n");
  295. } else if (td_status & TD_NAK)
  296. pkt->status = USB_TD_TX_ER_NAK;
  297. else if (td_status & TD_TO)
  298. pkt->status = USB_TD_TX_ER_TIMEOUT;
  299. else if (td_status & TD_UN)
  300. pkt->status = USB_TD_TX_ER_UNDERUN;
  301. else if (td_status & TD_STAL)
  302. pkt->status = USB_TD_TX_ER_STALL;
  303. else
  304. fhci_err(usb->fhci, "illegal error occured\n");
  305. } else if ((extra_data & TD_TOK_IN) &&
  306. pkt->len > td_length - CRC_SIZE) {
  307. pkt->status = USB_TD_RX_DATA_UNDERUN;
  308. }
  309. if (extra_data & TD_TOK_IN)
  310. pkt->len = td_length - CRC_SIZE;
  311. else if (pkt->info & PKT_ZLP)
  312. pkt->len = 0;
  313. else
  314. pkt->len = td_length;
  315. fhci_transaction_confirm(usb, pkt);
  316. }
  317. }
  318. /*
  319. * Submitting a data frame to a specified endpoint of a USB device
  320. * The frame is put in the driver's transmit queue for this endpoint
  321. *
  322. * Arguments:
  323. * usb A pointer to the USB structure
  324. * pkt A pointer to the user frame structure
  325. * trans_type Transaction tyep - IN,OUT or SETUP
  326. * dest_addr Device address - 0~127
  327. * dest_ep Endpoint number of the device - 0~16
  328. * trans_mode Pipe type - ISO,Interrupt,bulk or control
  329. * dest_speed USB speed - Low speed or FULL speed
  330. * data_toggle Data sequence toggle - 0 or 1
  331. */
  332. u32 fhci_host_transaction(struct fhci_usb *usb,
  333. struct packet *pkt,
  334. enum fhci_ta_type trans_type,
  335. u8 dest_addr,
  336. u8 dest_ep,
  337. enum fhci_tf_mode trans_mode,
  338. enum fhci_speed dest_speed, u8 data_toggle)
  339. {
  340. struct endpoint *ep = usb->ep0;
  341. struct usb_td __iomem *td;
  342. u16 extra_data;
  343. u16 td_status;
  344. fhci_usb_disable_interrupt(usb);
  345. /* start from the next BD that should be filled */
  346. td = ep->empty_td;
  347. td_status = in_be16(&td->status);
  348. if (td_status & TD_R && in_be16(&td->length)) {
  349. /* if the TD is not free */
  350. fhci_usb_enable_interrupt(usb);
  351. return -1;
  352. }
  353. /* get the next TD in the ring */
  354. ep->empty_td = next_bd(ep->td_base, ep->empty_td, td_status);
  355. fhci_usb_enable_interrupt(usb);
  356. pkt->priv_data = td;
  357. out_be32(&td->buf_ptr, virt_to_phys(pkt->data));
  358. /* sets up transaction parameters - addr,endp,dir,and type */
  359. extra_data = (dest_ep << TD_ENDP_SHIFT) | dest_addr;
  360. switch (trans_type) {
  361. case FHCI_TA_IN:
  362. extra_data |= TD_TOK_IN;
  363. break;
  364. case FHCI_TA_OUT:
  365. extra_data |= TD_TOK_OUT;
  366. break;
  367. case FHCI_TA_SETUP:
  368. extra_data |= TD_TOK_SETUP;
  369. break;
  370. }
  371. if (trans_mode == FHCI_TF_ISO)
  372. extra_data |= TD_ISO;
  373. out_be16(&td->extra, extra_data);
  374. /* sets up the buffer descriptor */
  375. td_status = ((td_status & TD_W) | TD_R | TD_L | TD_I | TD_CNF);
  376. if (!(pkt->info & PKT_NO_CRC))
  377. td_status |= TD_TC;
  378. switch (trans_type) {
  379. case FHCI_TA_IN:
  380. if (data_toggle)
  381. pkt->info |= PKT_PID_DATA1;
  382. else
  383. pkt->info |= PKT_PID_DATA0;
  384. break;
  385. default:
  386. if (data_toggle) {
  387. td_status |= TD_PID_DATA1;
  388. pkt->info |= PKT_PID_DATA1;
  389. } else {
  390. td_status |= TD_PID_DATA0;
  391. pkt->info |= PKT_PID_DATA0;
  392. }
  393. break;
  394. }
  395. if ((dest_speed == FHCI_LOW_SPEED) &&
  396. (usb->port_status == FHCI_PORT_FULL))
  397. td_status |= TD_LSP;
  398. out_be16(&td->status, td_status);
  399. /* set up buffer length */
  400. if (trans_type == FHCI_TA_IN)
  401. out_be16(&td->length, pkt->len + CRC_SIZE);
  402. else
  403. out_be16(&td->length, pkt->len);
  404. /* put the frame to the confirmation queue */
  405. cq_put(&ep->conf_frame_Q, pkt);
  406. if (cq_howmany(&ep->conf_frame_Q) == 1)
  407. out_8(&usb->fhci->regs->usb_comm, USB_CMD_STR_FIFO);
  408. return 0;
  409. }
  410. /* Reset the Tx BD ring */
  411. void fhci_flush_bds(struct fhci_usb *usb)
  412. {
  413. u16 extra_data;
  414. u16 td_status;
  415. u32 buf;
  416. struct usb_td __iomem *td;
  417. struct endpoint *ep = usb->ep0;
  418. td = ep->td_base;
  419. while (1) {
  420. td_status = in_be16(&td->status);
  421. buf = in_be32(&td->buf_ptr);
  422. extra_data = in_be16(&td->extra);
  423. /* if the TD is not empty - we'll confirm it as Timeout */
  424. if (td_status & TD_R)
  425. out_be16(&td->status, (td_status & ~TD_R) | TD_TO);
  426. /* if this TD is dummy - let's skip this TD */
  427. else if (in_be32(&td->buf_ptr) == DUMMY_BD_BUFFER)
  428. out_be32(&td->buf_ptr, DUMMY2_BD_BUFFER);
  429. /* if this is the last TD - break */
  430. if (td_status & TD_W)
  431. break;
  432. td++;
  433. }
  434. fhci_td_transaction_confirm(usb);
  435. td = ep->td_base;
  436. do {
  437. out_be16(&td->status, 0);
  438. out_be16(&td->length, 0);
  439. out_be32(&td->buf_ptr, 0);
  440. out_be16(&td->extra, 0);
  441. td++;
  442. } while (!(in_be16(&td->status) & TD_W));
  443. out_be16(&td->status, TD_W); /* for last TD set Wrap bit */
  444. out_be16(&td->length, 0);
  445. out_be32(&td->buf_ptr, 0);
  446. out_be16(&td->extra, 0);
  447. out_be16(&ep->ep_pram_ptr->tx_bd_ptr,
  448. in_be16(&ep->ep_pram_ptr->tx_base));
  449. out_be32(&ep->ep_pram_ptr->tx_state, 0);
  450. out_be16(&ep->ep_pram_ptr->tx_cnt, 0);
  451. ep->empty_td = ep->td_base;
  452. ep->conf_td = ep->td_base;
  453. }
  454. /*
  455. * Flush all transmitted packets from TDs in the actual frame.
  456. * This routine is called when something wrong with the controller and
  457. * we want to get rid of the actual frame and start again next frame
  458. */
  459. void fhci_flush_actual_frame(struct fhci_usb *usb)
  460. {
  461. u8 mode;
  462. u16 tb_ptr;
  463. u16 extra_data;
  464. u16 td_status;
  465. u32 buf_ptr;
  466. struct usb_td __iomem *td;
  467. struct endpoint *ep = usb->ep0;
  468. /* disable the USB controller */
  469. mode = in_8(&usb->fhci->regs->usb_mod);
  470. out_8(&usb->fhci->regs->usb_mod, mode & ~USB_MODE_EN);
  471. tb_ptr = in_be16(&ep->ep_pram_ptr->tx_bd_ptr);
  472. td = cpm_muram_addr(tb_ptr);
  473. td_status = in_be16(&td->status);
  474. buf_ptr = in_be32(&td->buf_ptr);
  475. extra_data = in_be16(&td->extra);
  476. do {
  477. if (td_status & TD_R) {
  478. out_be16(&td->status, (td_status & ~TD_R) | TD_TO);
  479. } else {
  480. out_be32(&td->buf_ptr, 0);
  481. ep->already_pushed_dummy_bd = false;
  482. break;
  483. }
  484. /* advance the TD pointer */
  485. td = next_bd(ep->td_base, td, td_status);
  486. td_status = in_be16(&td->status);
  487. buf_ptr = in_be32(&td->buf_ptr);
  488. extra_data = in_be16(&td->extra);
  489. } while ((td_status & TD_R) || buf_ptr);
  490. fhci_td_transaction_confirm(usb);
  491. out_be16(&ep->ep_pram_ptr->tx_bd_ptr,
  492. in_be16(&ep->ep_pram_ptr->tx_base));
  493. out_be32(&ep->ep_pram_ptr->tx_state, 0);
  494. out_be16(&ep->ep_pram_ptr->tx_cnt, 0);
  495. ep->empty_td = ep->td_base;
  496. ep->conf_td = ep->td_base;
  497. usb->actual_frame->frame_status = FRAME_TIMER_END_TRANSMISSION;
  498. /* reset the event register */
  499. out_be16(&usb->fhci->regs->usb_event, 0xffff);
  500. /* enable the USB controller */
  501. out_8(&usb->fhci->regs->usb_mod, mode | USB_MODE_EN);
  502. }
  503. /* handles Tx confirm and Tx error interrupt */
  504. void fhci_tx_conf_interrupt(struct fhci_usb *usb)
  505. {
  506. fhci_td_transaction_confirm(usb);
  507. /*
  508. * Schedule another transaction to this frame only if we have
  509. * already confirmed all transaction in the frame.
  510. */
  511. if (((fhci_get_sof_timer_count(usb) < usb->max_frame_usage) ||
  512. (usb->actual_frame->frame_status & FRAME_END_TRANSMISSION)) &&
  513. (list_empty(&usb->actual_frame->tds_list)))
  514. fhci_schedule_transactions(usb);
  515. }
  516. void fhci_host_transmit_actual_frame(struct fhci_usb *usb)
  517. {
  518. u16 tb_ptr;
  519. u16 td_status;
  520. struct usb_td __iomem *td;
  521. struct endpoint *ep = usb->ep0;
  522. tb_ptr = in_be16(&ep->ep_pram_ptr->tx_bd_ptr);
  523. td = cpm_muram_addr(tb_ptr);
  524. if (in_be32(&td->buf_ptr) == DUMMY_BD_BUFFER) {
  525. struct usb_td __iomem *old_td = td;
  526. ep->already_pushed_dummy_bd = false;
  527. td_status = in_be16(&td->status);
  528. /* gets the next TD in the ring */
  529. td = next_bd(ep->td_base, td, td_status);
  530. tb_ptr = cpm_muram_offset(td);
  531. out_be16(&ep->ep_pram_ptr->tx_bd_ptr, tb_ptr);
  532. /* start transmit only if we have something in the TDs */
  533. if (in_be16(&td->status) & TD_R)
  534. out_8(&usb->fhci->regs->usb_comm, USB_CMD_STR_FIFO);
  535. if (in_be32(&ep->conf_td->buf_ptr) == DUMMY_BD_BUFFER) {
  536. out_be32(&old_td->buf_ptr, 0);
  537. ep->conf_td = next_bd(ep->td_base, ep->conf_td,
  538. td_status);
  539. } else {
  540. out_be32(&old_td->buf_ptr, DUMMY2_BD_BUFFER);
  541. }
  542. }
  543. }