sunsu.c 38 KB

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  1. /*
  2. * su.c: Small serial driver for keyboard/mouse interface on sparc32/PCI
  3. *
  4. * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be)
  5. * Copyright (C) 1998-1999 Pete Zaitcev (zaitcev@yahoo.com)
  6. *
  7. * This is mainly a variation of 8250.c, credits go to authors mentioned
  8. * therein. In fact this driver should be merged into the generic 8250.c
  9. * infrastructure perhaps using a 8250_sparc.c module.
  10. *
  11. * Fixed to use tty_get_baud_rate().
  12. * Theodore Ts'o <tytso@mit.edu>, 2001-Oct-12
  13. *
  14. * Converted to new 2.5.x UART layer.
  15. * David S. Miller (davem@davemloft.net), 2002-Jul-29
  16. */
  17. #include <linux/module.h>
  18. #include <linux/kernel.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/errno.h>
  21. #include <linux/tty.h>
  22. #include <linux/tty_flip.h>
  23. #include <linux/major.h>
  24. #include <linux/string.h>
  25. #include <linux/ptrace.h>
  26. #include <linux/ioport.h>
  27. #include <linux/circ_buf.h>
  28. #include <linux/serial.h>
  29. #include <linux/sysrq.h>
  30. #include <linux/console.h>
  31. #ifdef CONFIG_SERIO
  32. #include <linux/serio.h>
  33. #endif
  34. #include <linux/serial_reg.h>
  35. #include <linux/init.h>
  36. #include <linux/delay.h>
  37. #include <linux/of_device.h>
  38. #include <asm/io.h>
  39. #include <asm/irq.h>
  40. #include <asm/prom.h>
  41. #if defined(CONFIG_SERIAL_SUNSU_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  42. #define SUPPORT_SYSRQ
  43. #endif
  44. #include <linux/serial_core.h>
  45. #include "suncore.h"
  46. /* We are on a NS PC87303 clocked with 24.0 MHz, which results
  47. * in a UART clock of 1.8462 MHz.
  48. */
  49. #define SU_BASE_BAUD (1846200 / 16)
  50. enum su_type { SU_PORT_NONE, SU_PORT_MS, SU_PORT_KBD, SU_PORT_PORT };
  51. static char *su_typev[] = { "su(???)", "su(mouse)", "su(kbd)", "su(serial)" };
  52. /*
  53. * Here we define the default xmit fifo size used for each type of UART.
  54. */
  55. static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
  56. { "unknown", 1, 0 },
  57. { "8250", 1, 0 },
  58. { "16450", 1, 0 },
  59. { "16550", 1, 0 },
  60. { "16550A", 16, UART_CLEAR_FIFO | UART_USE_FIFO },
  61. { "Cirrus", 1, 0 },
  62. { "ST16650", 1, UART_CLEAR_FIFO | UART_STARTECH },
  63. { "ST16650V2", 32, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  64. { "TI16750", 64, UART_CLEAR_FIFO | UART_USE_FIFO },
  65. { "Startech", 1, 0 },
  66. { "16C950/954", 128, UART_CLEAR_FIFO | UART_USE_FIFO },
  67. { "ST16654", 64, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  68. { "XR16850", 128, UART_CLEAR_FIFO | UART_USE_FIFO | UART_STARTECH },
  69. { "RSA", 2048, UART_CLEAR_FIFO | UART_USE_FIFO }
  70. };
  71. struct uart_sunsu_port {
  72. struct uart_port port;
  73. unsigned char acr;
  74. unsigned char ier;
  75. unsigned short rev;
  76. unsigned char lcr;
  77. unsigned int lsr_break_flag;
  78. unsigned int cflag;
  79. /* Probing information. */
  80. enum su_type su_type;
  81. unsigned int type_probed; /* XXX Stupid */
  82. unsigned long reg_size;
  83. #ifdef CONFIG_SERIO
  84. struct serio serio;
  85. int serio_open;
  86. #endif
  87. };
  88. static unsigned int serial_in(struct uart_sunsu_port *up, int offset)
  89. {
  90. offset <<= up->port.regshift;
  91. switch (up->port.iotype) {
  92. case UPIO_HUB6:
  93. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  94. return inb(up->port.iobase + 1);
  95. case UPIO_MEM:
  96. return readb(up->port.membase + offset);
  97. default:
  98. return inb(up->port.iobase + offset);
  99. }
  100. }
  101. static void serial_out(struct uart_sunsu_port *up, int offset, int value)
  102. {
  103. #ifndef CONFIG_SPARC64
  104. /*
  105. * MrCoffee has weird schematics: IRQ4 & P10(?) pins of SuperIO are
  106. * connected with a gate then go to SlavIO. When IRQ4 goes tristated
  107. * gate outputs a logical one. Since we use level triggered interrupts
  108. * we have lockup and watchdog reset. We cannot mask IRQ because
  109. * keyboard shares IRQ with us (Word has it as Bob Smelik's design).
  110. * This problem is similar to what Alpha people suffer, see serial.c.
  111. */
  112. if (offset == UART_MCR)
  113. value |= UART_MCR_OUT2;
  114. #endif
  115. offset <<= up->port.regshift;
  116. switch (up->port.iotype) {
  117. case UPIO_HUB6:
  118. outb(up->port.hub6 - 1 + offset, up->port.iobase);
  119. outb(value, up->port.iobase + 1);
  120. break;
  121. case UPIO_MEM:
  122. writeb(value, up->port.membase + offset);
  123. break;
  124. default:
  125. outb(value, up->port.iobase + offset);
  126. }
  127. }
  128. /*
  129. * We used to support using pause I/O for certain machines. We
  130. * haven't supported this for a while, but just in case it's badly
  131. * needed for certain old 386 machines, I've left these #define's
  132. * in....
  133. */
  134. #define serial_inp(up, offset) serial_in(up, offset)
  135. #define serial_outp(up, offset, value) serial_out(up, offset, value)
  136. /*
  137. * For the 16C950
  138. */
  139. static void serial_icr_write(struct uart_sunsu_port *up, int offset, int value)
  140. {
  141. serial_out(up, UART_SCR, offset);
  142. serial_out(up, UART_ICR, value);
  143. }
  144. #if 0 /* Unused currently */
  145. static unsigned int serial_icr_read(struct uart_sunsu_port *up, int offset)
  146. {
  147. unsigned int value;
  148. serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
  149. serial_out(up, UART_SCR, offset);
  150. value = serial_in(up, UART_ICR);
  151. serial_icr_write(up, UART_ACR, up->acr);
  152. return value;
  153. }
  154. #endif
  155. #ifdef CONFIG_SERIAL_8250_RSA
  156. /*
  157. * Attempts to turn on the RSA FIFO. Returns zero on failure.
  158. * We set the port uart clock rate if we succeed.
  159. */
  160. static int __enable_rsa(struct uart_sunsu_port *up)
  161. {
  162. unsigned char mode;
  163. int result;
  164. mode = serial_inp(up, UART_RSA_MSR);
  165. result = mode & UART_RSA_MSR_FIFO;
  166. if (!result) {
  167. serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
  168. mode = serial_inp(up, UART_RSA_MSR);
  169. result = mode & UART_RSA_MSR_FIFO;
  170. }
  171. if (result)
  172. up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
  173. return result;
  174. }
  175. static void enable_rsa(struct uart_sunsu_port *up)
  176. {
  177. if (up->port.type == PORT_RSA) {
  178. if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
  179. spin_lock_irq(&up->port.lock);
  180. __enable_rsa(up);
  181. spin_unlock_irq(&up->port.lock);
  182. }
  183. if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
  184. serial_outp(up, UART_RSA_FRR, 0);
  185. }
  186. }
  187. /*
  188. * Attempts to turn off the RSA FIFO. Returns zero on failure.
  189. * It is unknown why interrupts were disabled in here. However,
  190. * the caller is expected to preserve this behaviour by grabbing
  191. * the spinlock before calling this function.
  192. */
  193. static void disable_rsa(struct uart_sunsu_port *up)
  194. {
  195. unsigned char mode;
  196. int result;
  197. if (up->port.type == PORT_RSA &&
  198. up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
  199. spin_lock_irq(&up->port.lock);
  200. mode = serial_inp(up, UART_RSA_MSR);
  201. result = !(mode & UART_RSA_MSR_FIFO);
  202. if (!result) {
  203. serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
  204. mode = serial_inp(up, UART_RSA_MSR);
  205. result = !(mode & UART_RSA_MSR_FIFO);
  206. }
  207. if (result)
  208. up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
  209. spin_unlock_irq(&up->port.lock);
  210. }
  211. }
  212. #endif /* CONFIG_SERIAL_8250_RSA */
  213. static inline void __stop_tx(struct uart_sunsu_port *p)
  214. {
  215. if (p->ier & UART_IER_THRI) {
  216. p->ier &= ~UART_IER_THRI;
  217. serial_out(p, UART_IER, p->ier);
  218. }
  219. }
  220. static void sunsu_stop_tx(struct uart_port *port)
  221. {
  222. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  223. __stop_tx(up);
  224. /*
  225. * We really want to stop the transmitter from sending.
  226. */
  227. if (up->port.type == PORT_16C950) {
  228. up->acr |= UART_ACR_TXDIS;
  229. serial_icr_write(up, UART_ACR, up->acr);
  230. }
  231. }
  232. static void sunsu_start_tx(struct uart_port *port)
  233. {
  234. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  235. if (!(up->ier & UART_IER_THRI)) {
  236. up->ier |= UART_IER_THRI;
  237. serial_out(up, UART_IER, up->ier);
  238. }
  239. /*
  240. * Re-enable the transmitter if we disabled it.
  241. */
  242. if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
  243. up->acr &= ~UART_ACR_TXDIS;
  244. serial_icr_write(up, UART_ACR, up->acr);
  245. }
  246. }
  247. static void sunsu_stop_rx(struct uart_port *port)
  248. {
  249. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  250. up->ier &= ~UART_IER_RLSI;
  251. up->port.read_status_mask &= ~UART_LSR_DR;
  252. serial_out(up, UART_IER, up->ier);
  253. }
  254. static void sunsu_enable_ms(struct uart_port *port)
  255. {
  256. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  257. unsigned long flags;
  258. spin_lock_irqsave(&up->port.lock, flags);
  259. up->ier |= UART_IER_MSI;
  260. serial_out(up, UART_IER, up->ier);
  261. spin_unlock_irqrestore(&up->port.lock, flags);
  262. }
  263. static struct tty_struct *
  264. receive_chars(struct uart_sunsu_port *up, unsigned char *status)
  265. {
  266. struct tty_struct *tty = up->port.state->port.tty;
  267. unsigned char ch, flag;
  268. int max_count = 256;
  269. int saw_console_brk = 0;
  270. do {
  271. ch = serial_inp(up, UART_RX);
  272. flag = TTY_NORMAL;
  273. up->port.icount.rx++;
  274. if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
  275. UART_LSR_FE | UART_LSR_OE))) {
  276. /*
  277. * For statistics only
  278. */
  279. if (*status & UART_LSR_BI) {
  280. *status &= ~(UART_LSR_FE | UART_LSR_PE);
  281. up->port.icount.brk++;
  282. if (up->port.cons != NULL &&
  283. up->port.line == up->port.cons->index)
  284. saw_console_brk = 1;
  285. /*
  286. * We do the SysRQ and SAK checking
  287. * here because otherwise the break
  288. * may get masked by ignore_status_mask
  289. * or read_status_mask.
  290. */
  291. if (uart_handle_break(&up->port))
  292. goto ignore_char;
  293. } else if (*status & UART_LSR_PE)
  294. up->port.icount.parity++;
  295. else if (*status & UART_LSR_FE)
  296. up->port.icount.frame++;
  297. if (*status & UART_LSR_OE)
  298. up->port.icount.overrun++;
  299. /*
  300. * Mask off conditions which should be ingored.
  301. */
  302. *status &= up->port.read_status_mask;
  303. if (up->port.cons != NULL &&
  304. up->port.line == up->port.cons->index) {
  305. /* Recover the break flag from console xmit */
  306. *status |= up->lsr_break_flag;
  307. up->lsr_break_flag = 0;
  308. }
  309. if (*status & UART_LSR_BI) {
  310. flag = TTY_BREAK;
  311. } else if (*status & UART_LSR_PE)
  312. flag = TTY_PARITY;
  313. else if (*status & UART_LSR_FE)
  314. flag = TTY_FRAME;
  315. }
  316. if (uart_handle_sysrq_char(&up->port, ch))
  317. goto ignore_char;
  318. if ((*status & up->port.ignore_status_mask) == 0)
  319. tty_insert_flip_char(tty, ch, flag);
  320. if (*status & UART_LSR_OE)
  321. /*
  322. * Overrun is special, since it's reported
  323. * immediately, and doesn't affect the current
  324. * character.
  325. */
  326. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  327. ignore_char:
  328. *status = serial_inp(up, UART_LSR);
  329. } while ((*status & UART_LSR_DR) && (max_count-- > 0));
  330. if (saw_console_brk)
  331. sun_do_break();
  332. return tty;
  333. }
  334. static void transmit_chars(struct uart_sunsu_port *up)
  335. {
  336. struct circ_buf *xmit = &up->port.state->xmit;
  337. int count;
  338. if (up->port.x_char) {
  339. serial_outp(up, UART_TX, up->port.x_char);
  340. up->port.icount.tx++;
  341. up->port.x_char = 0;
  342. return;
  343. }
  344. if (uart_tx_stopped(&up->port)) {
  345. sunsu_stop_tx(&up->port);
  346. return;
  347. }
  348. if (uart_circ_empty(xmit)) {
  349. __stop_tx(up);
  350. return;
  351. }
  352. count = up->port.fifosize;
  353. do {
  354. serial_out(up, UART_TX, xmit->buf[xmit->tail]);
  355. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  356. up->port.icount.tx++;
  357. if (uart_circ_empty(xmit))
  358. break;
  359. } while (--count > 0);
  360. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  361. uart_write_wakeup(&up->port);
  362. if (uart_circ_empty(xmit))
  363. __stop_tx(up);
  364. }
  365. static void check_modem_status(struct uart_sunsu_port *up)
  366. {
  367. int status;
  368. status = serial_in(up, UART_MSR);
  369. if ((status & UART_MSR_ANY_DELTA) == 0)
  370. return;
  371. if (status & UART_MSR_TERI)
  372. up->port.icount.rng++;
  373. if (status & UART_MSR_DDSR)
  374. up->port.icount.dsr++;
  375. if (status & UART_MSR_DDCD)
  376. uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
  377. if (status & UART_MSR_DCTS)
  378. uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
  379. wake_up_interruptible(&up->port.state->port.delta_msr_wait);
  380. }
  381. static irqreturn_t sunsu_serial_interrupt(int irq, void *dev_id)
  382. {
  383. struct uart_sunsu_port *up = dev_id;
  384. unsigned long flags;
  385. unsigned char status;
  386. spin_lock_irqsave(&up->port.lock, flags);
  387. do {
  388. struct tty_struct *tty;
  389. status = serial_inp(up, UART_LSR);
  390. tty = NULL;
  391. if (status & UART_LSR_DR)
  392. tty = receive_chars(up, &status);
  393. check_modem_status(up);
  394. if (status & UART_LSR_THRE)
  395. transmit_chars(up);
  396. spin_unlock_irqrestore(&up->port.lock, flags);
  397. if (tty)
  398. tty_flip_buffer_push(tty);
  399. spin_lock_irqsave(&up->port.lock, flags);
  400. } while (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT));
  401. spin_unlock_irqrestore(&up->port.lock, flags);
  402. return IRQ_HANDLED;
  403. }
  404. /* Separate interrupt handling path for keyboard/mouse ports. */
  405. static void
  406. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  407. unsigned int iflag, unsigned int quot);
  408. static void sunsu_change_mouse_baud(struct uart_sunsu_port *up)
  409. {
  410. unsigned int cur_cflag = up->cflag;
  411. int quot, new_baud;
  412. up->cflag &= ~CBAUD;
  413. up->cflag |= suncore_mouse_baud_cflag_next(cur_cflag, &new_baud);
  414. quot = up->port.uartclk / (16 * new_baud);
  415. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  416. }
  417. static void receive_kbd_ms_chars(struct uart_sunsu_port *up, int is_break)
  418. {
  419. do {
  420. unsigned char ch = serial_inp(up, UART_RX);
  421. /* Stop-A is handled by drivers/char/keyboard.c now. */
  422. if (up->su_type == SU_PORT_KBD) {
  423. #ifdef CONFIG_SERIO
  424. serio_interrupt(&up->serio, ch, 0);
  425. #endif
  426. } else if (up->su_type == SU_PORT_MS) {
  427. int ret = suncore_mouse_baud_detection(ch, is_break);
  428. switch (ret) {
  429. case 2:
  430. sunsu_change_mouse_baud(up);
  431. /* fallthru */
  432. case 1:
  433. break;
  434. case 0:
  435. #ifdef CONFIG_SERIO
  436. serio_interrupt(&up->serio, ch, 0);
  437. #endif
  438. break;
  439. };
  440. }
  441. } while (serial_in(up, UART_LSR) & UART_LSR_DR);
  442. }
  443. static irqreturn_t sunsu_kbd_ms_interrupt(int irq, void *dev_id)
  444. {
  445. struct uart_sunsu_port *up = dev_id;
  446. if (!(serial_in(up, UART_IIR) & UART_IIR_NO_INT)) {
  447. unsigned char status = serial_inp(up, UART_LSR);
  448. if ((status & UART_LSR_DR) || (status & UART_LSR_BI))
  449. receive_kbd_ms_chars(up, (status & UART_LSR_BI) != 0);
  450. }
  451. return IRQ_HANDLED;
  452. }
  453. static unsigned int sunsu_tx_empty(struct uart_port *port)
  454. {
  455. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  456. unsigned long flags;
  457. unsigned int ret;
  458. spin_lock_irqsave(&up->port.lock, flags);
  459. ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
  460. spin_unlock_irqrestore(&up->port.lock, flags);
  461. return ret;
  462. }
  463. static unsigned int sunsu_get_mctrl(struct uart_port *port)
  464. {
  465. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  466. unsigned char status;
  467. unsigned int ret;
  468. status = serial_in(up, UART_MSR);
  469. ret = 0;
  470. if (status & UART_MSR_DCD)
  471. ret |= TIOCM_CAR;
  472. if (status & UART_MSR_RI)
  473. ret |= TIOCM_RNG;
  474. if (status & UART_MSR_DSR)
  475. ret |= TIOCM_DSR;
  476. if (status & UART_MSR_CTS)
  477. ret |= TIOCM_CTS;
  478. return ret;
  479. }
  480. static void sunsu_set_mctrl(struct uart_port *port, unsigned int mctrl)
  481. {
  482. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  483. unsigned char mcr = 0;
  484. if (mctrl & TIOCM_RTS)
  485. mcr |= UART_MCR_RTS;
  486. if (mctrl & TIOCM_DTR)
  487. mcr |= UART_MCR_DTR;
  488. if (mctrl & TIOCM_OUT1)
  489. mcr |= UART_MCR_OUT1;
  490. if (mctrl & TIOCM_OUT2)
  491. mcr |= UART_MCR_OUT2;
  492. if (mctrl & TIOCM_LOOP)
  493. mcr |= UART_MCR_LOOP;
  494. serial_out(up, UART_MCR, mcr);
  495. }
  496. static void sunsu_break_ctl(struct uart_port *port, int break_state)
  497. {
  498. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  499. unsigned long flags;
  500. spin_lock_irqsave(&up->port.lock, flags);
  501. if (break_state == -1)
  502. up->lcr |= UART_LCR_SBC;
  503. else
  504. up->lcr &= ~UART_LCR_SBC;
  505. serial_out(up, UART_LCR, up->lcr);
  506. spin_unlock_irqrestore(&up->port.lock, flags);
  507. }
  508. static int sunsu_startup(struct uart_port *port)
  509. {
  510. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  511. unsigned long flags;
  512. int retval;
  513. if (up->port.type == PORT_16C950) {
  514. /* Wake up and initialize UART */
  515. up->acr = 0;
  516. serial_outp(up, UART_LCR, 0xBF);
  517. serial_outp(up, UART_EFR, UART_EFR_ECB);
  518. serial_outp(up, UART_IER, 0);
  519. serial_outp(up, UART_LCR, 0);
  520. serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
  521. serial_outp(up, UART_LCR, 0xBF);
  522. serial_outp(up, UART_EFR, UART_EFR_ECB);
  523. serial_outp(up, UART_LCR, 0);
  524. }
  525. #ifdef CONFIG_SERIAL_8250_RSA
  526. /*
  527. * If this is an RSA port, see if we can kick it up to the
  528. * higher speed clock.
  529. */
  530. enable_rsa(up);
  531. #endif
  532. /*
  533. * Clear the FIFO buffers and disable them.
  534. * (they will be reenabled in set_termios())
  535. */
  536. if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
  537. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  538. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  539. UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
  540. serial_outp(up, UART_FCR, 0);
  541. }
  542. /*
  543. * Clear the interrupt registers.
  544. */
  545. (void) serial_inp(up, UART_LSR);
  546. (void) serial_inp(up, UART_RX);
  547. (void) serial_inp(up, UART_IIR);
  548. (void) serial_inp(up, UART_MSR);
  549. /*
  550. * At this point, there's no way the LSR could still be 0xff;
  551. * if it is, then bail out, because there's likely no UART
  552. * here.
  553. */
  554. if (!(up->port.flags & UPF_BUGGY_UART) &&
  555. (serial_inp(up, UART_LSR) == 0xff)) {
  556. printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
  557. return -ENODEV;
  558. }
  559. if (up->su_type != SU_PORT_PORT) {
  560. retval = request_irq(up->port.irq, sunsu_kbd_ms_interrupt,
  561. IRQF_SHARED, su_typev[up->su_type], up);
  562. } else {
  563. retval = request_irq(up->port.irq, sunsu_serial_interrupt,
  564. IRQF_SHARED, su_typev[up->su_type], up);
  565. }
  566. if (retval) {
  567. printk("su: Cannot register IRQ %d\n", up->port.irq);
  568. return retval;
  569. }
  570. /*
  571. * Now, initialize the UART
  572. */
  573. serial_outp(up, UART_LCR, UART_LCR_WLEN8);
  574. spin_lock_irqsave(&up->port.lock, flags);
  575. up->port.mctrl |= TIOCM_OUT2;
  576. sunsu_set_mctrl(&up->port, up->port.mctrl);
  577. spin_unlock_irqrestore(&up->port.lock, flags);
  578. /*
  579. * Finally, enable interrupts. Note: Modem status interrupts
  580. * are set via set_termios(), which will be occurring imminently
  581. * anyway, so we don't enable them here.
  582. */
  583. up->ier = UART_IER_RLSI | UART_IER_RDI;
  584. serial_outp(up, UART_IER, up->ier);
  585. if (up->port.flags & UPF_FOURPORT) {
  586. unsigned int icp;
  587. /*
  588. * Enable interrupts on the AST Fourport board
  589. */
  590. icp = (up->port.iobase & 0xfe0) | 0x01f;
  591. outb_p(0x80, icp);
  592. (void) inb_p(icp);
  593. }
  594. /*
  595. * And clear the interrupt registers again for luck.
  596. */
  597. (void) serial_inp(up, UART_LSR);
  598. (void) serial_inp(up, UART_RX);
  599. (void) serial_inp(up, UART_IIR);
  600. (void) serial_inp(up, UART_MSR);
  601. return 0;
  602. }
  603. static void sunsu_shutdown(struct uart_port *port)
  604. {
  605. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  606. unsigned long flags;
  607. /*
  608. * Disable interrupts from this port
  609. */
  610. up->ier = 0;
  611. serial_outp(up, UART_IER, 0);
  612. spin_lock_irqsave(&up->port.lock, flags);
  613. if (up->port.flags & UPF_FOURPORT) {
  614. /* reset interrupts on the AST Fourport board */
  615. inb((up->port.iobase & 0xfe0) | 0x1f);
  616. up->port.mctrl |= TIOCM_OUT1;
  617. } else
  618. up->port.mctrl &= ~TIOCM_OUT2;
  619. sunsu_set_mctrl(&up->port, up->port.mctrl);
  620. spin_unlock_irqrestore(&up->port.lock, flags);
  621. /*
  622. * Disable break condition and FIFOs
  623. */
  624. serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
  625. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
  626. UART_FCR_CLEAR_RCVR |
  627. UART_FCR_CLEAR_XMIT);
  628. serial_outp(up, UART_FCR, 0);
  629. #ifdef CONFIG_SERIAL_8250_RSA
  630. /*
  631. * Reset the RSA board back to 115kbps compat mode.
  632. */
  633. disable_rsa(up);
  634. #endif
  635. /*
  636. * Read data port to reset things.
  637. */
  638. (void) serial_in(up, UART_RX);
  639. free_irq(up->port.irq, up);
  640. }
  641. static void
  642. sunsu_change_speed(struct uart_port *port, unsigned int cflag,
  643. unsigned int iflag, unsigned int quot)
  644. {
  645. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  646. unsigned char cval, fcr = 0;
  647. unsigned long flags;
  648. switch (cflag & CSIZE) {
  649. case CS5:
  650. cval = 0x00;
  651. break;
  652. case CS6:
  653. cval = 0x01;
  654. break;
  655. case CS7:
  656. cval = 0x02;
  657. break;
  658. default:
  659. case CS8:
  660. cval = 0x03;
  661. break;
  662. }
  663. if (cflag & CSTOPB)
  664. cval |= 0x04;
  665. if (cflag & PARENB)
  666. cval |= UART_LCR_PARITY;
  667. if (!(cflag & PARODD))
  668. cval |= UART_LCR_EPAR;
  669. #ifdef CMSPAR
  670. if (cflag & CMSPAR)
  671. cval |= UART_LCR_SPAR;
  672. #endif
  673. /*
  674. * Work around a bug in the Oxford Semiconductor 952 rev B
  675. * chip which causes it to seriously miscalculate baud rates
  676. * when DLL is 0.
  677. */
  678. if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
  679. up->rev == 0x5201)
  680. quot ++;
  681. if (uart_config[up->port.type].flags & UART_USE_FIFO) {
  682. if ((up->port.uartclk / quot) < (2400 * 16))
  683. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
  684. #ifdef CONFIG_SERIAL_8250_RSA
  685. else if (up->port.type == PORT_RSA)
  686. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_14;
  687. #endif
  688. else
  689. fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_8;
  690. }
  691. if (up->port.type == PORT_16750)
  692. fcr |= UART_FCR7_64BYTE;
  693. /*
  694. * Ok, we're now changing the port state. Do it with
  695. * interrupts disabled.
  696. */
  697. spin_lock_irqsave(&up->port.lock, flags);
  698. /*
  699. * Update the per-port timeout.
  700. */
  701. uart_update_timeout(port, cflag, (port->uartclk / (16 * quot)));
  702. up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
  703. if (iflag & INPCK)
  704. up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
  705. if (iflag & (BRKINT | PARMRK))
  706. up->port.read_status_mask |= UART_LSR_BI;
  707. /*
  708. * Characteres to ignore
  709. */
  710. up->port.ignore_status_mask = 0;
  711. if (iflag & IGNPAR)
  712. up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
  713. if (iflag & IGNBRK) {
  714. up->port.ignore_status_mask |= UART_LSR_BI;
  715. /*
  716. * If we're ignoring parity and break indicators,
  717. * ignore overruns too (for real raw support).
  718. */
  719. if (iflag & IGNPAR)
  720. up->port.ignore_status_mask |= UART_LSR_OE;
  721. }
  722. /*
  723. * ignore all characters if CREAD is not set
  724. */
  725. if ((cflag & CREAD) == 0)
  726. up->port.ignore_status_mask |= UART_LSR_DR;
  727. /*
  728. * CTS flow control flag and modem status interrupts
  729. */
  730. up->ier &= ~UART_IER_MSI;
  731. if (UART_ENABLE_MS(&up->port, cflag))
  732. up->ier |= UART_IER_MSI;
  733. serial_out(up, UART_IER, up->ier);
  734. if (uart_config[up->port.type].flags & UART_STARTECH) {
  735. serial_outp(up, UART_LCR, 0xBF);
  736. serial_outp(up, UART_EFR, cflag & CRTSCTS ? UART_EFR_CTS :0);
  737. }
  738. serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
  739. serial_outp(up, UART_DLL, quot & 0xff); /* LS of divisor */
  740. serial_outp(up, UART_DLM, quot >> 8); /* MS of divisor */
  741. if (up->port.type == PORT_16750)
  742. serial_outp(up, UART_FCR, fcr); /* set fcr */
  743. serial_outp(up, UART_LCR, cval); /* reset DLAB */
  744. up->lcr = cval; /* Save LCR */
  745. if (up->port.type != PORT_16750) {
  746. if (fcr & UART_FCR_ENABLE_FIFO) {
  747. /* emulated UARTs (Lucent Venus 167x) need two steps */
  748. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  749. }
  750. serial_outp(up, UART_FCR, fcr); /* set fcr */
  751. }
  752. up->cflag = cflag;
  753. spin_unlock_irqrestore(&up->port.lock, flags);
  754. }
  755. static void
  756. sunsu_set_termios(struct uart_port *port, struct ktermios *termios,
  757. struct ktermios *old)
  758. {
  759. unsigned int baud, quot;
  760. /*
  761. * Ask the core to calculate the divisor for us.
  762. */
  763. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  764. quot = uart_get_divisor(port, baud);
  765. sunsu_change_speed(port, termios->c_cflag, termios->c_iflag, quot);
  766. }
  767. static void sunsu_release_port(struct uart_port *port)
  768. {
  769. }
  770. static int sunsu_request_port(struct uart_port *port)
  771. {
  772. return 0;
  773. }
  774. static void sunsu_config_port(struct uart_port *port, int flags)
  775. {
  776. struct uart_sunsu_port *up = (struct uart_sunsu_port *) port;
  777. if (flags & UART_CONFIG_TYPE) {
  778. /*
  779. * We are supposed to call autoconfig here, but this requires
  780. * splitting all the OBP probing crap from the UART probing.
  781. * We'll do it when we kill sunsu.c altogether.
  782. */
  783. port->type = up->type_probed; /* XXX */
  784. }
  785. }
  786. static int
  787. sunsu_verify_port(struct uart_port *port, struct serial_struct *ser)
  788. {
  789. return -EINVAL;
  790. }
  791. static const char *
  792. sunsu_type(struct uart_port *port)
  793. {
  794. int type = port->type;
  795. if (type >= ARRAY_SIZE(uart_config))
  796. type = 0;
  797. return uart_config[type].name;
  798. }
  799. static struct uart_ops sunsu_pops = {
  800. .tx_empty = sunsu_tx_empty,
  801. .set_mctrl = sunsu_set_mctrl,
  802. .get_mctrl = sunsu_get_mctrl,
  803. .stop_tx = sunsu_stop_tx,
  804. .start_tx = sunsu_start_tx,
  805. .stop_rx = sunsu_stop_rx,
  806. .enable_ms = sunsu_enable_ms,
  807. .break_ctl = sunsu_break_ctl,
  808. .startup = sunsu_startup,
  809. .shutdown = sunsu_shutdown,
  810. .set_termios = sunsu_set_termios,
  811. .type = sunsu_type,
  812. .release_port = sunsu_release_port,
  813. .request_port = sunsu_request_port,
  814. .config_port = sunsu_config_port,
  815. .verify_port = sunsu_verify_port,
  816. };
  817. #define UART_NR 4
  818. static struct uart_sunsu_port sunsu_ports[UART_NR];
  819. #ifdef CONFIG_SERIO
  820. static DEFINE_SPINLOCK(sunsu_serio_lock);
  821. static int sunsu_serio_write(struct serio *serio, unsigned char ch)
  822. {
  823. struct uart_sunsu_port *up = serio->port_data;
  824. unsigned long flags;
  825. int lsr;
  826. spin_lock_irqsave(&sunsu_serio_lock, flags);
  827. do {
  828. lsr = serial_in(up, UART_LSR);
  829. } while (!(lsr & UART_LSR_THRE));
  830. /* Send the character out. */
  831. serial_out(up, UART_TX, ch);
  832. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  833. return 0;
  834. }
  835. static int sunsu_serio_open(struct serio *serio)
  836. {
  837. struct uart_sunsu_port *up = serio->port_data;
  838. unsigned long flags;
  839. int ret;
  840. spin_lock_irqsave(&sunsu_serio_lock, flags);
  841. if (!up->serio_open) {
  842. up->serio_open = 1;
  843. ret = 0;
  844. } else
  845. ret = -EBUSY;
  846. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  847. return ret;
  848. }
  849. static void sunsu_serio_close(struct serio *serio)
  850. {
  851. struct uart_sunsu_port *up = serio->port_data;
  852. unsigned long flags;
  853. spin_lock_irqsave(&sunsu_serio_lock, flags);
  854. up->serio_open = 0;
  855. spin_unlock_irqrestore(&sunsu_serio_lock, flags);
  856. }
  857. #endif /* CONFIG_SERIO */
  858. static void sunsu_autoconfig(struct uart_sunsu_port *up)
  859. {
  860. unsigned char status1, status2, scratch, scratch2, scratch3;
  861. unsigned char save_lcr, save_mcr;
  862. unsigned long flags;
  863. if (up->su_type == SU_PORT_NONE)
  864. return;
  865. up->type_probed = PORT_UNKNOWN;
  866. up->port.iotype = UPIO_MEM;
  867. spin_lock_irqsave(&up->port.lock, flags);
  868. if (!(up->port.flags & UPF_BUGGY_UART)) {
  869. /*
  870. * Do a simple existence test first; if we fail this, there's
  871. * no point trying anything else.
  872. *
  873. * 0x80 is used as a nonsense port to prevent against false
  874. * positives due to ISA bus float. The assumption is that
  875. * 0x80 is a non-existent port; which should be safe since
  876. * include/asm/io.h also makes this assumption.
  877. */
  878. scratch = serial_inp(up, UART_IER);
  879. serial_outp(up, UART_IER, 0);
  880. #ifdef __i386__
  881. outb(0xff, 0x080);
  882. #endif
  883. scratch2 = serial_inp(up, UART_IER);
  884. serial_outp(up, UART_IER, 0x0f);
  885. #ifdef __i386__
  886. outb(0, 0x080);
  887. #endif
  888. scratch3 = serial_inp(up, UART_IER);
  889. serial_outp(up, UART_IER, scratch);
  890. if (scratch2 != 0 || scratch3 != 0x0F)
  891. goto out; /* We failed; there's nothing here */
  892. }
  893. save_mcr = serial_in(up, UART_MCR);
  894. save_lcr = serial_in(up, UART_LCR);
  895. /*
  896. * Check to see if a UART is really there. Certain broken
  897. * internal modems based on the Rockwell chipset fail this
  898. * test, because they apparently don't implement the loopback
  899. * test mode. So this test is skipped on the COM 1 through
  900. * COM 4 ports. This *should* be safe, since no board
  901. * manufacturer would be stupid enough to design a board
  902. * that conflicts with COM 1-4 --- we hope!
  903. */
  904. if (!(up->port.flags & UPF_SKIP_TEST)) {
  905. serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
  906. status1 = serial_inp(up, UART_MSR) & 0xF0;
  907. serial_outp(up, UART_MCR, save_mcr);
  908. if (status1 != 0x90)
  909. goto out; /* We failed loopback test */
  910. }
  911. serial_outp(up, UART_LCR, 0xBF); /* set up for StarTech test */
  912. serial_outp(up, UART_EFR, 0); /* EFR is the same as FCR */
  913. serial_outp(up, UART_LCR, 0);
  914. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  915. scratch = serial_in(up, UART_IIR) >> 6;
  916. switch (scratch) {
  917. case 0:
  918. up->port.type = PORT_16450;
  919. break;
  920. case 1:
  921. up->port.type = PORT_UNKNOWN;
  922. break;
  923. case 2:
  924. up->port.type = PORT_16550;
  925. break;
  926. case 3:
  927. up->port.type = PORT_16550A;
  928. break;
  929. }
  930. if (up->port.type == PORT_16550A) {
  931. /* Check for Startech UART's */
  932. serial_outp(up, UART_LCR, UART_LCR_DLAB);
  933. if (serial_in(up, UART_EFR) == 0) {
  934. up->port.type = PORT_16650;
  935. } else {
  936. serial_outp(up, UART_LCR, 0xBF);
  937. if (serial_in(up, UART_EFR) == 0)
  938. up->port.type = PORT_16650V2;
  939. }
  940. }
  941. if (up->port.type == PORT_16550A) {
  942. /* Check for TI 16750 */
  943. serial_outp(up, UART_LCR, save_lcr | UART_LCR_DLAB);
  944. serial_outp(up, UART_FCR,
  945. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  946. scratch = serial_in(up, UART_IIR) >> 5;
  947. if (scratch == 7) {
  948. /*
  949. * If this is a 16750, and not a cheap UART
  950. * clone, then it should only go into 64 byte
  951. * mode if the UART_FCR7_64BYTE bit was set
  952. * while UART_LCR_DLAB was latched.
  953. */
  954. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  955. serial_outp(up, UART_LCR, 0);
  956. serial_outp(up, UART_FCR,
  957. UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
  958. scratch = serial_in(up, UART_IIR) >> 5;
  959. if (scratch == 6)
  960. up->port.type = PORT_16750;
  961. }
  962. serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
  963. }
  964. serial_outp(up, UART_LCR, save_lcr);
  965. if (up->port.type == PORT_16450) {
  966. scratch = serial_in(up, UART_SCR);
  967. serial_outp(up, UART_SCR, 0xa5);
  968. status1 = serial_in(up, UART_SCR);
  969. serial_outp(up, UART_SCR, 0x5a);
  970. status2 = serial_in(up, UART_SCR);
  971. serial_outp(up, UART_SCR, scratch);
  972. if ((status1 != 0xa5) || (status2 != 0x5a))
  973. up->port.type = PORT_8250;
  974. }
  975. up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
  976. if (up->port.type == PORT_UNKNOWN)
  977. goto out;
  978. up->type_probed = up->port.type; /* XXX */
  979. /*
  980. * Reset the UART.
  981. */
  982. #ifdef CONFIG_SERIAL_8250_RSA
  983. if (up->port.type == PORT_RSA)
  984. serial_outp(up, UART_RSA_FRR, 0);
  985. #endif
  986. serial_outp(up, UART_MCR, save_mcr);
  987. serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
  988. UART_FCR_CLEAR_RCVR |
  989. UART_FCR_CLEAR_XMIT));
  990. serial_outp(up, UART_FCR, 0);
  991. (void)serial_in(up, UART_RX);
  992. serial_outp(up, UART_IER, 0);
  993. out:
  994. spin_unlock_irqrestore(&up->port.lock, flags);
  995. }
  996. static struct uart_driver sunsu_reg = {
  997. .owner = THIS_MODULE,
  998. .driver_name = "sunsu",
  999. .dev_name = "ttyS",
  1000. .major = TTY_MAJOR,
  1001. };
  1002. static int __devinit sunsu_kbd_ms_init(struct uart_sunsu_port *up)
  1003. {
  1004. int quot, baud;
  1005. #ifdef CONFIG_SERIO
  1006. struct serio *serio;
  1007. #endif
  1008. if (up->su_type == SU_PORT_KBD) {
  1009. up->cflag = B1200 | CS8 | CLOCAL | CREAD;
  1010. baud = 1200;
  1011. } else {
  1012. up->cflag = B4800 | CS8 | CLOCAL | CREAD;
  1013. baud = 4800;
  1014. }
  1015. quot = up->port.uartclk / (16 * baud);
  1016. sunsu_autoconfig(up);
  1017. if (up->port.type == PORT_UNKNOWN)
  1018. return -ENODEV;
  1019. printk("%s: %s port at %llx, irq %u\n",
  1020. to_of_device(up->port.dev)->node->full_name,
  1021. (up->su_type == SU_PORT_KBD) ? "Keyboard" : "Mouse",
  1022. (unsigned long long) up->port.mapbase,
  1023. up->port.irq);
  1024. #ifdef CONFIG_SERIO
  1025. serio = &up->serio;
  1026. serio->port_data = up;
  1027. serio->id.type = SERIO_RS232;
  1028. if (up->su_type == SU_PORT_KBD) {
  1029. serio->id.proto = SERIO_SUNKBD;
  1030. strlcpy(serio->name, "sukbd", sizeof(serio->name));
  1031. } else {
  1032. serio->id.proto = SERIO_SUN;
  1033. serio->id.extra = 1;
  1034. strlcpy(serio->name, "sums", sizeof(serio->name));
  1035. }
  1036. strlcpy(serio->phys,
  1037. (!(up->port.line & 1) ? "su/serio0" : "su/serio1"),
  1038. sizeof(serio->phys));
  1039. serio->write = sunsu_serio_write;
  1040. serio->open = sunsu_serio_open;
  1041. serio->close = sunsu_serio_close;
  1042. serio->dev.parent = up->port.dev;
  1043. serio_register_port(serio);
  1044. #endif
  1045. sunsu_change_speed(&up->port, up->cflag, 0, quot);
  1046. sunsu_startup(&up->port);
  1047. return 0;
  1048. }
  1049. /*
  1050. * ------------------------------------------------------------
  1051. * Serial console driver
  1052. * ------------------------------------------------------------
  1053. */
  1054. #ifdef CONFIG_SERIAL_SUNSU_CONSOLE
  1055. #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
  1056. /*
  1057. * Wait for transmitter & holding register to empty
  1058. */
  1059. static __inline__ void wait_for_xmitr(struct uart_sunsu_port *up)
  1060. {
  1061. unsigned int status, tmout = 10000;
  1062. /* Wait up to 10ms for the character(s) to be sent. */
  1063. do {
  1064. status = serial_in(up, UART_LSR);
  1065. if (status & UART_LSR_BI)
  1066. up->lsr_break_flag = UART_LSR_BI;
  1067. if (--tmout == 0)
  1068. break;
  1069. udelay(1);
  1070. } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
  1071. /* Wait up to 1s for flow control if necessary */
  1072. if (up->port.flags & UPF_CONS_FLOW) {
  1073. tmout = 1000000;
  1074. while (--tmout &&
  1075. ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
  1076. udelay(1);
  1077. }
  1078. }
  1079. static void sunsu_console_putchar(struct uart_port *port, int ch)
  1080. {
  1081. struct uart_sunsu_port *up = (struct uart_sunsu_port *)port;
  1082. wait_for_xmitr(up);
  1083. serial_out(up, UART_TX, ch);
  1084. }
  1085. /*
  1086. * Print a string to the serial port trying not to disturb
  1087. * any possible real use of the port...
  1088. */
  1089. static void sunsu_console_write(struct console *co, const char *s,
  1090. unsigned int count)
  1091. {
  1092. struct uart_sunsu_port *up = &sunsu_ports[co->index];
  1093. unsigned long flags;
  1094. unsigned int ier;
  1095. int locked = 1;
  1096. local_irq_save(flags);
  1097. if (up->port.sysrq) {
  1098. locked = 0;
  1099. } else if (oops_in_progress) {
  1100. locked = spin_trylock(&up->port.lock);
  1101. } else
  1102. spin_lock(&up->port.lock);
  1103. /*
  1104. * First save the UER then disable the interrupts
  1105. */
  1106. ier = serial_in(up, UART_IER);
  1107. serial_out(up, UART_IER, 0);
  1108. uart_console_write(&up->port, s, count, sunsu_console_putchar);
  1109. /*
  1110. * Finally, wait for transmitter to become empty
  1111. * and restore the IER
  1112. */
  1113. wait_for_xmitr(up);
  1114. serial_out(up, UART_IER, ier);
  1115. if (locked)
  1116. spin_unlock(&up->port.lock);
  1117. local_irq_restore(flags);
  1118. }
  1119. /*
  1120. * Setup initial baud/bits/parity. We do two things here:
  1121. * - construct a cflag setting for the first su_open()
  1122. * - initialize the serial port
  1123. * Return non-zero if we didn't find a serial port.
  1124. */
  1125. static int __init sunsu_console_setup(struct console *co, char *options)
  1126. {
  1127. static struct ktermios dummy;
  1128. struct ktermios termios;
  1129. struct uart_port *port;
  1130. printk("Console: ttyS%d (SU)\n",
  1131. (sunsu_reg.minor - 64) + co->index);
  1132. /*
  1133. * Check whether an invalid uart number has been specified, and
  1134. * if so, search for the first available port that does have
  1135. * console support.
  1136. */
  1137. if (co->index >= UART_NR)
  1138. co->index = 0;
  1139. port = &sunsu_ports[co->index].port;
  1140. /*
  1141. * Temporary fix.
  1142. */
  1143. spin_lock_init(&port->lock);
  1144. /* Get firmware console settings. */
  1145. sunserial_console_termios(co, to_of_device(port->dev)->node);
  1146. memset(&termios, 0, sizeof(struct ktermios));
  1147. termios.c_cflag = co->cflag;
  1148. port->mctrl |= TIOCM_DTR;
  1149. port->ops->set_termios(port, &termios, &dummy);
  1150. return 0;
  1151. }
  1152. static struct console sunsu_console = {
  1153. .name = "ttyS",
  1154. .write = sunsu_console_write,
  1155. .device = uart_console_device,
  1156. .setup = sunsu_console_setup,
  1157. .flags = CON_PRINTBUFFER,
  1158. .index = -1,
  1159. .data = &sunsu_reg,
  1160. };
  1161. /*
  1162. * Register console.
  1163. */
  1164. static inline struct console *SUNSU_CONSOLE(void)
  1165. {
  1166. return &sunsu_console;
  1167. }
  1168. #else
  1169. #define SUNSU_CONSOLE() (NULL)
  1170. #define sunsu_serial_console_init() do { } while (0)
  1171. #endif
  1172. static enum su_type __devinit su_get_type(struct device_node *dp)
  1173. {
  1174. struct device_node *ap = of_find_node_by_path("/aliases");
  1175. if (ap) {
  1176. const char *keyb = of_get_property(ap, "keyboard", NULL);
  1177. const char *ms = of_get_property(ap, "mouse", NULL);
  1178. if (keyb) {
  1179. if (dp == of_find_node_by_path(keyb))
  1180. return SU_PORT_KBD;
  1181. }
  1182. if (ms) {
  1183. if (dp == of_find_node_by_path(ms))
  1184. return SU_PORT_MS;
  1185. }
  1186. }
  1187. return SU_PORT_PORT;
  1188. }
  1189. static int __devinit su_probe(struct of_device *op, const struct of_device_id *match)
  1190. {
  1191. static int inst;
  1192. struct device_node *dp = op->node;
  1193. struct uart_sunsu_port *up;
  1194. struct resource *rp;
  1195. enum su_type type;
  1196. bool ignore_line;
  1197. int err;
  1198. type = su_get_type(dp);
  1199. if (type == SU_PORT_PORT) {
  1200. if (inst >= UART_NR)
  1201. return -EINVAL;
  1202. up = &sunsu_ports[inst];
  1203. } else {
  1204. up = kzalloc(sizeof(*up), GFP_KERNEL);
  1205. if (!up)
  1206. return -ENOMEM;
  1207. }
  1208. up->port.line = inst;
  1209. spin_lock_init(&up->port.lock);
  1210. up->su_type = type;
  1211. rp = &op->resource[0];
  1212. up->port.mapbase = rp->start;
  1213. up->reg_size = (rp->end - rp->start) + 1;
  1214. up->port.membase = of_ioremap(rp, 0, up->reg_size, "su");
  1215. if (!up->port.membase) {
  1216. if (type != SU_PORT_PORT)
  1217. kfree(up);
  1218. return -ENOMEM;
  1219. }
  1220. up->port.irq = op->irqs[0];
  1221. up->port.dev = &op->dev;
  1222. up->port.type = PORT_UNKNOWN;
  1223. up->port.uartclk = (SU_BASE_BAUD * 16);
  1224. err = 0;
  1225. if (up->su_type == SU_PORT_KBD || up->su_type == SU_PORT_MS) {
  1226. err = sunsu_kbd_ms_init(up);
  1227. if (err) {
  1228. kfree(up);
  1229. goto out_unmap;
  1230. }
  1231. dev_set_drvdata(&op->dev, up);
  1232. return 0;
  1233. }
  1234. up->port.flags |= UPF_BOOT_AUTOCONF;
  1235. sunsu_autoconfig(up);
  1236. err = -ENODEV;
  1237. if (up->port.type == PORT_UNKNOWN)
  1238. goto out_unmap;
  1239. up->port.ops = &sunsu_pops;
  1240. ignore_line = false;
  1241. if (!strcmp(dp->name, "rsc-console") ||
  1242. !strcmp(dp->name, "lom-console"))
  1243. ignore_line = true;
  1244. sunserial_console_match(SUNSU_CONSOLE(), dp,
  1245. &sunsu_reg, up->port.line,
  1246. ignore_line);
  1247. err = uart_add_one_port(&sunsu_reg, &up->port);
  1248. if (err)
  1249. goto out_unmap;
  1250. dev_set_drvdata(&op->dev, up);
  1251. inst++;
  1252. return 0;
  1253. out_unmap:
  1254. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1255. return err;
  1256. }
  1257. static int __devexit su_remove(struct of_device *op)
  1258. {
  1259. struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
  1260. if (up->su_type == SU_PORT_MS ||
  1261. up->su_type == SU_PORT_KBD) {
  1262. #ifdef CONFIG_SERIO
  1263. serio_unregister_port(&up->serio);
  1264. #endif
  1265. kfree(up);
  1266. } else if (up->port.type != PORT_UNKNOWN) {
  1267. uart_remove_one_port(&sunsu_reg, &up->port);
  1268. }
  1269. if (up->port.membase)
  1270. of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
  1271. dev_set_drvdata(&op->dev, NULL);
  1272. return 0;
  1273. }
  1274. static const struct of_device_id su_match[] = {
  1275. {
  1276. .name = "su",
  1277. },
  1278. {
  1279. .name = "su_pnp",
  1280. },
  1281. {
  1282. .name = "serial",
  1283. .compatible = "su",
  1284. },
  1285. {
  1286. .type = "serial",
  1287. .compatible = "su",
  1288. },
  1289. {},
  1290. };
  1291. MODULE_DEVICE_TABLE(of, su_match);
  1292. static struct of_platform_driver su_driver = {
  1293. .name = "su",
  1294. .match_table = su_match,
  1295. .probe = su_probe,
  1296. .remove = __devexit_p(su_remove),
  1297. };
  1298. static int __init sunsu_init(void)
  1299. {
  1300. struct device_node *dp;
  1301. int err;
  1302. int num_uart = 0;
  1303. for_each_node_by_name(dp, "su") {
  1304. if (su_get_type(dp) == SU_PORT_PORT)
  1305. num_uart++;
  1306. }
  1307. for_each_node_by_name(dp, "su_pnp") {
  1308. if (su_get_type(dp) == SU_PORT_PORT)
  1309. num_uart++;
  1310. }
  1311. for_each_node_by_name(dp, "serial") {
  1312. if (of_device_is_compatible(dp, "su")) {
  1313. if (su_get_type(dp) == SU_PORT_PORT)
  1314. num_uart++;
  1315. }
  1316. }
  1317. for_each_node_by_type(dp, "serial") {
  1318. if (of_device_is_compatible(dp, "su")) {
  1319. if (su_get_type(dp) == SU_PORT_PORT)
  1320. num_uart++;
  1321. }
  1322. }
  1323. if (num_uart) {
  1324. err = sunserial_register_minors(&sunsu_reg, num_uart);
  1325. if (err)
  1326. return err;
  1327. }
  1328. err = of_register_driver(&su_driver, &of_bus_type);
  1329. if (err && num_uart)
  1330. sunserial_unregister_minors(&sunsu_reg, num_uart);
  1331. return err;
  1332. }
  1333. static void __exit sunsu_exit(void)
  1334. {
  1335. if (sunsu_reg.nr)
  1336. sunserial_unregister_minors(&sunsu_reg, sunsu_reg.nr);
  1337. }
  1338. module_init(sunsu_init);
  1339. module_exit(sunsu_exit);
  1340. MODULE_AUTHOR("Eddie C. Dost, Peter Zaitcev, and David S. Miller");
  1341. MODULE_DESCRIPTION("Sun SU serial port driver");
  1342. MODULE_VERSION("2.0");
  1343. MODULE_LICENSE("GPL");