bfin_sport_uart.c 16 KB

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  1. /*
  2. * File: linux/drivers/serial/bfin_sport_uart.c
  3. *
  4. * Based on: drivers/serial/bfin_5xx.c by Aubrey Li.
  5. * Author: Roy Huang <roy.huang@analog.com>
  6. *
  7. * Created: Nov 22, 2006
  8. * Copyright: (c) 2006-2007 Analog Devices Inc.
  9. * Description: this driver enable SPORTs on Blackfin emulate UART.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, see the file COPYING, or write
  23. * to the Free Software Foundation, Inc.,
  24. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  25. */
  26. /*
  27. * This driver and the hardware supported are in term of EE-191 of ADI.
  28. * http://www.analog.com/UploadedFiles/Application_Notes/399447663EE191.pdf
  29. * This application note describe how to implement a UART on a Sharc DSP,
  30. * but this driver is implemented on Blackfin Processor.
  31. */
  32. /* After reset, there is a prelude of low level pulse when transmit data first
  33. * time. No addtional pulse in following transmit.
  34. * According to document:
  35. * The SPORTs are ready to start transmitting or receiving data no later than
  36. * three serial clock cycles after they are enabled in the SPORTx_TCR1 or
  37. * SPORTx_RCR1 register. No serial clock cycles are lost from this point on.
  38. * The first internal frame sync will occur one frame sync delay after the
  39. * SPORTs are ready. External frame syncs can occur as soon as the SPORT is
  40. * ready.
  41. */
  42. /* Thanks to Axel Alatalo <axel@rubico.se> for fixing sport rx bug. Sometimes
  43. * sport receives data incorrectly. The following is Axel's words.
  44. * As EE-191, sport rx samples 3 times of the UART baudrate and takes the
  45. * middle smaple of every 3 samples as the data bit. For a 8-N-1 UART setting,
  46. * 30 samples will be required for a byte. If transmitter sends a 1/3 bit short
  47. * byte due to buadrate drift, then the 30th sample of a byte, this sample is
  48. * also the third sample of the stop bit, will happens on the immediately
  49. * following start bit which will be thrown away and missed. Thus since parts
  50. * of the startbit will be missed and the receiver will begin to drift, the
  51. * effect accumulates over time until synchronization is lost.
  52. * If only require 2 samples of the stopbit (by sampling in total 29 samples),
  53. * then a to short byte as in the case above will be tolerated. Then the 1/3
  54. * early startbit will trigger a framesync since the last read is complete
  55. * after only 2/3 stopbit and framesync is active during the last 1/3 looking
  56. * for a possible early startbit. */
  57. //#define DEBUG
  58. #include <linux/module.h>
  59. #include <linux/ioport.h>
  60. #include <linux/init.h>
  61. #include <linux/console.h>
  62. #include <linux/sysrq.h>
  63. #include <linux/platform_device.h>
  64. #include <linux/tty.h>
  65. #include <linux/tty_flip.h>
  66. #include <linux/serial_core.h>
  67. #include <asm/delay.h>
  68. #include <asm/portmux.h>
  69. #include "bfin_sport_uart.h"
  70. unsigned short bfin_uart_pin_req_sport0[] =
  71. {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
  72. P_SPORT0_DRPRI, P_SPORT0_RSCLK, P_SPORT0_DRSEC, P_SPORT0_DTSEC, 0};
  73. unsigned short bfin_uart_pin_req_sport1[] =
  74. {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
  75. P_SPORT1_DRPRI, P_SPORT1_RSCLK, P_SPORT1_DRSEC, P_SPORT1_DTSEC, 0};
  76. #define DRV_NAME "bfin-sport-uart"
  77. struct sport_uart_port {
  78. struct uart_port port;
  79. char *name;
  80. int tx_irq;
  81. int rx_irq;
  82. int err_irq;
  83. };
  84. static void sport_uart_tx_chars(struct sport_uart_port *up);
  85. static void sport_stop_tx(struct uart_port *port);
  86. static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
  87. {
  88. pr_debug("%s value:%x\n", __func__, value);
  89. /* Place a Start and Stop bit */
  90. __asm__ __volatile__ (
  91. "R2 = b#01111111100;"
  92. "R3 = b#10000000001;"
  93. "%0 <<= 2;"
  94. "%0 = %0 & R2;"
  95. "%0 = %0 | R3;"
  96. : "=d"(value)
  97. : "d"(value)
  98. : "ASTAT", "R2", "R3"
  99. );
  100. pr_debug("%s value:%x\n", __func__, value);
  101. SPORT_PUT_TX(up, value);
  102. }
  103. static inline unsigned int rx_one_byte(struct sport_uart_port *up)
  104. {
  105. unsigned int value, extract;
  106. u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
  107. value = SPORT_GET_RX32(up);
  108. pr_debug("%s value:%x\n", __func__, value);
  109. /* Extract 8 bits data */
  110. __asm__ __volatile__ (
  111. "%[extr] = 0;"
  112. "%[mask1] = 0x1801(Z);"
  113. "%[mask2] = 0x0300(Z);"
  114. "%[shift] = 0;"
  115. "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
  116. ".Lloop_s:"
  117. "%[tmp] = extract(%[val], %[mask1].L)(Z);"
  118. "%[tmp] <<= %[shift];"
  119. "%[extr] = %[extr] | %[tmp];"
  120. "%[mask1] = %[mask1] - %[mask2];"
  121. ".Lloop_e:"
  122. "%[shift] += 1;"
  123. : [val]"=d"(value), [extr]"=d"(extract), [shift]"=d"(tmp_shift), [tmp]"=d"(tmp),
  124. [mask1]"=d"(tmp_mask1), [mask2]"=d"(tmp_mask2)
  125. : "d"(value), [lc]"a"(8)
  126. : "ASTAT", "LB0", "LC0", "LT0"
  127. );
  128. pr_debug(" extract:%x\n", extract);
  129. return extract;
  130. }
  131. static int sport_uart_setup(struct sport_uart_port *up, int sclk, int baud_rate)
  132. {
  133. int tclkdiv, tfsdiv, rclkdiv;
  134. /* Set TCR1 and TCR2 */
  135. SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK));
  136. SPORT_PUT_TCR2(up, 10);
  137. pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
  138. /* Set RCR1 and RCR2 */
  139. SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
  140. SPORT_PUT_RCR2(up, 28);
  141. pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
  142. tclkdiv = sclk/(2 * baud_rate) - 1;
  143. tfsdiv = 12;
  144. rclkdiv = sclk/(2 * baud_rate * 3) - 1;
  145. SPORT_PUT_TCLKDIV(up, tclkdiv);
  146. SPORT_PUT_TFSDIV(up, tfsdiv);
  147. SPORT_PUT_RCLKDIV(up, rclkdiv);
  148. SSYNC();
  149. pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, tfsdiv:%d, rclkdiv:%d\n",
  150. __func__, sclk, baud_rate, tclkdiv, tfsdiv, rclkdiv);
  151. return 0;
  152. }
  153. static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
  154. {
  155. struct sport_uart_port *up = dev_id;
  156. struct tty_struct *tty = up->port.state->port.tty;
  157. unsigned int ch;
  158. do {
  159. ch = rx_one_byte(up);
  160. up->port.icount.rx++;
  161. if (uart_handle_sysrq_char(&up->port, ch))
  162. ;
  163. else
  164. tty_insert_flip_char(tty, ch, TTY_NORMAL);
  165. } while (SPORT_GET_STAT(up) & RXNE);
  166. tty_flip_buffer_push(tty);
  167. return IRQ_HANDLED;
  168. }
  169. static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
  170. {
  171. sport_uart_tx_chars(dev_id);
  172. return IRQ_HANDLED;
  173. }
  174. static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
  175. {
  176. struct sport_uart_port *up = dev_id;
  177. struct tty_struct *tty = up->port.state->port.tty;
  178. unsigned int stat = SPORT_GET_STAT(up);
  179. /* Overflow in RX FIFO */
  180. if (stat & ROVF) {
  181. up->port.icount.overrun++;
  182. tty_insert_flip_char(tty, 0, TTY_OVERRUN);
  183. SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
  184. }
  185. /* These should not happen */
  186. if (stat & (TOVF | TUVF | RUVF)) {
  187. printk(KERN_ERR "SPORT Error:%s %s %s\n",
  188. (stat & TOVF)?"TX overflow":"",
  189. (stat & TUVF)?"TX underflow":"",
  190. (stat & RUVF)?"RX underflow":"");
  191. SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
  192. SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
  193. }
  194. SSYNC();
  195. return IRQ_HANDLED;
  196. }
  197. /* Reqeust IRQ, Setup clock */
  198. static int sport_startup(struct uart_port *port)
  199. {
  200. struct sport_uart_port *up = (struct sport_uart_port *)port;
  201. char buffer[20];
  202. int retval;
  203. pr_debug("%s enter\n", __func__);
  204. snprintf(buffer, 20, "%s rx", up->name);
  205. retval = request_irq(up->rx_irq, sport_uart_rx_irq, IRQF_SAMPLE_RANDOM, buffer, up);
  206. if (retval) {
  207. printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
  208. return retval;
  209. }
  210. snprintf(buffer, 20, "%s tx", up->name);
  211. retval = request_irq(up->tx_irq, sport_uart_tx_irq, IRQF_SAMPLE_RANDOM, buffer, up);
  212. if (retval) {
  213. printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
  214. goto fail1;
  215. }
  216. snprintf(buffer, 20, "%s err", up->name);
  217. retval = request_irq(up->err_irq, sport_uart_err_irq, IRQF_SAMPLE_RANDOM, buffer, up);
  218. if (retval) {
  219. printk(KERN_ERR "Unable to request interrupt %s\n", buffer);
  220. goto fail2;
  221. }
  222. if (port->line) {
  223. if (peripheral_request_list(bfin_uart_pin_req_sport1, DRV_NAME))
  224. goto fail3;
  225. } else {
  226. if (peripheral_request_list(bfin_uart_pin_req_sport0, DRV_NAME))
  227. goto fail3;
  228. }
  229. sport_uart_setup(up, get_sclk(), port->uartclk);
  230. /* Enable receive interrupt */
  231. SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) | RSPEN));
  232. SSYNC();
  233. return 0;
  234. fail3:
  235. printk(KERN_ERR DRV_NAME
  236. ": Requesting Peripherals failed\n");
  237. free_irq(up->err_irq, up);
  238. fail2:
  239. free_irq(up->tx_irq, up);
  240. fail1:
  241. free_irq(up->rx_irq, up);
  242. return retval;
  243. }
  244. static void sport_uart_tx_chars(struct sport_uart_port *up)
  245. {
  246. struct circ_buf *xmit = &up->port.state->xmit;
  247. if (SPORT_GET_STAT(up) & TXF)
  248. return;
  249. if (up->port.x_char) {
  250. tx_one_byte(up, up->port.x_char);
  251. up->port.icount.tx++;
  252. up->port.x_char = 0;
  253. return;
  254. }
  255. if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
  256. sport_stop_tx(&up->port);
  257. return;
  258. }
  259. while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
  260. tx_one_byte(up, xmit->buf[xmit->tail]);
  261. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
  262. up->port.icount.tx++;
  263. }
  264. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  265. uart_write_wakeup(&up->port);
  266. }
  267. static unsigned int sport_tx_empty(struct uart_port *port)
  268. {
  269. struct sport_uart_port *up = (struct sport_uart_port *)port;
  270. unsigned int stat;
  271. stat = SPORT_GET_STAT(up);
  272. pr_debug("%s stat:%04x\n", __func__, stat);
  273. if (stat & TXHRE) {
  274. return TIOCSER_TEMT;
  275. } else
  276. return 0;
  277. }
  278. static unsigned int sport_get_mctrl(struct uart_port *port)
  279. {
  280. pr_debug("%s enter\n", __func__);
  281. return (TIOCM_CTS | TIOCM_CD | TIOCM_DSR);
  282. }
  283. static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
  284. {
  285. pr_debug("%s enter\n", __func__);
  286. }
  287. static void sport_stop_tx(struct uart_port *port)
  288. {
  289. struct sport_uart_port *up = (struct sport_uart_port *)port;
  290. unsigned int stat;
  291. pr_debug("%s enter\n", __func__);
  292. stat = SPORT_GET_STAT(up);
  293. while(!(stat & TXHRE)) {
  294. udelay(1);
  295. stat = SPORT_GET_STAT(up);
  296. }
  297. /* Although the hold register is empty, last byte is still in shift
  298. * register and not sent out yet. If baud rate is lower than default,
  299. * delay should be longer. For example, if the baud rate is 9600,
  300. * the delay must be at least 2ms by experience */
  301. udelay(500);
  302. SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
  303. SSYNC();
  304. return;
  305. }
  306. static void sport_start_tx(struct uart_port *port)
  307. {
  308. struct sport_uart_port *up = (struct sport_uart_port *)port;
  309. pr_debug("%s enter\n", __func__);
  310. /* Write data into SPORT FIFO before enable SPROT to transmit */
  311. sport_uart_tx_chars(up);
  312. /* Enable transmit, then an interrupt will generated */
  313. SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
  314. SSYNC();
  315. pr_debug("%s exit\n", __func__);
  316. }
  317. static void sport_stop_rx(struct uart_port *port)
  318. {
  319. struct sport_uart_port *up = (struct sport_uart_port *)port;
  320. pr_debug("%s enter\n", __func__);
  321. /* Disable sport to stop rx */
  322. SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
  323. SSYNC();
  324. }
  325. static void sport_enable_ms(struct uart_port *port)
  326. {
  327. pr_debug("%s enter\n", __func__);
  328. }
  329. static void sport_break_ctl(struct uart_port *port, int break_state)
  330. {
  331. pr_debug("%s enter\n", __func__);
  332. }
  333. static void sport_shutdown(struct uart_port *port)
  334. {
  335. struct sport_uart_port *up = (struct sport_uart_port *)port;
  336. pr_debug("%s enter\n", __func__);
  337. /* Disable sport */
  338. SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
  339. SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
  340. SSYNC();
  341. if (port->line) {
  342. peripheral_free_list(bfin_uart_pin_req_sport1);
  343. } else {
  344. peripheral_free_list(bfin_uart_pin_req_sport0);
  345. }
  346. free_irq(up->rx_irq, up);
  347. free_irq(up->tx_irq, up);
  348. free_irq(up->err_irq, up);
  349. }
  350. static void sport_set_termios(struct uart_port *port,
  351. struct ktermios *termios, struct ktermios *old)
  352. {
  353. pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
  354. uart_update_timeout(port, CS8 ,port->uartclk);
  355. }
  356. static const char *sport_type(struct uart_port *port)
  357. {
  358. struct sport_uart_port *up = (struct sport_uart_port *)port;
  359. pr_debug("%s enter\n", __func__);
  360. return up->name;
  361. }
  362. static void sport_release_port(struct uart_port *port)
  363. {
  364. pr_debug("%s enter\n", __func__);
  365. }
  366. static int sport_request_port(struct uart_port *port)
  367. {
  368. pr_debug("%s enter\n", __func__);
  369. return 0;
  370. }
  371. static void sport_config_port(struct uart_port *port, int flags)
  372. {
  373. struct sport_uart_port *up = (struct sport_uart_port *)port;
  374. pr_debug("%s enter\n", __func__);
  375. up->port.type = PORT_BFIN_SPORT;
  376. }
  377. static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
  378. {
  379. pr_debug("%s enter\n", __func__);
  380. return 0;
  381. }
  382. struct uart_ops sport_uart_ops = {
  383. .tx_empty = sport_tx_empty,
  384. .set_mctrl = sport_set_mctrl,
  385. .get_mctrl = sport_get_mctrl,
  386. .stop_tx = sport_stop_tx,
  387. .start_tx = sport_start_tx,
  388. .stop_rx = sport_stop_rx,
  389. .enable_ms = sport_enable_ms,
  390. .break_ctl = sport_break_ctl,
  391. .startup = sport_startup,
  392. .shutdown = sport_shutdown,
  393. .set_termios = sport_set_termios,
  394. .type = sport_type,
  395. .release_port = sport_release_port,
  396. .request_port = sport_request_port,
  397. .config_port = sport_config_port,
  398. .verify_port = sport_verify_port,
  399. };
  400. static struct sport_uart_port sport_uart_ports[] = {
  401. { /* SPORT 0 */
  402. .name = "SPORT0",
  403. .tx_irq = IRQ_SPORT0_TX,
  404. .rx_irq = IRQ_SPORT0_RX,
  405. .err_irq= IRQ_SPORT0_ERROR,
  406. .port = {
  407. .type = PORT_BFIN_SPORT,
  408. .iotype = UPIO_MEM,
  409. .membase = (void __iomem *)SPORT0_TCR1,
  410. .mapbase = SPORT0_TCR1,
  411. .irq = IRQ_SPORT0_RX,
  412. .uartclk = CONFIG_SPORT_BAUD_RATE,
  413. .fifosize = 8,
  414. .ops = &sport_uart_ops,
  415. .line = 0,
  416. },
  417. }, { /* SPORT 1 */
  418. .name = "SPORT1",
  419. .tx_irq = IRQ_SPORT1_TX,
  420. .rx_irq = IRQ_SPORT1_RX,
  421. .err_irq= IRQ_SPORT1_ERROR,
  422. .port = {
  423. .type = PORT_BFIN_SPORT,
  424. .iotype = UPIO_MEM,
  425. .membase = (void __iomem *)SPORT1_TCR1,
  426. .mapbase = SPORT1_TCR1,
  427. .irq = IRQ_SPORT1_RX,
  428. .uartclk = CONFIG_SPORT_BAUD_RATE,
  429. .fifosize = 8,
  430. .ops = &sport_uart_ops,
  431. .line = 1,
  432. },
  433. }
  434. };
  435. static struct uart_driver sport_uart_reg = {
  436. .owner = THIS_MODULE,
  437. .driver_name = "SPORT-UART",
  438. .dev_name = "ttySS",
  439. .major = 204,
  440. .minor = 84,
  441. .nr = ARRAY_SIZE(sport_uart_ports),
  442. .cons = NULL,
  443. };
  444. static int sport_uart_suspend(struct platform_device *dev, pm_message_t state)
  445. {
  446. struct sport_uart_port *sport = platform_get_drvdata(dev);
  447. pr_debug("%s enter\n", __func__);
  448. if (sport)
  449. uart_suspend_port(&sport_uart_reg, &sport->port);
  450. return 0;
  451. }
  452. static int sport_uart_resume(struct platform_device *dev)
  453. {
  454. struct sport_uart_port *sport = platform_get_drvdata(dev);
  455. pr_debug("%s enter\n", __func__);
  456. if (sport)
  457. uart_resume_port(&sport_uart_reg, &sport->port);
  458. return 0;
  459. }
  460. static int sport_uart_probe(struct platform_device *dev)
  461. {
  462. pr_debug("%s enter\n", __func__);
  463. sport_uart_ports[dev->id].port.dev = &dev->dev;
  464. uart_add_one_port(&sport_uart_reg, &sport_uart_ports[dev->id].port);
  465. platform_set_drvdata(dev, &sport_uart_ports[dev->id]);
  466. return 0;
  467. }
  468. static int sport_uart_remove(struct platform_device *dev)
  469. {
  470. struct sport_uart_port *sport = platform_get_drvdata(dev);
  471. pr_debug("%s enter\n", __func__);
  472. platform_set_drvdata(dev, NULL);
  473. if (sport)
  474. uart_remove_one_port(&sport_uart_reg, &sport->port);
  475. return 0;
  476. }
  477. static struct platform_driver sport_uart_driver = {
  478. .probe = sport_uart_probe,
  479. .remove = sport_uart_remove,
  480. .suspend = sport_uart_suspend,
  481. .resume = sport_uart_resume,
  482. .driver = {
  483. .name = DRV_NAME,
  484. },
  485. };
  486. static int __init sport_uart_init(void)
  487. {
  488. int ret;
  489. pr_debug("%s enter\n", __func__);
  490. ret = uart_register_driver(&sport_uart_reg);
  491. if (ret != 0) {
  492. printk(KERN_ERR "Failed to register %s:%d\n",
  493. sport_uart_reg.driver_name, ret);
  494. return ret;
  495. }
  496. ret = platform_driver_register(&sport_uart_driver);
  497. if (ret != 0) {
  498. printk(KERN_ERR "Failed to register sport uart driver:%d\n", ret);
  499. uart_unregister_driver(&sport_uart_reg);
  500. }
  501. pr_debug("%s exit\n", __func__);
  502. return ret;
  503. }
  504. static void __exit sport_uart_exit(void)
  505. {
  506. pr_debug("%s enter\n", __func__);
  507. platform_driver_unregister(&sport_uart_driver);
  508. uart_unregister_driver(&sport_uart_reg);
  509. }
  510. module_init(sport_uart_init);
  511. module_exit(sport_uart_exit);
  512. MODULE_LICENSE("GPL");