qla_mbx.c 93 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/delay.h>
  9. /*
  10. * qla2x00_mailbox_command
  11. * Issue mailbox command and waits for completion.
  12. *
  13. * Input:
  14. * ha = adapter block pointer.
  15. * mcp = driver internal mbx struct pointer.
  16. *
  17. * Output:
  18. * mb[MAX_MAILBOX_REGISTER_COUNT] = returned mailbox data.
  19. *
  20. * Returns:
  21. * 0 : QLA_SUCCESS = cmd performed success
  22. * 1 : QLA_FUNCTION_FAILED (error encountered)
  23. * 6 : QLA_FUNCTION_TIMEOUT (timeout condition encountered)
  24. *
  25. * Context:
  26. * Kernel context.
  27. */
  28. static int
  29. qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
  30. {
  31. int rval;
  32. unsigned long flags = 0;
  33. device_reg_t __iomem *reg;
  34. uint8_t abort_active;
  35. uint8_t io_lock_on;
  36. uint16_t command;
  37. uint16_t *iptr;
  38. uint16_t __iomem *optr;
  39. uint32_t cnt;
  40. uint32_t mboxes;
  41. unsigned long wait_time;
  42. struct qla_hw_data *ha = vha->hw;
  43. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  44. if (ha->pdev->error_state > pci_channel_io_frozen)
  45. return QLA_FUNCTION_TIMEOUT;
  46. reg = ha->iobase;
  47. io_lock_on = base_vha->flags.init_done;
  48. rval = QLA_SUCCESS;
  49. abort_active = test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  50. DEBUG11(printk("%s(%ld): entered.\n", __func__, base_vha->host_no));
  51. if (ha->flags.pci_channel_io_perm_failure) {
  52. DEBUG(printk("%s(%ld): Perm failure on EEH, timeout MBX "
  53. "Exiting.\n", __func__, vha->host_no));
  54. return QLA_FUNCTION_TIMEOUT;
  55. }
  56. /*
  57. * Wait for active mailbox commands to finish by waiting at most tov
  58. * seconds. This is to serialize actual issuing of mailbox cmds during
  59. * non ISP abort time.
  60. */
  61. if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) {
  62. /* Timeout occurred. Return error. */
  63. DEBUG2_3_11(printk("%s(%ld): cmd access timeout. "
  64. "Exiting.\n", __func__, base_vha->host_no));
  65. return QLA_FUNCTION_TIMEOUT;
  66. }
  67. ha->flags.mbox_busy = 1;
  68. /* Save mailbox command for debug */
  69. ha->mcp = mcp;
  70. DEBUG11(printk("scsi(%ld): prepare to issue mbox cmd=0x%x.\n",
  71. base_vha->host_no, mcp->mb[0]));
  72. spin_lock_irqsave(&ha->hardware_lock, flags);
  73. /* Load mailbox registers. */
  74. if (IS_FWI2_CAPABLE(ha))
  75. optr = (uint16_t __iomem *)&reg->isp24.mailbox0;
  76. else
  77. optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0);
  78. iptr = mcp->mb;
  79. command = mcp->mb[0];
  80. mboxes = mcp->out_mb;
  81. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  82. if (IS_QLA2200(ha) && cnt == 8)
  83. optr =
  84. (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8);
  85. if (mboxes & BIT_0)
  86. WRT_REG_WORD(optr, *iptr);
  87. mboxes >>= 1;
  88. optr++;
  89. iptr++;
  90. }
  91. #if defined(QL_DEBUG_LEVEL_1)
  92. printk("%s(%ld): Loaded MBX registers (displayed in bytes) = \n",
  93. __func__, base_vha->host_no);
  94. qla2x00_dump_buffer((uint8_t *)mcp->mb, 16);
  95. printk("\n");
  96. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x10), 16);
  97. printk("\n");
  98. qla2x00_dump_buffer(((uint8_t *)mcp->mb + 0x20), 8);
  99. printk("\n");
  100. printk("%s(%ld): I/O address = %p.\n", __func__, base_vha->host_no,
  101. optr);
  102. qla2x00_dump_regs(base_vha);
  103. #endif
  104. /* Issue set host interrupt command to send cmd out. */
  105. ha->flags.mbox_int = 0;
  106. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  107. /* Unlock mbx registers and wait for interrupt */
  108. DEBUG11(printk("%s(%ld): going to unlock irq & waiting for interrupt. "
  109. "jiffies=%lx.\n", __func__, base_vha->host_no, jiffies));
  110. /* Wait for mbx cmd completion until timeout */
  111. if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) {
  112. set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  113. if (IS_FWI2_CAPABLE(ha))
  114. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  115. else
  116. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  117. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  118. wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ);
  119. clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
  120. } else {
  121. DEBUG3_11(printk("%s(%ld): cmd=%x POLLING MODE.\n", __func__,
  122. base_vha->host_no, command));
  123. if (IS_FWI2_CAPABLE(ha))
  124. WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT);
  125. else
  126. WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT);
  127. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  128. wait_time = jiffies + mcp->tov * HZ; /* wait at most tov secs */
  129. while (!ha->flags.mbox_int) {
  130. if (time_after(jiffies, wait_time))
  131. break;
  132. /* Check for pending interrupts. */
  133. qla2x00_poll(ha->rsp_q_map[0]);
  134. if (!ha->flags.mbox_int &&
  135. !(IS_QLA2200(ha) &&
  136. command == MBC_LOAD_RISC_RAM_EXTENDED))
  137. msleep(10);
  138. } /* while */
  139. DEBUG17(qla_printk(KERN_WARNING, ha,
  140. "Waited %d sec\n",
  141. (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)));
  142. }
  143. /* Check whether we timed out */
  144. if (ha->flags.mbox_int) {
  145. uint16_t *iptr2;
  146. DEBUG3_11(printk("%s(%ld): cmd %x completed.\n", __func__,
  147. base_vha->host_no, command));
  148. /* Got interrupt. Clear the flag. */
  149. ha->flags.mbox_int = 0;
  150. clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags);
  151. if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE)
  152. rval = QLA_FUNCTION_FAILED;
  153. /* Load return mailbox registers. */
  154. iptr2 = mcp->mb;
  155. iptr = (uint16_t *)&ha->mailbox_out[0];
  156. mboxes = mcp->in_mb;
  157. for (cnt = 0; cnt < ha->mbx_count; cnt++) {
  158. if (mboxes & BIT_0)
  159. *iptr2 = *iptr;
  160. mboxes >>= 1;
  161. iptr2++;
  162. iptr++;
  163. }
  164. } else {
  165. #if defined(QL_DEBUG_LEVEL_2) || defined(QL_DEBUG_LEVEL_3) || \
  166. defined(QL_DEBUG_LEVEL_11)
  167. uint16_t mb0;
  168. uint32_t ictrl;
  169. if (IS_FWI2_CAPABLE(ha)) {
  170. mb0 = RD_REG_WORD(&reg->isp24.mailbox0);
  171. ictrl = RD_REG_DWORD(&reg->isp24.ictrl);
  172. } else {
  173. mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0);
  174. ictrl = RD_REG_WORD(&reg->isp.ictrl);
  175. }
  176. printk("%s(%ld): **** MB Command Timeout for cmd %x ****\n",
  177. __func__, base_vha->host_no, command);
  178. printk("%s(%ld): icontrol=%x jiffies=%lx\n", __func__,
  179. base_vha->host_no, ictrl, jiffies);
  180. printk("%s(%ld): *** mailbox[0] = 0x%x ***\n", __func__,
  181. base_vha->host_no, mb0);
  182. qla2x00_dump_regs(base_vha);
  183. #endif
  184. rval = QLA_FUNCTION_TIMEOUT;
  185. }
  186. ha->flags.mbox_busy = 0;
  187. /* Clean up */
  188. ha->mcp = NULL;
  189. if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) {
  190. DEBUG11(printk("%s(%ld): checking for additional resp "
  191. "interrupt.\n", __func__, base_vha->host_no));
  192. /* polling mode for non isp_abort commands. */
  193. qla2x00_poll(ha->rsp_q_map[0]);
  194. }
  195. if (rval == QLA_FUNCTION_TIMEOUT &&
  196. mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
  197. if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
  198. ha->flags.eeh_busy) {
  199. /* not in dpc. schedule it for dpc to take over. */
  200. DEBUG(printk("%s(%ld): timeout schedule "
  201. "isp_abort_needed.\n", __func__,
  202. base_vha->host_no));
  203. DEBUG2_3_11(printk("%s(%ld): timeout schedule "
  204. "isp_abort_needed.\n", __func__,
  205. base_vha->host_no));
  206. qla_printk(KERN_WARNING, ha,
  207. "Mailbox command timeout occurred. Scheduling ISP "
  208. "abort. eeh_busy: 0x%x\n", ha->flags.eeh_busy);
  209. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  210. qla2xxx_wake_dpc(vha);
  211. } else if (!abort_active) {
  212. /* call abort directly since we are in the DPC thread */
  213. DEBUG(printk("%s(%ld): timeout calling abort_isp\n",
  214. __func__, base_vha->host_no));
  215. DEBUG2_3_11(printk("%s(%ld): timeout calling "
  216. "abort_isp\n", __func__, base_vha->host_no));
  217. qla_printk(KERN_WARNING, ha,
  218. "Mailbox command timeout occurred. Issuing ISP "
  219. "abort.\n");
  220. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  221. clear_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  222. if (qla2x00_abort_isp(base_vha)) {
  223. /* Failed. retry later. */
  224. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  225. }
  226. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  227. DEBUG(printk("%s(%ld): finished abort_isp\n", __func__,
  228. base_vha->host_no));
  229. DEBUG2_3_11(printk("%s(%ld): finished abort_isp\n",
  230. __func__, base_vha->host_no));
  231. }
  232. }
  233. /* Allow next mbx cmd to come in. */
  234. complete(&ha->mbx_cmd_comp);
  235. if (rval) {
  236. DEBUG2_3_11(printk("%s(%ld): **** FAILED. mbx0=%x, mbx1=%x, "
  237. "mbx2=%x, cmd=%x ****\n", __func__, base_vha->host_no,
  238. mcp->mb[0], mcp->mb[1], mcp->mb[2], command));
  239. } else {
  240. DEBUG11(printk("%s(%ld): done.\n", __func__,
  241. base_vha->host_no));
  242. }
  243. return rval;
  244. }
  245. int
  246. qla2x00_load_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t risc_addr,
  247. uint32_t risc_code_size)
  248. {
  249. int rval;
  250. struct qla_hw_data *ha = vha->hw;
  251. mbx_cmd_t mc;
  252. mbx_cmd_t *mcp = &mc;
  253. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  254. if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) {
  255. mcp->mb[0] = MBC_LOAD_RISC_RAM_EXTENDED;
  256. mcp->mb[8] = MSW(risc_addr);
  257. mcp->out_mb = MBX_8|MBX_0;
  258. } else {
  259. mcp->mb[0] = MBC_LOAD_RISC_RAM;
  260. mcp->out_mb = MBX_0;
  261. }
  262. mcp->mb[1] = LSW(risc_addr);
  263. mcp->mb[2] = MSW(req_dma);
  264. mcp->mb[3] = LSW(req_dma);
  265. mcp->mb[6] = MSW(MSD(req_dma));
  266. mcp->mb[7] = LSW(MSD(req_dma));
  267. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  268. if (IS_FWI2_CAPABLE(ha)) {
  269. mcp->mb[4] = MSW(risc_code_size);
  270. mcp->mb[5] = LSW(risc_code_size);
  271. mcp->out_mb |= MBX_5|MBX_4;
  272. } else {
  273. mcp->mb[4] = LSW(risc_code_size);
  274. mcp->out_mb |= MBX_4;
  275. }
  276. mcp->in_mb = MBX_0;
  277. mcp->tov = MBX_TOV_SECONDS;
  278. mcp->flags = 0;
  279. rval = qla2x00_mailbox_command(vha, mcp);
  280. if (rval != QLA_SUCCESS) {
  281. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  282. vha->host_no, rval, mcp->mb[0]));
  283. } else {
  284. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  285. }
  286. return rval;
  287. }
  288. /*
  289. * qla2x00_execute_fw
  290. * Start adapter firmware.
  291. *
  292. * Input:
  293. * ha = adapter block pointer.
  294. * TARGET_QUEUE_LOCK must be released.
  295. * ADAPTER_STATE_LOCK must be released.
  296. *
  297. * Returns:
  298. * qla2x00 local function return status code.
  299. *
  300. * Context:
  301. * Kernel context.
  302. */
  303. int
  304. qla2x00_execute_fw(scsi_qla_host_t *vha, uint32_t risc_addr)
  305. {
  306. int rval;
  307. struct qla_hw_data *ha = vha->hw;
  308. mbx_cmd_t mc;
  309. mbx_cmd_t *mcp = &mc;
  310. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  311. mcp->mb[0] = MBC_EXECUTE_FIRMWARE;
  312. mcp->out_mb = MBX_0;
  313. mcp->in_mb = MBX_0;
  314. if (IS_FWI2_CAPABLE(ha)) {
  315. mcp->mb[1] = MSW(risc_addr);
  316. mcp->mb[2] = LSW(risc_addr);
  317. mcp->mb[3] = 0;
  318. mcp->mb[4] = 0;
  319. mcp->out_mb |= MBX_4|MBX_3|MBX_2|MBX_1;
  320. mcp->in_mb |= MBX_1;
  321. } else {
  322. mcp->mb[1] = LSW(risc_addr);
  323. mcp->out_mb |= MBX_1;
  324. if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  325. mcp->mb[2] = 0;
  326. mcp->out_mb |= MBX_2;
  327. }
  328. }
  329. mcp->tov = MBX_TOV_SECONDS;
  330. mcp->flags = 0;
  331. rval = qla2x00_mailbox_command(vha, mcp);
  332. if (rval != QLA_SUCCESS) {
  333. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  334. vha->host_no, rval, mcp->mb[0]));
  335. } else {
  336. if (IS_FWI2_CAPABLE(ha)) {
  337. DEBUG11(printk("%s(%ld): done exchanges=%x.\n",
  338. __func__, vha->host_no, mcp->mb[1]));
  339. } else {
  340. DEBUG11(printk("%s(%ld): done.\n", __func__,
  341. vha->host_no));
  342. }
  343. }
  344. return rval;
  345. }
  346. /*
  347. * qla2x00_get_fw_version
  348. * Get firmware version.
  349. *
  350. * Input:
  351. * ha: adapter state pointer.
  352. * major: pointer for major number.
  353. * minor: pointer for minor number.
  354. * subminor: pointer for subminor number.
  355. *
  356. * Returns:
  357. * qla2x00 local function return status code.
  358. *
  359. * Context:
  360. * Kernel context.
  361. */
  362. int
  363. qla2x00_get_fw_version(scsi_qla_host_t *vha, uint16_t *major, uint16_t *minor,
  364. uint16_t *subminor, uint16_t *attributes, uint32_t *memory, uint8_t *mpi,
  365. uint32_t *mpi_caps, uint8_t *phy)
  366. {
  367. int rval;
  368. mbx_cmd_t mc;
  369. mbx_cmd_t *mcp = &mc;
  370. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  371. mcp->mb[0] = MBC_GET_FIRMWARE_VERSION;
  372. mcp->out_mb = MBX_0;
  373. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  374. if (IS_QLA81XX(vha->hw))
  375. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8;
  376. mcp->flags = 0;
  377. mcp->tov = MBX_TOV_SECONDS;
  378. rval = qla2x00_mailbox_command(vha, mcp);
  379. if (rval != QLA_SUCCESS)
  380. goto failed;
  381. /* Return mailbox data. */
  382. *major = mcp->mb[1];
  383. *minor = mcp->mb[2];
  384. *subminor = mcp->mb[3];
  385. *attributes = mcp->mb[6];
  386. if (IS_QLA2100(vha->hw) || IS_QLA2200(vha->hw))
  387. *memory = 0x1FFFF; /* Defaults to 128KB. */
  388. else
  389. *memory = (mcp->mb[5] << 16) | mcp->mb[4];
  390. if (IS_QLA81XX(vha->hw)) {
  391. mpi[0] = mcp->mb[10] & 0xff;
  392. mpi[1] = mcp->mb[11] >> 8;
  393. mpi[2] = mcp->mb[11] & 0xff;
  394. *mpi_caps = (mcp->mb[12] << 16) | mcp->mb[13];
  395. phy[0] = mcp->mb[8] & 0xff;
  396. phy[1] = mcp->mb[9] >> 8;
  397. phy[2] = mcp->mb[9] & 0xff;
  398. }
  399. failed:
  400. if (rval != QLA_SUCCESS) {
  401. /*EMPTY*/
  402. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  403. vha->host_no, rval));
  404. } else {
  405. /*EMPTY*/
  406. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  407. }
  408. return rval;
  409. }
  410. /*
  411. * qla2x00_get_fw_options
  412. * Set firmware options.
  413. *
  414. * Input:
  415. * ha = adapter block pointer.
  416. * fwopt = pointer for firmware options.
  417. *
  418. * Returns:
  419. * qla2x00 local function return status code.
  420. *
  421. * Context:
  422. * Kernel context.
  423. */
  424. int
  425. qla2x00_get_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  426. {
  427. int rval;
  428. mbx_cmd_t mc;
  429. mbx_cmd_t *mcp = &mc;
  430. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  431. mcp->mb[0] = MBC_GET_FIRMWARE_OPTION;
  432. mcp->out_mb = MBX_0;
  433. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  434. mcp->tov = MBX_TOV_SECONDS;
  435. mcp->flags = 0;
  436. rval = qla2x00_mailbox_command(vha, mcp);
  437. if (rval != QLA_SUCCESS) {
  438. /*EMPTY*/
  439. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  440. vha->host_no, rval));
  441. } else {
  442. fwopts[0] = mcp->mb[0];
  443. fwopts[1] = mcp->mb[1];
  444. fwopts[2] = mcp->mb[2];
  445. fwopts[3] = mcp->mb[3];
  446. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  447. }
  448. return rval;
  449. }
  450. /*
  451. * qla2x00_set_fw_options
  452. * Set firmware options.
  453. *
  454. * Input:
  455. * ha = adapter block pointer.
  456. * fwopt = pointer for firmware options.
  457. *
  458. * Returns:
  459. * qla2x00 local function return status code.
  460. *
  461. * Context:
  462. * Kernel context.
  463. */
  464. int
  465. qla2x00_set_fw_options(scsi_qla_host_t *vha, uint16_t *fwopts)
  466. {
  467. int rval;
  468. mbx_cmd_t mc;
  469. mbx_cmd_t *mcp = &mc;
  470. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  471. mcp->mb[0] = MBC_SET_FIRMWARE_OPTION;
  472. mcp->mb[1] = fwopts[1];
  473. mcp->mb[2] = fwopts[2];
  474. mcp->mb[3] = fwopts[3];
  475. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  476. mcp->in_mb = MBX_0;
  477. if (IS_FWI2_CAPABLE(vha->hw)) {
  478. mcp->in_mb |= MBX_1;
  479. } else {
  480. mcp->mb[10] = fwopts[10];
  481. mcp->mb[11] = fwopts[11];
  482. mcp->mb[12] = 0; /* Undocumented, but used */
  483. mcp->out_mb |= MBX_12|MBX_11|MBX_10;
  484. }
  485. mcp->tov = MBX_TOV_SECONDS;
  486. mcp->flags = 0;
  487. rval = qla2x00_mailbox_command(vha, mcp);
  488. fwopts[0] = mcp->mb[0];
  489. if (rval != QLA_SUCCESS) {
  490. /*EMPTY*/
  491. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x/%x).\n", __func__,
  492. vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  493. } else {
  494. /*EMPTY*/
  495. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  496. }
  497. return rval;
  498. }
  499. /*
  500. * qla2x00_mbx_reg_test
  501. * Mailbox register wrap test.
  502. *
  503. * Input:
  504. * ha = adapter block pointer.
  505. * TARGET_QUEUE_LOCK must be released.
  506. * ADAPTER_STATE_LOCK must be released.
  507. *
  508. * Returns:
  509. * qla2x00 local function return status code.
  510. *
  511. * Context:
  512. * Kernel context.
  513. */
  514. int
  515. qla2x00_mbx_reg_test(scsi_qla_host_t *vha)
  516. {
  517. int rval;
  518. mbx_cmd_t mc;
  519. mbx_cmd_t *mcp = &mc;
  520. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): entered.\n", vha->host_no));
  521. mcp->mb[0] = MBC_MAILBOX_REGISTER_TEST;
  522. mcp->mb[1] = 0xAAAA;
  523. mcp->mb[2] = 0x5555;
  524. mcp->mb[3] = 0xAA55;
  525. mcp->mb[4] = 0x55AA;
  526. mcp->mb[5] = 0xA5A5;
  527. mcp->mb[6] = 0x5A5A;
  528. mcp->mb[7] = 0x2525;
  529. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  530. mcp->in_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  531. mcp->tov = MBX_TOV_SECONDS;
  532. mcp->flags = 0;
  533. rval = qla2x00_mailbox_command(vha, mcp);
  534. if (rval == QLA_SUCCESS) {
  535. if (mcp->mb[1] != 0xAAAA || mcp->mb[2] != 0x5555 ||
  536. mcp->mb[3] != 0xAA55 || mcp->mb[4] != 0x55AA)
  537. rval = QLA_FUNCTION_FAILED;
  538. if (mcp->mb[5] != 0xA5A5 || mcp->mb[6] != 0x5A5A ||
  539. mcp->mb[7] != 0x2525)
  540. rval = QLA_FUNCTION_FAILED;
  541. }
  542. if (rval != QLA_SUCCESS) {
  543. /*EMPTY*/
  544. DEBUG2_3_11(printk("qla2x00_mbx_reg_test(%ld): failed=%x.\n",
  545. vha->host_no, rval));
  546. } else {
  547. /*EMPTY*/
  548. DEBUG11(printk("qla2x00_mbx_reg_test(%ld): done.\n",
  549. vha->host_no));
  550. }
  551. return rval;
  552. }
  553. /*
  554. * qla2x00_verify_checksum
  555. * Verify firmware checksum.
  556. *
  557. * Input:
  558. * ha = adapter block pointer.
  559. * TARGET_QUEUE_LOCK must be released.
  560. * ADAPTER_STATE_LOCK must be released.
  561. *
  562. * Returns:
  563. * qla2x00 local function return status code.
  564. *
  565. * Context:
  566. * Kernel context.
  567. */
  568. int
  569. qla2x00_verify_checksum(scsi_qla_host_t *vha, uint32_t risc_addr)
  570. {
  571. int rval;
  572. mbx_cmd_t mc;
  573. mbx_cmd_t *mcp = &mc;
  574. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  575. mcp->mb[0] = MBC_VERIFY_CHECKSUM;
  576. mcp->out_mb = MBX_0;
  577. mcp->in_mb = MBX_0;
  578. if (IS_FWI2_CAPABLE(vha->hw)) {
  579. mcp->mb[1] = MSW(risc_addr);
  580. mcp->mb[2] = LSW(risc_addr);
  581. mcp->out_mb |= MBX_2|MBX_1;
  582. mcp->in_mb |= MBX_2|MBX_1;
  583. } else {
  584. mcp->mb[1] = LSW(risc_addr);
  585. mcp->out_mb |= MBX_1;
  586. mcp->in_mb |= MBX_1;
  587. }
  588. mcp->tov = MBX_TOV_SECONDS;
  589. mcp->flags = 0;
  590. rval = qla2x00_mailbox_command(vha, mcp);
  591. if (rval != QLA_SUCCESS) {
  592. DEBUG2_3_11(printk("%s(%ld): failed=%x chk sum=%x.\n", __func__,
  593. vha->host_no, rval, IS_FWI2_CAPABLE(vha->hw) ?
  594. (mcp->mb[2] << 16) | mcp->mb[1]: mcp->mb[1]));
  595. } else {
  596. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  597. }
  598. return rval;
  599. }
  600. /*
  601. * qla2x00_issue_iocb
  602. * Issue IOCB using mailbox command
  603. *
  604. * Input:
  605. * ha = adapter state pointer.
  606. * buffer = buffer pointer.
  607. * phys_addr = physical address of buffer.
  608. * size = size of buffer.
  609. * TARGET_QUEUE_LOCK must be released.
  610. * ADAPTER_STATE_LOCK must be released.
  611. *
  612. * Returns:
  613. * qla2x00 local function return status code.
  614. *
  615. * Context:
  616. * Kernel context.
  617. */
  618. static int
  619. qla2x00_issue_iocb_timeout(scsi_qla_host_t *vha, void *buffer,
  620. dma_addr_t phys_addr, size_t size, uint32_t tov)
  621. {
  622. int rval;
  623. mbx_cmd_t mc;
  624. mbx_cmd_t *mcp = &mc;
  625. mcp->mb[0] = MBC_IOCB_COMMAND_A64;
  626. mcp->mb[1] = 0;
  627. mcp->mb[2] = MSW(phys_addr);
  628. mcp->mb[3] = LSW(phys_addr);
  629. mcp->mb[6] = MSW(MSD(phys_addr));
  630. mcp->mb[7] = LSW(MSD(phys_addr));
  631. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  632. mcp->in_mb = MBX_2|MBX_0;
  633. mcp->tov = tov;
  634. mcp->flags = 0;
  635. rval = qla2x00_mailbox_command(vha, mcp);
  636. if (rval != QLA_SUCCESS) {
  637. /*EMPTY*/
  638. DEBUG(printk("qla2x00_issue_iocb(%ld): failed rval 0x%x\n",
  639. vha->host_no, rval));
  640. } else {
  641. sts_entry_t *sts_entry = (sts_entry_t *) buffer;
  642. /* Mask reserved bits. */
  643. sts_entry->entry_status &=
  644. IS_FWI2_CAPABLE(vha->hw) ? RF_MASK_24XX : RF_MASK;
  645. }
  646. return rval;
  647. }
  648. int
  649. qla2x00_issue_iocb(scsi_qla_host_t *vha, void *buffer, dma_addr_t phys_addr,
  650. size_t size)
  651. {
  652. return qla2x00_issue_iocb_timeout(vha, buffer, phys_addr, size,
  653. MBX_TOV_SECONDS);
  654. }
  655. /*
  656. * qla2x00_abort_command
  657. * Abort command aborts a specified IOCB.
  658. *
  659. * Input:
  660. * ha = adapter block pointer.
  661. * sp = SB structure pointer.
  662. *
  663. * Returns:
  664. * qla2x00 local function return status code.
  665. *
  666. * Context:
  667. * Kernel context.
  668. */
  669. int
  670. qla2x00_abort_command(srb_t *sp)
  671. {
  672. unsigned long flags = 0;
  673. int rval;
  674. uint32_t handle = 0;
  675. mbx_cmd_t mc;
  676. mbx_cmd_t *mcp = &mc;
  677. fc_port_t *fcport = sp->fcport;
  678. scsi_qla_host_t *vha = fcport->vha;
  679. struct qla_hw_data *ha = vha->hw;
  680. struct req_que *req = vha->req;
  681. DEBUG11(printk("qla2x00_abort_command(%ld): entered.\n", vha->host_no));
  682. spin_lock_irqsave(&ha->hardware_lock, flags);
  683. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  684. if (req->outstanding_cmds[handle] == sp)
  685. break;
  686. }
  687. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  688. if (handle == MAX_OUTSTANDING_COMMANDS) {
  689. /* command not found */
  690. return QLA_FUNCTION_FAILED;
  691. }
  692. mcp->mb[0] = MBC_ABORT_COMMAND;
  693. if (HAS_EXTENDED_IDS(ha))
  694. mcp->mb[1] = fcport->loop_id;
  695. else
  696. mcp->mb[1] = fcport->loop_id << 8;
  697. mcp->mb[2] = (uint16_t)handle;
  698. mcp->mb[3] = (uint16_t)(handle >> 16);
  699. mcp->mb[6] = (uint16_t)sp->cmd->device->lun;
  700. mcp->out_mb = MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  701. mcp->in_mb = MBX_0;
  702. mcp->tov = MBX_TOV_SECONDS;
  703. mcp->flags = 0;
  704. rval = qla2x00_mailbox_command(vha, mcp);
  705. if (rval != QLA_SUCCESS) {
  706. DEBUG2_3_11(printk("qla2x00_abort_command(%ld): failed=%x.\n",
  707. vha->host_no, rval));
  708. } else {
  709. DEBUG11(printk("qla2x00_abort_command(%ld): done.\n",
  710. vha->host_no));
  711. }
  712. return rval;
  713. }
  714. int
  715. qla2x00_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  716. {
  717. int rval, rval2;
  718. mbx_cmd_t mc;
  719. mbx_cmd_t *mcp = &mc;
  720. scsi_qla_host_t *vha;
  721. struct req_que *req;
  722. struct rsp_que *rsp;
  723. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  724. l = l;
  725. vha = fcport->vha;
  726. req = vha->hw->req_q_map[tag];
  727. rsp = vha->hw->rsp_q_map[tag];
  728. mcp->mb[0] = MBC_ABORT_TARGET;
  729. mcp->out_mb = MBX_9|MBX_2|MBX_1|MBX_0;
  730. if (HAS_EXTENDED_IDS(vha->hw)) {
  731. mcp->mb[1] = fcport->loop_id;
  732. mcp->mb[10] = 0;
  733. mcp->out_mb |= MBX_10;
  734. } else {
  735. mcp->mb[1] = fcport->loop_id << 8;
  736. }
  737. mcp->mb[2] = vha->hw->loop_reset_delay;
  738. mcp->mb[9] = vha->vp_idx;
  739. mcp->in_mb = MBX_0;
  740. mcp->tov = MBX_TOV_SECONDS;
  741. mcp->flags = 0;
  742. rval = qla2x00_mailbox_command(vha, mcp);
  743. if (rval != QLA_SUCCESS) {
  744. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  745. vha->host_no, rval));
  746. }
  747. /* Issue marker IOCB. */
  748. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, 0,
  749. MK_SYNC_ID);
  750. if (rval2 != QLA_SUCCESS) {
  751. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  752. "(%x).\n", __func__, vha->host_no, rval2));
  753. } else {
  754. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  755. }
  756. return rval;
  757. }
  758. int
  759. qla2x00_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  760. {
  761. int rval, rval2;
  762. mbx_cmd_t mc;
  763. mbx_cmd_t *mcp = &mc;
  764. scsi_qla_host_t *vha;
  765. struct req_que *req;
  766. struct rsp_que *rsp;
  767. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  768. vha = fcport->vha;
  769. req = vha->hw->req_q_map[tag];
  770. rsp = vha->hw->rsp_q_map[tag];
  771. mcp->mb[0] = MBC_LUN_RESET;
  772. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  773. if (HAS_EXTENDED_IDS(vha->hw))
  774. mcp->mb[1] = fcport->loop_id;
  775. else
  776. mcp->mb[1] = fcport->loop_id << 8;
  777. mcp->mb[2] = l;
  778. mcp->mb[3] = 0;
  779. mcp->mb[9] = vha->vp_idx;
  780. mcp->in_mb = MBX_0;
  781. mcp->tov = MBX_TOV_SECONDS;
  782. mcp->flags = 0;
  783. rval = qla2x00_mailbox_command(vha, mcp);
  784. if (rval != QLA_SUCCESS) {
  785. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  786. vha->host_no, rval));
  787. }
  788. /* Issue marker IOCB. */
  789. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  790. MK_SYNC_ID_LUN);
  791. if (rval2 != QLA_SUCCESS) {
  792. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  793. "(%x).\n", __func__, vha->host_no, rval2));
  794. } else {
  795. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  796. }
  797. return rval;
  798. }
  799. /*
  800. * qla2x00_get_adapter_id
  801. * Get adapter ID and topology.
  802. *
  803. * Input:
  804. * ha = adapter block pointer.
  805. * id = pointer for loop ID.
  806. * al_pa = pointer for AL_PA.
  807. * area = pointer for area.
  808. * domain = pointer for domain.
  809. * top = pointer for topology.
  810. * TARGET_QUEUE_LOCK must be released.
  811. * ADAPTER_STATE_LOCK must be released.
  812. *
  813. * Returns:
  814. * qla2x00 local function return status code.
  815. *
  816. * Context:
  817. * Kernel context.
  818. */
  819. int
  820. qla2x00_get_adapter_id(scsi_qla_host_t *vha, uint16_t *id, uint8_t *al_pa,
  821. uint8_t *area, uint8_t *domain, uint16_t *top, uint16_t *sw_cap)
  822. {
  823. int rval;
  824. mbx_cmd_t mc;
  825. mbx_cmd_t *mcp = &mc;
  826. DEBUG11(printk("qla2x00_get_adapter_id(%ld): entered.\n",
  827. vha->host_no));
  828. mcp->mb[0] = MBC_GET_ADAPTER_LOOP_ID;
  829. mcp->mb[9] = vha->vp_idx;
  830. mcp->out_mb = MBX_9|MBX_0;
  831. mcp->in_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  832. if (IS_QLA81XX(vha->hw))
  833. mcp->in_mb |= MBX_13|MBX_12|MBX_11|MBX_10;
  834. mcp->tov = MBX_TOV_SECONDS;
  835. mcp->flags = 0;
  836. rval = qla2x00_mailbox_command(vha, mcp);
  837. if (mcp->mb[0] == MBS_COMMAND_ERROR)
  838. rval = QLA_COMMAND_ERROR;
  839. else if (mcp->mb[0] == MBS_INVALID_COMMAND)
  840. rval = QLA_INVALID_COMMAND;
  841. /* Return data. */
  842. *id = mcp->mb[1];
  843. *al_pa = LSB(mcp->mb[2]);
  844. *area = MSB(mcp->mb[2]);
  845. *domain = LSB(mcp->mb[3]);
  846. *top = mcp->mb[6];
  847. *sw_cap = mcp->mb[7];
  848. if (rval != QLA_SUCCESS) {
  849. /*EMPTY*/
  850. DEBUG2_3_11(printk("qla2x00_get_adapter_id(%ld): failed=%x.\n",
  851. vha->host_no, rval));
  852. } else {
  853. DEBUG11(printk("qla2x00_get_adapter_id(%ld): done.\n",
  854. vha->host_no));
  855. if (IS_QLA81XX(vha->hw)) {
  856. vha->fcoe_vlan_id = mcp->mb[9] & 0xfff;
  857. vha->fcoe_fcf_idx = mcp->mb[10];
  858. vha->fcoe_vn_port_mac[5] = mcp->mb[11] >> 8;
  859. vha->fcoe_vn_port_mac[4] = mcp->mb[11] & 0xff;
  860. vha->fcoe_vn_port_mac[3] = mcp->mb[12] >> 8;
  861. vha->fcoe_vn_port_mac[2] = mcp->mb[12] & 0xff;
  862. vha->fcoe_vn_port_mac[1] = mcp->mb[13] >> 8;
  863. vha->fcoe_vn_port_mac[0] = mcp->mb[13] & 0xff;
  864. }
  865. }
  866. return rval;
  867. }
  868. /*
  869. * qla2x00_get_retry_cnt
  870. * Get current firmware login retry count and delay.
  871. *
  872. * Input:
  873. * ha = adapter block pointer.
  874. * retry_cnt = pointer to login retry count.
  875. * tov = pointer to login timeout value.
  876. *
  877. * Returns:
  878. * qla2x00 local function return status code.
  879. *
  880. * Context:
  881. * Kernel context.
  882. */
  883. int
  884. qla2x00_get_retry_cnt(scsi_qla_host_t *vha, uint8_t *retry_cnt, uint8_t *tov,
  885. uint16_t *r_a_tov)
  886. {
  887. int rval;
  888. uint16_t ratov;
  889. mbx_cmd_t mc;
  890. mbx_cmd_t *mcp = &mc;
  891. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): entered.\n",
  892. vha->host_no));
  893. mcp->mb[0] = MBC_GET_RETRY_COUNT;
  894. mcp->out_mb = MBX_0;
  895. mcp->in_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  896. mcp->tov = MBX_TOV_SECONDS;
  897. mcp->flags = 0;
  898. rval = qla2x00_mailbox_command(vha, mcp);
  899. if (rval != QLA_SUCCESS) {
  900. /*EMPTY*/
  901. DEBUG2_3_11(printk("qla2x00_get_retry_cnt(%ld): failed = %x.\n",
  902. vha->host_no, mcp->mb[0]));
  903. } else {
  904. /* Convert returned data and check our values. */
  905. *r_a_tov = mcp->mb[3] / 2;
  906. ratov = (mcp->mb[3]/2) / 10; /* mb[3] value is in 100ms */
  907. if (mcp->mb[1] * ratov > (*retry_cnt) * (*tov)) {
  908. /* Update to the larger values */
  909. *retry_cnt = (uint8_t)mcp->mb[1];
  910. *tov = ratov;
  911. }
  912. DEBUG11(printk("qla2x00_get_retry_cnt(%ld): done. mb3=%d "
  913. "ratov=%d.\n", vha->host_no, mcp->mb[3], ratov));
  914. }
  915. return rval;
  916. }
  917. /*
  918. * qla2x00_init_firmware
  919. * Initialize adapter firmware.
  920. *
  921. * Input:
  922. * ha = adapter block pointer.
  923. * dptr = Initialization control block pointer.
  924. * size = size of initialization control block.
  925. * TARGET_QUEUE_LOCK must be released.
  926. * ADAPTER_STATE_LOCK must be released.
  927. *
  928. * Returns:
  929. * qla2x00 local function return status code.
  930. *
  931. * Context:
  932. * Kernel context.
  933. */
  934. int
  935. qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
  936. {
  937. int rval;
  938. mbx_cmd_t mc;
  939. mbx_cmd_t *mcp = &mc;
  940. struct qla_hw_data *ha = vha->hw;
  941. DEBUG11(printk("qla2x00_init_firmware(%ld): entered.\n",
  942. vha->host_no));
  943. if (ha->flags.npiv_supported)
  944. mcp->mb[0] = MBC_MID_INITIALIZE_FIRMWARE;
  945. else
  946. mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
  947. mcp->mb[1] = 0;
  948. mcp->mb[2] = MSW(ha->init_cb_dma);
  949. mcp->mb[3] = LSW(ha->init_cb_dma);
  950. mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
  951. mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
  952. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  953. if (IS_QLA81XX(ha) && ha->ex_init_cb->ex_version) {
  954. mcp->mb[1] = BIT_0;
  955. mcp->mb[10] = MSW(ha->ex_init_cb_dma);
  956. mcp->mb[11] = LSW(ha->ex_init_cb_dma);
  957. mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
  958. mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
  959. mcp->mb[14] = sizeof(*ha->ex_init_cb);
  960. mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
  961. }
  962. mcp->in_mb = MBX_0;
  963. mcp->buf_size = size;
  964. mcp->flags = MBX_DMA_OUT;
  965. mcp->tov = MBX_TOV_SECONDS;
  966. rval = qla2x00_mailbox_command(vha, mcp);
  967. if (rval != QLA_SUCCESS) {
  968. /*EMPTY*/
  969. DEBUG2_3_11(printk("qla2x00_init_firmware(%ld): failed=%x "
  970. "mb0=%x.\n",
  971. vha->host_no, rval, mcp->mb[0]));
  972. } else {
  973. /*EMPTY*/
  974. DEBUG11(printk("qla2x00_init_firmware(%ld): done.\n",
  975. vha->host_no));
  976. }
  977. return rval;
  978. }
  979. /*
  980. * qla2x00_get_port_database
  981. * Issue normal/enhanced get port database mailbox command
  982. * and copy device name as necessary.
  983. *
  984. * Input:
  985. * ha = adapter state pointer.
  986. * dev = structure pointer.
  987. * opt = enhanced cmd option byte.
  988. *
  989. * Returns:
  990. * qla2x00 local function return status code.
  991. *
  992. * Context:
  993. * Kernel context.
  994. */
  995. int
  996. qla2x00_get_port_database(scsi_qla_host_t *vha, fc_port_t *fcport, uint8_t opt)
  997. {
  998. int rval;
  999. mbx_cmd_t mc;
  1000. mbx_cmd_t *mcp = &mc;
  1001. port_database_t *pd;
  1002. struct port_database_24xx *pd24;
  1003. dma_addr_t pd_dma;
  1004. struct qla_hw_data *ha = vha->hw;
  1005. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1006. pd24 = NULL;
  1007. pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma);
  1008. if (pd == NULL) {
  1009. DEBUG2_3(printk("%s(%ld): failed to allocate Port Database "
  1010. "structure.\n", __func__, vha->host_no));
  1011. return QLA_MEMORY_ALLOC_FAILED;
  1012. }
  1013. memset(pd, 0, max(PORT_DATABASE_SIZE, PORT_DATABASE_24XX_SIZE));
  1014. mcp->mb[0] = MBC_GET_PORT_DATABASE;
  1015. if (opt != 0 && !IS_FWI2_CAPABLE(ha))
  1016. mcp->mb[0] = MBC_ENHANCED_GET_PORT_DATABASE;
  1017. mcp->mb[2] = MSW(pd_dma);
  1018. mcp->mb[3] = LSW(pd_dma);
  1019. mcp->mb[6] = MSW(MSD(pd_dma));
  1020. mcp->mb[7] = LSW(MSD(pd_dma));
  1021. mcp->mb[9] = vha->vp_idx;
  1022. mcp->out_mb = MBX_9|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1023. mcp->in_mb = MBX_0;
  1024. if (IS_FWI2_CAPABLE(ha)) {
  1025. mcp->mb[1] = fcport->loop_id;
  1026. mcp->mb[10] = opt;
  1027. mcp->out_mb |= MBX_10|MBX_1;
  1028. mcp->in_mb |= MBX_1;
  1029. } else if (HAS_EXTENDED_IDS(ha)) {
  1030. mcp->mb[1] = fcport->loop_id;
  1031. mcp->mb[10] = opt;
  1032. mcp->out_mb |= MBX_10|MBX_1;
  1033. } else {
  1034. mcp->mb[1] = fcport->loop_id << 8 | opt;
  1035. mcp->out_mb |= MBX_1;
  1036. }
  1037. mcp->buf_size = IS_FWI2_CAPABLE(ha) ?
  1038. PORT_DATABASE_24XX_SIZE : PORT_DATABASE_SIZE;
  1039. mcp->flags = MBX_DMA_IN;
  1040. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1041. rval = qla2x00_mailbox_command(vha, mcp);
  1042. if (rval != QLA_SUCCESS)
  1043. goto gpd_error_out;
  1044. if (IS_FWI2_CAPABLE(ha)) {
  1045. pd24 = (struct port_database_24xx *) pd;
  1046. /* Check for logged in state. */
  1047. if (pd24->current_login_state != PDS_PRLI_COMPLETE &&
  1048. pd24->last_login_state != PDS_PRLI_COMPLETE) {
  1049. DEBUG2(printk("%s(%ld): Unable to verify "
  1050. "login-state (%x/%x) for loop_id %x\n",
  1051. __func__, vha->host_no,
  1052. pd24->current_login_state,
  1053. pd24->last_login_state, fcport->loop_id));
  1054. rval = QLA_FUNCTION_FAILED;
  1055. goto gpd_error_out;
  1056. }
  1057. /* Names are little-endian. */
  1058. memcpy(fcport->node_name, pd24->node_name, WWN_SIZE);
  1059. memcpy(fcport->port_name, pd24->port_name, WWN_SIZE);
  1060. /* Get port_id of device. */
  1061. fcport->d_id.b.domain = pd24->port_id[0];
  1062. fcport->d_id.b.area = pd24->port_id[1];
  1063. fcport->d_id.b.al_pa = pd24->port_id[2];
  1064. fcport->d_id.b.rsvd_1 = 0;
  1065. /* If not target must be initiator or unknown type. */
  1066. if ((pd24->prli_svc_param_word_3[0] & BIT_4) == 0)
  1067. fcport->port_type = FCT_INITIATOR;
  1068. else
  1069. fcport->port_type = FCT_TARGET;
  1070. } else {
  1071. /* Check for logged in state. */
  1072. if (pd->master_state != PD_STATE_PORT_LOGGED_IN &&
  1073. pd->slave_state != PD_STATE_PORT_LOGGED_IN) {
  1074. rval = QLA_FUNCTION_FAILED;
  1075. goto gpd_error_out;
  1076. }
  1077. /* Names are little-endian. */
  1078. memcpy(fcport->node_name, pd->node_name, WWN_SIZE);
  1079. memcpy(fcport->port_name, pd->port_name, WWN_SIZE);
  1080. /* Get port_id of device. */
  1081. fcport->d_id.b.domain = pd->port_id[0];
  1082. fcport->d_id.b.area = pd->port_id[3];
  1083. fcport->d_id.b.al_pa = pd->port_id[2];
  1084. fcport->d_id.b.rsvd_1 = 0;
  1085. /* If not target must be initiator or unknown type. */
  1086. if ((pd->prli_svc_param_word_3[0] & BIT_4) == 0)
  1087. fcport->port_type = FCT_INITIATOR;
  1088. else
  1089. fcport->port_type = FCT_TARGET;
  1090. /* Passback COS information. */
  1091. fcport->supported_classes = (pd->options & BIT_4) ?
  1092. FC_COS_CLASS2: FC_COS_CLASS3;
  1093. }
  1094. gpd_error_out:
  1095. dma_pool_free(ha->s_dma_pool, pd, pd_dma);
  1096. if (rval != QLA_SUCCESS) {
  1097. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  1098. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1099. } else {
  1100. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1101. }
  1102. return rval;
  1103. }
  1104. /*
  1105. * qla2x00_get_firmware_state
  1106. * Get adapter firmware state.
  1107. *
  1108. * Input:
  1109. * ha = adapter block pointer.
  1110. * dptr = pointer for firmware state.
  1111. * TARGET_QUEUE_LOCK must be released.
  1112. * ADAPTER_STATE_LOCK must be released.
  1113. *
  1114. * Returns:
  1115. * qla2x00 local function return status code.
  1116. *
  1117. * Context:
  1118. * Kernel context.
  1119. */
  1120. int
  1121. qla2x00_get_firmware_state(scsi_qla_host_t *vha, uint16_t *states)
  1122. {
  1123. int rval;
  1124. mbx_cmd_t mc;
  1125. mbx_cmd_t *mcp = &mc;
  1126. DEBUG11(printk("qla2x00_get_firmware_state(%ld): entered.\n",
  1127. vha->host_no));
  1128. mcp->mb[0] = MBC_GET_FIRMWARE_STATE;
  1129. mcp->out_mb = MBX_0;
  1130. if (IS_FWI2_CAPABLE(vha->hw))
  1131. mcp->in_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  1132. else
  1133. mcp->in_mb = MBX_1|MBX_0;
  1134. mcp->tov = MBX_TOV_SECONDS;
  1135. mcp->flags = 0;
  1136. rval = qla2x00_mailbox_command(vha, mcp);
  1137. /* Return firmware states. */
  1138. states[0] = mcp->mb[1];
  1139. if (IS_FWI2_CAPABLE(vha->hw)) {
  1140. states[1] = mcp->mb[2];
  1141. states[2] = mcp->mb[3];
  1142. states[3] = mcp->mb[4];
  1143. states[4] = mcp->mb[5];
  1144. }
  1145. if (rval != QLA_SUCCESS) {
  1146. /*EMPTY*/
  1147. DEBUG2_3_11(printk("qla2x00_get_firmware_state(%ld): "
  1148. "failed=%x.\n", vha->host_no, rval));
  1149. } else {
  1150. /*EMPTY*/
  1151. DEBUG11(printk("qla2x00_get_firmware_state(%ld): done.\n",
  1152. vha->host_no));
  1153. }
  1154. return rval;
  1155. }
  1156. /*
  1157. * qla2x00_get_port_name
  1158. * Issue get port name mailbox command.
  1159. * Returned name is in big endian format.
  1160. *
  1161. * Input:
  1162. * ha = adapter block pointer.
  1163. * loop_id = loop ID of device.
  1164. * name = pointer for name.
  1165. * TARGET_QUEUE_LOCK must be released.
  1166. * ADAPTER_STATE_LOCK must be released.
  1167. *
  1168. * Returns:
  1169. * qla2x00 local function return status code.
  1170. *
  1171. * Context:
  1172. * Kernel context.
  1173. */
  1174. int
  1175. qla2x00_get_port_name(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t *name,
  1176. uint8_t opt)
  1177. {
  1178. int rval;
  1179. mbx_cmd_t mc;
  1180. mbx_cmd_t *mcp = &mc;
  1181. DEBUG11(printk("qla2x00_get_port_name(%ld): entered.\n",
  1182. vha->host_no));
  1183. mcp->mb[0] = MBC_GET_PORT_NAME;
  1184. mcp->mb[9] = vha->vp_idx;
  1185. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  1186. if (HAS_EXTENDED_IDS(vha->hw)) {
  1187. mcp->mb[1] = loop_id;
  1188. mcp->mb[10] = opt;
  1189. mcp->out_mb |= MBX_10;
  1190. } else {
  1191. mcp->mb[1] = loop_id << 8 | opt;
  1192. }
  1193. mcp->in_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1194. mcp->tov = MBX_TOV_SECONDS;
  1195. mcp->flags = 0;
  1196. rval = qla2x00_mailbox_command(vha, mcp);
  1197. if (rval != QLA_SUCCESS) {
  1198. /*EMPTY*/
  1199. DEBUG2_3_11(printk("qla2x00_get_port_name(%ld): failed=%x.\n",
  1200. vha->host_no, rval));
  1201. } else {
  1202. if (name != NULL) {
  1203. /* This function returns name in big endian. */
  1204. name[0] = MSB(mcp->mb[2]);
  1205. name[1] = LSB(mcp->mb[2]);
  1206. name[2] = MSB(mcp->mb[3]);
  1207. name[3] = LSB(mcp->mb[3]);
  1208. name[4] = MSB(mcp->mb[6]);
  1209. name[5] = LSB(mcp->mb[6]);
  1210. name[6] = MSB(mcp->mb[7]);
  1211. name[7] = LSB(mcp->mb[7]);
  1212. }
  1213. DEBUG11(printk("qla2x00_get_port_name(%ld): done.\n",
  1214. vha->host_no));
  1215. }
  1216. return rval;
  1217. }
  1218. /*
  1219. * qla2x00_lip_reset
  1220. * Issue LIP reset mailbox command.
  1221. *
  1222. * Input:
  1223. * ha = adapter block pointer.
  1224. * TARGET_QUEUE_LOCK must be released.
  1225. * ADAPTER_STATE_LOCK must be released.
  1226. *
  1227. * Returns:
  1228. * qla2x00 local function return status code.
  1229. *
  1230. * Context:
  1231. * Kernel context.
  1232. */
  1233. int
  1234. qla2x00_lip_reset(scsi_qla_host_t *vha)
  1235. {
  1236. int rval;
  1237. mbx_cmd_t mc;
  1238. mbx_cmd_t *mcp = &mc;
  1239. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1240. if (IS_QLA81XX(vha->hw)) {
  1241. /* Logout across all FCFs. */
  1242. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1243. mcp->mb[1] = BIT_1;
  1244. mcp->mb[2] = 0;
  1245. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1246. } else if (IS_FWI2_CAPABLE(vha->hw)) {
  1247. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1248. mcp->mb[1] = BIT_6;
  1249. mcp->mb[2] = 0;
  1250. mcp->mb[3] = vha->hw->loop_reset_delay;
  1251. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1252. } else {
  1253. mcp->mb[0] = MBC_LIP_RESET;
  1254. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1255. if (HAS_EXTENDED_IDS(vha->hw)) {
  1256. mcp->mb[1] = 0x00ff;
  1257. mcp->mb[10] = 0;
  1258. mcp->out_mb |= MBX_10;
  1259. } else {
  1260. mcp->mb[1] = 0xff00;
  1261. }
  1262. mcp->mb[2] = vha->hw->loop_reset_delay;
  1263. mcp->mb[3] = 0;
  1264. }
  1265. mcp->in_mb = MBX_0;
  1266. mcp->tov = MBX_TOV_SECONDS;
  1267. mcp->flags = 0;
  1268. rval = qla2x00_mailbox_command(vha, mcp);
  1269. if (rval != QLA_SUCCESS) {
  1270. /*EMPTY*/
  1271. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n",
  1272. __func__, vha->host_no, rval));
  1273. } else {
  1274. /*EMPTY*/
  1275. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1276. }
  1277. return rval;
  1278. }
  1279. /*
  1280. * qla2x00_send_sns
  1281. * Send SNS command.
  1282. *
  1283. * Input:
  1284. * ha = adapter block pointer.
  1285. * sns = pointer for command.
  1286. * cmd_size = command size.
  1287. * buf_size = response/command size.
  1288. * TARGET_QUEUE_LOCK must be released.
  1289. * ADAPTER_STATE_LOCK must be released.
  1290. *
  1291. * Returns:
  1292. * qla2x00 local function return status code.
  1293. *
  1294. * Context:
  1295. * Kernel context.
  1296. */
  1297. int
  1298. qla2x00_send_sns(scsi_qla_host_t *vha, dma_addr_t sns_phys_address,
  1299. uint16_t cmd_size, size_t buf_size)
  1300. {
  1301. int rval;
  1302. mbx_cmd_t mc;
  1303. mbx_cmd_t *mcp = &mc;
  1304. DEBUG11(printk("qla2x00_send_sns(%ld): entered.\n",
  1305. vha->host_no));
  1306. DEBUG11(printk("qla2x00_send_sns: retry cnt=%d ratov=%d total "
  1307. "tov=%d.\n", vha->hw->retry_count, vha->hw->login_timeout,
  1308. mcp->tov));
  1309. mcp->mb[0] = MBC_SEND_SNS_COMMAND;
  1310. mcp->mb[1] = cmd_size;
  1311. mcp->mb[2] = MSW(sns_phys_address);
  1312. mcp->mb[3] = LSW(sns_phys_address);
  1313. mcp->mb[6] = MSW(MSD(sns_phys_address));
  1314. mcp->mb[7] = LSW(MSD(sns_phys_address));
  1315. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1316. mcp->in_mb = MBX_0|MBX_1;
  1317. mcp->buf_size = buf_size;
  1318. mcp->flags = MBX_DMA_OUT|MBX_DMA_IN;
  1319. mcp->tov = (vha->hw->login_timeout * 2) + (vha->hw->login_timeout / 2);
  1320. rval = qla2x00_mailbox_command(vha, mcp);
  1321. if (rval != QLA_SUCCESS) {
  1322. /*EMPTY*/
  1323. DEBUG(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1324. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1325. DEBUG2_3_11(printk("qla2x00_send_sns(%ld): failed=%x mb[0]=%x "
  1326. "mb[1]=%x.\n", vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  1327. } else {
  1328. /*EMPTY*/
  1329. DEBUG11(printk("qla2x00_send_sns(%ld): done.\n", vha->host_no));
  1330. }
  1331. return rval;
  1332. }
  1333. int
  1334. qla24xx_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1335. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1336. {
  1337. int rval;
  1338. struct logio_entry_24xx *lg;
  1339. dma_addr_t lg_dma;
  1340. uint32_t iop[2];
  1341. struct qla_hw_data *ha = vha->hw;
  1342. struct req_que *req;
  1343. struct rsp_que *rsp;
  1344. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1345. if (ha->flags.cpu_affinity_enabled)
  1346. req = ha->req_q_map[0];
  1347. else
  1348. req = vha->req;
  1349. rsp = req->rsp;
  1350. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1351. if (lg == NULL) {
  1352. DEBUG2_3(printk("%s(%ld): failed to allocate Login IOCB.\n",
  1353. __func__, vha->host_no));
  1354. return QLA_MEMORY_ALLOC_FAILED;
  1355. }
  1356. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1357. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1358. lg->entry_count = 1;
  1359. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1360. lg->nport_handle = cpu_to_le16(loop_id);
  1361. lg->control_flags = __constant_cpu_to_le16(LCF_COMMAND_PLOGI);
  1362. if (opt & BIT_0)
  1363. lg->control_flags |= __constant_cpu_to_le16(LCF_COND_PLOGI);
  1364. if (opt & BIT_1)
  1365. lg->control_flags |= __constant_cpu_to_le16(LCF_SKIP_PRLI);
  1366. lg->port_id[0] = al_pa;
  1367. lg->port_id[1] = area;
  1368. lg->port_id[2] = domain;
  1369. lg->vp_index = vha->vp_idx;
  1370. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1371. if (rval != QLA_SUCCESS) {
  1372. DEBUG2_3_11(printk("%s(%ld): failed to issue Login IOCB "
  1373. "(%x).\n", __func__, vha->host_no, rval));
  1374. } else if (lg->entry_status != 0) {
  1375. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1376. "-- error status (%x).\n", __func__, vha->host_no,
  1377. lg->entry_status));
  1378. rval = QLA_FUNCTION_FAILED;
  1379. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1380. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1381. iop[1] = le32_to_cpu(lg->io_parameter[1]);
  1382. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1383. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1384. vha->host_no, le16_to_cpu(lg->comp_status), iop[0],
  1385. iop[1]));
  1386. switch (iop[0]) {
  1387. case LSC_SCODE_PORTID_USED:
  1388. mb[0] = MBS_PORT_ID_USED;
  1389. mb[1] = LSW(iop[1]);
  1390. break;
  1391. case LSC_SCODE_NPORT_USED:
  1392. mb[0] = MBS_LOOP_ID_USED;
  1393. break;
  1394. case LSC_SCODE_NOLINK:
  1395. case LSC_SCODE_NOIOCB:
  1396. case LSC_SCODE_NOXCB:
  1397. case LSC_SCODE_CMD_FAILED:
  1398. case LSC_SCODE_NOFABRIC:
  1399. case LSC_SCODE_FW_NOT_READY:
  1400. case LSC_SCODE_NOT_LOGGED_IN:
  1401. case LSC_SCODE_NOPCB:
  1402. case LSC_SCODE_ELS_REJECT:
  1403. case LSC_SCODE_CMD_PARAM_ERR:
  1404. case LSC_SCODE_NONPORT:
  1405. case LSC_SCODE_LOGGED_IN:
  1406. case LSC_SCODE_NOFLOGI_ACC:
  1407. default:
  1408. mb[0] = MBS_COMMAND_ERROR;
  1409. break;
  1410. }
  1411. } else {
  1412. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1413. iop[0] = le32_to_cpu(lg->io_parameter[0]);
  1414. mb[0] = MBS_COMMAND_COMPLETE;
  1415. mb[1] = 0;
  1416. if (iop[0] & BIT_4) {
  1417. if (iop[0] & BIT_8)
  1418. mb[1] |= BIT_1;
  1419. } else
  1420. mb[1] = BIT_0;
  1421. /* Passback COS information. */
  1422. mb[10] = 0;
  1423. if (lg->io_parameter[7] || lg->io_parameter[8])
  1424. mb[10] |= BIT_0; /* Class 2. */
  1425. if (lg->io_parameter[9] || lg->io_parameter[10])
  1426. mb[10] |= BIT_1; /* Class 3. */
  1427. }
  1428. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1429. return rval;
  1430. }
  1431. /*
  1432. * qla2x00_login_fabric
  1433. * Issue login fabric port mailbox command.
  1434. *
  1435. * Input:
  1436. * ha = adapter block pointer.
  1437. * loop_id = device loop ID.
  1438. * domain = device domain.
  1439. * area = device area.
  1440. * al_pa = device AL_PA.
  1441. * status = pointer for return status.
  1442. * opt = command options.
  1443. * TARGET_QUEUE_LOCK must be released.
  1444. * ADAPTER_STATE_LOCK must be released.
  1445. *
  1446. * Returns:
  1447. * qla2x00 local function return status code.
  1448. *
  1449. * Context:
  1450. * Kernel context.
  1451. */
  1452. int
  1453. qla2x00_login_fabric(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1454. uint8_t area, uint8_t al_pa, uint16_t *mb, uint8_t opt)
  1455. {
  1456. int rval;
  1457. mbx_cmd_t mc;
  1458. mbx_cmd_t *mcp = &mc;
  1459. struct qla_hw_data *ha = vha->hw;
  1460. DEBUG11(printk("qla2x00_login_fabric(%ld): entered.\n", vha->host_no));
  1461. mcp->mb[0] = MBC_LOGIN_FABRIC_PORT;
  1462. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1463. if (HAS_EXTENDED_IDS(ha)) {
  1464. mcp->mb[1] = loop_id;
  1465. mcp->mb[10] = opt;
  1466. mcp->out_mb |= MBX_10;
  1467. } else {
  1468. mcp->mb[1] = (loop_id << 8) | opt;
  1469. }
  1470. mcp->mb[2] = domain;
  1471. mcp->mb[3] = area << 8 | al_pa;
  1472. mcp->in_mb = MBX_7|MBX_6|MBX_2|MBX_1|MBX_0;
  1473. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1474. mcp->flags = 0;
  1475. rval = qla2x00_mailbox_command(vha, mcp);
  1476. /* Return mailbox statuses. */
  1477. if (mb != NULL) {
  1478. mb[0] = mcp->mb[0];
  1479. mb[1] = mcp->mb[1];
  1480. mb[2] = mcp->mb[2];
  1481. mb[6] = mcp->mb[6];
  1482. mb[7] = mcp->mb[7];
  1483. /* COS retrieved from Get-Port-Database mailbox command. */
  1484. mb[10] = 0;
  1485. }
  1486. if (rval != QLA_SUCCESS) {
  1487. /* RLU tmp code: need to change main mailbox_command function to
  1488. * return ok even when the mailbox completion value is not
  1489. * SUCCESS. The caller needs to be responsible to interpret
  1490. * the return values of this mailbox command if we're not
  1491. * to change too much of the existing code.
  1492. */
  1493. if (mcp->mb[0] == 0x4001 || mcp->mb[0] == 0x4002 ||
  1494. mcp->mb[0] == 0x4003 || mcp->mb[0] == 0x4005 ||
  1495. mcp->mb[0] == 0x4006)
  1496. rval = QLA_SUCCESS;
  1497. /*EMPTY*/
  1498. DEBUG2_3_11(printk("qla2x00_login_fabric(%ld): failed=%x "
  1499. "mb[0]=%x mb[1]=%x mb[2]=%x.\n", vha->host_no, rval,
  1500. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  1501. } else {
  1502. /*EMPTY*/
  1503. DEBUG11(printk("qla2x00_login_fabric(%ld): done.\n",
  1504. vha->host_no));
  1505. }
  1506. return rval;
  1507. }
  1508. /*
  1509. * qla2x00_login_local_device
  1510. * Issue login loop port mailbox command.
  1511. *
  1512. * Input:
  1513. * ha = adapter block pointer.
  1514. * loop_id = device loop ID.
  1515. * opt = command options.
  1516. *
  1517. * Returns:
  1518. * Return status code.
  1519. *
  1520. * Context:
  1521. * Kernel context.
  1522. *
  1523. */
  1524. int
  1525. qla2x00_login_local_device(scsi_qla_host_t *vha, fc_port_t *fcport,
  1526. uint16_t *mb_ret, uint8_t opt)
  1527. {
  1528. int rval;
  1529. mbx_cmd_t mc;
  1530. mbx_cmd_t *mcp = &mc;
  1531. struct qla_hw_data *ha = vha->hw;
  1532. if (IS_FWI2_CAPABLE(ha))
  1533. return qla24xx_login_fabric(vha, fcport->loop_id,
  1534. fcport->d_id.b.domain, fcport->d_id.b.area,
  1535. fcport->d_id.b.al_pa, mb_ret, opt);
  1536. DEBUG3(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1537. mcp->mb[0] = MBC_LOGIN_LOOP_PORT;
  1538. if (HAS_EXTENDED_IDS(ha))
  1539. mcp->mb[1] = fcport->loop_id;
  1540. else
  1541. mcp->mb[1] = fcport->loop_id << 8;
  1542. mcp->mb[2] = opt;
  1543. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  1544. mcp->in_mb = MBX_7|MBX_6|MBX_1|MBX_0;
  1545. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1546. mcp->flags = 0;
  1547. rval = qla2x00_mailbox_command(vha, mcp);
  1548. /* Return mailbox statuses. */
  1549. if (mb_ret != NULL) {
  1550. mb_ret[0] = mcp->mb[0];
  1551. mb_ret[1] = mcp->mb[1];
  1552. mb_ret[6] = mcp->mb[6];
  1553. mb_ret[7] = mcp->mb[7];
  1554. }
  1555. if (rval != QLA_SUCCESS) {
  1556. /* AV tmp code: need to change main mailbox_command function to
  1557. * return ok even when the mailbox completion value is not
  1558. * SUCCESS. The caller needs to be responsible to interpret
  1559. * the return values of this mailbox command if we're not
  1560. * to change too much of the existing code.
  1561. */
  1562. if (mcp->mb[0] == 0x4005 || mcp->mb[0] == 0x4006)
  1563. rval = QLA_SUCCESS;
  1564. DEBUG(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1565. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1566. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1567. DEBUG2_3(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  1568. "mb[6]=%x mb[7]=%x.\n", __func__, vha->host_no, rval,
  1569. mcp->mb[0], mcp->mb[1], mcp->mb[6], mcp->mb[7]));
  1570. } else {
  1571. /*EMPTY*/
  1572. DEBUG3(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1573. }
  1574. return (rval);
  1575. }
  1576. int
  1577. qla24xx_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1578. uint8_t area, uint8_t al_pa)
  1579. {
  1580. int rval;
  1581. struct logio_entry_24xx *lg;
  1582. dma_addr_t lg_dma;
  1583. struct qla_hw_data *ha = vha->hw;
  1584. struct req_que *req;
  1585. struct rsp_que *rsp;
  1586. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1587. lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma);
  1588. if (lg == NULL) {
  1589. DEBUG2_3(printk("%s(%ld): failed to allocate Logout IOCB.\n",
  1590. __func__, vha->host_no));
  1591. return QLA_MEMORY_ALLOC_FAILED;
  1592. }
  1593. memset(lg, 0, sizeof(struct logio_entry_24xx));
  1594. if (ql2xmaxqueues > 1)
  1595. req = ha->req_q_map[0];
  1596. else
  1597. req = vha->req;
  1598. rsp = req->rsp;
  1599. lg->entry_type = LOGINOUT_PORT_IOCB_TYPE;
  1600. lg->entry_count = 1;
  1601. lg->handle = MAKE_HANDLE(req->id, lg->handle);
  1602. lg->nport_handle = cpu_to_le16(loop_id);
  1603. lg->control_flags =
  1604. __constant_cpu_to_le16(LCF_COMMAND_LOGO|LCF_IMPL_LOGO);
  1605. lg->port_id[0] = al_pa;
  1606. lg->port_id[1] = area;
  1607. lg->port_id[2] = domain;
  1608. lg->vp_index = vha->vp_idx;
  1609. rval = qla2x00_issue_iocb(vha, lg, lg_dma, 0);
  1610. if (rval != QLA_SUCCESS) {
  1611. DEBUG2_3_11(printk("%s(%ld): failed to issue Logout IOCB "
  1612. "(%x).\n", __func__, vha->host_no, rval));
  1613. } else if (lg->entry_status != 0) {
  1614. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  1615. "-- error status (%x).\n", __func__, vha->host_no,
  1616. lg->entry_status));
  1617. rval = QLA_FUNCTION_FAILED;
  1618. } else if (lg->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  1619. DEBUG2_3_11(printk("%s(%ld %d): failed to complete IOCB "
  1620. "-- completion status (%x) ioparam=%x/%x.\n", __func__,
  1621. vha->host_no, vha->vp_idx, le16_to_cpu(lg->comp_status),
  1622. le32_to_cpu(lg->io_parameter[0]),
  1623. le32_to_cpu(lg->io_parameter[1])));
  1624. } else {
  1625. /*EMPTY*/
  1626. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1627. }
  1628. dma_pool_free(ha->s_dma_pool, lg, lg_dma);
  1629. return rval;
  1630. }
  1631. /*
  1632. * qla2x00_fabric_logout
  1633. * Issue logout fabric port mailbox command.
  1634. *
  1635. * Input:
  1636. * ha = adapter block pointer.
  1637. * loop_id = device loop ID.
  1638. * TARGET_QUEUE_LOCK must be released.
  1639. * ADAPTER_STATE_LOCK must be released.
  1640. *
  1641. * Returns:
  1642. * qla2x00 local function return status code.
  1643. *
  1644. * Context:
  1645. * Kernel context.
  1646. */
  1647. int
  1648. qla2x00_fabric_logout(scsi_qla_host_t *vha, uint16_t loop_id, uint8_t domain,
  1649. uint8_t area, uint8_t al_pa)
  1650. {
  1651. int rval;
  1652. mbx_cmd_t mc;
  1653. mbx_cmd_t *mcp = &mc;
  1654. DEBUG11(printk("qla2x00_fabric_logout(%ld): entered.\n",
  1655. vha->host_no));
  1656. mcp->mb[0] = MBC_LOGOUT_FABRIC_PORT;
  1657. mcp->out_mb = MBX_1|MBX_0;
  1658. if (HAS_EXTENDED_IDS(vha->hw)) {
  1659. mcp->mb[1] = loop_id;
  1660. mcp->mb[10] = 0;
  1661. mcp->out_mb |= MBX_10;
  1662. } else {
  1663. mcp->mb[1] = loop_id << 8;
  1664. }
  1665. mcp->in_mb = MBX_1|MBX_0;
  1666. mcp->tov = MBX_TOV_SECONDS;
  1667. mcp->flags = 0;
  1668. rval = qla2x00_mailbox_command(vha, mcp);
  1669. if (rval != QLA_SUCCESS) {
  1670. /*EMPTY*/
  1671. DEBUG2_3_11(printk("qla2x00_fabric_logout(%ld): failed=%x "
  1672. "mbx1=%x.\n", vha->host_no, rval, mcp->mb[1]));
  1673. } else {
  1674. /*EMPTY*/
  1675. DEBUG11(printk("qla2x00_fabric_logout(%ld): done.\n",
  1676. vha->host_no));
  1677. }
  1678. return rval;
  1679. }
  1680. /*
  1681. * qla2x00_full_login_lip
  1682. * Issue full login LIP mailbox command.
  1683. *
  1684. * Input:
  1685. * ha = adapter block pointer.
  1686. * TARGET_QUEUE_LOCK must be released.
  1687. * ADAPTER_STATE_LOCK must be released.
  1688. *
  1689. * Returns:
  1690. * qla2x00 local function return status code.
  1691. *
  1692. * Context:
  1693. * Kernel context.
  1694. */
  1695. int
  1696. qla2x00_full_login_lip(scsi_qla_host_t *vha)
  1697. {
  1698. int rval;
  1699. mbx_cmd_t mc;
  1700. mbx_cmd_t *mcp = &mc;
  1701. DEBUG11(printk("qla2x00_full_login_lip(%ld): entered.\n",
  1702. vha->host_no));
  1703. mcp->mb[0] = MBC_LIP_FULL_LOGIN;
  1704. mcp->mb[1] = IS_FWI2_CAPABLE(vha->hw) ? BIT_3 : 0;
  1705. mcp->mb[2] = 0;
  1706. mcp->mb[3] = 0;
  1707. mcp->out_mb = MBX_3|MBX_2|MBX_1|MBX_0;
  1708. mcp->in_mb = MBX_0;
  1709. mcp->tov = MBX_TOV_SECONDS;
  1710. mcp->flags = 0;
  1711. rval = qla2x00_mailbox_command(vha, mcp);
  1712. if (rval != QLA_SUCCESS) {
  1713. /*EMPTY*/
  1714. DEBUG2_3_11(printk("qla2x00_full_login_lip(%ld): failed=%x.\n",
  1715. vha->host_no, rval));
  1716. } else {
  1717. /*EMPTY*/
  1718. DEBUG11(printk("qla2x00_full_login_lip(%ld): done.\n",
  1719. vha->host_no));
  1720. }
  1721. return rval;
  1722. }
  1723. /*
  1724. * qla2x00_get_id_list
  1725. *
  1726. * Input:
  1727. * ha = adapter block pointer.
  1728. *
  1729. * Returns:
  1730. * qla2x00 local function return status code.
  1731. *
  1732. * Context:
  1733. * Kernel context.
  1734. */
  1735. int
  1736. qla2x00_get_id_list(scsi_qla_host_t *vha, void *id_list, dma_addr_t id_list_dma,
  1737. uint16_t *entries)
  1738. {
  1739. int rval;
  1740. mbx_cmd_t mc;
  1741. mbx_cmd_t *mcp = &mc;
  1742. DEBUG11(printk("qla2x00_get_id_list(%ld): entered.\n",
  1743. vha->host_no));
  1744. if (id_list == NULL)
  1745. return QLA_FUNCTION_FAILED;
  1746. mcp->mb[0] = MBC_GET_ID_LIST;
  1747. mcp->out_mb = MBX_0;
  1748. if (IS_FWI2_CAPABLE(vha->hw)) {
  1749. mcp->mb[2] = MSW(id_list_dma);
  1750. mcp->mb[3] = LSW(id_list_dma);
  1751. mcp->mb[6] = MSW(MSD(id_list_dma));
  1752. mcp->mb[7] = LSW(MSD(id_list_dma));
  1753. mcp->mb[8] = 0;
  1754. mcp->mb[9] = vha->vp_idx;
  1755. mcp->out_mb |= MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2;
  1756. } else {
  1757. mcp->mb[1] = MSW(id_list_dma);
  1758. mcp->mb[2] = LSW(id_list_dma);
  1759. mcp->mb[3] = MSW(MSD(id_list_dma));
  1760. mcp->mb[6] = LSW(MSD(id_list_dma));
  1761. mcp->out_mb |= MBX_6|MBX_3|MBX_2|MBX_1;
  1762. }
  1763. mcp->in_mb = MBX_1|MBX_0;
  1764. mcp->tov = MBX_TOV_SECONDS;
  1765. mcp->flags = 0;
  1766. rval = qla2x00_mailbox_command(vha, mcp);
  1767. if (rval != QLA_SUCCESS) {
  1768. /*EMPTY*/
  1769. DEBUG2_3_11(printk("qla2x00_get_id_list(%ld): failed=%x.\n",
  1770. vha->host_no, rval));
  1771. } else {
  1772. *entries = mcp->mb[1];
  1773. DEBUG11(printk("qla2x00_get_id_list(%ld): done.\n",
  1774. vha->host_no));
  1775. }
  1776. return rval;
  1777. }
  1778. /*
  1779. * qla2x00_get_resource_cnts
  1780. * Get current firmware resource counts.
  1781. *
  1782. * Input:
  1783. * ha = adapter block pointer.
  1784. *
  1785. * Returns:
  1786. * qla2x00 local function return status code.
  1787. *
  1788. * Context:
  1789. * Kernel context.
  1790. */
  1791. int
  1792. qla2x00_get_resource_cnts(scsi_qla_host_t *vha, uint16_t *cur_xchg_cnt,
  1793. uint16_t *orig_xchg_cnt, uint16_t *cur_iocb_cnt,
  1794. uint16_t *orig_iocb_cnt, uint16_t *max_npiv_vports, uint16_t *max_fcfs)
  1795. {
  1796. int rval;
  1797. mbx_cmd_t mc;
  1798. mbx_cmd_t *mcp = &mc;
  1799. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1800. mcp->mb[0] = MBC_GET_RESOURCE_COUNTS;
  1801. mcp->out_mb = MBX_0;
  1802. mcp->in_mb = MBX_11|MBX_10|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  1803. if (IS_QLA81XX(vha->hw))
  1804. mcp->in_mb |= MBX_12;
  1805. mcp->tov = MBX_TOV_SECONDS;
  1806. mcp->flags = 0;
  1807. rval = qla2x00_mailbox_command(vha, mcp);
  1808. if (rval != QLA_SUCCESS) {
  1809. /*EMPTY*/
  1810. DEBUG2_3_11(printk("%s(%ld): failed = %x.\n", __func__,
  1811. vha->host_no, mcp->mb[0]));
  1812. } else {
  1813. DEBUG11(printk("%s(%ld): done. mb1=%x mb2=%x mb3=%x mb6=%x "
  1814. "mb7=%x mb10=%x mb11=%x mb12=%x.\n", __func__,
  1815. vha->host_no, mcp->mb[1], mcp->mb[2], mcp->mb[3],
  1816. mcp->mb[6], mcp->mb[7], mcp->mb[10], mcp->mb[11],
  1817. mcp->mb[12]));
  1818. if (cur_xchg_cnt)
  1819. *cur_xchg_cnt = mcp->mb[3];
  1820. if (orig_xchg_cnt)
  1821. *orig_xchg_cnt = mcp->mb[6];
  1822. if (cur_iocb_cnt)
  1823. *cur_iocb_cnt = mcp->mb[7];
  1824. if (orig_iocb_cnt)
  1825. *orig_iocb_cnt = mcp->mb[10];
  1826. if (vha->hw->flags.npiv_supported && max_npiv_vports)
  1827. *max_npiv_vports = mcp->mb[11];
  1828. if (IS_QLA81XX(vha->hw) && max_fcfs)
  1829. *max_fcfs = mcp->mb[12];
  1830. }
  1831. return (rval);
  1832. }
  1833. #if defined(QL_DEBUG_LEVEL_3)
  1834. /*
  1835. * qla2x00_get_fcal_position_map
  1836. * Get FCAL (LILP) position map using mailbox command
  1837. *
  1838. * Input:
  1839. * ha = adapter state pointer.
  1840. * pos_map = buffer pointer (can be NULL).
  1841. *
  1842. * Returns:
  1843. * qla2x00 local function return status code.
  1844. *
  1845. * Context:
  1846. * Kernel context.
  1847. */
  1848. int
  1849. qla2x00_get_fcal_position_map(scsi_qla_host_t *vha, char *pos_map)
  1850. {
  1851. int rval;
  1852. mbx_cmd_t mc;
  1853. mbx_cmd_t *mcp = &mc;
  1854. char *pmap;
  1855. dma_addr_t pmap_dma;
  1856. struct qla_hw_data *ha = vha->hw;
  1857. pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma);
  1858. if (pmap == NULL) {
  1859. DEBUG2_3_11(printk("%s(%ld): **** Mem Alloc Failed ****",
  1860. __func__, vha->host_no));
  1861. return QLA_MEMORY_ALLOC_FAILED;
  1862. }
  1863. memset(pmap, 0, FCAL_MAP_SIZE);
  1864. mcp->mb[0] = MBC_GET_FC_AL_POSITION_MAP;
  1865. mcp->mb[2] = MSW(pmap_dma);
  1866. mcp->mb[3] = LSW(pmap_dma);
  1867. mcp->mb[6] = MSW(MSD(pmap_dma));
  1868. mcp->mb[7] = LSW(MSD(pmap_dma));
  1869. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1870. mcp->in_mb = MBX_1|MBX_0;
  1871. mcp->buf_size = FCAL_MAP_SIZE;
  1872. mcp->flags = MBX_DMA_IN;
  1873. mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2);
  1874. rval = qla2x00_mailbox_command(vha, mcp);
  1875. if (rval == QLA_SUCCESS) {
  1876. DEBUG11(printk("%s(%ld): (mb0=%x/mb1=%x) FC/AL Position Map "
  1877. "size (%x)\n", __func__, vha->host_no, mcp->mb[0],
  1878. mcp->mb[1], (unsigned)pmap[0]));
  1879. DEBUG11(qla2x00_dump_buffer(pmap, pmap[0] + 1));
  1880. if (pos_map)
  1881. memcpy(pos_map, pmap, FCAL_MAP_SIZE);
  1882. }
  1883. dma_pool_free(ha->s_dma_pool, pmap, pmap_dma);
  1884. if (rval != QLA_SUCCESS) {
  1885. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1886. vha->host_no, rval));
  1887. } else {
  1888. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  1889. }
  1890. return rval;
  1891. }
  1892. #endif
  1893. /*
  1894. * qla2x00_get_link_status
  1895. *
  1896. * Input:
  1897. * ha = adapter block pointer.
  1898. * loop_id = device loop ID.
  1899. * ret_buf = pointer to link status return buffer.
  1900. *
  1901. * Returns:
  1902. * 0 = success.
  1903. * BIT_0 = mem alloc error.
  1904. * BIT_1 = mailbox error.
  1905. */
  1906. int
  1907. qla2x00_get_link_status(scsi_qla_host_t *vha, uint16_t loop_id,
  1908. struct link_statistics *stats, dma_addr_t stats_dma)
  1909. {
  1910. int rval;
  1911. mbx_cmd_t mc;
  1912. mbx_cmd_t *mcp = &mc;
  1913. uint32_t *siter, *diter, dwords;
  1914. struct qla_hw_data *ha = vha->hw;
  1915. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1916. mcp->mb[0] = MBC_GET_LINK_STATUS;
  1917. mcp->mb[2] = MSW(stats_dma);
  1918. mcp->mb[3] = LSW(stats_dma);
  1919. mcp->mb[6] = MSW(MSD(stats_dma));
  1920. mcp->mb[7] = LSW(MSD(stats_dma));
  1921. mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1922. mcp->in_mb = MBX_0;
  1923. if (IS_FWI2_CAPABLE(ha)) {
  1924. mcp->mb[1] = loop_id;
  1925. mcp->mb[4] = 0;
  1926. mcp->mb[10] = 0;
  1927. mcp->out_mb |= MBX_10|MBX_4|MBX_1;
  1928. mcp->in_mb |= MBX_1;
  1929. } else if (HAS_EXTENDED_IDS(ha)) {
  1930. mcp->mb[1] = loop_id;
  1931. mcp->mb[10] = 0;
  1932. mcp->out_mb |= MBX_10|MBX_1;
  1933. } else {
  1934. mcp->mb[1] = loop_id << 8;
  1935. mcp->out_mb |= MBX_1;
  1936. }
  1937. mcp->tov = MBX_TOV_SECONDS;
  1938. mcp->flags = IOCTL_CMD;
  1939. rval = qla2x00_mailbox_command(vha, mcp);
  1940. if (rval == QLA_SUCCESS) {
  1941. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  1942. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  1943. __func__, vha->host_no, mcp->mb[0]));
  1944. rval = QLA_FUNCTION_FAILED;
  1945. } else {
  1946. /* Copy over data -- firmware data is LE. */
  1947. dwords = offsetof(struct link_statistics, unused1) / 4;
  1948. siter = diter = &stats->link_fail_cnt;
  1949. while (dwords--)
  1950. *diter++ = le32_to_cpu(*siter++);
  1951. }
  1952. } else {
  1953. /* Failed. */
  1954. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1955. vha->host_no, rval));
  1956. }
  1957. return rval;
  1958. }
  1959. int
  1960. qla24xx_get_isp_stats(scsi_qla_host_t *vha, struct link_statistics *stats,
  1961. dma_addr_t stats_dma)
  1962. {
  1963. int rval;
  1964. mbx_cmd_t mc;
  1965. mbx_cmd_t *mcp = &mc;
  1966. uint32_t *siter, *diter, dwords;
  1967. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  1968. mcp->mb[0] = MBC_GET_LINK_PRIV_STATS;
  1969. mcp->mb[2] = MSW(stats_dma);
  1970. mcp->mb[3] = LSW(stats_dma);
  1971. mcp->mb[6] = MSW(MSD(stats_dma));
  1972. mcp->mb[7] = LSW(MSD(stats_dma));
  1973. mcp->mb[8] = sizeof(struct link_statistics) / 4;
  1974. mcp->mb[9] = vha->vp_idx;
  1975. mcp->mb[10] = 0;
  1976. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  1977. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  1978. mcp->tov = MBX_TOV_SECONDS;
  1979. mcp->flags = IOCTL_CMD;
  1980. rval = qla2x00_mailbox_command(vha, mcp);
  1981. if (rval == QLA_SUCCESS) {
  1982. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  1983. DEBUG2_3_11(printk("%s(%ld): cmd failed. mbx0=%x.\n",
  1984. __func__, vha->host_no, mcp->mb[0]));
  1985. rval = QLA_FUNCTION_FAILED;
  1986. } else {
  1987. /* Copy over data -- firmware data is LE. */
  1988. dwords = sizeof(struct link_statistics) / 4;
  1989. siter = diter = &stats->link_fail_cnt;
  1990. while (dwords--)
  1991. *diter++ = le32_to_cpu(*siter++);
  1992. }
  1993. } else {
  1994. /* Failed. */
  1995. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  1996. vha->host_no, rval));
  1997. }
  1998. return rval;
  1999. }
  2000. int
  2001. qla24xx_abort_command(srb_t *sp)
  2002. {
  2003. int rval;
  2004. unsigned long flags = 0;
  2005. struct abort_entry_24xx *abt;
  2006. dma_addr_t abt_dma;
  2007. uint32_t handle;
  2008. fc_port_t *fcport = sp->fcport;
  2009. struct scsi_qla_host *vha = fcport->vha;
  2010. struct qla_hw_data *ha = vha->hw;
  2011. struct req_que *req = vha->req;
  2012. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2013. spin_lock_irqsave(&ha->hardware_lock, flags);
  2014. for (handle = 1; handle < MAX_OUTSTANDING_COMMANDS; handle++) {
  2015. if (req->outstanding_cmds[handle] == sp)
  2016. break;
  2017. }
  2018. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2019. if (handle == MAX_OUTSTANDING_COMMANDS) {
  2020. /* Command not found. */
  2021. return QLA_FUNCTION_FAILED;
  2022. }
  2023. abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma);
  2024. if (abt == NULL) {
  2025. DEBUG2_3(printk("%s(%ld): failed to allocate Abort IOCB.\n",
  2026. __func__, vha->host_no));
  2027. return QLA_MEMORY_ALLOC_FAILED;
  2028. }
  2029. memset(abt, 0, sizeof(struct abort_entry_24xx));
  2030. abt->entry_type = ABORT_IOCB_TYPE;
  2031. abt->entry_count = 1;
  2032. abt->handle = MAKE_HANDLE(req->id, abt->handle);
  2033. abt->nport_handle = cpu_to_le16(fcport->loop_id);
  2034. abt->handle_to_abort = handle;
  2035. abt->port_id[0] = fcport->d_id.b.al_pa;
  2036. abt->port_id[1] = fcport->d_id.b.area;
  2037. abt->port_id[2] = fcport->d_id.b.domain;
  2038. abt->vp_index = fcport->vp_idx;
  2039. abt->req_que_no = cpu_to_le16(req->id);
  2040. rval = qla2x00_issue_iocb(vha, abt, abt_dma, 0);
  2041. if (rval != QLA_SUCCESS) {
  2042. DEBUG2_3_11(printk("%s(%ld): failed to issue IOCB (%x).\n",
  2043. __func__, vha->host_no, rval));
  2044. } else if (abt->entry_status != 0) {
  2045. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2046. "-- error status (%x).\n", __func__, vha->host_no,
  2047. abt->entry_status));
  2048. rval = QLA_FUNCTION_FAILED;
  2049. } else if (abt->nport_handle != __constant_cpu_to_le16(0)) {
  2050. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2051. "-- completion status (%x).\n", __func__, vha->host_no,
  2052. le16_to_cpu(abt->nport_handle)));
  2053. rval = QLA_FUNCTION_FAILED;
  2054. } else {
  2055. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2056. }
  2057. dma_pool_free(ha->s_dma_pool, abt, abt_dma);
  2058. return rval;
  2059. }
  2060. struct tsk_mgmt_cmd {
  2061. union {
  2062. struct tsk_mgmt_entry tsk;
  2063. struct sts_entry_24xx sts;
  2064. } p;
  2065. };
  2066. static int
  2067. __qla24xx_issue_tmf(char *name, uint32_t type, struct fc_port *fcport,
  2068. unsigned int l, int tag)
  2069. {
  2070. int rval, rval2;
  2071. struct tsk_mgmt_cmd *tsk;
  2072. struct sts_entry_24xx *sts;
  2073. dma_addr_t tsk_dma;
  2074. scsi_qla_host_t *vha;
  2075. struct qla_hw_data *ha;
  2076. struct req_que *req;
  2077. struct rsp_que *rsp;
  2078. DEBUG11(printk("%s(%ld): entered.\n", __func__, fcport->vha->host_no));
  2079. vha = fcport->vha;
  2080. ha = vha->hw;
  2081. req = vha->req;
  2082. if (ha->flags.cpu_affinity_enabled)
  2083. rsp = ha->rsp_q_map[tag + 1];
  2084. else
  2085. rsp = req->rsp;
  2086. tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma);
  2087. if (tsk == NULL) {
  2088. DEBUG2_3(printk("%s(%ld): failed to allocate Task Management "
  2089. "IOCB.\n", __func__, vha->host_no));
  2090. return QLA_MEMORY_ALLOC_FAILED;
  2091. }
  2092. memset(tsk, 0, sizeof(struct tsk_mgmt_cmd));
  2093. tsk->p.tsk.entry_type = TSK_MGMT_IOCB_TYPE;
  2094. tsk->p.tsk.entry_count = 1;
  2095. tsk->p.tsk.handle = MAKE_HANDLE(req->id, tsk->p.tsk.handle);
  2096. tsk->p.tsk.nport_handle = cpu_to_le16(fcport->loop_id);
  2097. tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2);
  2098. tsk->p.tsk.control_flags = cpu_to_le32(type);
  2099. tsk->p.tsk.port_id[0] = fcport->d_id.b.al_pa;
  2100. tsk->p.tsk.port_id[1] = fcport->d_id.b.area;
  2101. tsk->p.tsk.port_id[2] = fcport->d_id.b.domain;
  2102. tsk->p.tsk.vp_index = fcport->vp_idx;
  2103. if (type == TCF_LUN_RESET) {
  2104. int_to_scsilun(l, &tsk->p.tsk.lun);
  2105. host_to_fcp_swap((uint8_t *)&tsk->p.tsk.lun,
  2106. sizeof(tsk->p.tsk.lun));
  2107. }
  2108. sts = &tsk->p.sts;
  2109. rval = qla2x00_issue_iocb(vha, tsk, tsk_dma, 0);
  2110. if (rval != QLA_SUCCESS) {
  2111. DEBUG2_3_11(printk("%s(%ld): failed to issue %s Reset IOCB "
  2112. "(%x).\n", __func__, vha->host_no, name, rval));
  2113. } else if (sts->entry_status != 0) {
  2114. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2115. "-- error status (%x).\n", __func__, vha->host_no,
  2116. sts->entry_status));
  2117. rval = QLA_FUNCTION_FAILED;
  2118. } else if (sts->comp_status !=
  2119. __constant_cpu_to_le16(CS_COMPLETE)) {
  2120. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2121. "-- completion status (%x).\n", __func__,
  2122. vha->host_no, le16_to_cpu(sts->comp_status)));
  2123. rval = QLA_FUNCTION_FAILED;
  2124. } else if (!(le16_to_cpu(sts->scsi_status) &
  2125. SS_RESPONSE_INFO_LEN_VALID)) {
  2126. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2127. "-- no response info (%x).\n", __func__, vha->host_no,
  2128. le16_to_cpu(sts->scsi_status)));
  2129. rval = QLA_FUNCTION_FAILED;
  2130. } else if (le32_to_cpu(sts->rsp_data_len) < 4) {
  2131. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2132. "-- not enough response info (%d).\n", __func__,
  2133. vha->host_no, le32_to_cpu(sts->rsp_data_len)));
  2134. rval = QLA_FUNCTION_FAILED;
  2135. } else if (sts->data[3]) {
  2136. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2137. "-- response (%x).\n", __func__,
  2138. vha->host_no, sts->data[3]));
  2139. rval = QLA_FUNCTION_FAILED;
  2140. }
  2141. /* Issue marker IOCB. */
  2142. rval2 = qla2x00_marker(vha, req, rsp, fcport->loop_id, l,
  2143. type == TCF_LUN_RESET ? MK_SYNC_ID_LUN: MK_SYNC_ID);
  2144. if (rval2 != QLA_SUCCESS) {
  2145. DEBUG2_3_11(printk("%s(%ld): failed to issue Marker IOCB "
  2146. "(%x).\n", __func__, vha->host_no, rval2));
  2147. } else {
  2148. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2149. }
  2150. dma_pool_free(ha->s_dma_pool, tsk, tsk_dma);
  2151. return rval;
  2152. }
  2153. int
  2154. qla24xx_abort_target(struct fc_port *fcport, unsigned int l, int tag)
  2155. {
  2156. return __qla24xx_issue_tmf("Target", TCF_TARGET_RESET, fcport, l, tag);
  2157. }
  2158. int
  2159. qla24xx_lun_reset(struct fc_port *fcport, unsigned int l, int tag)
  2160. {
  2161. return __qla24xx_issue_tmf("Lun", TCF_LUN_RESET, fcport, l, tag);
  2162. }
  2163. int
  2164. qla2x00_system_error(scsi_qla_host_t *vha)
  2165. {
  2166. int rval;
  2167. mbx_cmd_t mc;
  2168. mbx_cmd_t *mcp = &mc;
  2169. struct qla_hw_data *ha = vha->hw;
  2170. if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha))
  2171. return QLA_FUNCTION_FAILED;
  2172. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2173. mcp->mb[0] = MBC_GEN_SYSTEM_ERROR;
  2174. mcp->out_mb = MBX_0;
  2175. mcp->in_mb = MBX_0;
  2176. mcp->tov = 5;
  2177. mcp->flags = 0;
  2178. rval = qla2x00_mailbox_command(vha, mcp);
  2179. if (rval != QLA_SUCCESS) {
  2180. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2181. vha->host_no, rval));
  2182. } else {
  2183. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2184. }
  2185. return rval;
  2186. }
  2187. /**
  2188. * qla2x00_set_serdes_params() -
  2189. * @ha: HA context
  2190. *
  2191. * Returns
  2192. */
  2193. int
  2194. qla2x00_set_serdes_params(scsi_qla_host_t *vha, uint16_t sw_em_1g,
  2195. uint16_t sw_em_2g, uint16_t sw_em_4g)
  2196. {
  2197. int rval;
  2198. mbx_cmd_t mc;
  2199. mbx_cmd_t *mcp = &mc;
  2200. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2201. mcp->mb[0] = MBC_SERDES_PARAMS;
  2202. mcp->mb[1] = BIT_0;
  2203. mcp->mb[2] = sw_em_1g | BIT_15;
  2204. mcp->mb[3] = sw_em_2g | BIT_15;
  2205. mcp->mb[4] = sw_em_4g | BIT_15;
  2206. mcp->out_mb = MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2207. mcp->in_mb = MBX_0;
  2208. mcp->tov = MBX_TOV_SECONDS;
  2209. mcp->flags = 0;
  2210. rval = qla2x00_mailbox_command(vha, mcp);
  2211. if (rval != QLA_SUCCESS) {
  2212. /*EMPTY*/
  2213. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2214. vha->host_no, rval, mcp->mb[0]));
  2215. } else {
  2216. /*EMPTY*/
  2217. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2218. }
  2219. return rval;
  2220. }
  2221. int
  2222. qla2x00_stop_firmware(scsi_qla_host_t *vha)
  2223. {
  2224. int rval;
  2225. mbx_cmd_t mc;
  2226. mbx_cmd_t *mcp = &mc;
  2227. if (!IS_FWI2_CAPABLE(vha->hw))
  2228. return QLA_FUNCTION_FAILED;
  2229. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2230. mcp->mb[0] = MBC_STOP_FIRMWARE;
  2231. mcp->out_mb = MBX_0;
  2232. mcp->in_mb = MBX_0;
  2233. mcp->tov = 5;
  2234. mcp->flags = 0;
  2235. rval = qla2x00_mailbox_command(vha, mcp);
  2236. if (rval != QLA_SUCCESS) {
  2237. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2238. vha->host_no, rval));
  2239. if (mcp->mb[0] == MBS_INVALID_COMMAND)
  2240. rval = QLA_INVALID_COMMAND;
  2241. } else {
  2242. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2243. }
  2244. return rval;
  2245. }
  2246. int
  2247. qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
  2248. uint16_t buffers)
  2249. {
  2250. int rval;
  2251. mbx_cmd_t mc;
  2252. mbx_cmd_t *mcp = &mc;
  2253. if (!IS_FWI2_CAPABLE(vha->hw))
  2254. return QLA_FUNCTION_FAILED;
  2255. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2256. return QLA_FUNCTION_FAILED;
  2257. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2258. mcp->mb[0] = MBC_TRACE_CONTROL;
  2259. mcp->mb[1] = TC_EFT_ENABLE;
  2260. mcp->mb[2] = LSW(eft_dma);
  2261. mcp->mb[3] = MSW(eft_dma);
  2262. mcp->mb[4] = LSW(MSD(eft_dma));
  2263. mcp->mb[5] = MSW(MSD(eft_dma));
  2264. mcp->mb[6] = buffers;
  2265. mcp->mb[7] = TC_AEN_DISABLE;
  2266. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2267. mcp->in_mb = MBX_1|MBX_0;
  2268. mcp->tov = MBX_TOV_SECONDS;
  2269. mcp->flags = 0;
  2270. rval = qla2x00_mailbox_command(vha, mcp);
  2271. if (rval != QLA_SUCCESS) {
  2272. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2273. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2274. } else {
  2275. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2276. }
  2277. return rval;
  2278. }
  2279. int
  2280. qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
  2281. {
  2282. int rval;
  2283. mbx_cmd_t mc;
  2284. mbx_cmd_t *mcp = &mc;
  2285. if (!IS_FWI2_CAPABLE(vha->hw))
  2286. return QLA_FUNCTION_FAILED;
  2287. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2288. return QLA_FUNCTION_FAILED;
  2289. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2290. mcp->mb[0] = MBC_TRACE_CONTROL;
  2291. mcp->mb[1] = TC_EFT_DISABLE;
  2292. mcp->out_mb = MBX_1|MBX_0;
  2293. mcp->in_mb = MBX_1|MBX_0;
  2294. mcp->tov = MBX_TOV_SECONDS;
  2295. mcp->flags = 0;
  2296. rval = qla2x00_mailbox_command(vha, mcp);
  2297. if (rval != QLA_SUCCESS) {
  2298. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2299. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2300. } else {
  2301. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2302. }
  2303. return rval;
  2304. }
  2305. int
  2306. qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
  2307. uint16_t buffers, uint16_t *mb, uint32_t *dwords)
  2308. {
  2309. int rval;
  2310. mbx_cmd_t mc;
  2311. mbx_cmd_t *mcp = &mc;
  2312. if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw))
  2313. return QLA_FUNCTION_FAILED;
  2314. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2315. return QLA_FUNCTION_FAILED;
  2316. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2317. mcp->mb[0] = MBC_TRACE_CONTROL;
  2318. mcp->mb[1] = TC_FCE_ENABLE;
  2319. mcp->mb[2] = LSW(fce_dma);
  2320. mcp->mb[3] = MSW(fce_dma);
  2321. mcp->mb[4] = LSW(MSD(fce_dma));
  2322. mcp->mb[5] = MSW(MSD(fce_dma));
  2323. mcp->mb[6] = buffers;
  2324. mcp->mb[7] = TC_AEN_DISABLE;
  2325. mcp->mb[8] = 0;
  2326. mcp->mb[9] = TC_FCE_DEFAULT_RX_SIZE;
  2327. mcp->mb[10] = TC_FCE_DEFAULT_TX_SIZE;
  2328. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2329. MBX_1|MBX_0;
  2330. mcp->in_mb = MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2331. mcp->tov = MBX_TOV_SECONDS;
  2332. mcp->flags = 0;
  2333. rval = qla2x00_mailbox_command(vha, mcp);
  2334. if (rval != QLA_SUCCESS) {
  2335. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2336. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2337. } else {
  2338. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2339. if (mb)
  2340. memcpy(mb, mcp->mb, 8 * sizeof(*mb));
  2341. if (dwords)
  2342. *dwords = buffers;
  2343. }
  2344. return rval;
  2345. }
  2346. int
  2347. qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
  2348. {
  2349. int rval;
  2350. mbx_cmd_t mc;
  2351. mbx_cmd_t *mcp = &mc;
  2352. if (!IS_FWI2_CAPABLE(vha->hw))
  2353. return QLA_FUNCTION_FAILED;
  2354. if (unlikely(pci_channel_offline(vha->hw->pdev)))
  2355. return QLA_FUNCTION_FAILED;
  2356. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2357. mcp->mb[0] = MBC_TRACE_CONTROL;
  2358. mcp->mb[1] = TC_FCE_DISABLE;
  2359. mcp->mb[2] = TC_FCE_DISABLE_TRACE;
  2360. mcp->out_mb = MBX_2|MBX_1|MBX_0;
  2361. mcp->in_mb = MBX_9|MBX_8|MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|
  2362. MBX_1|MBX_0;
  2363. mcp->tov = MBX_TOV_SECONDS;
  2364. mcp->flags = 0;
  2365. rval = qla2x00_mailbox_command(vha, mcp);
  2366. if (rval != QLA_SUCCESS) {
  2367. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2368. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2369. } else {
  2370. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2371. if (wr)
  2372. *wr = (uint64_t) mcp->mb[5] << 48 |
  2373. (uint64_t) mcp->mb[4] << 32 |
  2374. (uint64_t) mcp->mb[3] << 16 |
  2375. (uint64_t) mcp->mb[2];
  2376. if (rd)
  2377. *rd = (uint64_t) mcp->mb[9] << 48 |
  2378. (uint64_t) mcp->mb[8] << 32 |
  2379. (uint64_t) mcp->mb[7] << 16 |
  2380. (uint64_t) mcp->mb[6];
  2381. }
  2382. return rval;
  2383. }
  2384. int
  2385. qla2x00_read_sfp(scsi_qla_host_t *vha, dma_addr_t sfp_dma, uint16_t addr,
  2386. uint16_t off, uint16_t count)
  2387. {
  2388. int rval;
  2389. mbx_cmd_t mc;
  2390. mbx_cmd_t *mcp = &mc;
  2391. if (!IS_FWI2_CAPABLE(vha->hw))
  2392. return QLA_FUNCTION_FAILED;
  2393. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2394. mcp->mb[0] = MBC_READ_SFP;
  2395. mcp->mb[1] = addr;
  2396. mcp->mb[2] = MSW(sfp_dma);
  2397. mcp->mb[3] = LSW(sfp_dma);
  2398. mcp->mb[6] = MSW(MSD(sfp_dma));
  2399. mcp->mb[7] = LSW(MSD(sfp_dma));
  2400. mcp->mb[8] = count;
  2401. mcp->mb[9] = off;
  2402. mcp->mb[10] = 0;
  2403. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  2404. mcp->in_mb = MBX_0;
  2405. mcp->tov = MBX_TOV_SECONDS;
  2406. mcp->flags = 0;
  2407. rval = qla2x00_mailbox_command(vha, mcp);
  2408. if (rval != QLA_SUCCESS) {
  2409. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2410. vha->host_no, rval, mcp->mb[0]));
  2411. } else {
  2412. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2413. }
  2414. return rval;
  2415. }
  2416. int
  2417. qla2x00_set_idma_speed(scsi_qla_host_t *vha, uint16_t loop_id,
  2418. uint16_t port_speed, uint16_t *mb)
  2419. {
  2420. int rval;
  2421. mbx_cmd_t mc;
  2422. mbx_cmd_t *mcp = &mc;
  2423. if (!IS_IIDMA_CAPABLE(vha->hw))
  2424. return QLA_FUNCTION_FAILED;
  2425. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2426. mcp->mb[0] = MBC_PORT_PARAMS;
  2427. mcp->mb[1] = loop_id;
  2428. mcp->mb[2] = BIT_0;
  2429. if (IS_QLA81XX(vha->hw))
  2430. mcp->mb[3] = port_speed & (BIT_5|BIT_4|BIT_3|BIT_2|BIT_1|BIT_0);
  2431. else
  2432. mcp->mb[3] = port_speed & (BIT_2|BIT_1|BIT_0);
  2433. mcp->mb[9] = vha->vp_idx;
  2434. mcp->out_mb = MBX_9|MBX_3|MBX_2|MBX_1|MBX_0;
  2435. mcp->in_mb = MBX_3|MBX_1|MBX_0;
  2436. mcp->tov = MBX_TOV_SECONDS;
  2437. mcp->flags = 0;
  2438. rval = qla2x00_mailbox_command(vha, mcp);
  2439. /* Return mailbox statuses. */
  2440. if (mb != NULL) {
  2441. mb[0] = mcp->mb[0];
  2442. mb[1] = mcp->mb[1];
  2443. mb[3] = mcp->mb[3];
  2444. }
  2445. if (rval != QLA_SUCCESS) {
  2446. DEBUG2_3_11(printk("%s(%ld): failed=%x.\n", __func__,
  2447. vha->host_no, rval));
  2448. } else {
  2449. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2450. }
  2451. return rval;
  2452. }
  2453. void
  2454. qla24xx_report_id_acquisition(scsi_qla_host_t *vha,
  2455. struct vp_rpt_id_entry_24xx *rptid_entry)
  2456. {
  2457. uint8_t vp_idx;
  2458. uint16_t stat = le16_to_cpu(rptid_entry->vp_idx);
  2459. struct qla_hw_data *ha = vha->hw;
  2460. scsi_qla_host_t *vp;
  2461. scsi_qla_host_t *tvp;
  2462. if (rptid_entry->entry_status != 0)
  2463. return;
  2464. if (rptid_entry->format == 0) {
  2465. DEBUG15(printk("%s:format 0 : scsi(%ld) number of VPs setup %d,"
  2466. " number of VPs acquired %d\n", __func__, vha->host_no,
  2467. MSB(le16_to_cpu(rptid_entry->vp_count)),
  2468. LSB(le16_to_cpu(rptid_entry->vp_count))));
  2469. DEBUG15(printk("%s primary port id %02x%02x%02x\n", __func__,
  2470. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2471. rptid_entry->port_id[0]));
  2472. } else if (rptid_entry->format == 1) {
  2473. vp_idx = LSB(stat);
  2474. DEBUG15(printk("%s:format 1: scsi(%ld): VP[%d] enabled "
  2475. "- status %d - "
  2476. "with port id %02x%02x%02x\n", __func__, vha->host_no,
  2477. vp_idx, MSB(stat),
  2478. rptid_entry->port_id[2], rptid_entry->port_id[1],
  2479. rptid_entry->port_id[0]));
  2480. vp = vha;
  2481. if (vp_idx == 0 && (MSB(stat) != 1))
  2482. goto reg_needed;
  2483. if (MSB(stat) == 1) {
  2484. DEBUG2(printk("scsi(%ld): Could not acquire ID for "
  2485. "VP[%d].\n", vha->host_no, vp_idx));
  2486. return;
  2487. }
  2488. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list)
  2489. if (vp_idx == vp->vp_idx)
  2490. break;
  2491. if (!vp)
  2492. return;
  2493. vp->d_id.b.domain = rptid_entry->port_id[2];
  2494. vp->d_id.b.area = rptid_entry->port_id[1];
  2495. vp->d_id.b.al_pa = rptid_entry->port_id[0];
  2496. /*
  2497. * Cannot configure here as we are still sitting on the
  2498. * response queue. Handle it in dpc context.
  2499. */
  2500. set_bit(VP_IDX_ACQUIRED, &vp->vp_flags);
  2501. reg_needed:
  2502. set_bit(REGISTER_FC4_NEEDED, &vp->dpc_flags);
  2503. set_bit(REGISTER_FDMI_NEEDED, &vp->dpc_flags);
  2504. set_bit(VP_DPC_NEEDED, &vha->dpc_flags);
  2505. qla2xxx_wake_dpc(vha);
  2506. }
  2507. }
  2508. /*
  2509. * qla24xx_modify_vp_config
  2510. * Change VP configuration for vha
  2511. *
  2512. * Input:
  2513. * vha = adapter block pointer.
  2514. *
  2515. * Returns:
  2516. * qla2xxx local function return status code.
  2517. *
  2518. * Context:
  2519. * Kernel context.
  2520. */
  2521. int
  2522. qla24xx_modify_vp_config(scsi_qla_host_t *vha)
  2523. {
  2524. int rval;
  2525. struct vp_config_entry_24xx *vpmod;
  2526. dma_addr_t vpmod_dma;
  2527. struct qla_hw_data *ha = vha->hw;
  2528. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2529. /* This can be called by the parent */
  2530. vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma);
  2531. if (!vpmod) {
  2532. DEBUG2_3(printk("%s(%ld): failed to allocate Modify VP "
  2533. "IOCB.\n", __func__, vha->host_no));
  2534. return QLA_MEMORY_ALLOC_FAILED;
  2535. }
  2536. memset(vpmod, 0, sizeof(struct vp_config_entry_24xx));
  2537. vpmod->entry_type = VP_CONFIG_IOCB_TYPE;
  2538. vpmod->entry_count = 1;
  2539. vpmod->command = VCT_COMMAND_MOD_ENABLE_VPS;
  2540. vpmod->vp_count = 1;
  2541. vpmod->vp_index1 = vha->vp_idx;
  2542. vpmod->options_idx1 = BIT_3|BIT_4|BIT_5;
  2543. memcpy(vpmod->node_name_idx1, vha->node_name, WWN_SIZE);
  2544. memcpy(vpmod->port_name_idx1, vha->port_name, WWN_SIZE);
  2545. vpmod->entry_count = 1;
  2546. rval = qla2x00_issue_iocb(base_vha, vpmod, vpmod_dma, 0);
  2547. if (rval != QLA_SUCCESS) {
  2548. DEBUG2_3_11(printk("%s(%ld): failed to issue VP config IOCB"
  2549. "(%x).\n", __func__, base_vha->host_no, rval));
  2550. } else if (vpmod->comp_status != 0) {
  2551. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2552. "-- error status (%x).\n", __func__, base_vha->host_no,
  2553. vpmod->comp_status));
  2554. rval = QLA_FUNCTION_FAILED;
  2555. } else if (vpmod->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2556. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2557. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2558. le16_to_cpu(vpmod->comp_status)));
  2559. rval = QLA_FUNCTION_FAILED;
  2560. } else {
  2561. /* EMPTY */
  2562. DEBUG11(printk("%s(%ld): done.\n", __func__,
  2563. base_vha->host_no));
  2564. fc_vport_set_state(vha->fc_vport, FC_VPORT_INITIALIZING);
  2565. }
  2566. dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma);
  2567. return rval;
  2568. }
  2569. /*
  2570. * qla24xx_control_vp
  2571. * Enable a virtual port for given host
  2572. *
  2573. * Input:
  2574. * ha = adapter block pointer.
  2575. * vhba = virtual adapter (unused)
  2576. * index = index number for enabled VP
  2577. *
  2578. * Returns:
  2579. * qla2xxx local function return status code.
  2580. *
  2581. * Context:
  2582. * Kernel context.
  2583. */
  2584. int
  2585. qla24xx_control_vp(scsi_qla_host_t *vha, int cmd)
  2586. {
  2587. int rval;
  2588. int map, pos;
  2589. struct vp_ctrl_entry_24xx *vce;
  2590. dma_addr_t vce_dma;
  2591. struct qla_hw_data *ha = vha->hw;
  2592. int vp_index = vha->vp_idx;
  2593. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2594. DEBUG11(printk("%s(%ld): entered. Enabling index %d\n", __func__,
  2595. vha->host_no, vp_index));
  2596. if (vp_index == 0 || vp_index >= ha->max_npiv_vports)
  2597. return QLA_PARAMETER_ERROR;
  2598. vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma);
  2599. if (!vce) {
  2600. DEBUG2_3(printk("%s(%ld): "
  2601. "failed to allocate VP Control IOCB.\n", __func__,
  2602. base_vha->host_no));
  2603. return QLA_MEMORY_ALLOC_FAILED;
  2604. }
  2605. memset(vce, 0, sizeof(struct vp_ctrl_entry_24xx));
  2606. vce->entry_type = VP_CTRL_IOCB_TYPE;
  2607. vce->entry_count = 1;
  2608. vce->command = cpu_to_le16(cmd);
  2609. vce->vp_count = __constant_cpu_to_le16(1);
  2610. /* index map in firmware starts with 1; decrement index
  2611. * this is ok as we never use index 0
  2612. */
  2613. map = (vp_index - 1) / 8;
  2614. pos = (vp_index - 1) & 7;
  2615. mutex_lock(&ha->vport_lock);
  2616. vce->vp_idx_map[map] |= 1 << pos;
  2617. mutex_unlock(&ha->vport_lock);
  2618. rval = qla2x00_issue_iocb(base_vha, vce, vce_dma, 0);
  2619. if (rval != QLA_SUCCESS) {
  2620. DEBUG2_3_11(printk("%s(%ld): failed to issue VP control IOCB"
  2621. "(%x).\n", __func__, base_vha->host_no, rval));
  2622. printk("%s(%ld): failed to issue VP control IOCB"
  2623. "(%x).\n", __func__, base_vha->host_no, rval);
  2624. } else if (vce->entry_status != 0) {
  2625. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2626. "-- error status (%x).\n", __func__, base_vha->host_no,
  2627. vce->entry_status));
  2628. printk("%s(%ld): failed to complete IOCB "
  2629. "-- error status (%x).\n", __func__, base_vha->host_no,
  2630. vce->entry_status);
  2631. rval = QLA_FUNCTION_FAILED;
  2632. } else if (vce->comp_status != __constant_cpu_to_le16(CS_COMPLETE)) {
  2633. DEBUG2_3_11(printk("%s(%ld): failed to complete IOCB "
  2634. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2635. le16_to_cpu(vce->comp_status)));
  2636. printk("%s(%ld): failed to complete IOCB "
  2637. "-- completion status (%x).\n", __func__, base_vha->host_no,
  2638. le16_to_cpu(vce->comp_status));
  2639. rval = QLA_FUNCTION_FAILED;
  2640. } else {
  2641. DEBUG2(printk("%s(%ld): done.\n", __func__, base_vha->host_no));
  2642. }
  2643. dma_pool_free(ha->s_dma_pool, vce, vce_dma);
  2644. return rval;
  2645. }
  2646. /*
  2647. * qla2x00_send_change_request
  2648. * Receive or disable RSCN request from fabric controller
  2649. *
  2650. * Input:
  2651. * ha = adapter block pointer
  2652. * format = registration format:
  2653. * 0 - Reserved
  2654. * 1 - Fabric detected registration
  2655. * 2 - N_port detected registration
  2656. * 3 - Full registration
  2657. * FF - clear registration
  2658. * vp_idx = Virtual port index
  2659. *
  2660. * Returns:
  2661. * qla2x00 local function return status code.
  2662. *
  2663. * Context:
  2664. * Kernel Context
  2665. */
  2666. int
  2667. qla2x00_send_change_request(scsi_qla_host_t *vha, uint16_t format,
  2668. uint16_t vp_idx)
  2669. {
  2670. int rval;
  2671. mbx_cmd_t mc;
  2672. mbx_cmd_t *mcp = &mc;
  2673. /*
  2674. * This command is implicitly executed by firmware during login for the
  2675. * physical hosts
  2676. */
  2677. if (vp_idx == 0)
  2678. return QLA_FUNCTION_FAILED;
  2679. mcp->mb[0] = MBC_SEND_CHANGE_REQUEST;
  2680. mcp->mb[1] = format;
  2681. mcp->mb[9] = vp_idx;
  2682. mcp->out_mb = MBX_9|MBX_1|MBX_0;
  2683. mcp->in_mb = MBX_0|MBX_1;
  2684. mcp->tov = MBX_TOV_SECONDS;
  2685. mcp->flags = 0;
  2686. rval = qla2x00_mailbox_command(vha, mcp);
  2687. if (rval == QLA_SUCCESS) {
  2688. if (mcp->mb[0] != MBS_COMMAND_COMPLETE) {
  2689. rval = BIT_1;
  2690. }
  2691. } else
  2692. rval = BIT_1;
  2693. return rval;
  2694. }
  2695. int
  2696. qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
  2697. uint32_t size)
  2698. {
  2699. int rval;
  2700. mbx_cmd_t mc;
  2701. mbx_cmd_t *mcp = &mc;
  2702. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2703. if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
  2704. mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
  2705. mcp->mb[8] = MSW(addr);
  2706. mcp->out_mb = MBX_8|MBX_0;
  2707. } else {
  2708. mcp->mb[0] = MBC_DUMP_RISC_RAM;
  2709. mcp->out_mb = MBX_0;
  2710. }
  2711. mcp->mb[1] = LSW(addr);
  2712. mcp->mb[2] = MSW(req_dma);
  2713. mcp->mb[3] = LSW(req_dma);
  2714. mcp->mb[6] = MSW(MSD(req_dma));
  2715. mcp->mb[7] = LSW(MSD(req_dma));
  2716. mcp->out_mb |= MBX_7|MBX_6|MBX_3|MBX_2|MBX_1;
  2717. if (IS_FWI2_CAPABLE(vha->hw)) {
  2718. mcp->mb[4] = MSW(size);
  2719. mcp->mb[5] = LSW(size);
  2720. mcp->out_mb |= MBX_5|MBX_4;
  2721. } else {
  2722. mcp->mb[4] = LSW(size);
  2723. mcp->out_mb |= MBX_4;
  2724. }
  2725. mcp->in_mb = MBX_0;
  2726. mcp->tov = MBX_TOV_SECONDS;
  2727. mcp->flags = 0;
  2728. rval = qla2x00_mailbox_command(vha, mcp);
  2729. if (rval != QLA_SUCCESS) {
  2730. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  2731. vha->host_no, rval, mcp->mb[0]));
  2732. } else {
  2733. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2734. }
  2735. return rval;
  2736. }
  2737. /* 84XX Support **************************************************************/
  2738. struct cs84xx_mgmt_cmd {
  2739. union {
  2740. struct verify_chip_entry_84xx req;
  2741. struct verify_chip_rsp_84xx rsp;
  2742. } p;
  2743. };
  2744. int
  2745. qla84xx_verify_chip(struct scsi_qla_host *vha, uint16_t *status)
  2746. {
  2747. int rval, retry;
  2748. struct cs84xx_mgmt_cmd *mn;
  2749. dma_addr_t mn_dma;
  2750. uint16_t options;
  2751. unsigned long flags;
  2752. struct qla_hw_data *ha = vha->hw;
  2753. DEBUG16(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2754. mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma);
  2755. if (mn == NULL) {
  2756. DEBUG2_3(printk("%s(%ld): failed to allocate Verify ISP84XX "
  2757. "IOCB.\n", __func__, vha->host_no));
  2758. return QLA_MEMORY_ALLOC_FAILED;
  2759. }
  2760. /* Force Update? */
  2761. options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0;
  2762. /* Diagnostic firmware? */
  2763. /* options |= MENLO_DIAG_FW; */
  2764. /* We update the firmware with only one data sequence. */
  2765. options |= VCO_END_OF_DATA;
  2766. do {
  2767. retry = 0;
  2768. memset(mn, 0, sizeof(*mn));
  2769. mn->p.req.entry_type = VERIFY_CHIP_IOCB_TYPE;
  2770. mn->p.req.entry_count = 1;
  2771. mn->p.req.options = cpu_to_le16(options);
  2772. DEBUG16(printk("%s(%ld): Dump of Verify Request.\n", __func__,
  2773. vha->host_no));
  2774. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2775. sizeof(*mn)));
  2776. rval = qla2x00_issue_iocb_timeout(vha, mn, mn_dma, 0, 120);
  2777. if (rval != QLA_SUCCESS) {
  2778. DEBUG2_16(printk("%s(%ld): failed to issue Verify "
  2779. "IOCB (%x).\n", __func__, vha->host_no, rval));
  2780. goto verify_done;
  2781. }
  2782. DEBUG16(printk("%s(%ld): Dump of Verify Response.\n", __func__,
  2783. vha->host_no));
  2784. DEBUG16(qla2x00_dump_buffer((uint8_t *)mn,
  2785. sizeof(*mn)));
  2786. status[0] = le16_to_cpu(mn->p.rsp.comp_status);
  2787. status[1] = status[0] == CS_VCS_CHIP_FAILURE ?
  2788. le16_to_cpu(mn->p.rsp.failure_code) : 0;
  2789. DEBUG2_16(printk("%s(%ld): cs=%x fc=%x\n", __func__,
  2790. vha->host_no, status[0], status[1]));
  2791. if (status[0] != CS_COMPLETE) {
  2792. rval = QLA_FUNCTION_FAILED;
  2793. if (!(options & VCO_DONT_UPDATE_FW)) {
  2794. DEBUG2_16(printk("%s(%ld): Firmware update "
  2795. "failed. Retrying without update "
  2796. "firmware.\n", __func__, vha->host_no));
  2797. options |= VCO_DONT_UPDATE_FW;
  2798. options &= ~VCO_FORCE_UPDATE;
  2799. retry = 1;
  2800. }
  2801. } else {
  2802. DEBUG2_16(printk("%s(%ld): firmware updated to %x.\n",
  2803. __func__, vha->host_no,
  2804. le32_to_cpu(mn->p.rsp.fw_ver)));
  2805. /* NOTE: we only update OP firmware. */
  2806. spin_lock_irqsave(&ha->cs84xx->access_lock, flags);
  2807. ha->cs84xx->op_fw_version =
  2808. le32_to_cpu(mn->p.rsp.fw_ver);
  2809. spin_unlock_irqrestore(&ha->cs84xx->access_lock,
  2810. flags);
  2811. }
  2812. } while (retry);
  2813. verify_done:
  2814. dma_pool_free(ha->s_dma_pool, mn, mn_dma);
  2815. if (rval != QLA_SUCCESS) {
  2816. DEBUG2_16(printk("%s(%ld): failed=%x.\n", __func__,
  2817. vha->host_no, rval));
  2818. } else {
  2819. DEBUG16(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2820. }
  2821. return rval;
  2822. }
  2823. int
  2824. qla25xx_init_req_que(struct scsi_qla_host *vha, struct req_que *req)
  2825. {
  2826. int rval;
  2827. unsigned long flags;
  2828. mbx_cmd_t mc;
  2829. mbx_cmd_t *mcp = &mc;
  2830. struct device_reg_25xxmq __iomem *reg;
  2831. struct qla_hw_data *ha = vha->hw;
  2832. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2833. mcp->mb[1] = req->options;
  2834. mcp->mb[2] = MSW(LSD(req->dma));
  2835. mcp->mb[3] = LSW(LSD(req->dma));
  2836. mcp->mb[6] = MSW(MSD(req->dma));
  2837. mcp->mb[7] = LSW(MSD(req->dma));
  2838. mcp->mb[5] = req->length;
  2839. if (req->rsp)
  2840. mcp->mb[10] = req->rsp->id;
  2841. mcp->mb[12] = req->qos;
  2842. mcp->mb[11] = req->vp_idx;
  2843. mcp->mb[13] = req->rid;
  2844. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2845. QLA_QUE_PAGE * req->id);
  2846. mcp->mb[4] = req->id;
  2847. /* que in ptr index */
  2848. mcp->mb[8] = 0;
  2849. /* que out ptr index */
  2850. mcp->mb[9] = 0;
  2851. mcp->out_mb = MBX_14|MBX_13|MBX_12|MBX_11|MBX_10|MBX_9|MBX_8|MBX_7|
  2852. MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2853. mcp->in_mb = MBX_0;
  2854. mcp->flags = MBX_DMA_OUT;
  2855. mcp->tov = 60;
  2856. spin_lock_irqsave(&ha->hardware_lock, flags);
  2857. if (!(req->options & BIT_0)) {
  2858. WRT_REG_DWORD(&reg->req_q_in, 0);
  2859. WRT_REG_DWORD(&reg->req_q_out, 0);
  2860. }
  2861. req->req_q_in = &reg->req_q_in;
  2862. req->req_q_out = &reg->req_q_out;
  2863. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2864. rval = qla2x00_mailbox_command(vha, mcp);
  2865. if (rval != QLA_SUCCESS)
  2866. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x mb0=%x.\n",
  2867. __func__, vha->host_no, rval, mcp->mb[0]));
  2868. return rval;
  2869. }
  2870. int
  2871. qla25xx_init_rsp_que(struct scsi_qla_host *vha, struct rsp_que *rsp)
  2872. {
  2873. int rval;
  2874. unsigned long flags;
  2875. mbx_cmd_t mc;
  2876. mbx_cmd_t *mcp = &mc;
  2877. struct device_reg_25xxmq __iomem *reg;
  2878. struct qla_hw_data *ha = vha->hw;
  2879. mcp->mb[0] = MBC_INITIALIZE_MULTIQ;
  2880. mcp->mb[1] = rsp->options;
  2881. mcp->mb[2] = MSW(LSD(rsp->dma));
  2882. mcp->mb[3] = LSW(LSD(rsp->dma));
  2883. mcp->mb[6] = MSW(MSD(rsp->dma));
  2884. mcp->mb[7] = LSW(MSD(rsp->dma));
  2885. mcp->mb[5] = rsp->length;
  2886. mcp->mb[14] = rsp->msix->entry;
  2887. mcp->mb[13] = rsp->rid;
  2888. reg = (struct device_reg_25xxmq *)((void *)(ha->mqiobase) +
  2889. QLA_QUE_PAGE * rsp->id);
  2890. mcp->mb[4] = rsp->id;
  2891. /* que in ptr index */
  2892. mcp->mb[8] = 0;
  2893. /* que out ptr index */
  2894. mcp->mb[9] = 0;
  2895. mcp->out_mb = MBX_14|MBX_13|MBX_9|MBX_8|MBX_7
  2896. |MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2897. mcp->in_mb = MBX_0;
  2898. mcp->flags = MBX_DMA_OUT;
  2899. mcp->tov = 60;
  2900. spin_lock_irqsave(&ha->hardware_lock, flags);
  2901. if (!(rsp->options & BIT_0)) {
  2902. WRT_REG_DWORD(&reg->rsp_q_out, 0);
  2903. WRT_REG_DWORD(&reg->rsp_q_in, 0);
  2904. }
  2905. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  2906. rval = qla2x00_mailbox_command(vha, mcp);
  2907. if (rval != QLA_SUCCESS)
  2908. DEBUG2_3_11(printk(KERN_WARNING "%s(%ld): failed=%x "
  2909. "mb0=%x.\n", __func__,
  2910. vha->host_no, rval, mcp->mb[0]));
  2911. return rval;
  2912. }
  2913. int
  2914. qla81xx_idc_ack(scsi_qla_host_t *vha, uint16_t *mb)
  2915. {
  2916. int rval;
  2917. mbx_cmd_t mc;
  2918. mbx_cmd_t *mcp = &mc;
  2919. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2920. mcp->mb[0] = MBC_IDC_ACK;
  2921. memcpy(&mcp->mb[1], mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2922. mcp->out_mb = MBX_7|MBX_6|MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  2923. mcp->in_mb = MBX_0;
  2924. mcp->tov = MBX_TOV_SECONDS;
  2925. mcp->flags = 0;
  2926. rval = qla2x00_mailbox_command(vha, mcp);
  2927. if (rval != QLA_SUCCESS) {
  2928. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  2929. vha->host_no, rval, mcp->mb[0]));
  2930. } else {
  2931. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2932. }
  2933. return rval;
  2934. }
  2935. int
  2936. qla81xx_fac_get_sector_size(scsi_qla_host_t *vha, uint32_t *sector_size)
  2937. {
  2938. int rval;
  2939. mbx_cmd_t mc;
  2940. mbx_cmd_t *mcp = &mc;
  2941. if (!IS_QLA81XX(vha->hw))
  2942. return QLA_FUNCTION_FAILED;
  2943. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2944. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  2945. mcp->mb[1] = FAC_OPT_CMD_GET_SECTOR_SIZE;
  2946. mcp->out_mb = MBX_1|MBX_0;
  2947. mcp->in_mb = MBX_1|MBX_0;
  2948. mcp->tov = MBX_TOV_SECONDS;
  2949. mcp->flags = 0;
  2950. rval = qla2x00_mailbox_command(vha, mcp);
  2951. if (rval != QLA_SUCCESS) {
  2952. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2953. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2954. } else {
  2955. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2956. *sector_size = mcp->mb[1];
  2957. }
  2958. return rval;
  2959. }
  2960. int
  2961. qla81xx_fac_do_write_enable(scsi_qla_host_t *vha, int enable)
  2962. {
  2963. int rval;
  2964. mbx_cmd_t mc;
  2965. mbx_cmd_t *mcp = &mc;
  2966. if (!IS_QLA81XX(vha->hw))
  2967. return QLA_FUNCTION_FAILED;
  2968. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2969. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  2970. mcp->mb[1] = enable ? FAC_OPT_CMD_WRITE_ENABLE :
  2971. FAC_OPT_CMD_WRITE_PROTECT;
  2972. mcp->out_mb = MBX_1|MBX_0;
  2973. mcp->in_mb = MBX_1|MBX_0;
  2974. mcp->tov = MBX_TOV_SECONDS;
  2975. mcp->flags = 0;
  2976. rval = qla2x00_mailbox_command(vha, mcp);
  2977. if (rval != QLA_SUCCESS) {
  2978. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x.\n",
  2979. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  2980. } else {
  2981. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  2982. }
  2983. return rval;
  2984. }
  2985. int
  2986. qla81xx_fac_erase_sector(scsi_qla_host_t *vha, uint32_t start, uint32_t finish)
  2987. {
  2988. int rval;
  2989. mbx_cmd_t mc;
  2990. mbx_cmd_t *mcp = &mc;
  2991. if (!IS_QLA81XX(vha->hw))
  2992. return QLA_FUNCTION_FAILED;
  2993. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  2994. mcp->mb[0] = MBC_FLASH_ACCESS_CTRL;
  2995. mcp->mb[1] = FAC_OPT_CMD_ERASE_SECTOR;
  2996. mcp->mb[2] = LSW(start);
  2997. mcp->mb[3] = MSW(start);
  2998. mcp->mb[4] = LSW(finish);
  2999. mcp->mb[5] = MSW(finish);
  3000. mcp->out_mb = MBX_5|MBX_4|MBX_3|MBX_2|MBX_1|MBX_0;
  3001. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3002. mcp->tov = MBX_TOV_SECONDS;
  3003. mcp->flags = 0;
  3004. rval = qla2x00_mailbox_command(vha, mcp);
  3005. if (rval != QLA_SUCCESS) {
  3006. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x mb[1]=%x "
  3007. "mb[2]=%x.\n", __func__, vha->host_no, rval, mcp->mb[0],
  3008. mcp->mb[1], mcp->mb[2]));
  3009. } else {
  3010. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3011. }
  3012. return rval;
  3013. }
  3014. int
  3015. qla81xx_restart_mpi_firmware(scsi_qla_host_t *vha)
  3016. {
  3017. int rval = 0;
  3018. mbx_cmd_t mc;
  3019. mbx_cmd_t *mcp = &mc;
  3020. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3021. mcp->mb[0] = MBC_RESTART_MPI_FW;
  3022. mcp->out_mb = MBX_0;
  3023. mcp->in_mb = MBX_0|MBX_1;
  3024. mcp->tov = MBX_TOV_SECONDS;
  3025. mcp->flags = 0;
  3026. rval = qla2x00_mailbox_command(vha, mcp);
  3027. if (rval != QLA_SUCCESS) {
  3028. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x mb[1]=0x%x.\n",
  3029. __func__, vha->host_no, rval, mcp->mb[0], mcp->mb[1]));
  3030. } else {
  3031. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3032. }
  3033. return rval;
  3034. }
  3035. int
  3036. qla2x00_read_edc(scsi_qla_host_t *vha, uint16_t dev, uint16_t adr,
  3037. dma_addr_t sfp_dma, uint8_t *sfp, uint16_t len, uint16_t opt)
  3038. {
  3039. int rval;
  3040. mbx_cmd_t mc;
  3041. mbx_cmd_t *mcp = &mc;
  3042. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3043. mcp->mb[0] = MBC_READ_SFP;
  3044. mcp->mb[1] = dev;
  3045. mcp->mb[2] = MSW(sfp_dma);
  3046. mcp->mb[3] = LSW(sfp_dma);
  3047. mcp->mb[6] = MSW(MSD(sfp_dma));
  3048. mcp->mb[7] = LSW(MSD(sfp_dma));
  3049. mcp->mb[8] = len;
  3050. mcp->mb[9] = adr;
  3051. mcp->mb[10] = opt;
  3052. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3053. mcp->in_mb = MBX_0;
  3054. mcp->tov = MBX_TOV_SECONDS;
  3055. mcp->flags = 0;
  3056. rval = qla2x00_mailbox_command(vha, mcp);
  3057. if (opt & BIT_0)
  3058. if (sfp)
  3059. *sfp = mcp->mb[8];
  3060. if (rval != QLA_SUCCESS) {
  3061. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3062. vha->host_no, rval, mcp->mb[0]));
  3063. } else {
  3064. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3065. }
  3066. return rval;
  3067. }
  3068. int
  3069. qla2x00_write_edc(scsi_qla_host_t *vha, uint16_t dev, uint16_t adr,
  3070. dma_addr_t sfp_dma, uint8_t *sfp, uint16_t len, uint16_t opt)
  3071. {
  3072. int rval;
  3073. mbx_cmd_t mc;
  3074. mbx_cmd_t *mcp = &mc;
  3075. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3076. if (opt & BIT_0)
  3077. if (sfp)
  3078. len = *sfp;
  3079. mcp->mb[0] = MBC_WRITE_SFP;
  3080. mcp->mb[1] = dev;
  3081. mcp->mb[2] = MSW(sfp_dma);
  3082. mcp->mb[3] = LSW(sfp_dma);
  3083. mcp->mb[6] = MSW(MSD(sfp_dma));
  3084. mcp->mb[7] = LSW(MSD(sfp_dma));
  3085. mcp->mb[8] = len;
  3086. mcp->mb[9] = adr;
  3087. mcp->mb[10] = opt;
  3088. mcp->out_mb = MBX_10|MBX_9|MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3089. mcp->in_mb = MBX_0;
  3090. mcp->tov = MBX_TOV_SECONDS;
  3091. mcp->flags = 0;
  3092. rval = qla2x00_mailbox_command(vha, mcp);
  3093. if (rval != QLA_SUCCESS) {
  3094. DEBUG2_3_11(printk("%s(%ld): failed=%x (%x).\n", __func__,
  3095. vha->host_no, rval, mcp->mb[0]));
  3096. } else {
  3097. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3098. }
  3099. return rval;
  3100. }
  3101. int
  3102. qla2x00_get_xgmac_stats(scsi_qla_host_t *vha, dma_addr_t stats_dma,
  3103. uint16_t size_in_bytes, uint16_t *actual_size)
  3104. {
  3105. int rval;
  3106. mbx_cmd_t mc;
  3107. mbx_cmd_t *mcp = &mc;
  3108. if (!IS_QLA81XX(vha->hw))
  3109. return QLA_FUNCTION_FAILED;
  3110. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3111. mcp->mb[0] = MBC_GET_XGMAC_STATS;
  3112. mcp->mb[2] = MSW(stats_dma);
  3113. mcp->mb[3] = LSW(stats_dma);
  3114. mcp->mb[6] = MSW(MSD(stats_dma));
  3115. mcp->mb[7] = LSW(MSD(stats_dma));
  3116. mcp->mb[8] = size_in_bytes >> 2;
  3117. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_0;
  3118. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3119. mcp->tov = MBX_TOV_SECONDS;
  3120. mcp->flags = 0;
  3121. rval = qla2x00_mailbox_command(vha, mcp);
  3122. if (rval != QLA_SUCCESS) {
  3123. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3124. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3125. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3126. } else {
  3127. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3128. *actual_size = mcp->mb[2] << 2;
  3129. }
  3130. return rval;
  3131. }
  3132. int
  3133. qla2x00_get_dcbx_params(scsi_qla_host_t *vha, dma_addr_t tlv_dma,
  3134. uint16_t size)
  3135. {
  3136. int rval;
  3137. mbx_cmd_t mc;
  3138. mbx_cmd_t *mcp = &mc;
  3139. if (!IS_QLA81XX(vha->hw))
  3140. return QLA_FUNCTION_FAILED;
  3141. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3142. mcp->mb[0] = MBC_GET_DCBX_PARAMS;
  3143. mcp->mb[1] = 0;
  3144. mcp->mb[2] = MSW(tlv_dma);
  3145. mcp->mb[3] = LSW(tlv_dma);
  3146. mcp->mb[6] = MSW(MSD(tlv_dma));
  3147. mcp->mb[7] = LSW(MSD(tlv_dma));
  3148. mcp->mb[8] = size;
  3149. mcp->out_mb = MBX_8|MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
  3150. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3151. mcp->tov = MBX_TOV_SECONDS;
  3152. mcp->flags = 0;
  3153. rval = qla2x00_mailbox_command(vha, mcp);
  3154. if (rval != QLA_SUCCESS) {
  3155. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=0x%x "
  3156. "mb[1]=0x%x mb[2]=0x%x.\n", __func__, vha->host_no, rval,
  3157. mcp->mb[0], mcp->mb[1], mcp->mb[2]));
  3158. } else {
  3159. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3160. }
  3161. return rval;
  3162. }
  3163. int
  3164. qla2x00_read_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t *data)
  3165. {
  3166. int rval;
  3167. mbx_cmd_t mc;
  3168. mbx_cmd_t *mcp = &mc;
  3169. if (!IS_FWI2_CAPABLE(vha->hw))
  3170. return QLA_FUNCTION_FAILED;
  3171. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3172. mcp->mb[0] = MBC_READ_RAM_EXTENDED;
  3173. mcp->mb[1] = LSW(risc_addr);
  3174. mcp->mb[8] = MSW(risc_addr);
  3175. mcp->out_mb = MBX_8|MBX_1|MBX_0;
  3176. mcp->in_mb = MBX_3|MBX_2|MBX_0;
  3177. mcp->tov = 30;
  3178. mcp->flags = 0;
  3179. rval = qla2x00_mailbox_command(vha, mcp);
  3180. if (rval != QLA_SUCCESS) {
  3181. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3182. vha->host_no, rval, mcp->mb[0]));
  3183. } else {
  3184. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3185. *data = mcp->mb[3] << 16 | mcp->mb[2];
  3186. }
  3187. return rval;
  3188. }
  3189. int
  3190. qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
  3191. {
  3192. int rval;
  3193. mbx_cmd_t mc;
  3194. mbx_cmd_t *mcp = &mc;
  3195. if (!IS_FWI2_CAPABLE(vha->hw))
  3196. return QLA_FUNCTION_FAILED;
  3197. DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
  3198. mcp->mb[0] = MBC_WRITE_RAM_WORD_EXTENDED;
  3199. mcp->mb[1] = LSW(risc_addr);
  3200. mcp->mb[2] = LSW(data);
  3201. mcp->mb[3] = MSW(data);
  3202. mcp->mb[8] = MSW(risc_addr);
  3203. mcp->out_mb = MBX_8|MBX_3|MBX_2|MBX_1|MBX_0;
  3204. mcp->in_mb = MBX_0;
  3205. mcp->tov = 30;
  3206. mcp->flags = 0;
  3207. rval = qla2x00_mailbox_command(vha, mcp);
  3208. if (rval != QLA_SUCCESS) {
  3209. DEBUG2_3_11(printk("%s(%ld): failed=%x mb[0]=%x.\n", __func__,
  3210. vha->host_no, rval, mcp->mb[0]));
  3211. } else {
  3212. DEBUG11(printk("%s(%ld): done.\n", __func__, vha->host_no));
  3213. }
  3214. return rval;
  3215. }
  3216. int
  3217. qla2x00_get_data_rate(scsi_qla_host_t *vha)
  3218. {
  3219. int rval;
  3220. mbx_cmd_t mc;
  3221. mbx_cmd_t *mcp = &mc;
  3222. struct qla_hw_data *ha = vha->hw;
  3223. if (!IS_FWI2_CAPABLE(ha))
  3224. return QLA_FUNCTION_FAILED;
  3225. DEBUG11(printk(KERN_INFO "%s(%ld): entered.\n", __func__, vha->host_no));
  3226. mcp->mb[0] = MBC_DATA_RATE;
  3227. mcp->mb[1] = 0;
  3228. mcp->out_mb = MBX_1|MBX_0;
  3229. mcp->in_mb = MBX_2|MBX_1|MBX_0;
  3230. mcp->tov = MBX_TOV_SECONDS;
  3231. mcp->flags = 0;
  3232. rval = qla2x00_mailbox_command(vha, mcp);
  3233. if (rval != QLA_SUCCESS) {
  3234. DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
  3235. __func__, vha->host_no, rval, mcp->mb[0]));
  3236. } else {
  3237. DEBUG11(printk(KERN_INFO
  3238. "%s(%ld): done.\n", __func__, vha->host_no));
  3239. if (mcp->mb[1] != 0x7)
  3240. ha->link_data_rate = mcp->mb[1];
  3241. }
  3242. return rval;
  3243. }