qla_init.c 127 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include "qla_gbl.h"
  9. #include <linux/delay.h>
  10. #include <linux/vmalloc.h>
  11. #include "qla_devtbl.h"
  12. #ifdef CONFIG_SPARC
  13. #include <asm/prom.h>
  14. #endif
  15. /*
  16. * QLogic ISP2x00 Hardware Support Function Prototypes.
  17. */
  18. static int qla2x00_isp_firmware(scsi_qla_host_t *);
  19. static int qla2x00_setup_chip(scsi_qla_host_t *);
  20. static int qla2x00_init_rings(scsi_qla_host_t *);
  21. static int qla2x00_fw_ready(scsi_qla_host_t *);
  22. static int qla2x00_configure_hba(scsi_qla_host_t *);
  23. static int qla2x00_configure_loop(scsi_qla_host_t *);
  24. static int qla2x00_configure_local_loop(scsi_qla_host_t *);
  25. static int qla2x00_configure_fabric(scsi_qla_host_t *);
  26. static int qla2x00_find_all_fabric_devs(scsi_qla_host_t *, struct list_head *);
  27. static int qla2x00_device_resync(scsi_qla_host_t *);
  28. static int qla2x00_fabric_dev_login(scsi_qla_host_t *, fc_port_t *,
  29. uint16_t *);
  30. static int qla2x00_restart_isp(scsi_qla_host_t *);
  31. static int qla2x00_find_new_loop_id(scsi_qla_host_t *, fc_port_t *);
  32. static struct qla_chip_state_84xx *qla84xx_get_chip(struct scsi_qla_host *);
  33. static int qla84xx_init_chip(scsi_qla_host_t *);
  34. static int qla25xx_init_queues(struct qla_hw_data *);
  35. /* SRB Extensions ---------------------------------------------------------- */
  36. static void
  37. qla2x00_ctx_sp_timeout(unsigned long __data)
  38. {
  39. srb_t *sp = (srb_t *)__data;
  40. struct srb_ctx *ctx;
  41. fc_port_t *fcport = sp->fcport;
  42. struct qla_hw_data *ha = fcport->vha->hw;
  43. struct req_que *req;
  44. unsigned long flags;
  45. spin_lock_irqsave(&ha->hardware_lock, flags);
  46. req = ha->req_q_map[0];
  47. req->outstanding_cmds[sp->handle] = NULL;
  48. ctx = sp->ctx;
  49. ctx->timeout(sp);
  50. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  51. ctx->free(sp);
  52. }
  53. static void
  54. qla2x00_ctx_sp_free(srb_t *sp)
  55. {
  56. struct srb_ctx *ctx = sp->ctx;
  57. kfree(ctx);
  58. mempool_free(sp, sp->fcport->vha->hw->srb_mempool);
  59. }
  60. inline srb_t *
  61. qla2x00_get_ctx_sp(scsi_qla_host_t *vha, fc_port_t *fcport, size_t size,
  62. unsigned long tmo)
  63. {
  64. srb_t *sp;
  65. struct qla_hw_data *ha = vha->hw;
  66. struct srb_ctx *ctx;
  67. sp = mempool_alloc(ha->srb_mempool, GFP_KERNEL);
  68. if (!sp)
  69. goto done;
  70. ctx = kzalloc(size, GFP_KERNEL);
  71. if (!ctx) {
  72. mempool_free(sp, ha->srb_mempool);
  73. goto done;
  74. }
  75. memset(sp, 0, sizeof(*sp));
  76. sp->fcport = fcport;
  77. sp->ctx = ctx;
  78. ctx->free = qla2x00_ctx_sp_free;
  79. init_timer(&ctx->timer);
  80. if (!tmo)
  81. goto done;
  82. ctx->timer.expires = jiffies + tmo * HZ;
  83. ctx->timer.data = (unsigned long)sp;
  84. ctx->timer.function = qla2x00_ctx_sp_timeout;
  85. add_timer(&ctx->timer);
  86. done:
  87. return sp;
  88. }
  89. /* Asynchronous Login/Logout Routines -------------------------------------- */
  90. #define ELS_TMO_2_RATOV(ha) ((ha)->r_a_tov / 10 * 2)
  91. static void
  92. qla2x00_async_logio_timeout(srb_t *sp)
  93. {
  94. fc_port_t *fcport = sp->fcport;
  95. struct srb_logio *lio = sp->ctx;
  96. DEBUG2(printk(KERN_WARNING
  97. "scsi(%ld:%x): Async-%s timeout.\n",
  98. fcport->vha->host_no, sp->handle,
  99. lio->ctx.type == SRB_LOGIN_CMD ? "login": "logout"));
  100. if (lio->ctx.type == SRB_LOGIN_CMD)
  101. qla2x00_post_async_logout_work(fcport->vha, fcport, NULL);
  102. }
  103. int
  104. qla2x00_async_login(struct scsi_qla_host *vha, fc_port_t *fcport,
  105. uint16_t *data)
  106. {
  107. struct qla_hw_data *ha = vha->hw;
  108. srb_t *sp;
  109. struct srb_logio *lio;
  110. int rval;
  111. rval = QLA_FUNCTION_FAILED;
  112. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  113. ELS_TMO_2_RATOV(ha) + 2);
  114. if (!sp)
  115. goto done;
  116. lio = sp->ctx;
  117. lio->ctx.type = SRB_LOGIN_CMD;
  118. lio->ctx.timeout = qla2x00_async_logio_timeout;
  119. lio->flags |= SRB_LOGIN_COND_PLOGI;
  120. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  121. lio->flags |= SRB_LOGIN_RETRIED;
  122. rval = qla2x00_start_sp(sp);
  123. if (rval != QLA_SUCCESS)
  124. goto done_free_sp;
  125. DEBUG2(printk(KERN_DEBUG
  126. "scsi(%ld:%x): Async-login - loop-id=%x portid=%02x%02x%02x "
  127. "retries=%d.\n", fcport->vha->host_no, sp->handle, fcport->loop_id,
  128. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa,
  129. fcport->login_retry));
  130. return rval;
  131. done_free_sp:
  132. del_timer_sync(&lio->ctx.timer);
  133. lio->ctx.free(sp);
  134. done:
  135. return rval;
  136. }
  137. int
  138. qla2x00_async_logout(struct scsi_qla_host *vha, fc_port_t *fcport)
  139. {
  140. struct qla_hw_data *ha = vha->hw;
  141. srb_t *sp;
  142. struct srb_logio *lio;
  143. int rval;
  144. rval = QLA_FUNCTION_FAILED;
  145. sp = qla2x00_get_ctx_sp(vha, fcport, sizeof(struct srb_logio),
  146. ELS_TMO_2_RATOV(ha) + 2);
  147. if (!sp)
  148. goto done;
  149. lio = sp->ctx;
  150. lio->ctx.type = SRB_LOGOUT_CMD;
  151. lio->ctx.timeout = qla2x00_async_logio_timeout;
  152. rval = qla2x00_start_sp(sp);
  153. if (rval != QLA_SUCCESS)
  154. goto done_free_sp;
  155. DEBUG2(printk(KERN_DEBUG
  156. "scsi(%ld:%x): Async-logout - loop-id=%x portid=%02x%02x%02x.\n",
  157. fcport->vha->host_no, sp->handle, fcport->loop_id,
  158. fcport->d_id.b.domain, fcport->d_id.b.area, fcport->d_id.b.al_pa));
  159. return rval;
  160. done_free_sp:
  161. del_timer_sync(&lio->ctx.timer);
  162. lio->ctx.free(sp);
  163. done:
  164. return rval;
  165. }
  166. int
  167. qla2x00_async_login_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  168. uint16_t *data)
  169. {
  170. int rval;
  171. uint8_t opts = 0;
  172. switch (data[0]) {
  173. case MBS_COMMAND_COMPLETE:
  174. if (fcport->flags & FCF_TAPE_PRESENT)
  175. opts |= BIT_1;
  176. rval = qla2x00_get_port_database(vha, fcport, opts);
  177. if (rval != QLA_SUCCESS)
  178. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  179. else
  180. qla2x00_update_fcport(vha, fcport);
  181. break;
  182. case MBS_COMMAND_ERROR:
  183. if (data[1] & QLA_LOGIO_LOGIN_RETRIED)
  184. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  185. else
  186. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  187. break;
  188. case MBS_PORT_ID_USED:
  189. fcport->loop_id = data[1];
  190. qla2x00_post_async_login_work(vha, fcport, NULL);
  191. break;
  192. case MBS_LOOP_ID_USED:
  193. fcport->loop_id++;
  194. rval = qla2x00_find_new_loop_id(vha, fcport);
  195. if (rval != QLA_SUCCESS) {
  196. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  197. break;
  198. }
  199. qla2x00_post_async_login_work(vha, fcport, NULL);
  200. break;
  201. }
  202. return QLA_SUCCESS;
  203. }
  204. int
  205. qla2x00_async_logout_done(struct scsi_qla_host *vha, fc_port_t *fcport,
  206. uint16_t *data)
  207. {
  208. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  209. return QLA_SUCCESS;
  210. }
  211. /****************************************************************************/
  212. /* QLogic ISP2x00 Hardware Support Functions. */
  213. /****************************************************************************/
  214. /*
  215. * qla2x00_initialize_adapter
  216. * Initialize board.
  217. *
  218. * Input:
  219. * ha = adapter block pointer.
  220. *
  221. * Returns:
  222. * 0 = success
  223. */
  224. int
  225. qla2x00_initialize_adapter(scsi_qla_host_t *vha)
  226. {
  227. int rval;
  228. struct qla_hw_data *ha = vha->hw;
  229. struct req_que *req = ha->req_q_map[0];
  230. /* Clear adapter flags. */
  231. vha->flags.online = 0;
  232. ha->flags.chip_reset_done = 0;
  233. vha->flags.reset_active = 0;
  234. ha->flags.pci_channel_io_perm_failure = 0;
  235. ha->flags.eeh_busy = 0;
  236. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  237. atomic_set(&vha->loop_state, LOOP_DOWN);
  238. vha->device_flags = DFLG_NO_CABLE;
  239. vha->dpc_flags = 0;
  240. vha->flags.management_server_logged_in = 0;
  241. vha->marker_needed = 0;
  242. ha->isp_abort_cnt = 0;
  243. ha->beacon_blink_led = 0;
  244. set_bit(0, ha->req_qid_map);
  245. set_bit(0, ha->rsp_qid_map);
  246. qla_printk(KERN_INFO, ha, "Configuring PCI space...\n");
  247. rval = ha->isp_ops->pci_config(vha);
  248. if (rval) {
  249. DEBUG2(printk("scsi(%ld): Unable to configure PCI space.\n",
  250. vha->host_no));
  251. return (rval);
  252. }
  253. ha->isp_ops->reset_chip(vha);
  254. rval = qla2xxx_get_flash_info(vha);
  255. if (rval) {
  256. DEBUG2(printk("scsi(%ld): Unable to validate FLASH data.\n",
  257. vha->host_no));
  258. return (rval);
  259. }
  260. ha->isp_ops->get_flash_version(vha, req->ring);
  261. qla_printk(KERN_INFO, ha, "Configure NVRAM parameters...\n");
  262. ha->isp_ops->nvram_config(vha);
  263. if (ha->flags.disable_serdes) {
  264. /* Mask HBA via NVRAM settings? */
  265. qla_printk(KERN_INFO, ha, "Masking HBA WWPN "
  266. "%02x%02x%02x%02x%02x%02x%02x%02x (via NVRAM).\n",
  267. vha->port_name[0], vha->port_name[1],
  268. vha->port_name[2], vha->port_name[3],
  269. vha->port_name[4], vha->port_name[5],
  270. vha->port_name[6], vha->port_name[7]);
  271. return QLA_FUNCTION_FAILED;
  272. }
  273. qla_printk(KERN_INFO, ha, "Verifying loaded RISC code...\n");
  274. if (qla2x00_isp_firmware(vha) != QLA_SUCCESS) {
  275. rval = ha->isp_ops->chip_diag(vha);
  276. if (rval)
  277. return (rval);
  278. rval = qla2x00_setup_chip(vha);
  279. if (rval)
  280. return (rval);
  281. }
  282. if (IS_QLA84XX(ha)) {
  283. ha->cs84xx = qla84xx_get_chip(vha);
  284. if (!ha->cs84xx) {
  285. qla_printk(KERN_ERR, ha,
  286. "Unable to configure ISP84XX.\n");
  287. return QLA_FUNCTION_FAILED;
  288. }
  289. }
  290. rval = qla2x00_init_rings(vha);
  291. ha->flags.chip_reset_done = 1;
  292. return (rval);
  293. }
  294. /**
  295. * qla2100_pci_config() - Setup ISP21xx PCI configuration registers.
  296. * @ha: HA context
  297. *
  298. * Returns 0 on success.
  299. */
  300. int
  301. qla2100_pci_config(scsi_qla_host_t *vha)
  302. {
  303. uint16_t w;
  304. unsigned long flags;
  305. struct qla_hw_data *ha = vha->hw;
  306. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  307. pci_set_master(ha->pdev);
  308. pci_try_set_mwi(ha->pdev);
  309. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  310. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  311. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  312. pci_disable_rom(ha->pdev);
  313. /* Get PCI bus information. */
  314. spin_lock_irqsave(&ha->hardware_lock, flags);
  315. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  316. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  317. return QLA_SUCCESS;
  318. }
  319. /**
  320. * qla2300_pci_config() - Setup ISP23xx PCI configuration registers.
  321. * @ha: HA context
  322. *
  323. * Returns 0 on success.
  324. */
  325. int
  326. qla2300_pci_config(scsi_qla_host_t *vha)
  327. {
  328. uint16_t w;
  329. unsigned long flags = 0;
  330. uint32_t cnt;
  331. struct qla_hw_data *ha = vha->hw;
  332. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  333. pci_set_master(ha->pdev);
  334. pci_try_set_mwi(ha->pdev);
  335. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  336. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  337. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  338. w &= ~PCI_COMMAND_INTX_DISABLE;
  339. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  340. /*
  341. * If this is a 2300 card and not 2312, reset the
  342. * COMMAND_INVALIDATE due to a bug in the 2300. Unfortunately,
  343. * the 2310 also reports itself as a 2300 so we need to get the
  344. * fb revision level -- a 6 indicates it really is a 2300 and
  345. * not a 2310.
  346. */
  347. if (IS_QLA2300(ha)) {
  348. spin_lock_irqsave(&ha->hardware_lock, flags);
  349. /* Pause RISC. */
  350. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  351. for (cnt = 0; cnt < 30000; cnt++) {
  352. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) != 0)
  353. break;
  354. udelay(10);
  355. }
  356. /* Select FPM registers. */
  357. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  358. RD_REG_WORD(&reg->ctrl_status);
  359. /* Get the fb rev level */
  360. ha->fb_rev = RD_FB_CMD_REG(ha, reg);
  361. if (ha->fb_rev == FPM_2300)
  362. pci_clear_mwi(ha->pdev);
  363. /* Deselect FPM registers. */
  364. WRT_REG_WORD(&reg->ctrl_status, 0x0);
  365. RD_REG_WORD(&reg->ctrl_status);
  366. /* Release RISC module. */
  367. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  368. for (cnt = 0; cnt < 30000; cnt++) {
  369. if ((RD_REG_WORD(&reg->hccr) & HCCR_RISC_PAUSE) == 0)
  370. break;
  371. udelay(10);
  372. }
  373. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  374. }
  375. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  376. pci_disable_rom(ha->pdev);
  377. /* Get PCI bus information. */
  378. spin_lock_irqsave(&ha->hardware_lock, flags);
  379. ha->pci_attr = RD_REG_WORD(&reg->ctrl_status);
  380. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  381. return QLA_SUCCESS;
  382. }
  383. /**
  384. * qla24xx_pci_config() - Setup ISP24xx PCI configuration registers.
  385. * @ha: HA context
  386. *
  387. * Returns 0 on success.
  388. */
  389. int
  390. qla24xx_pci_config(scsi_qla_host_t *vha)
  391. {
  392. uint16_t w;
  393. unsigned long flags = 0;
  394. struct qla_hw_data *ha = vha->hw;
  395. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  396. pci_set_master(ha->pdev);
  397. pci_try_set_mwi(ha->pdev);
  398. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  399. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  400. w &= ~PCI_COMMAND_INTX_DISABLE;
  401. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  402. pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80);
  403. /* PCI-X -- adjust Maximum Memory Read Byte Count (2048). */
  404. if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX))
  405. pcix_set_mmrbc(ha->pdev, 2048);
  406. /* PCIe -- adjust Maximum Read Request Size (2048). */
  407. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  408. pcie_set_readrq(ha->pdev, 2048);
  409. pci_disable_rom(ha->pdev);
  410. ha->chip_revision = ha->pdev->revision;
  411. /* Get PCI bus information. */
  412. spin_lock_irqsave(&ha->hardware_lock, flags);
  413. ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status);
  414. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  415. return QLA_SUCCESS;
  416. }
  417. /**
  418. * qla25xx_pci_config() - Setup ISP25xx PCI configuration registers.
  419. * @ha: HA context
  420. *
  421. * Returns 0 on success.
  422. */
  423. int
  424. qla25xx_pci_config(scsi_qla_host_t *vha)
  425. {
  426. uint16_t w;
  427. struct qla_hw_data *ha = vha->hw;
  428. pci_set_master(ha->pdev);
  429. pci_try_set_mwi(ha->pdev);
  430. pci_read_config_word(ha->pdev, PCI_COMMAND, &w);
  431. w |= (PCI_COMMAND_PARITY | PCI_COMMAND_SERR);
  432. w &= ~PCI_COMMAND_INTX_DISABLE;
  433. pci_write_config_word(ha->pdev, PCI_COMMAND, w);
  434. /* PCIe -- adjust Maximum Read Request Size (2048). */
  435. if (pci_find_capability(ha->pdev, PCI_CAP_ID_EXP))
  436. pcie_set_readrq(ha->pdev, 2048);
  437. pci_disable_rom(ha->pdev);
  438. ha->chip_revision = ha->pdev->revision;
  439. return QLA_SUCCESS;
  440. }
  441. /**
  442. * qla2x00_isp_firmware() - Choose firmware image.
  443. * @ha: HA context
  444. *
  445. * Returns 0 on success.
  446. */
  447. static int
  448. qla2x00_isp_firmware(scsi_qla_host_t *vha)
  449. {
  450. int rval;
  451. uint16_t loop_id, topo, sw_cap;
  452. uint8_t domain, area, al_pa;
  453. struct qla_hw_data *ha = vha->hw;
  454. /* Assume loading risc code */
  455. rval = QLA_FUNCTION_FAILED;
  456. if (ha->flags.disable_risc_code_load) {
  457. DEBUG2(printk("scsi(%ld): RISC CODE NOT loaded\n",
  458. vha->host_no));
  459. qla_printk(KERN_INFO, ha, "RISC CODE NOT loaded\n");
  460. /* Verify checksum of loaded RISC code. */
  461. rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address);
  462. if (rval == QLA_SUCCESS) {
  463. /* And, verify we are not in ROM code. */
  464. rval = qla2x00_get_adapter_id(vha, &loop_id, &al_pa,
  465. &area, &domain, &topo, &sw_cap);
  466. }
  467. }
  468. if (rval) {
  469. DEBUG2_3(printk("scsi(%ld): **** Load RISC code ****\n",
  470. vha->host_no));
  471. }
  472. return (rval);
  473. }
  474. /**
  475. * qla2x00_reset_chip() - Reset ISP chip.
  476. * @ha: HA context
  477. *
  478. * Returns 0 on success.
  479. */
  480. void
  481. qla2x00_reset_chip(scsi_qla_host_t *vha)
  482. {
  483. unsigned long flags = 0;
  484. struct qla_hw_data *ha = vha->hw;
  485. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  486. uint32_t cnt;
  487. uint16_t cmd;
  488. if (unlikely(pci_channel_offline(ha->pdev)))
  489. return;
  490. ha->isp_ops->disable_intrs(ha);
  491. spin_lock_irqsave(&ha->hardware_lock, flags);
  492. /* Turn off master enable */
  493. cmd = 0;
  494. pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd);
  495. cmd &= ~PCI_COMMAND_MASTER;
  496. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  497. if (!IS_QLA2100(ha)) {
  498. /* Pause RISC. */
  499. WRT_REG_WORD(&reg->hccr, HCCR_PAUSE_RISC);
  500. if (IS_QLA2200(ha) || IS_QLA2300(ha)) {
  501. for (cnt = 0; cnt < 30000; cnt++) {
  502. if ((RD_REG_WORD(&reg->hccr) &
  503. HCCR_RISC_PAUSE) != 0)
  504. break;
  505. udelay(100);
  506. }
  507. } else {
  508. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  509. udelay(10);
  510. }
  511. /* Select FPM registers. */
  512. WRT_REG_WORD(&reg->ctrl_status, 0x20);
  513. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  514. /* FPM Soft Reset. */
  515. WRT_REG_WORD(&reg->fpm_diag_config, 0x100);
  516. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  517. /* Toggle Fpm Reset. */
  518. if (!IS_QLA2200(ha)) {
  519. WRT_REG_WORD(&reg->fpm_diag_config, 0x0);
  520. RD_REG_WORD(&reg->fpm_diag_config); /* PCI Posting. */
  521. }
  522. /* Select frame buffer registers. */
  523. WRT_REG_WORD(&reg->ctrl_status, 0x10);
  524. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  525. /* Reset frame buffer FIFOs. */
  526. if (IS_QLA2200(ha)) {
  527. WRT_FB_CMD_REG(ha, reg, 0xa000);
  528. RD_FB_CMD_REG(ha, reg); /* PCI Posting. */
  529. } else {
  530. WRT_FB_CMD_REG(ha, reg, 0x00fc);
  531. /* Read back fb_cmd until zero or 3 seconds max */
  532. for (cnt = 0; cnt < 3000; cnt++) {
  533. if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0)
  534. break;
  535. udelay(100);
  536. }
  537. }
  538. /* Select RISC module registers. */
  539. WRT_REG_WORD(&reg->ctrl_status, 0);
  540. RD_REG_WORD(&reg->ctrl_status); /* PCI Posting. */
  541. /* Reset RISC processor. */
  542. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  543. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  544. /* Release RISC processor. */
  545. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  546. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  547. }
  548. WRT_REG_WORD(&reg->hccr, HCCR_CLR_RISC_INT);
  549. WRT_REG_WORD(&reg->hccr, HCCR_CLR_HOST_INT);
  550. /* Reset ISP chip. */
  551. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  552. /* Wait for RISC to recover from reset. */
  553. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  554. /*
  555. * It is necessary to for a delay here since the card doesn't
  556. * respond to PCI reads during a reset. On some architectures
  557. * this will result in an MCA.
  558. */
  559. udelay(20);
  560. for (cnt = 30000; cnt; cnt--) {
  561. if ((RD_REG_WORD(&reg->ctrl_status) &
  562. CSR_ISP_SOFT_RESET) == 0)
  563. break;
  564. udelay(100);
  565. }
  566. } else
  567. udelay(10);
  568. /* Reset RISC processor. */
  569. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  570. WRT_REG_WORD(&reg->semaphore, 0);
  571. /* Release RISC processor. */
  572. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  573. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  574. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  575. for (cnt = 0; cnt < 30000; cnt++) {
  576. if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY)
  577. break;
  578. udelay(100);
  579. }
  580. } else
  581. udelay(100);
  582. /* Turn on master enable */
  583. cmd |= PCI_COMMAND_MASTER;
  584. pci_write_config_word(ha->pdev, PCI_COMMAND, cmd);
  585. /* Disable RISC pause on FPM parity error. */
  586. if (!IS_QLA2100(ha)) {
  587. WRT_REG_WORD(&reg->hccr, HCCR_DISABLE_PARITY_PAUSE);
  588. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  589. }
  590. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  591. }
  592. /**
  593. * qla24xx_reset_risc() - Perform full reset of ISP24xx RISC.
  594. * @ha: HA context
  595. *
  596. * Returns 0 on success.
  597. */
  598. static inline void
  599. qla24xx_reset_risc(scsi_qla_host_t *vha)
  600. {
  601. unsigned long flags = 0;
  602. struct qla_hw_data *ha = vha->hw;
  603. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  604. uint32_t cnt, d2;
  605. uint16_t wd;
  606. spin_lock_irqsave(&ha->hardware_lock, flags);
  607. /* Reset RISC. */
  608. WRT_REG_DWORD(&reg->ctrl_status, CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  609. for (cnt = 0; cnt < 30000; cnt++) {
  610. if ((RD_REG_DWORD(&reg->ctrl_status) & CSRX_DMA_ACTIVE) == 0)
  611. break;
  612. udelay(10);
  613. }
  614. WRT_REG_DWORD(&reg->ctrl_status,
  615. CSRX_ISP_SOFT_RESET|CSRX_DMA_SHUTDOWN|MWB_4096_BYTES);
  616. pci_read_config_word(ha->pdev, PCI_COMMAND, &wd);
  617. udelay(100);
  618. /* Wait for firmware to complete NVRAM accesses. */
  619. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  620. for (cnt = 10000 ; cnt && d2; cnt--) {
  621. udelay(5);
  622. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  623. barrier();
  624. }
  625. /* Wait for soft-reset to complete. */
  626. d2 = RD_REG_DWORD(&reg->ctrl_status);
  627. for (cnt = 6000000 ; cnt && (d2 & CSRX_ISP_SOFT_RESET); cnt--) {
  628. udelay(5);
  629. d2 = RD_REG_DWORD(&reg->ctrl_status);
  630. barrier();
  631. }
  632. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  633. RD_REG_DWORD(&reg->hccr);
  634. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  635. RD_REG_DWORD(&reg->hccr);
  636. WRT_REG_DWORD(&reg->hccr, HCCRX_CLR_RISC_RESET);
  637. RD_REG_DWORD(&reg->hccr);
  638. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  639. for (cnt = 6000000 ; cnt && d2; cnt--) {
  640. udelay(5);
  641. d2 = (uint32_t) RD_REG_WORD(&reg->mailbox0);
  642. barrier();
  643. }
  644. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  645. if (IS_NOPOLLING_TYPE(ha))
  646. ha->isp_ops->enable_intrs(ha);
  647. }
  648. /**
  649. * qla24xx_reset_chip() - Reset ISP24xx chip.
  650. * @ha: HA context
  651. *
  652. * Returns 0 on success.
  653. */
  654. void
  655. qla24xx_reset_chip(scsi_qla_host_t *vha)
  656. {
  657. struct qla_hw_data *ha = vha->hw;
  658. if (pci_channel_offline(ha->pdev) &&
  659. ha->flags.pci_channel_io_perm_failure) {
  660. return;
  661. }
  662. ha->isp_ops->disable_intrs(ha);
  663. /* Perform RISC reset. */
  664. qla24xx_reset_risc(vha);
  665. }
  666. /**
  667. * qla2x00_chip_diag() - Test chip for proper operation.
  668. * @ha: HA context
  669. *
  670. * Returns 0 on success.
  671. */
  672. int
  673. qla2x00_chip_diag(scsi_qla_host_t *vha)
  674. {
  675. int rval;
  676. struct qla_hw_data *ha = vha->hw;
  677. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  678. unsigned long flags = 0;
  679. uint16_t data;
  680. uint32_t cnt;
  681. uint16_t mb[5];
  682. struct req_que *req = ha->req_q_map[0];
  683. /* Assume a failed state */
  684. rval = QLA_FUNCTION_FAILED;
  685. DEBUG3(printk("scsi(%ld): Testing device at %lx.\n",
  686. vha->host_no, (u_long)&reg->flash_address));
  687. spin_lock_irqsave(&ha->hardware_lock, flags);
  688. /* Reset ISP chip. */
  689. WRT_REG_WORD(&reg->ctrl_status, CSR_ISP_SOFT_RESET);
  690. /*
  691. * We need to have a delay here since the card will not respond while
  692. * in reset causing an MCA on some architectures.
  693. */
  694. udelay(20);
  695. data = qla2x00_debounce_register(&reg->ctrl_status);
  696. for (cnt = 6000000 ; cnt && (data & CSR_ISP_SOFT_RESET); cnt--) {
  697. udelay(5);
  698. data = RD_REG_WORD(&reg->ctrl_status);
  699. barrier();
  700. }
  701. if (!cnt)
  702. goto chip_diag_failed;
  703. DEBUG3(printk("scsi(%ld): Reset register cleared by chip reset\n",
  704. vha->host_no));
  705. /* Reset RISC processor. */
  706. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  707. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  708. /* Workaround for QLA2312 PCI parity error */
  709. if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) {
  710. data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0));
  711. for (cnt = 6000000; cnt && (data == MBS_BUSY); cnt--) {
  712. udelay(5);
  713. data = RD_MAILBOX_REG(ha, reg, 0);
  714. barrier();
  715. }
  716. } else
  717. udelay(10);
  718. if (!cnt)
  719. goto chip_diag_failed;
  720. /* Check product ID of chip */
  721. DEBUG3(printk("scsi(%ld): Checking product ID of chip\n", vha->host_no));
  722. mb[1] = RD_MAILBOX_REG(ha, reg, 1);
  723. mb[2] = RD_MAILBOX_REG(ha, reg, 2);
  724. mb[3] = RD_MAILBOX_REG(ha, reg, 3);
  725. mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4));
  726. if (mb[1] != PROD_ID_1 || (mb[2] != PROD_ID_2 && mb[2] != PROD_ID_2a) ||
  727. mb[3] != PROD_ID_3) {
  728. qla_printk(KERN_WARNING, ha,
  729. "Wrong product ID = 0x%x,0x%x,0x%x\n", mb[1], mb[2], mb[3]);
  730. goto chip_diag_failed;
  731. }
  732. ha->product_id[0] = mb[1];
  733. ha->product_id[1] = mb[2];
  734. ha->product_id[2] = mb[3];
  735. ha->product_id[3] = mb[4];
  736. /* Adjust fw RISC transfer size */
  737. if (req->length > 1024)
  738. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024;
  739. else
  740. ha->fw_transfer_size = REQUEST_ENTRY_SIZE *
  741. req->length;
  742. if (IS_QLA2200(ha) &&
  743. RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) {
  744. /* Limit firmware transfer size with a 2200A */
  745. DEBUG3(printk("scsi(%ld): Found QLA2200A chip.\n",
  746. vha->host_no));
  747. ha->device_type |= DT_ISP2200A;
  748. ha->fw_transfer_size = 128;
  749. }
  750. /* Wrap Incoming Mailboxes Test. */
  751. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  752. DEBUG3(printk("scsi(%ld): Checking mailboxes.\n", vha->host_no));
  753. rval = qla2x00_mbx_reg_test(vha);
  754. if (rval) {
  755. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  756. vha->host_no));
  757. qla_printk(KERN_WARNING, ha,
  758. "Failed mailbox send register test\n");
  759. }
  760. else {
  761. /* Flag a successful rval */
  762. rval = QLA_SUCCESS;
  763. }
  764. spin_lock_irqsave(&ha->hardware_lock, flags);
  765. chip_diag_failed:
  766. if (rval)
  767. DEBUG2_3(printk("scsi(%ld): Chip diagnostics **** FAILED "
  768. "****\n", vha->host_no));
  769. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  770. return (rval);
  771. }
  772. /**
  773. * qla24xx_chip_diag() - Test ISP24xx for proper operation.
  774. * @ha: HA context
  775. *
  776. * Returns 0 on success.
  777. */
  778. int
  779. qla24xx_chip_diag(scsi_qla_host_t *vha)
  780. {
  781. int rval;
  782. struct qla_hw_data *ha = vha->hw;
  783. struct req_que *req = ha->req_q_map[0];
  784. ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length;
  785. rval = qla2x00_mbx_reg_test(vha);
  786. if (rval) {
  787. DEBUG(printk("scsi(%ld): Failed mailbox send register test\n",
  788. vha->host_no));
  789. qla_printk(KERN_WARNING, ha,
  790. "Failed mailbox send register test\n");
  791. } else {
  792. /* Flag a successful rval */
  793. rval = QLA_SUCCESS;
  794. }
  795. return rval;
  796. }
  797. void
  798. qla2x00_alloc_fw_dump(scsi_qla_host_t *vha)
  799. {
  800. int rval;
  801. uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size,
  802. eft_size, fce_size, mq_size;
  803. dma_addr_t tc_dma;
  804. void *tc;
  805. struct qla_hw_data *ha = vha->hw;
  806. struct req_que *req = ha->req_q_map[0];
  807. struct rsp_que *rsp = ha->rsp_q_map[0];
  808. if (ha->fw_dump) {
  809. qla_printk(KERN_WARNING, ha,
  810. "Firmware dump previously allocated.\n");
  811. return;
  812. }
  813. ha->fw_dumped = 0;
  814. fixed_size = mem_size = eft_size = fce_size = mq_size = 0;
  815. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  816. fixed_size = sizeof(struct qla2100_fw_dump);
  817. } else if (IS_QLA23XX(ha)) {
  818. fixed_size = offsetof(struct qla2300_fw_dump, data_ram);
  819. mem_size = (ha->fw_memory_size - 0x11000 + 1) *
  820. sizeof(uint16_t);
  821. } else if (IS_FWI2_CAPABLE(ha)) {
  822. if (IS_QLA81XX(ha))
  823. fixed_size = offsetof(struct qla81xx_fw_dump, ext_mem);
  824. else if (IS_QLA25XX(ha))
  825. fixed_size = offsetof(struct qla25xx_fw_dump, ext_mem);
  826. else
  827. fixed_size = offsetof(struct qla24xx_fw_dump, ext_mem);
  828. mem_size = (ha->fw_memory_size - 0x100000 + 1) *
  829. sizeof(uint32_t);
  830. if (ha->mqenable)
  831. mq_size = sizeof(struct qla2xxx_mq_chain);
  832. /* Allocate memory for Fibre Channel Event Buffer. */
  833. if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))
  834. goto try_eft;
  835. tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma,
  836. GFP_KERNEL);
  837. if (!tc) {
  838. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  839. "(%d KB) for FCE.\n", FCE_SIZE / 1024);
  840. goto try_eft;
  841. }
  842. memset(tc, 0, FCE_SIZE);
  843. rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS,
  844. ha->fce_mb, &ha->fce_bufs);
  845. if (rval) {
  846. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  847. "FCE (%d).\n", rval);
  848. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc,
  849. tc_dma);
  850. ha->flags.fce_enabled = 0;
  851. goto try_eft;
  852. }
  853. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for FCE...\n",
  854. FCE_SIZE / 1024);
  855. fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE;
  856. ha->flags.fce_enabled = 1;
  857. ha->fce_dma = tc_dma;
  858. ha->fce = tc;
  859. try_eft:
  860. /* Allocate memory for Extended Trace Buffer. */
  861. tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma,
  862. GFP_KERNEL);
  863. if (!tc) {
  864. qla_printk(KERN_WARNING, ha, "Unable to allocate "
  865. "(%d KB) for EFT.\n", EFT_SIZE / 1024);
  866. goto cont_alloc;
  867. }
  868. memset(tc, 0, EFT_SIZE);
  869. rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS);
  870. if (rval) {
  871. qla_printk(KERN_WARNING, ha, "Unable to initialize "
  872. "EFT (%d).\n", rval);
  873. dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc,
  874. tc_dma);
  875. goto cont_alloc;
  876. }
  877. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for EFT...\n",
  878. EFT_SIZE / 1024);
  879. eft_size = EFT_SIZE;
  880. ha->eft_dma = tc_dma;
  881. ha->eft = tc;
  882. }
  883. cont_alloc:
  884. req_q_size = req->length * sizeof(request_t);
  885. rsp_q_size = rsp->length * sizeof(response_t);
  886. dump_size = offsetof(struct qla2xxx_fw_dump, isp);
  887. dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size;
  888. ha->chain_offset = dump_size;
  889. dump_size += mq_size + fce_size;
  890. ha->fw_dump = vmalloc(dump_size);
  891. if (!ha->fw_dump) {
  892. qla_printk(KERN_WARNING, ha, "Unable to allocate (%d KB) for "
  893. "firmware dump!!!\n", dump_size / 1024);
  894. if (ha->eft) {
  895. dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft,
  896. ha->eft_dma);
  897. ha->eft = NULL;
  898. ha->eft_dma = 0;
  899. }
  900. return;
  901. }
  902. qla_printk(KERN_INFO, ha, "Allocated (%d KB) for firmware dump...\n",
  903. dump_size / 1024);
  904. ha->fw_dump_len = dump_size;
  905. ha->fw_dump->signature[0] = 'Q';
  906. ha->fw_dump->signature[1] = 'L';
  907. ha->fw_dump->signature[2] = 'G';
  908. ha->fw_dump->signature[3] = 'C';
  909. ha->fw_dump->version = __constant_htonl(1);
  910. ha->fw_dump->fixed_size = htonl(fixed_size);
  911. ha->fw_dump->mem_size = htonl(mem_size);
  912. ha->fw_dump->req_q_size = htonl(req_q_size);
  913. ha->fw_dump->rsp_q_size = htonl(rsp_q_size);
  914. ha->fw_dump->eft_size = htonl(eft_size);
  915. ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma));
  916. ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma));
  917. ha->fw_dump->header_size =
  918. htonl(offsetof(struct qla2xxx_fw_dump, isp));
  919. }
  920. static int
  921. qla81xx_mpi_sync(scsi_qla_host_t *vha)
  922. {
  923. #define MPS_MASK 0xe0
  924. int rval;
  925. uint16_t dc;
  926. uint32_t dw;
  927. struct qla_hw_data *ha = vha->hw;
  928. if (!IS_QLA81XX(vha->hw))
  929. return QLA_SUCCESS;
  930. rval = qla2x00_write_ram_word(vha, 0x7c00, 1);
  931. if (rval != QLA_SUCCESS) {
  932. DEBUG2(qla_printk(KERN_WARNING, ha,
  933. "Sync-MPI: Unable to acquire semaphore.\n"));
  934. goto done;
  935. }
  936. pci_read_config_word(vha->hw->pdev, 0x54, &dc);
  937. rval = qla2x00_read_ram_word(vha, 0x7a15, &dw);
  938. if (rval != QLA_SUCCESS) {
  939. DEBUG2(qla_printk(KERN_WARNING, ha,
  940. "Sync-MPI: Unable to read sync.\n"));
  941. goto done_release;
  942. }
  943. dc &= MPS_MASK;
  944. if (dc == (dw & MPS_MASK))
  945. goto done_release;
  946. dw &= ~MPS_MASK;
  947. dw |= dc;
  948. rval = qla2x00_write_ram_word(vha, 0x7a15, dw);
  949. if (rval != QLA_SUCCESS) {
  950. DEBUG2(qla_printk(KERN_WARNING, ha,
  951. "Sync-MPI: Unable to gain sync.\n"));
  952. }
  953. done_release:
  954. rval = qla2x00_write_ram_word(vha, 0x7c00, 0);
  955. if (rval != QLA_SUCCESS) {
  956. DEBUG2(qla_printk(KERN_WARNING, ha,
  957. "Sync-MPI: Unable to release semaphore.\n"));
  958. }
  959. done:
  960. return rval;
  961. }
  962. /**
  963. * qla2x00_setup_chip() - Load and start RISC firmware.
  964. * @ha: HA context
  965. *
  966. * Returns 0 on success.
  967. */
  968. static int
  969. qla2x00_setup_chip(scsi_qla_host_t *vha)
  970. {
  971. int rval;
  972. uint32_t srisc_address = 0;
  973. struct qla_hw_data *ha = vha->hw;
  974. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  975. unsigned long flags;
  976. uint16_t fw_major_version;
  977. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  978. /* Disable SRAM, Instruction RAM and GP RAM parity. */
  979. spin_lock_irqsave(&ha->hardware_lock, flags);
  980. WRT_REG_WORD(&reg->hccr, (HCCR_ENABLE_PARITY + 0x0));
  981. RD_REG_WORD(&reg->hccr);
  982. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  983. }
  984. qla81xx_mpi_sync(vha);
  985. /* Load firmware sequences */
  986. rval = ha->isp_ops->load_risc(vha, &srisc_address);
  987. if (rval == QLA_SUCCESS) {
  988. DEBUG(printk("scsi(%ld): Verifying Checksum of loaded RISC "
  989. "code.\n", vha->host_no));
  990. rval = qla2x00_verify_checksum(vha, srisc_address);
  991. if (rval == QLA_SUCCESS) {
  992. /* Start firmware execution. */
  993. DEBUG(printk("scsi(%ld): Checksum OK, start "
  994. "firmware.\n", vha->host_no));
  995. rval = qla2x00_execute_fw(vha, srisc_address);
  996. /* Retrieve firmware information. */
  997. if (rval == QLA_SUCCESS) {
  998. fw_major_version = ha->fw_major_version;
  999. rval = qla2x00_get_fw_version(vha,
  1000. &ha->fw_major_version,
  1001. &ha->fw_minor_version,
  1002. &ha->fw_subminor_version,
  1003. &ha->fw_attributes, &ha->fw_memory_size,
  1004. ha->mpi_version, &ha->mpi_capabilities,
  1005. ha->phy_version);
  1006. if (rval != QLA_SUCCESS)
  1007. goto failed;
  1008. ha->flags.npiv_supported = 0;
  1009. if (IS_QLA2XXX_MIDTYPE(ha) &&
  1010. (ha->fw_attributes & BIT_2)) {
  1011. ha->flags.npiv_supported = 1;
  1012. if ((!ha->max_npiv_vports) ||
  1013. ((ha->max_npiv_vports + 1) %
  1014. MIN_MULTI_ID_FABRIC))
  1015. ha->max_npiv_vports =
  1016. MIN_MULTI_ID_FABRIC - 1;
  1017. }
  1018. qla2x00_get_resource_cnts(vha, NULL,
  1019. &ha->fw_xcb_count, NULL, NULL,
  1020. &ha->max_npiv_vports, NULL);
  1021. if (!fw_major_version && ql2xallocfwdump)
  1022. qla2x00_alloc_fw_dump(vha);
  1023. }
  1024. } else {
  1025. DEBUG2(printk(KERN_INFO
  1026. "scsi(%ld): ISP Firmware failed checksum.\n",
  1027. vha->host_no));
  1028. }
  1029. }
  1030. if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) {
  1031. /* Enable proper parity. */
  1032. spin_lock_irqsave(&ha->hardware_lock, flags);
  1033. if (IS_QLA2300(ha))
  1034. /* SRAM parity */
  1035. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x1);
  1036. else
  1037. /* SRAM, Instruction RAM and GP RAM parity */
  1038. WRT_REG_WORD(&reg->hccr, HCCR_ENABLE_PARITY + 0x7);
  1039. RD_REG_WORD(&reg->hccr);
  1040. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1041. }
  1042. if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) {
  1043. uint32_t size;
  1044. rval = qla81xx_fac_get_sector_size(vha, &size);
  1045. if (rval == QLA_SUCCESS) {
  1046. ha->flags.fac_supported = 1;
  1047. ha->fdt_block_size = size << 2;
  1048. } else {
  1049. qla_printk(KERN_ERR, ha,
  1050. "Unsupported FAC firmware (%d.%02d.%02d).\n",
  1051. ha->fw_major_version, ha->fw_minor_version,
  1052. ha->fw_subminor_version);
  1053. }
  1054. }
  1055. failed:
  1056. if (rval) {
  1057. DEBUG2_3(printk("scsi(%ld): Setup chip **** FAILED ****.\n",
  1058. vha->host_no));
  1059. }
  1060. return (rval);
  1061. }
  1062. /**
  1063. * qla2x00_init_response_q_entries() - Initializes response queue entries.
  1064. * @ha: HA context
  1065. *
  1066. * Beginning of request ring has initialization control block already built
  1067. * by nvram config routine.
  1068. *
  1069. * Returns 0 on success.
  1070. */
  1071. void
  1072. qla2x00_init_response_q_entries(struct rsp_que *rsp)
  1073. {
  1074. uint16_t cnt;
  1075. response_t *pkt;
  1076. rsp->ring_ptr = rsp->ring;
  1077. rsp->ring_index = 0;
  1078. rsp->status_srb = NULL;
  1079. pkt = rsp->ring_ptr;
  1080. for (cnt = 0; cnt < rsp->length; cnt++) {
  1081. pkt->signature = RESPONSE_PROCESSED;
  1082. pkt++;
  1083. }
  1084. }
  1085. /**
  1086. * qla2x00_update_fw_options() - Read and process firmware options.
  1087. * @ha: HA context
  1088. *
  1089. * Returns 0 on success.
  1090. */
  1091. void
  1092. qla2x00_update_fw_options(scsi_qla_host_t *vha)
  1093. {
  1094. uint16_t swing, emphasis, tx_sens, rx_sens;
  1095. struct qla_hw_data *ha = vha->hw;
  1096. memset(ha->fw_options, 0, sizeof(ha->fw_options));
  1097. qla2x00_get_fw_options(vha, ha->fw_options);
  1098. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  1099. return;
  1100. /* Serial Link options. */
  1101. DEBUG3(printk("scsi(%ld): Serial link options:\n",
  1102. vha->host_no));
  1103. DEBUG3(qla2x00_dump_buffer((uint8_t *)&ha->fw_seriallink_options,
  1104. sizeof(ha->fw_seriallink_options)));
  1105. ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING;
  1106. if (ha->fw_seriallink_options[3] & BIT_2) {
  1107. ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING;
  1108. /* 1G settings */
  1109. swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0);
  1110. emphasis = (ha->fw_seriallink_options[2] &
  1111. (BIT_4 | BIT_3)) >> 3;
  1112. tx_sens = ha->fw_seriallink_options[0] &
  1113. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1114. rx_sens = (ha->fw_seriallink_options[0] &
  1115. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1116. ha->fw_options[10] = (emphasis << 14) | (swing << 8);
  1117. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1118. if (rx_sens == 0x0)
  1119. rx_sens = 0x3;
  1120. ha->fw_options[10] |= (tx_sens << 4) | rx_sens;
  1121. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1122. ha->fw_options[10] |= BIT_5 |
  1123. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1124. (tx_sens & (BIT_1 | BIT_0));
  1125. /* 2G settings */
  1126. swing = (ha->fw_seriallink_options[2] &
  1127. (BIT_7 | BIT_6 | BIT_5)) >> 5;
  1128. emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0);
  1129. tx_sens = ha->fw_seriallink_options[1] &
  1130. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1131. rx_sens = (ha->fw_seriallink_options[1] &
  1132. (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4;
  1133. ha->fw_options[11] = (emphasis << 14) | (swing << 8);
  1134. if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  1135. if (rx_sens == 0x0)
  1136. rx_sens = 0x3;
  1137. ha->fw_options[11] |= (tx_sens << 4) | rx_sens;
  1138. } else if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1139. ha->fw_options[11] |= BIT_5 |
  1140. ((rx_sens & (BIT_1 | BIT_0)) << 2) |
  1141. (tx_sens & (BIT_1 | BIT_0));
  1142. }
  1143. /* FCP2 options. */
  1144. /* Return command IOCBs without waiting for an ABTS to complete. */
  1145. ha->fw_options[3] |= BIT_13;
  1146. /* LED scheme. */
  1147. if (ha->flags.enable_led_scheme)
  1148. ha->fw_options[2] |= BIT_12;
  1149. /* Detect ISP6312. */
  1150. if (IS_QLA6312(ha))
  1151. ha->fw_options[2] |= BIT_13;
  1152. /* Update firmware options. */
  1153. qla2x00_set_fw_options(vha, ha->fw_options);
  1154. }
  1155. void
  1156. qla24xx_update_fw_options(scsi_qla_host_t *vha)
  1157. {
  1158. int rval;
  1159. struct qla_hw_data *ha = vha->hw;
  1160. /* Update Serial Link options. */
  1161. if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0)
  1162. return;
  1163. rval = qla2x00_set_serdes_params(vha,
  1164. le16_to_cpu(ha->fw_seriallink_options24[1]),
  1165. le16_to_cpu(ha->fw_seriallink_options24[2]),
  1166. le16_to_cpu(ha->fw_seriallink_options24[3]));
  1167. if (rval != QLA_SUCCESS) {
  1168. qla_printk(KERN_WARNING, ha,
  1169. "Unable to update Serial Link options (%x).\n", rval);
  1170. }
  1171. }
  1172. void
  1173. qla2x00_config_rings(struct scsi_qla_host *vha)
  1174. {
  1175. struct qla_hw_data *ha = vha->hw;
  1176. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1177. struct req_que *req = ha->req_q_map[0];
  1178. struct rsp_que *rsp = ha->rsp_q_map[0];
  1179. /* Setup ring parameters in initialization control block. */
  1180. ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0);
  1181. ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0);
  1182. ha->init_cb->request_q_length = cpu_to_le16(req->length);
  1183. ha->init_cb->response_q_length = cpu_to_le16(rsp->length);
  1184. ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1185. ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1186. ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1187. ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1188. WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0);
  1189. WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0);
  1190. WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0);
  1191. WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0);
  1192. RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */
  1193. }
  1194. void
  1195. qla24xx_config_rings(struct scsi_qla_host *vha)
  1196. {
  1197. struct qla_hw_data *ha = vha->hw;
  1198. device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0);
  1199. struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp;
  1200. struct qla_msix_entry *msix;
  1201. struct init_cb_24xx *icb;
  1202. uint16_t rid = 0;
  1203. struct req_que *req = ha->req_q_map[0];
  1204. struct rsp_que *rsp = ha->rsp_q_map[0];
  1205. /* Setup ring parameters in initialization control block. */
  1206. icb = (struct init_cb_24xx *)ha->init_cb;
  1207. icb->request_q_outpointer = __constant_cpu_to_le16(0);
  1208. icb->response_q_inpointer = __constant_cpu_to_le16(0);
  1209. icb->request_q_length = cpu_to_le16(req->length);
  1210. icb->response_q_length = cpu_to_le16(rsp->length);
  1211. icb->request_q_address[0] = cpu_to_le32(LSD(req->dma));
  1212. icb->request_q_address[1] = cpu_to_le32(MSD(req->dma));
  1213. icb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma));
  1214. icb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma));
  1215. if (ha->mqenable) {
  1216. icb->qos = __constant_cpu_to_le16(QLA_DEFAULT_QUE_QOS);
  1217. icb->rid = __constant_cpu_to_le16(rid);
  1218. if (ha->flags.msix_enabled) {
  1219. msix = &ha->msix_entries[1];
  1220. DEBUG2_17(printk(KERN_INFO
  1221. "Registering vector 0x%x for base que\n", msix->entry));
  1222. icb->msix = cpu_to_le16(msix->entry);
  1223. }
  1224. /* Use alternate PCI bus number */
  1225. if (MSB(rid))
  1226. icb->firmware_options_2 |=
  1227. __constant_cpu_to_le32(BIT_19);
  1228. /* Use alternate PCI devfn */
  1229. if (LSB(rid))
  1230. icb->firmware_options_2 |=
  1231. __constant_cpu_to_le32(BIT_18);
  1232. /* Use Disable MSIX Handshake mode for capable adapters */
  1233. if (IS_MSIX_NACK_CAPABLE(ha)) {
  1234. icb->firmware_options_2 &=
  1235. __constant_cpu_to_le32(~BIT_22);
  1236. ha->flags.disable_msix_handshake = 1;
  1237. qla_printk(KERN_INFO, ha,
  1238. "MSIX Handshake Disable Mode turned on\n");
  1239. } else {
  1240. icb->firmware_options_2 |=
  1241. __constant_cpu_to_le32(BIT_22);
  1242. }
  1243. icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23);
  1244. WRT_REG_DWORD(&reg->isp25mq.req_q_in, 0);
  1245. WRT_REG_DWORD(&reg->isp25mq.req_q_out, 0);
  1246. WRT_REG_DWORD(&reg->isp25mq.rsp_q_in, 0);
  1247. WRT_REG_DWORD(&reg->isp25mq.rsp_q_out, 0);
  1248. } else {
  1249. WRT_REG_DWORD(&reg->isp24.req_q_in, 0);
  1250. WRT_REG_DWORD(&reg->isp24.req_q_out, 0);
  1251. WRT_REG_DWORD(&reg->isp24.rsp_q_in, 0);
  1252. WRT_REG_DWORD(&reg->isp24.rsp_q_out, 0);
  1253. }
  1254. /* PCI posting */
  1255. RD_REG_DWORD(&ioreg->hccr);
  1256. }
  1257. /**
  1258. * qla2x00_init_rings() - Initializes firmware.
  1259. * @ha: HA context
  1260. *
  1261. * Beginning of request ring has initialization control block already built
  1262. * by nvram config routine.
  1263. *
  1264. * Returns 0 on success.
  1265. */
  1266. static int
  1267. qla2x00_init_rings(scsi_qla_host_t *vha)
  1268. {
  1269. int rval;
  1270. unsigned long flags = 0;
  1271. int cnt, que;
  1272. struct qla_hw_data *ha = vha->hw;
  1273. struct req_que *req;
  1274. struct rsp_que *rsp;
  1275. struct scsi_qla_host *vp;
  1276. struct mid_init_cb_24xx *mid_init_cb =
  1277. (struct mid_init_cb_24xx *) ha->init_cb;
  1278. spin_lock_irqsave(&ha->hardware_lock, flags);
  1279. /* Clear outstanding commands array. */
  1280. for (que = 0; que < ha->max_req_queues; que++) {
  1281. req = ha->req_q_map[que];
  1282. if (!req)
  1283. continue;
  1284. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++)
  1285. req->outstanding_cmds[cnt] = NULL;
  1286. req->current_outstanding_cmd = 1;
  1287. /* Initialize firmware. */
  1288. req->ring_ptr = req->ring;
  1289. req->ring_index = 0;
  1290. req->cnt = req->length;
  1291. }
  1292. for (que = 0; que < ha->max_rsp_queues; que++) {
  1293. rsp = ha->rsp_q_map[que];
  1294. if (!rsp)
  1295. continue;
  1296. /* Initialize response queue entries */
  1297. qla2x00_init_response_q_entries(rsp);
  1298. }
  1299. /* Clear RSCN queue. */
  1300. list_for_each_entry(vp, &ha->vp_list, list) {
  1301. vp->rscn_in_ptr = 0;
  1302. vp->rscn_out_ptr = 0;
  1303. }
  1304. ha->isp_ops->config_rings(vha);
  1305. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1306. /* Update any ISP specific firmware options before initialization. */
  1307. ha->isp_ops->update_fw_options(vha);
  1308. DEBUG(printk("scsi(%ld): Issue init firmware.\n", vha->host_no));
  1309. if (ha->flags.npiv_supported) {
  1310. if (ha->operating_mode == LOOP)
  1311. ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1;
  1312. mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports);
  1313. }
  1314. if (IS_FWI2_CAPABLE(ha)) {
  1315. mid_init_cb->options = __constant_cpu_to_le16(BIT_1);
  1316. mid_init_cb->init_cb.execution_throttle =
  1317. cpu_to_le16(ha->fw_xcb_count);
  1318. }
  1319. rval = qla2x00_init_firmware(vha, ha->init_cb_size);
  1320. if (rval) {
  1321. DEBUG2_3(printk("scsi(%ld): Init firmware **** FAILED ****.\n",
  1322. vha->host_no));
  1323. } else {
  1324. DEBUG3(printk("scsi(%ld): Init firmware -- success.\n",
  1325. vha->host_no));
  1326. }
  1327. return (rval);
  1328. }
  1329. /**
  1330. * qla2x00_fw_ready() - Waits for firmware ready.
  1331. * @ha: HA context
  1332. *
  1333. * Returns 0 on success.
  1334. */
  1335. static int
  1336. qla2x00_fw_ready(scsi_qla_host_t *vha)
  1337. {
  1338. int rval;
  1339. unsigned long wtime, mtime, cs84xx_time;
  1340. uint16_t min_wait; /* Minimum wait time if loop is down */
  1341. uint16_t wait_time; /* Wait time if loop is coming ready */
  1342. uint16_t state[5];
  1343. struct qla_hw_data *ha = vha->hw;
  1344. rval = QLA_SUCCESS;
  1345. /* 20 seconds for loop down. */
  1346. min_wait = 20;
  1347. /*
  1348. * Firmware should take at most one RATOV to login, plus 5 seconds for
  1349. * our own processing.
  1350. */
  1351. if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) {
  1352. wait_time = min_wait;
  1353. }
  1354. /* Min wait time if loop down */
  1355. mtime = jiffies + (min_wait * HZ);
  1356. /* wait time before firmware ready */
  1357. wtime = jiffies + (wait_time * HZ);
  1358. /* Wait for ISP to finish LIP */
  1359. if (!vha->flags.init_done)
  1360. qla_printk(KERN_INFO, ha, "Waiting for LIP to complete...\n");
  1361. DEBUG3(printk("scsi(%ld): Waiting for LIP to complete...\n",
  1362. vha->host_no));
  1363. do {
  1364. rval = qla2x00_get_firmware_state(vha, state);
  1365. if (rval == QLA_SUCCESS) {
  1366. if (state[0] < FSTATE_LOSS_OF_SYNC) {
  1367. vha->device_flags &= ~DFLG_NO_CABLE;
  1368. }
  1369. if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) {
  1370. DEBUG16(printk("scsi(%ld): fw_state=%x "
  1371. "84xx=%x.\n", vha->host_no, state[0],
  1372. state[2]));
  1373. if ((state[2] & FSTATE_LOGGED_IN) &&
  1374. (state[2] & FSTATE_WAITING_FOR_VERIFY)) {
  1375. DEBUG16(printk("scsi(%ld): Sending "
  1376. "verify iocb.\n", vha->host_no));
  1377. cs84xx_time = jiffies;
  1378. rval = qla84xx_init_chip(vha);
  1379. if (rval != QLA_SUCCESS)
  1380. break;
  1381. /* Add time taken to initialize. */
  1382. cs84xx_time = jiffies - cs84xx_time;
  1383. wtime += cs84xx_time;
  1384. mtime += cs84xx_time;
  1385. DEBUG16(printk("scsi(%ld): Increasing "
  1386. "wait time by %ld. New time %ld\n",
  1387. vha->host_no, cs84xx_time, wtime));
  1388. }
  1389. } else if (state[0] == FSTATE_READY) {
  1390. DEBUG(printk("scsi(%ld): F/W Ready - OK \n",
  1391. vha->host_no));
  1392. qla2x00_get_retry_cnt(vha, &ha->retry_count,
  1393. &ha->login_timeout, &ha->r_a_tov);
  1394. rval = QLA_SUCCESS;
  1395. break;
  1396. }
  1397. rval = QLA_FUNCTION_FAILED;
  1398. if (atomic_read(&vha->loop_down_timer) &&
  1399. state[0] != FSTATE_READY) {
  1400. /* Loop down. Timeout on min_wait for states
  1401. * other than Wait for Login.
  1402. */
  1403. if (time_after_eq(jiffies, mtime)) {
  1404. qla_printk(KERN_INFO, ha,
  1405. "Cable is unplugged...\n");
  1406. vha->device_flags |= DFLG_NO_CABLE;
  1407. break;
  1408. }
  1409. }
  1410. } else {
  1411. /* Mailbox cmd failed. Timeout on min_wait. */
  1412. if (time_after_eq(jiffies, mtime))
  1413. break;
  1414. }
  1415. if (time_after_eq(jiffies, wtime))
  1416. break;
  1417. /* Delay for a while */
  1418. msleep(500);
  1419. DEBUG3(printk("scsi(%ld): fw_state=%x curr time=%lx.\n",
  1420. vha->host_no, state[0], jiffies));
  1421. } while (1);
  1422. DEBUG(printk("scsi(%ld): fw_state=%x (%x, %x, %x, %x) curr time=%lx.\n",
  1423. vha->host_no, state[0], state[1], state[2], state[3], state[4],
  1424. jiffies));
  1425. if (rval) {
  1426. DEBUG2_3(printk("scsi(%ld): Firmware ready **** FAILED ****.\n",
  1427. vha->host_no));
  1428. }
  1429. return (rval);
  1430. }
  1431. /*
  1432. * qla2x00_configure_hba
  1433. * Setup adapter context.
  1434. *
  1435. * Input:
  1436. * ha = adapter state pointer.
  1437. *
  1438. * Returns:
  1439. * 0 = success
  1440. *
  1441. * Context:
  1442. * Kernel context.
  1443. */
  1444. static int
  1445. qla2x00_configure_hba(scsi_qla_host_t *vha)
  1446. {
  1447. int rval;
  1448. uint16_t loop_id;
  1449. uint16_t topo;
  1450. uint16_t sw_cap;
  1451. uint8_t al_pa;
  1452. uint8_t area;
  1453. uint8_t domain;
  1454. char connect_type[22];
  1455. struct qla_hw_data *ha = vha->hw;
  1456. /* Get host addresses. */
  1457. rval = qla2x00_get_adapter_id(vha,
  1458. &loop_id, &al_pa, &area, &domain, &topo, &sw_cap);
  1459. if (rval != QLA_SUCCESS) {
  1460. if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) ||
  1461. (rval == QLA_COMMAND_ERROR && loop_id == 0x7)) {
  1462. DEBUG2(printk("%s(%ld) Loop is in a transition state\n",
  1463. __func__, vha->host_no));
  1464. } else {
  1465. qla_printk(KERN_WARNING, ha,
  1466. "ERROR -- Unable to get host loop ID.\n");
  1467. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  1468. }
  1469. return (rval);
  1470. }
  1471. if (topo == 4) {
  1472. qla_printk(KERN_INFO, ha,
  1473. "Cannot get topology - retrying.\n");
  1474. return (QLA_FUNCTION_FAILED);
  1475. }
  1476. vha->loop_id = loop_id;
  1477. /* initialize */
  1478. ha->min_external_loopid = SNS_FIRST_LOOP_ID;
  1479. ha->operating_mode = LOOP;
  1480. ha->switch_cap = 0;
  1481. switch (topo) {
  1482. case 0:
  1483. DEBUG3(printk("scsi(%ld): HBA in NL topology.\n",
  1484. vha->host_no));
  1485. ha->current_topology = ISP_CFG_NL;
  1486. strcpy(connect_type, "(Loop)");
  1487. break;
  1488. case 1:
  1489. DEBUG3(printk("scsi(%ld): HBA in FL topology.\n",
  1490. vha->host_no));
  1491. ha->switch_cap = sw_cap;
  1492. ha->current_topology = ISP_CFG_FL;
  1493. strcpy(connect_type, "(FL_Port)");
  1494. break;
  1495. case 2:
  1496. DEBUG3(printk("scsi(%ld): HBA in N P2P topology.\n",
  1497. vha->host_no));
  1498. ha->operating_mode = P2P;
  1499. ha->current_topology = ISP_CFG_N;
  1500. strcpy(connect_type, "(N_Port-to-N_Port)");
  1501. break;
  1502. case 3:
  1503. DEBUG3(printk("scsi(%ld): HBA in F P2P topology.\n",
  1504. vha->host_no));
  1505. ha->switch_cap = sw_cap;
  1506. ha->operating_mode = P2P;
  1507. ha->current_topology = ISP_CFG_F;
  1508. strcpy(connect_type, "(F_Port)");
  1509. break;
  1510. default:
  1511. DEBUG3(printk("scsi(%ld): HBA in unknown topology %x. "
  1512. "Using NL.\n",
  1513. vha->host_no, topo));
  1514. ha->current_topology = ISP_CFG_NL;
  1515. strcpy(connect_type, "(Loop)");
  1516. break;
  1517. }
  1518. /* Save Host port and loop ID. */
  1519. /* byte order - Big Endian */
  1520. vha->d_id.b.domain = domain;
  1521. vha->d_id.b.area = area;
  1522. vha->d_id.b.al_pa = al_pa;
  1523. if (!vha->flags.init_done)
  1524. qla_printk(KERN_INFO, ha,
  1525. "Topology - %s, Host Loop address 0x%x\n",
  1526. connect_type, vha->loop_id);
  1527. if (rval) {
  1528. DEBUG2_3(printk("scsi(%ld): FAILED.\n", vha->host_no));
  1529. } else {
  1530. DEBUG3(printk("scsi(%ld): exiting normally.\n", vha->host_no));
  1531. }
  1532. return(rval);
  1533. }
  1534. static inline void
  1535. qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len,
  1536. char *def)
  1537. {
  1538. char *st, *en;
  1539. uint16_t index;
  1540. struct qla_hw_data *ha = vha->hw;
  1541. int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) &&
  1542. !IS_QLA81XX(ha);
  1543. if (memcmp(model, BINZERO, len) != 0) {
  1544. strncpy(ha->model_number, model, len);
  1545. st = en = ha->model_number;
  1546. en += len - 1;
  1547. while (en > st) {
  1548. if (*en != 0x20 && *en != 0x00)
  1549. break;
  1550. *en-- = '\0';
  1551. }
  1552. index = (ha->pdev->subsystem_device & 0xff);
  1553. if (use_tbl &&
  1554. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1555. index < QLA_MODEL_NAMES)
  1556. strncpy(ha->model_desc,
  1557. qla2x00_model_name[index * 2 + 1],
  1558. sizeof(ha->model_desc) - 1);
  1559. } else {
  1560. index = (ha->pdev->subsystem_device & 0xff);
  1561. if (use_tbl &&
  1562. ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC &&
  1563. index < QLA_MODEL_NAMES) {
  1564. strcpy(ha->model_number,
  1565. qla2x00_model_name[index * 2]);
  1566. strncpy(ha->model_desc,
  1567. qla2x00_model_name[index * 2 + 1],
  1568. sizeof(ha->model_desc) - 1);
  1569. } else {
  1570. strcpy(ha->model_number, def);
  1571. }
  1572. }
  1573. if (IS_FWI2_CAPABLE(ha))
  1574. qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc,
  1575. sizeof(ha->model_desc));
  1576. }
  1577. /* On sparc systems, obtain port and node WWN from firmware
  1578. * properties.
  1579. */
  1580. static void qla2xxx_nvram_wwn_from_ofw(scsi_qla_host_t *vha, nvram_t *nv)
  1581. {
  1582. #ifdef CONFIG_SPARC
  1583. struct qla_hw_data *ha = vha->hw;
  1584. struct pci_dev *pdev = ha->pdev;
  1585. struct device_node *dp = pci_device_to_OF_node(pdev);
  1586. const u8 *val;
  1587. int len;
  1588. val = of_get_property(dp, "port-wwn", &len);
  1589. if (val && len >= WWN_SIZE)
  1590. memcpy(nv->port_name, val, WWN_SIZE);
  1591. val = of_get_property(dp, "node-wwn", &len);
  1592. if (val && len >= WWN_SIZE)
  1593. memcpy(nv->node_name, val, WWN_SIZE);
  1594. #endif
  1595. }
  1596. /*
  1597. * NVRAM configuration for ISP 2xxx
  1598. *
  1599. * Input:
  1600. * ha = adapter block pointer.
  1601. *
  1602. * Output:
  1603. * initialization control block in response_ring
  1604. * host adapters parameters in host adapter block
  1605. *
  1606. * Returns:
  1607. * 0 = success.
  1608. */
  1609. int
  1610. qla2x00_nvram_config(scsi_qla_host_t *vha)
  1611. {
  1612. int rval;
  1613. uint8_t chksum = 0;
  1614. uint16_t cnt;
  1615. uint8_t *dptr1, *dptr2;
  1616. struct qla_hw_data *ha = vha->hw;
  1617. init_cb_t *icb = ha->init_cb;
  1618. nvram_t *nv = ha->nvram;
  1619. uint8_t *ptr = ha->nvram;
  1620. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1621. rval = QLA_SUCCESS;
  1622. /* Determine NVRAM starting address. */
  1623. ha->nvram_size = sizeof(nvram_t);
  1624. ha->nvram_base = 0;
  1625. if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha))
  1626. if ((RD_REG_WORD(&reg->ctrl_status) >> 14) == 1)
  1627. ha->nvram_base = 0x80;
  1628. /* Get NVRAM data and calculate checksum. */
  1629. ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size);
  1630. for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++)
  1631. chksum += *ptr++;
  1632. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  1633. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  1634. /* Bad NVRAM data, set defaults parameters. */
  1635. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' ||
  1636. nv->id[2] != 'P' || nv->id[3] != ' ' || nv->nvram_version < 1) {
  1637. /* Reset NVRAM data. */
  1638. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  1639. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  1640. nv->nvram_version);
  1641. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  1642. "invalid -- WWPN) defaults.\n");
  1643. /*
  1644. * Set default initialization control block.
  1645. */
  1646. memset(nv, 0, ha->nvram_size);
  1647. nv->parameter_block_version = ICB_VERSION;
  1648. if (IS_QLA23XX(ha)) {
  1649. nv->firmware_options[0] = BIT_2 | BIT_1;
  1650. nv->firmware_options[1] = BIT_7 | BIT_5;
  1651. nv->add_firmware_options[0] = BIT_5;
  1652. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1653. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1654. nv->special_options[1] = BIT_7;
  1655. } else if (IS_QLA2200(ha)) {
  1656. nv->firmware_options[0] = BIT_2 | BIT_1;
  1657. nv->firmware_options[1] = BIT_7 | BIT_5;
  1658. nv->add_firmware_options[0] = BIT_5;
  1659. nv->add_firmware_options[1] = BIT_5 | BIT_4;
  1660. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1661. } else if (IS_QLA2100(ha)) {
  1662. nv->firmware_options[0] = BIT_3 | BIT_1;
  1663. nv->firmware_options[1] = BIT_5;
  1664. nv->frame_payload_size = __constant_cpu_to_le16(1024);
  1665. }
  1666. nv->max_iocb_allocation = __constant_cpu_to_le16(256);
  1667. nv->execution_throttle = __constant_cpu_to_le16(16);
  1668. nv->retry_count = 8;
  1669. nv->retry_delay = 1;
  1670. nv->port_name[0] = 33;
  1671. nv->port_name[3] = 224;
  1672. nv->port_name[4] = 139;
  1673. qla2xxx_nvram_wwn_from_ofw(vha, nv);
  1674. nv->login_timeout = 4;
  1675. /*
  1676. * Set default host adapter parameters
  1677. */
  1678. nv->host_p[1] = BIT_2;
  1679. nv->reset_delay = 5;
  1680. nv->port_down_retry_count = 8;
  1681. nv->max_luns_per_target = __constant_cpu_to_le16(8);
  1682. nv->link_down_timeout = 60;
  1683. rval = 1;
  1684. }
  1685. #if defined(CONFIG_IA64_GENERIC) || defined(CONFIG_IA64_SGI_SN2)
  1686. /*
  1687. * The SN2 does not provide BIOS emulation which means you can't change
  1688. * potentially bogus BIOS settings. Force the use of default settings
  1689. * for link rate and frame size. Hope that the rest of the settings
  1690. * are valid.
  1691. */
  1692. if (ia64_platform_is("sn2")) {
  1693. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  1694. if (IS_QLA23XX(ha))
  1695. nv->special_options[1] = BIT_7;
  1696. }
  1697. #endif
  1698. /* Reset Initialization control block */
  1699. memset(icb, 0, ha->init_cb_size);
  1700. /*
  1701. * Setup driver NVRAM options.
  1702. */
  1703. nv->firmware_options[0] |= (BIT_6 | BIT_1);
  1704. nv->firmware_options[0] &= ~(BIT_5 | BIT_4);
  1705. nv->firmware_options[1] |= (BIT_5 | BIT_0);
  1706. nv->firmware_options[1] &= ~BIT_4;
  1707. if (IS_QLA23XX(ha)) {
  1708. nv->firmware_options[0] |= BIT_2;
  1709. nv->firmware_options[0] &= ~BIT_3;
  1710. nv->add_firmware_options[1] |= BIT_5 | BIT_4;
  1711. if (IS_QLA2300(ha)) {
  1712. if (ha->fb_rev == FPM_2310) {
  1713. strcpy(ha->model_number, "QLA2310");
  1714. } else {
  1715. strcpy(ha->model_number, "QLA2300");
  1716. }
  1717. } else {
  1718. qla2x00_set_model_info(vha, nv->model_number,
  1719. sizeof(nv->model_number), "QLA23xx");
  1720. }
  1721. } else if (IS_QLA2200(ha)) {
  1722. nv->firmware_options[0] |= BIT_2;
  1723. /*
  1724. * 'Point-to-point preferred, else loop' is not a safe
  1725. * connection mode setting.
  1726. */
  1727. if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) ==
  1728. (BIT_5 | BIT_4)) {
  1729. /* Force 'loop preferred, else point-to-point'. */
  1730. nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4);
  1731. nv->add_firmware_options[0] |= BIT_5;
  1732. }
  1733. strcpy(ha->model_number, "QLA22xx");
  1734. } else /*if (IS_QLA2100(ha))*/ {
  1735. strcpy(ha->model_number, "QLA2100");
  1736. }
  1737. /*
  1738. * Copy over NVRAM RISC parameter block to initialization control block.
  1739. */
  1740. dptr1 = (uint8_t *)icb;
  1741. dptr2 = (uint8_t *)&nv->parameter_block_version;
  1742. cnt = (uint8_t *)&icb->request_q_outpointer - (uint8_t *)&icb->version;
  1743. while (cnt--)
  1744. *dptr1++ = *dptr2++;
  1745. /* Copy 2nd half. */
  1746. dptr1 = (uint8_t *)icb->add_firmware_options;
  1747. cnt = (uint8_t *)icb->reserved_3 - (uint8_t *)icb->add_firmware_options;
  1748. while (cnt--)
  1749. *dptr1++ = *dptr2++;
  1750. /* Use alternate WWN? */
  1751. if (nv->host_p[1] & BIT_7) {
  1752. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  1753. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  1754. }
  1755. /* Prepare nodename */
  1756. if ((icb->firmware_options[1] & BIT_6) == 0) {
  1757. /*
  1758. * Firmware will apply the following mask if the nodename was
  1759. * not provided.
  1760. */
  1761. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  1762. icb->node_name[0] &= 0xF0;
  1763. }
  1764. /*
  1765. * Set host adapter parameters.
  1766. */
  1767. if (nv->host_p[0] & BIT_7)
  1768. ql2xextended_error_logging = 1;
  1769. ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0);
  1770. /* Always load RISC code on non ISP2[12]00 chips. */
  1771. if (!IS_QLA2100(ha) && !IS_QLA2200(ha))
  1772. ha->flags.disable_risc_code_load = 0;
  1773. ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0);
  1774. ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0);
  1775. ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0);
  1776. ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0;
  1777. ha->flags.disable_serdes = 0;
  1778. ha->operating_mode =
  1779. (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4;
  1780. memcpy(ha->fw_seriallink_options, nv->seriallink_options,
  1781. sizeof(ha->fw_seriallink_options));
  1782. /* save HBA serial number */
  1783. ha->serial0 = icb->port_name[5];
  1784. ha->serial1 = icb->port_name[6];
  1785. ha->serial2 = icb->port_name[7];
  1786. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  1787. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  1788. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  1789. ha->retry_count = nv->retry_count;
  1790. /* Set minimum login_timeout to 4 seconds. */
  1791. if (nv->login_timeout < ql2xlogintimeout)
  1792. nv->login_timeout = ql2xlogintimeout;
  1793. if (nv->login_timeout < 4)
  1794. nv->login_timeout = 4;
  1795. ha->login_timeout = nv->login_timeout;
  1796. icb->login_timeout = nv->login_timeout;
  1797. /* Set minimum RATOV to 100 tenths of a second. */
  1798. ha->r_a_tov = 100;
  1799. ha->loop_reset_delay = nv->reset_delay;
  1800. /* Link Down Timeout = 0:
  1801. *
  1802. * When Port Down timer expires we will start returning
  1803. * I/O's to OS with "DID_NO_CONNECT".
  1804. *
  1805. * Link Down Timeout != 0:
  1806. *
  1807. * The driver waits for the link to come up after link down
  1808. * before returning I/Os to OS with "DID_NO_CONNECT".
  1809. */
  1810. if (nv->link_down_timeout == 0) {
  1811. ha->loop_down_abort_time =
  1812. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  1813. } else {
  1814. ha->link_down_timeout = nv->link_down_timeout;
  1815. ha->loop_down_abort_time =
  1816. (LOOP_DOWN_TIME - ha->link_down_timeout);
  1817. }
  1818. /*
  1819. * Need enough time to try and get the port back.
  1820. */
  1821. ha->port_down_retry_count = nv->port_down_retry_count;
  1822. if (qlport_down_retry)
  1823. ha->port_down_retry_count = qlport_down_retry;
  1824. /* Set login_retry_count */
  1825. ha->login_retry_count = nv->retry_count;
  1826. if (ha->port_down_retry_count == nv->port_down_retry_count &&
  1827. ha->port_down_retry_count > 3)
  1828. ha->login_retry_count = ha->port_down_retry_count;
  1829. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  1830. ha->login_retry_count = ha->port_down_retry_count;
  1831. if (ql2xloginretrycount)
  1832. ha->login_retry_count = ql2xloginretrycount;
  1833. icb->lun_enables = __constant_cpu_to_le16(0);
  1834. icb->command_resource_count = 0;
  1835. icb->immediate_notify_resource_count = 0;
  1836. icb->timeout = __constant_cpu_to_le16(0);
  1837. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  1838. /* Enable RIO */
  1839. icb->firmware_options[0] &= ~BIT_3;
  1840. icb->add_firmware_options[0] &=
  1841. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1842. icb->add_firmware_options[0] |= BIT_2;
  1843. icb->response_accumulation_timer = 3;
  1844. icb->interrupt_delay_timer = 5;
  1845. vha->flags.process_response_queue = 1;
  1846. } else {
  1847. /* Enable ZIO. */
  1848. if (!vha->flags.init_done) {
  1849. ha->zio_mode = icb->add_firmware_options[0] &
  1850. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1851. ha->zio_timer = icb->interrupt_delay_timer ?
  1852. icb->interrupt_delay_timer: 2;
  1853. }
  1854. icb->add_firmware_options[0] &=
  1855. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0);
  1856. vha->flags.process_response_queue = 0;
  1857. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  1858. ha->zio_mode = QLA_ZIO_MODE_6;
  1859. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer "
  1860. "delay (%d us).\n", vha->host_no, ha->zio_mode,
  1861. ha->zio_timer * 100));
  1862. qla_printk(KERN_INFO, ha,
  1863. "ZIO mode %d enabled; timer delay (%d us).\n",
  1864. ha->zio_mode, ha->zio_timer * 100);
  1865. icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode;
  1866. icb->interrupt_delay_timer = (uint8_t)ha->zio_timer;
  1867. vha->flags.process_response_queue = 1;
  1868. }
  1869. }
  1870. if (rval) {
  1871. DEBUG2_3(printk(KERN_WARNING
  1872. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  1873. }
  1874. return (rval);
  1875. }
  1876. static void
  1877. qla2x00_rport_del(void *data)
  1878. {
  1879. fc_port_t *fcport = data;
  1880. struct fc_rport *rport;
  1881. spin_lock_irq(fcport->vha->host->host_lock);
  1882. rport = fcport->drport ? fcport->drport: fcport->rport;
  1883. fcport->drport = NULL;
  1884. spin_unlock_irq(fcport->vha->host->host_lock);
  1885. if (rport)
  1886. fc_remote_port_delete(rport);
  1887. }
  1888. /**
  1889. * qla2x00_alloc_fcport() - Allocate a generic fcport.
  1890. * @ha: HA context
  1891. * @flags: allocation flags
  1892. *
  1893. * Returns a pointer to the allocated fcport, or NULL, if none available.
  1894. */
  1895. static fc_port_t *
  1896. qla2x00_alloc_fcport(scsi_qla_host_t *vha, gfp_t flags)
  1897. {
  1898. fc_port_t *fcport;
  1899. fcport = kzalloc(sizeof(fc_port_t), flags);
  1900. if (!fcport)
  1901. return NULL;
  1902. /* Setup fcport template structure. */
  1903. fcport->vha = vha;
  1904. fcport->vp_idx = vha->vp_idx;
  1905. fcport->port_type = FCT_UNKNOWN;
  1906. fcport->loop_id = FC_NO_LOOP_ID;
  1907. atomic_set(&fcport->state, FCS_UNCONFIGURED);
  1908. fcport->supported_classes = FC_COS_UNSPECIFIED;
  1909. return fcport;
  1910. }
  1911. /*
  1912. * qla2x00_configure_loop
  1913. * Updates Fibre Channel Device Database with what is actually on loop.
  1914. *
  1915. * Input:
  1916. * ha = adapter block pointer.
  1917. *
  1918. * Returns:
  1919. * 0 = success.
  1920. * 1 = error.
  1921. * 2 = database was full and device was not configured.
  1922. */
  1923. static int
  1924. qla2x00_configure_loop(scsi_qla_host_t *vha)
  1925. {
  1926. int rval;
  1927. unsigned long flags, save_flags;
  1928. struct qla_hw_data *ha = vha->hw;
  1929. rval = QLA_SUCCESS;
  1930. /* Get Initiator ID */
  1931. if (test_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags)) {
  1932. rval = qla2x00_configure_hba(vha);
  1933. if (rval != QLA_SUCCESS) {
  1934. DEBUG(printk("scsi(%ld): Unable to configure HBA.\n",
  1935. vha->host_no));
  1936. return (rval);
  1937. }
  1938. }
  1939. save_flags = flags = vha->dpc_flags;
  1940. DEBUG(printk("scsi(%ld): Configure loop -- dpc flags =0x%lx\n",
  1941. vha->host_no, flags));
  1942. /*
  1943. * If we have both an RSCN and PORT UPDATE pending then handle them
  1944. * both at the same time.
  1945. */
  1946. clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1947. clear_bit(RSCN_UPDATE, &vha->dpc_flags);
  1948. qla2x00_get_data_rate(vha);
  1949. /* Determine what we need to do */
  1950. if (ha->current_topology == ISP_CFG_FL &&
  1951. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1952. vha->flags.rscn_queue_overflow = 1;
  1953. set_bit(RSCN_UPDATE, &flags);
  1954. } else if (ha->current_topology == ISP_CFG_F &&
  1955. (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
  1956. vha->flags.rscn_queue_overflow = 1;
  1957. set_bit(RSCN_UPDATE, &flags);
  1958. clear_bit(LOCAL_LOOP_UPDATE, &flags);
  1959. } else if (ha->current_topology == ISP_CFG_N) {
  1960. clear_bit(RSCN_UPDATE, &flags);
  1961. } else if (!vha->flags.online ||
  1962. (test_bit(ABORT_ISP_ACTIVE, &flags))) {
  1963. vha->flags.rscn_queue_overflow = 1;
  1964. set_bit(RSCN_UPDATE, &flags);
  1965. set_bit(LOCAL_LOOP_UPDATE, &flags);
  1966. }
  1967. if (test_bit(LOCAL_LOOP_UPDATE, &flags)) {
  1968. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  1969. rval = QLA_FUNCTION_FAILED;
  1970. else
  1971. rval = qla2x00_configure_local_loop(vha);
  1972. }
  1973. if (rval == QLA_SUCCESS && test_bit(RSCN_UPDATE, &flags)) {
  1974. if (LOOP_TRANSITION(vha))
  1975. rval = QLA_FUNCTION_FAILED;
  1976. else
  1977. rval = qla2x00_configure_fabric(vha);
  1978. }
  1979. if (rval == QLA_SUCCESS) {
  1980. if (atomic_read(&vha->loop_down_timer) ||
  1981. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1982. rval = QLA_FUNCTION_FAILED;
  1983. } else {
  1984. atomic_set(&vha->loop_state, LOOP_READY);
  1985. DEBUG(printk("scsi(%ld): LOOP READY\n", vha->host_no));
  1986. }
  1987. }
  1988. if (rval) {
  1989. DEBUG2_3(printk("%s(%ld): *** FAILED ***\n",
  1990. __func__, vha->host_no));
  1991. } else {
  1992. DEBUG3(printk("%s: exiting normally\n", __func__));
  1993. }
  1994. /* Restore state if a resync event occurred during processing */
  1995. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags)) {
  1996. if (test_bit(LOCAL_LOOP_UPDATE, &save_flags))
  1997. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1998. if (test_bit(RSCN_UPDATE, &save_flags)) {
  1999. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  2000. vha->flags.rscn_queue_overflow = 1;
  2001. }
  2002. }
  2003. return (rval);
  2004. }
  2005. /*
  2006. * qla2x00_configure_local_loop
  2007. * Updates Fibre Channel Device Database with local loop devices.
  2008. *
  2009. * Input:
  2010. * ha = adapter block pointer.
  2011. *
  2012. * Returns:
  2013. * 0 = success.
  2014. */
  2015. static int
  2016. qla2x00_configure_local_loop(scsi_qla_host_t *vha)
  2017. {
  2018. int rval, rval2;
  2019. int found_devs;
  2020. int found;
  2021. fc_port_t *fcport, *new_fcport;
  2022. uint16_t index;
  2023. uint16_t entries;
  2024. char *id_iter;
  2025. uint16_t loop_id;
  2026. uint8_t domain, area, al_pa;
  2027. struct qla_hw_data *ha = vha->hw;
  2028. found_devs = 0;
  2029. new_fcport = NULL;
  2030. entries = MAX_FIBRE_DEVICES;
  2031. DEBUG3(printk("scsi(%ld): Getting FCAL position map\n", vha->host_no));
  2032. DEBUG3(qla2x00_get_fcal_position_map(vha, NULL));
  2033. /* Get list of logged in devices. */
  2034. memset(ha->gid_list, 0, GID_LIST_SIZE);
  2035. rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma,
  2036. &entries);
  2037. if (rval != QLA_SUCCESS)
  2038. goto cleanup_allocation;
  2039. DEBUG3(printk("scsi(%ld): Entries in ID list (%d)\n",
  2040. vha->host_no, entries));
  2041. DEBUG3(qla2x00_dump_buffer((uint8_t *)ha->gid_list,
  2042. entries * sizeof(struct gid_list_info)));
  2043. /* Allocate temporary fcport for any new fcports discovered. */
  2044. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2045. if (new_fcport == NULL) {
  2046. rval = QLA_MEMORY_ALLOC_FAILED;
  2047. goto cleanup_allocation;
  2048. }
  2049. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2050. /*
  2051. * Mark local devices that were present with FCF_DEVICE_LOST for now.
  2052. */
  2053. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2054. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2055. fcport->port_type != FCT_BROADCAST &&
  2056. (fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2057. DEBUG(printk("scsi(%ld): Marking port lost, "
  2058. "loop_id=0x%04x\n",
  2059. vha->host_no, fcport->loop_id));
  2060. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2061. }
  2062. }
  2063. /* Add devices to port list. */
  2064. id_iter = (char *)ha->gid_list;
  2065. for (index = 0; index < entries; index++) {
  2066. domain = ((struct gid_list_info *)id_iter)->domain;
  2067. area = ((struct gid_list_info *)id_iter)->area;
  2068. al_pa = ((struct gid_list_info *)id_iter)->al_pa;
  2069. if (IS_QLA2100(ha) || IS_QLA2200(ha))
  2070. loop_id = (uint16_t)
  2071. ((struct gid_list_info *)id_iter)->loop_id_2100;
  2072. else
  2073. loop_id = le16_to_cpu(
  2074. ((struct gid_list_info *)id_iter)->loop_id);
  2075. id_iter += ha->gid_list_info_size;
  2076. /* Bypass reserved domain fields. */
  2077. if ((domain & 0xf0) == 0xf0)
  2078. continue;
  2079. /* Bypass if not same domain and area of adapter. */
  2080. if (area && domain &&
  2081. (area != vha->d_id.b.area || domain != vha->d_id.b.domain))
  2082. continue;
  2083. /* Bypass invalid local loop ID. */
  2084. if (loop_id > LAST_LOCAL_LOOP_ID)
  2085. continue;
  2086. /* Fill in member data. */
  2087. new_fcport->d_id.b.domain = domain;
  2088. new_fcport->d_id.b.area = area;
  2089. new_fcport->d_id.b.al_pa = al_pa;
  2090. new_fcport->loop_id = loop_id;
  2091. new_fcport->vp_idx = vha->vp_idx;
  2092. rval2 = qla2x00_get_port_database(vha, new_fcport, 0);
  2093. if (rval2 != QLA_SUCCESS) {
  2094. DEBUG2(printk("scsi(%ld): Failed to retrieve fcport "
  2095. "information -- get_port_database=%x, "
  2096. "loop_id=0x%04x\n",
  2097. vha->host_no, rval2, new_fcport->loop_id));
  2098. DEBUG2(printk("scsi(%ld): Scheduling resync...\n",
  2099. vha->host_no));
  2100. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  2101. continue;
  2102. }
  2103. /* Check for matching device in port list. */
  2104. found = 0;
  2105. fcport = NULL;
  2106. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2107. if (memcmp(new_fcport->port_name, fcport->port_name,
  2108. WWN_SIZE))
  2109. continue;
  2110. fcport->flags &= ~FCF_FABRIC_DEVICE;
  2111. fcport->loop_id = new_fcport->loop_id;
  2112. fcport->port_type = new_fcport->port_type;
  2113. fcport->d_id.b24 = new_fcport->d_id.b24;
  2114. memcpy(fcport->node_name, new_fcport->node_name,
  2115. WWN_SIZE);
  2116. found++;
  2117. break;
  2118. }
  2119. if (!found) {
  2120. /* New device, add to fcports list. */
  2121. if (vha->vp_idx) {
  2122. new_fcport->vha = vha;
  2123. new_fcport->vp_idx = vha->vp_idx;
  2124. }
  2125. list_add_tail(&new_fcport->list, &vha->vp_fcports);
  2126. /* Allocate a new replacement fcport. */
  2127. fcport = new_fcport;
  2128. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2129. if (new_fcport == NULL) {
  2130. rval = QLA_MEMORY_ALLOC_FAILED;
  2131. goto cleanup_allocation;
  2132. }
  2133. new_fcport->flags &= ~FCF_FABRIC_DEVICE;
  2134. }
  2135. /* Base iIDMA settings on HBA port speed. */
  2136. fcport->fp_speed = ha->link_data_rate;
  2137. qla2x00_update_fcport(vha, fcport);
  2138. found_devs++;
  2139. }
  2140. cleanup_allocation:
  2141. kfree(new_fcport);
  2142. if (rval != QLA_SUCCESS) {
  2143. DEBUG2(printk("scsi(%ld): Configure local loop error exit: "
  2144. "rval=%x\n", vha->host_no, rval));
  2145. }
  2146. return (rval);
  2147. }
  2148. static void
  2149. qla2x00_iidma_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2150. {
  2151. #define LS_UNKNOWN 2
  2152. static char *link_speeds[] = { "1", "2", "?", "4", "8", "10" };
  2153. char *link_speed;
  2154. int rval;
  2155. uint16_t mb[4];
  2156. struct qla_hw_data *ha = vha->hw;
  2157. if (!IS_IIDMA_CAPABLE(ha))
  2158. return;
  2159. if (fcport->fp_speed == PORT_SPEED_UNKNOWN ||
  2160. fcport->fp_speed > ha->link_data_rate)
  2161. return;
  2162. rval = qla2x00_set_idma_speed(vha, fcport->loop_id, fcport->fp_speed,
  2163. mb);
  2164. if (rval != QLA_SUCCESS) {
  2165. DEBUG2(printk("scsi(%ld): Unable to adjust iIDMA "
  2166. "%02x%02x%02x%02x%02x%02x%02x%02x -- %04x %x %04x %04x.\n",
  2167. vha->host_no, fcport->port_name[0], fcport->port_name[1],
  2168. fcport->port_name[2], fcport->port_name[3],
  2169. fcport->port_name[4], fcport->port_name[5],
  2170. fcport->port_name[6], fcport->port_name[7], rval,
  2171. fcport->fp_speed, mb[0], mb[1]));
  2172. } else {
  2173. link_speed = link_speeds[LS_UNKNOWN];
  2174. if (fcport->fp_speed < 5)
  2175. link_speed = link_speeds[fcport->fp_speed];
  2176. else if (fcport->fp_speed == 0x13)
  2177. link_speed = link_speeds[5];
  2178. DEBUG2(qla_printk(KERN_INFO, ha,
  2179. "iIDMA adjusted to %s GB/s on "
  2180. "%02x%02x%02x%02x%02x%02x%02x%02x.\n",
  2181. link_speed, fcport->port_name[0],
  2182. fcport->port_name[1], fcport->port_name[2],
  2183. fcport->port_name[3], fcport->port_name[4],
  2184. fcport->port_name[5], fcport->port_name[6],
  2185. fcport->port_name[7]));
  2186. }
  2187. }
  2188. static void
  2189. qla2x00_reg_remote_port(scsi_qla_host_t *vha, fc_port_t *fcport)
  2190. {
  2191. struct fc_rport_identifiers rport_ids;
  2192. struct fc_rport *rport;
  2193. struct qla_hw_data *ha = vha->hw;
  2194. qla2x00_rport_del(fcport);
  2195. rport_ids.node_name = wwn_to_u64(fcport->node_name);
  2196. rport_ids.port_name = wwn_to_u64(fcport->port_name);
  2197. rport_ids.port_id = fcport->d_id.b.domain << 16 |
  2198. fcport->d_id.b.area << 8 | fcport->d_id.b.al_pa;
  2199. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2200. fcport->rport = rport = fc_remote_port_add(vha->host, 0, &rport_ids);
  2201. if (!rport) {
  2202. qla_printk(KERN_WARNING, ha,
  2203. "Unable to allocate fc remote port!\n");
  2204. return;
  2205. }
  2206. spin_lock_irq(fcport->vha->host->host_lock);
  2207. *((fc_port_t **)rport->dd_data) = fcport;
  2208. spin_unlock_irq(fcport->vha->host->host_lock);
  2209. rport->supported_classes = fcport->supported_classes;
  2210. rport_ids.roles = FC_RPORT_ROLE_UNKNOWN;
  2211. if (fcport->port_type == FCT_INITIATOR)
  2212. rport_ids.roles |= FC_RPORT_ROLE_FCP_INITIATOR;
  2213. if (fcport->port_type == FCT_TARGET)
  2214. rport_ids.roles |= FC_RPORT_ROLE_FCP_TARGET;
  2215. fc_remote_port_rolechg(rport, rport_ids.roles);
  2216. }
  2217. /*
  2218. * qla2x00_update_fcport
  2219. * Updates device on list.
  2220. *
  2221. * Input:
  2222. * ha = adapter block pointer.
  2223. * fcport = port structure pointer.
  2224. *
  2225. * Return:
  2226. * 0 - Success
  2227. * BIT_0 - error
  2228. *
  2229. * Context:
  2230. * Kernel context.
  2231. */
  2232. void
  2233. qla2x00_update_fcport(scsi_qla_host_t *vha, fc_port_t *fcport)
  2234. {
  2235. struct qla_hw_data *ha = vha->hw;
  2236. fcport->vha = vha;
  2237. fcport->login_retry = 0;
  2238. fcport->port_login_retry_count = ha->port_down_retry_count *
  2239. PORT_RETRY_TIME;
  2240. atomic_set(&fcport->port_down_timer, ha->port_down_retry_count *
  2241. PORT_RETRY_TIME);
  2242. fcport->flags &= ~FCF_LOGIN_NEEDED;
  2243. qla2x00_iidma_fcport(vha, fcport);
  2244. atomic_set(&fcport->state, FCS_ONLINE);
  2245. qla2x00_reg_remote_port(vha, fcport);
  2246. }
  2247. /*
  2248. * qla2x00_configure_fabric
  2249. * Setup SNS devices with loop ID's.
  2250. *
  2251. * Input:
  2252. * ha = adapter block pointer.
  2253. *
  2254. * Returns:
  2255. * 0 = success.
  2256. * BIT_0 = error
  2257. */
  2258. static int
  2259. qla2x00_configure_fabric(scsi_qla_host_t *vha)
  2260. {
  2261. int rval, rval2;
  2262. fc_port_t *fcport, *fcptemp;
  2263. uint16_t next_loopid;
  2264. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2265. uint16_t loop_id;
  2266. LIST_HEAD(new_fcports);
  2267. struct qla_hw_data *ha = vha->hw;
  2268. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  2269. /* If FL port exists, then SNS is present */
  2270. if (IS_FWI2_CAPABLE(ha))
  2271. loop_id = NPH_F_PORT;
  2272. else
  2273. loop_id = SNS_FL_PORT;
  2274. rval = qla2x00_get_port_name(vha, loop_id, vha->fabric_node_name, 1);
  2275. if (rval != QLA_SUCCESS) {
  2276. DEBUG2(printk("scsi(%ld): MBC_GET_PORT_NAME Failed, No FL "
  2277. "Port\n", vha->host_no));
  2278. vha->device_flags &= ~SWITCH_FOUND;
  2279. return (QLA_SUCCESS);
  2280. }
  2281. vha->device_flags |= SWITCH_FOUND;
  2282. /* Mark devices that need re-synchronization. */
  2283. rval2 = qla2x00_device_resync(vha);
  2284. if (rval2 == QLA_RSCNS_HANDLED) {
  2285. /* No point doing the scan, just continue. */
  2286. return (QLA_SUCCESS);
  2287. }
  2288. do {
  2289. /* FDMI support. */
  2290. if (ql2xfdmienable &&
  2291. test_and_clear_bit(REGISTER_FDMI_NEEDED, &vha->dpc_flags))
  2292. qla2x00_fdmi_register(vha);
  2293. /* Ensure we are logged into the SNS. */
  2294. if (IS_FWI2_CAPABLE(ha))
  2295. loop_id = NPH_SNS;
  2296. else
  2297. loop_id = SIMPLE_NAME_SERVER;
  2298. ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff,
  2299. 0xfc, mb, BIT_1 | BIT_0);
  2300. if (mb[0] != MBS_COMMAND_COMPLETE) {
  2301. DEBUG2(qla_printk(KERN_INFO, ha,
  2302. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  2303. "mb[2]=%x mb[6]=%x mb[7]=%x\n", loop_id,
  2304. mb[0], mb[1], mb[2], mb[6], mb[7]));
  2305. return (QLA_SUCCESS);
  2306. }
  2307. if (test_and_clear_bit(REGISTER_FC4_NEEDED, &vha->dpc_flags)) {
  2308. if (qla2x00_rft_id(vha)) {
  2309. /* EMPTY */
  2310. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2311. "TYPE failed.\n", vha->host_no));
  2312. }
  2313. if (qla2x00_rff_id(vha)) {
  2314. /* EMPTY */
  2315. DEBUG2(printk("scsi(%ld): Register FC-4 "
  2316. "Features failed.\n", vha->host_no));
  2317. }
  2318. if (qla2x00_rnn_id(vha)) {
  2319. /* EMPTY */
  2320. DEBUG2(printk("scsi(%ld): Register Node Name "
  2321. "failed.\n", vha->host_no));
  2322. } else if (qla2x00_rsnn_nn(vha)) {
  2323. /* EMPTY */
  2324. DEBUG2(printk("scsi(%ld): Register Symbolic "
  2325. "Node Name failed.\n", vha->host_no));
  2326. }
  2327. }
  2328. rval = qla2x00_find_all_fabric_devs(vha, &new_fcports);
  2329. if (rval != QLA_SUCCESS)
  2330. break;
  2331. /*
  2332. * Logout all previous fabric devices marked lost, except
  2333. * tape devices.
  2334. */
  2335. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2336. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2337. break;
  2338. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0)
  2339. continue;
  2340. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  2341. qla2x00_mark_device_lost(vha, fcport,
  2342. ql2xplogiabsentdevice, 0);
  2343. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2344. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2345. fcport->port_type != FCT_INITIATOR &&
  2346. fcport->port_type != FCT_BROADCAST) {
  2347. ha->isp_ops->fabric_logout(vha,
  2348. fcport->loop_id,
  2349. fcport->d_id.b.domain,
  2350. fcport->d_id.b.area,
  2351. fcport->d_id.b.al_pa);
  2352. fcport->loop_id = FC_NO_LOOP_ID;
  2353. }
  2354. }
  2355. }
  2356. /* Starting free loop ID. */
  2357. next_loopid = ha->min_external_loopid;
  2358. /*
  2359. * Scan through our port list and login entries that need to be
  2360. * logged in.
  2361. */
  2362. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2363. if (atomic_read(&vha->loop_down_timer) ||
  2364. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2365. break;
  2366. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2367. (fcport->flags & FCF_LOGIN_NEEDED) == 0)
  2368. continue;
  2369. if (fcport->loop_id == FC_NO_LOOP_ID) {
  2370. fcport->loop_id = next_loopid;
  2371. rval = qla2x00_find_new_loop_id(
  2372. base_vha, fcport);
  2373. if (rval != QLA_SUCCESS) {
  2374. /* Ran out of IDs to use */
  2375. break;
  2376. }
  2377. }
  2378. /* Login and update database */
  2379. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2380. }
  2381. /* Exit if out of loop IDs. */
  2382. if (rval != QLA_SUCCESS) {
  2383. break;
  2384. }
  2385. /*
  2386. * Login and add the new devices to our port list.
  2387. */
  2388. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2389. if (atomic_read(&vha->loop_down_timer) ||
  2390. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2391. break;
  2392. /* Find a new loop ID to use. */
  2393. fcport->loop_id = next_loopid;
  2394. rval = qla2x00_find_new_loop_id(base_vha, fcport);
  2395. if (rval != QLA_SUCCESS) {
  2396. /* Ran out of IDs to use */
  2397. break;
  2398. }
  2399. /* Login and update database */
  2400. qla2x00_fabric_dev_login(vha, fcport, &next_loopid);
  2401. if (vha->vp_idx) {
  2402. fcport->vha = vha;
  2403. fcport->vp_idx = vha->vp_idx;
  2404. }
  2405. list_move_tail(&fcport->list, &vha->vp_fcports);
  2406. }
  2407. } while (0);
  2408. /* Free all new device structures not processed. */
  2409. list_for_each_entry_safe(fcport, fcptemp, &new_fcports, list) {
  2410. list_del(&fcport->list);
  2411. kfree(fcport);
  2412. }
  2413. if (rval) {
  2414. DEBUG2(printk("scsi(%ld): Configure fabric error exit: "
  2415. "rval=%d\n", vha->host_no, rval));
  2416. }
  2417. return (rval);
  2418. }
  2419. /*
  2420. * qla2x00_find_all_fabric_devs
  2421. *
  2422. * Input:
  2423. * ha = adapter block pointer.
  2424. * dev = database device entry pointer.
  2425. *
  2426. * Returns:
  2427. * 0 = success.
  2428. *
  2429. * Context:
  2430. * Kernel context.
  2431. */
  2432. static int
  2433. qla2x00_find_all_fabric_devs(scsi_qla_host_t *vha,
  2434. struct list_head *new_fcports)
  2435. {
  2436. int rval;
  2437. uint16_t loop_id;
  2438. fc_port_t *fcport, *new_fcport, *fcptemp;
  2439. int found;
  2440. sw_info_t *swl;
  2441. int swl_idx;
  2442. int first_dev, last_dev;
  2443. port_id_t wrap, nxt_d_id;
  2444. struct qla_hw_data *ha = vha->hw;
  2445. struct scsi_qla_host *vp, *base_vha = pci_get_drvdata(ha->pdev);
  2446. struct scsi_qla_host *tvp;
  2447. rval = QLA_SUCCESS;
  2448. /* Try GID_PT to get device list, else GAN. */
  2449. swl = kcalloc(MAX_FIBRE_DEVICES, sizeof(sw_info_t), GFP_KERNEL);
  2450. if (!swl) {
  2451. /*EMPTY*/
  2452. DEBUG2(printk("scsi(%ld): GID_PT allocations failed, fallback "
  2453. "on GA_NXT\n", vha->host_no));
  2454. } else {
  2455. if (qla2x00_gid_pt(vha, swl) != QLA_SUCCESS) {
  2456. kfree(swl);
  2457. swl = NULL;
  2458. } else if (qla2x00_gpn_id(vha, swl) != QLA_SUCCESS) {
  2459. kfree(swl);
  2460. swl = NULL;
  2461. } else if (qla2x00_gnn_id(vha, swl) != QLA_SUCCESS) {
  2462. kfree(swl);
  2463. swl = NULL;
  2464. } else if (ql2xiidmaenable &&
  2465. qla2x00_gfpn_id(vha, swl) == QLA_SUCCESS) {
  2466. qla2x00_gpsc(vha, swl);
  2467. }
  2468. }
  2469. swl_idx = 0;
  2470. /* Allocate temporary fcport for any new fcports discovered. */
  2471. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2472. if (new_fcport == NULL) {
  2473. kfree(swl);
  2474. return (QLA_MEMORY_ALLOC_FAILED);
  2475. }
  2476. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2477. /* Set start port ID scan at adapter ID. */
  2478. first_dev = 1;
  2479. last_dev = 0;
  2480. /* Starting free loop ID. */
  2481. loop_id = ha->min_external_loopid;
  2482. for (; loop_id <= ha->max_loop_id; loop_id++) {
  2483. if (qla2x00_is_reserved_id(vha, loop_id))
  2484. continue;
  2485. if (atomic_read(&vha->loop_down_timer) || LOOP_TRANSITION(vha))
  2486. break;
  2487. if (swl != NULL) {
  2488. if (last_dev) {
  2489. wrap.b24 = new_fcport->d_id.b24;
  2490. } else {
  2491. new_fcport->d_id.b24 = swl[swl_idx].d_id.b24;
  2492. memcpy(new_fcport->node_name,
  2493. swl[swl_idx].node_name, WWN_SIZE);
  2494. memcpy(new_fcport->port_name,
  2495. swl[swl_idx].port_name, WWN_SIZE);
  2496. memcpy(new_fcport->fabric_port_name,
  2497. swl[swl_idx].fabric_port_name, WWN_SIZE);
  2498. new_fcport->fp_speed = swl[swl_idx].fp_speed;
  2499. if (swl[swl_idx].d_id.b.rsvd_1 != 0) {
  2500. last_dev = 1;
  2501. }
  2502. swl_idx++;
  2503. }
  2504. } else {
  2505. /* Send GA_NXT to the switch */
  2506. rval = qla2x00_ga_nxt(vha, new_fcport);
  2507. if (rval != QLA_SUCCESS) {
  2508. qla_printk(KERN_WARNING, ha,
  2509. "SNS scan failed -- assuming zero-entry "
  2510. "result...\n");
  2511. list_for_each_entry_safe(fcport, fcptemp,
  2512. new_fcports, list) {
  2513. list_del(&fcport->list);
  2514. kfree(fcport);
  2515. }
  2516. rval = QLA_SUCCESS;
  2517. break;
  2518. }
  2519. }
  2520. /* If wrap on switch device list, exit. */
  2521. if (first_dev) {
  2522. wrap.b24 = new_fcport->d_id.b24;
  2523. first_dev = 0;
  2524. } else if (new_fcport->d_id.b24 == wrap.b24) {
  2525. DEBUG2(printk("scsi(%ld): device wrap (%02x%02x%02x)\n",
  2526. vha->host_no, new_fcport->d_id.b.domain,
  2527. new_fcport->d_id.b.area, new_fcport->d_id.b.al_pa));
  2528. break;
  2529. }
  2530. /* Bypass if same physical adapter. */
  2531. if (new_fcport->d_id.b24 == base_vha->d_id.b24)
  2532. continue;
  2533. /* Bypass virtual ports of the same host. */
  2534. found = 0;
  2535. if (ha->num_vhosts) {
  2536. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2537. if (new_fcport->d_id.b24 == vp->d_id.b24) {
  2538. found = 1;
  2539. break;
  2540. }
  2541. }
  2542. if (found)
  2543. continue;
  2544. }
  2545. /* Bypass if same domain and area of adapter. */
  2546. if (((new_fcport->d_id.b24 & 0xffff00) ==
  2547. (vha->d_id.b24 & 0xffff00)) && ha->current_topology ==
  2548. ISP_CFG_FL)
  2549. continue;
  2550. /* Bypass reserved domain fields. */
  2551. if ((new_fcport->d_id.b.domain & 0xf0) == 0xf0)
  2552. continue;
  2553. /* Locate matching device in database. */
  2554. found = 0;
  2555. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2556. if (memcmp(new_fcport->port_name, fcport->port_name,
  2557. WWN_SIZE))
  2558. continue;
  2559. found++;
  2560. /* Update port state. */
  2561. memcpy(fcport->fabric_port_name,
  2562. new_fcport->fabric_port_name, WWN_SIZE);
  2563. fcport->fp_speed = new_fcport->fp_speed;
  2564. /*
  2565. * If address the same and state FCS_ONLINE, nothing
  2566. * changed.
  2567. */
  2568. if (fcport->d_id.b24 == new_fcport->d_id.b24 &&
  2569. atomic_read(&fcport->state) == FCS_ONLINE) {
  2570. break;
  2571. }
  2572. /*
  2573. * If device was not a fabric device before.
  2574. */
  2575. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) {
  2576. fcport->d_id.b24 = new_fcport->d_id.b24;
  2577. fcport->loop_id = FC_NO_LOOP_ID;
  2578. fcport->flags |= (FCF_FABRIC_DEVICE |
  2579. FCF_LOGIN_NEEDED);
  2580. break;
  2581. }
  2582. /*
  2583. * Port ID changed or device was marked to be updated;
  2584. * Log it out if still logged in and mark it for
  2585. * relogin later.
  2586. */
  2587. fcport->d_id.b24 = new_fcport->d_id.b24;
  2588. fcport->flags |= FCF_LOGIN_NEEDED;
  2589. if (fcport->loop_id != FC_NO_LOOP_ID &&
  2590. (fcport->flags & FCF_TAPE_PRESENT) == 0 &&
  2591. fcport->port_type != FCT_INITIATOR &&
  2592. fcport->port_type != FCT_BROADCAST) {
  2593. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2594. fcport->d_id.b.domain, fcport->d_id.b.area,
  2595. fcport->d_id.b.al_pa);
  2596. fcport->loop_id = FC_NO_LOOP_ID;
  2597. }
  2598. break;
  2599. }
  2600. if (found)
  2601. continue;
  2602. /* If device was not in our fcports list, then add it. */
  2603. list_add_tail(&new_fcport->list, new_fcports);
  2604. /* Allocate a new replacement fcport. */
  2605. nxt_d_id.b24 = new_fcport->d_id.b24;
  2606. new_fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
  2607. if (new_fcport == NULL) {
  2608. kfree(swl);
  2609. return (QLA_MEMORY_ALLOC_FAILED);
  2610. }
  2611. new_fcport->flags |= (FCF_FABRIC_DEVICE | FCF_LOGIN_NEEDED);
  2612. new_fcport->d_id.b24 = nxt_d_id.b24;
  2613. }
  2614. kfree(swl);
  2615. kfree(new_fcport);
  2616. return (rval);
  2617. }
  2618. /*
  2619. * qla2x00_find_new_loop_id
  2620. * Scan through our port list and find a new usable loop ID.
  2621. *
  2622. * Input:
  2623. * ha: adapter state pointer.
  2624. * dev: port structure pointer.
  2625. *
  2626. * Returns:
  2627. * qla2x00 local function return status code.
  2628. *
  2629. * Context:
  2630. * Kernel context.
  2631. */
  2632. static int
  2633. qla2x00_find_new_loop_id(scsi_qla_host_t *vha, fc_port_t *dev)
  2634. {
  2635. int rval;
  2636. int found;
  2637. fc_port_t *fcport;
  2638. uint16_t first_loop_id;
  2639. struct qla_hw_data *ha = vha->hw;
  2640. struct scsi_qla_host *vp;
  2641. struct scsi_qla_host *tvp;
  2642. rval = QLA_SUCCESS;
  2643. /* Save starting loop ID. */
  2644. first_loop_id = dev->loop_id;
  2645. for (;;) {
  2646. /* Skip loop ID if already used by adapter. */
  2647. if (dev->loop_id == vha->loop_id)
  2648. dev->loop_id++;
  2649. /* Skip reserved loop IDs. */
  2650. while (qla2x00_is_reserved_id(vha, dev->loop_id))
  2651. dev->loop_id++;
  2652. /* Reset loop ID if passed the end. */
  2653. if (dev->loop_id > ha->max_loop_id) {
  2654. /* first loop ID. */
  2655. dev->loop_id = ha->min_external_loopid;
  2656. }
  2657. /* Check for loop ID being already in use. */
  2658. found = 0;
  2659. fcport = NULL;
  2660. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  2661. list_for_each_entry(fcport, &vp->vp_fcports, list) {
  2662. if (fcport->loop_id == dev->loop_id &&
  2663. fcport != dev) {
  2664. /* ID possibly in use */
  2665. found++;
  2666. break;
  2667. }
  2668. }
  2669. if (found)
  2670. break;
  2671. }
  2672. /* If not in use then it is free to use. */
  2673. if (!found) {
  2674. break;
  2675. }
  2676. /* ID in use. Try next value. */
  2677. dev->loop_id++;
  2678. /* If wrap around. No free ID to use. */
  2679. if (dev->loop_id == first_loop_id) {
  2680. dev->loop_id = FC_NO_LOOP_ID;
  2681. rval = QLA_FUNCTION_FAILED;
  2682. break;
  2683. }
  2684. }
  2685. return (rval);
  2686. }
  2687. /*
  2688. * qla2x00_device_resync
  2689. * Marks devices in the database that needs resynchronization.
  2690. *
  2691. * Input:
  2692. * ha = adapter block pointer.
  2693. *
  2694. * Context:
  2695. * Kernel context.
  2696. */
  2697. static int
  2698. qla2x00_device_resync(scsi_qla_host_t *vha)
  2699. {
  2700. int rval;
  2701. uint32_t mask;
  2702. fc_port_t *fcport;
  2703. uint32_t rscn_entry;
  2704. uint8_t rscn_out_iter;
  2705. uint8_t format;
  2706. port_id_t d_id;
  2707. rval = QLA_RSCNS_HANDLED;
  2708. while (vha->rscn_out_ptr != vha->rscn_in_ptr ||
  2709. vha->flags.rscn_queue_overflow) {
  2710. rscn_entry = vha->rscn_queue[vha->rscn_out_ptr];
  2711. format = MSB(MSW(rscn_entry));
  2712. d_id.b.domain = LSB(MSW(rscn_entry));
  2713. d_id.b.area = MSB(LSW(rscn_entry));
  2714. d_id.b.al_pa = LSB(LSW(rscn_entry));
  2715. DEBUG(printk("scsi(%ld): RSCN queue entry[%d] = "
  2716. "[%02x/%02x%02x%02x].\n",
  2717. vha->host_no, vha->rscn_out_ptr, format, d_id.b.domain,
  2718. d_id.b.area, d_id.b.al_pa));
  2719. vha->rscn_out_ptr++;
  2720. if (vha->rscn_out_ptr == MAX_RSCN_COUNT)
  2721. vha->rscn_out_ptr = 0;
  2722. /* Skip duplicate entries. */
  2723. for (rscn_out_iter = vha->rscn_out_ptr;
  2724. !vha->flags.rscn_queue_overflow &&
  2725. rscn_out_iter != vha->rscn_in_ptr;
  2726. rscn_out_iter = (rscn_out_iter ==
  2727. (MAX_RSCN_COUNT - 1)) ? 0: rscn_out_iter + 1) {
  2728. if (rscn_entry != vha->rscn_queue[rscn_out_iter])
  2729. break;
  2730. DEBUG(printk("scsi(%ld): Skipping duplicate RSCN queue "
  2731. "entry found at [%d].\n", vha->host_no,
  2732. rscn_out_iter));
  2733. vha->rscn_out_ptr = rscn_out_iter;
  2734. }
  2735. /* Queue overflow, set switch default case. */
  2736. if (vha->flags.rscn_queue_overflow) {
  2737. DEBUG(printk("scsi(%ld): device_resync: rscn "
  2738. "overflow.\n", vha->host_no));
  2739. format = 3;
  2740. vha->flags.rscn_queue_overflow = 0;
  2741. }
  2742. switch (format) {
  2743. case 0:
  2744. mask = 0xffffff;
  2745. break;
  2746. case 1:
  2747. mask = 0xffff00;
  2748. break;
  2749. case 2:
  2750. mask = 0xff0000;
  2751. break;
  2752. default:
  2753. mask = 0x0;
  2754. d_id.b24 = 0;
  2755. vha->rscn_out_ptr = vha->rscn_in_ptr;
  2756. break;
  2757. }
  2758. rval = QLA_SUCCESS;
  2759. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2760. if ((fcport->flags & FCF_FABRIC_DEVICE) == 0 ||
  2761. (fcport->d_id.b24 & mask) != d_id.b24 ||
  2762. fcport->port_type == FCT_BROADCAST)
  2763. continue;
  2764. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2765. if (format != 3 ||
  2766. fcport->port_type != FCT_INITIATOR) {
  2767. qla2x00_mark_device_lost(vha, fcport,
  2768. 0, 0);
  2769. }
  2770. }
  2771. }
  2772. }
  2773. return (rval);
  2774. }
  2775. /*
  2776. * qla2x00_fabric_dev_login
  2777. * Login fabric target device and update FC port database.
  2778. *
  2779. * Input:
  2780. * ha: adapter state pointer.
  2781. * fcport: port structure list pointer.
  2782. * next_loopid: contains value of a new loop ID that can be used
  2783. * by the next login attempt.
  2784. *
  2785. * Returns:
  2786. * qla2x00 local function return status code.
  2787. *
  2788. * Context:
  2789. * Kernel context.
  2790. */
  2791. static int
  2792. qla2x00_fabric_dev_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2793. uint16_t *next_loopid)
  2794. {
  2795. int rval;
  2796. int retry;
  2797. uint8_t opts;
  2798. struct qla_hw_data *ha = vha->hw;
  2799. rval = QLA_SUCCESS;
  2800. retry = 0;
  2801. if (IS_ALOGIO_CAPABLE(ha)) {
  2802. rval = qla2x00_post_async_login_work(vha, fcport, NULL);
  2803. if (!rval)
  2804. return rval;
  2805. }
  2806. rval = qla2x00_fabric_login(vha, fcport, next_loopid);
  2807. if (rval == QLA_SUCCESS) {
  2808. /* Send an ADISC to tape devices.*/
  2809. opts = 0;
  2810. if (fcport->flags & FCF_TAPE_PRESENT)
  2811. opts |= BIT_1;
  2812. rval = qla2x00_get_port_database(vha, fcport, opts);
  2813. if (rval != QLA_SUCCESS) {
  2814. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2815. fcport->d_id.b.domain, fcport->d_id.b.area,
  2816. fcport->d_id.b.al_pa);
  2817. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2818. } else {
  2819. qla2x00_update_fcport(vha, fcport);
  2820. }
  2821. }
  2822. return (rval);
  2823. }
  2824. /*
  2825. * qla2x00_fabric_login
  2826. * Issue fabric login command.
  2827. *
  2828. * Input:
  2829. * ha = adapter block pointer.
  2830. * device = pointer to FC device type structure.
  2831. *
  2832. * Returns:
  2833. * 0 - Login successfully
  2834. * 1 - Login failed
  2835. * 2 - Initiator device
  2836. * 3 - Fatal error
  2837. */
  2838. int
  2839. qla2x00_fabric_login(scsi_qla_host_t *vha, fc_port_t *fcport,
  2840. uint16_t *next_loopid)
  2841. {
  2842. int rval;
  2843. int retry;
  2844. uint16_t tmp_loopid;
  2845. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2846. struct qla_hw_data *ha = vha->hw;
  2847. retry = 0;
  2848. tmp_loopid = 0;
  2849. for (;;) {
  2850. DEBUG(printk("scsi(%ld): Trying Fabric Login w/loop id 0x%04x "
  2851. "for port %02x%02x%02x.\n",
  2852. vha->host_no, fcport->loop_id, fcport->d_id.b.domain,
  2853. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2854. /* Login fcport on switch. */
  2855. ha->isp_ops->fabric_login(vha, fcport->loop_id,
  2856. fcport->d_id.b.domain, fcport->d_id.b.area,
  2857. fcport->d_id.b.al_pa, mb, BIT_0);
  2858. if (mb[0] == MBS_PORT_ID_USED) {
  2859. /*
  2860. * Device has another loop ID. The firmware team
  2861. * recommends the driver perform an implicit login with
  2862. * the specified ID again. The ID we just used is save
  2863. * here so we return with an ID that can be tried by
  2864. * the next login.
  2865. */
  2866. retry++;
  2867. tmp_loopid = fcport->loop_id;
  2868. fcport->loop_id = mb[1];
  2869. DEBUG(printk("Fabric Login: port in use - next "
  2870. "loop id=0x%04x, port Id=%02x%02x%02x.\n",
  2871. fcport->loop_id, fcport->d_id.b.domain,
  2872. fcport->d_id.b.area, fcport->d_id.b.al_pa));
  2873. } else if (mb[0] == MBS_COMMAND_COMPLETE) {
  2874. /*
  2875. * Login succeeded.
  2876. */
  2877. if (retry) {
  2878. /* A retry occurred before. */
  2879. *next_loopid = tmp_loopid;
  2880. } else {
  2881. /*
  2882. * No retry occurred before. Just increment the
  2883. * ID value for next login.
  2884. */
  2885. *next_loopid = (fcport->loop_id + 1);
  2886. }
  2887. if (mb[1] & BIT_0) {
  2888. fcport->port_type = FCT_INITIATOR;
  2889. } else {
  2890. fcport->port_type = FCT_TARGET;
  2891. if (mb[1] & BIT_1) {
  2892. fcport->flags |= FCF_FCP2_DEVICE;
  2893. }
  2894. }
  2895. if (mb[10] & BIT_0)
  2896. fcport->supported_classes |= FC_COS_CLASS2;
  2897. if (mb[10] & BIT_1)
  2898. fcport->supported_classes |= FC_COS_CLASS3;
  2899. rval = QLA_SUCCESS;
  2900. break;
  2901. } else if (mb[0] == MBS_LOOP_ID_USED) {
  2902. /*
  2903. * Loop ID already used, try next loop ID.
  2904. */
  2905. fcport->loop_id++;
  2906. rval = qla2x00_find_new_loop_id(vha, fcport);
  2907. if (rval != QLA_SUCCESS) {
  2908. /* Ran out of loop IDs to use */
  2909. break;
  2910. }
  2911. } else if (mb[0] == MBS_COMMAND_ERROR) {
  2912. /*
  2913. * Firmware possibly timed out during login. If NO
  2914. * retries are left to do then the device is declared
  2915. * dead.
  2916. */
  2917. *next_loopid = fcport->loop_id;
  2918. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2919. fcport->d_id.b.domain, fcport->d_id.b.area,
  2920. fcport->d_id.b.al_pa);
  2921. qla2x00_mark_device_lost(vha, fcport, 1, 0);
  2922. rval = 1;
  2923. break;
  2924. } else {
  2925. /*
  2926. * unrecoverable / not handled error
  2927. */
  2928. DEBUG2(printk("%s(%ld): failed=%x port_id=%02x%02x%02x "
  2929. "loop_id=%x jiffies=%lx.\n",
  2930. __func__, vha->host_no, mb[0],
  2931. fcport->d_id.b.domain, fcport->d_id.b.area,
  2932. fcport->d_id.b.al_pa, fcport->loop_id, jiffies));
  2933. *next_loopid = fcport->loop_id;
  2934. ha->isp_ops->fabric_logout(vha, fcport->loop_id,
  2935. fcport->d_id.b.domain, fcport->d_id.b.area,
  2936. fcport->d_id.b.al_pa);
  2937. fcport->loop_id = FC_NO_LOOP_ID;
  2938. fcport->login_retry = 0;
  2939. rval = 3;
  2940. break;
  2941. }
  2942. }
  2943. return (rval);
  2944. }
  2945. /*
  2946. * qla2x00_local_device_login
  2947. * Issue local device login command.
  2948. *
  2949. * Input:
  2950. * ha = adapter block pointer.
  2951. * loop_id = loop id of device to login to.
  2952. *
  2953. * Returns (Where's the #define!!!!):
  2954. * 0 - Login successfully
  2955. * 1 - Login failed
  2956. * 3 - Fatal error
  2957. */
  2958. int
  2959. qla2x00_local_device_login(scsi_qla_host_t *vha, fc_port_t *fcport)
  2960. {
  2961. int rval;
  2962. uint16_t mb[MAILBOX_REGISTER_COUNT];
  2963. memset(mb, 0, sizeof(mb));
  2964. rval = qla2x00_login_local_device(vha, fcport, mb, BIT_0);
  2965. if (rval == QLA_SUCCESS) {
  2966. /* Interrogate mailbox registers for any errors */
  2967. if (mb[0] == MBS_COMMAND_ERROR)
  2968. rval = 1;
  2969. else if (mb[0] == MBS_COMMAND_PARAMETER_ERROR)
  2970. /* device not in PCB table */
  2971. rval = 3;
  2972. }
  2973. return (rval);
  2974. }
  2975. /*
  2976. * qla2x00_loop_resync
  2977. * Resync with fibre channel devices.
  2978. *
  2979. * Input:
  2980. * ha = adapter block pointer.
  2981. *
  2982. * Returns:
  2983. * 0 = success
  2984. */
  2985. int
  2986. qla2x00_loop_resync(scsi_qla_host_t *vha)
  2987. {
  2988. int rval = QLA_SUCCESS;
  2989. uint32_t wait_time;
  2990. struct req_que *req;
  2991. struct rsp_que *rsp;
  2992. if (vha->hw->flags.cpu_affinity_enabled)
  2993. req = vha->hw->req_q_map[0];
  2994. else
  2995. req = vha->req;
  2996. rsp = req->rsp;
  2997. atomic_set(&vha->loop_state, LOOP_UPDATE);
  2998. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  2999. if (vha->flags.online) {
  3000. if (!(rval = qla2x00_fw_ready(vha))) {
  3001. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3002. wait_time = 256;
  3003. do {
  3004. atomic_set(&vha->loop_state, LOOP_UPDATE);
  3005. /* Issue a marker after FW becomes ready. */
  3006. qla2x00_marker(vha, req, rsp, 0, 0,
  3007. MK_SYNC_ALL);
  3008. vha->marker_needed = 0;
  3009. /* Remap devices on Loop. */
  3010. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3011. qla2x00_configure_loop(vha);
  3012. wait_time--;
  3013. } while (!atomic_read(&vha->loop_down_timer) &&
  3014. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3015. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3016. &vha->dpc_flags)));
  3017. }
  3018. }
  3019. if (test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3020. return (QLA_FUNCTION_FAILED);
  3021. if (rval)
  3022. DEBUG2_3(printk("%s(): **** FAILED ****\n", __func__));
  3023. return (rval);
  3024. }
  3025. void
  3026. qla2x00_update_fcports(scsi_qla_host_t *base_vha)
  3027. {
  3028. fc_port_t *fcport;
  3029. struct scsi_qla_host *tvp, *vha;
  3030. /* Go with deferred removal of rport references. */
  3031. list_for_each_entry_safe(vha, tvp, &base_vha->hw->vp_list, list)
  3032. list_for_each_entry(fcport, &vha->vp_fcports, list)
  3033. if (fcport && fcport->drport &&
  3034. atomic_read(&fcport->state) != FCS_UNCONFIGURED)
  3035. qla2x00_rport_del(fcport);
  3036. }
  3037. /*
  3038. * qla2x00_abort_isp
  3039. * Resets ISP and aborts all outstanding commands.
  3040. *
  3041. * Input:
  3042. * ha = adapter block pointer.
  3043. *
  3044. * Returns:
  3045. * 0 = success
  3046. */
  3047. int
  3048. qla2x00_abort_isp(scsi_qla_host_t *vha)
  3049. {
  3050. int rval;
  3051. uint8_t status = 0;
  3052. struct qla_hw_data *ha = vha->hw;
  3053. struct scsi_qla_host *vp;
  3054. struct scsi_qla_host *tvp;
  3055. struct req_que *req = ha->req_q_map[0];
  3056. if (vha->flags.online) {
  3057. vha->flags.online = 0;
  3058. ha->flags.chip_reset_done = 0;
  3059. clear_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3060. ha->qla_stats.total_isp_aborts++;
  3061. qla_printk(KERN_INFO, ha,
  3062. "Performing ISP error recovery - ha= %p.\n", ha);
  3063. ha->isp_ops->reset_chip(vha);
  3064. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  3065. if (atomic_read(&vha->loop_state) != LOOP_DOWN) {
  3066. atomic_set(&vha->loop_state, LOOP_DOWN);
  3067. qla2x00_mark_all_devices_lost(vha, 0);
  3068. } else {
  3069. if (!atomic_read(&vha->loop_down_timer))
  3070. atomic_set(&vha->loop_down_timer,
  3071. LOOP_DOWN_TIME);
  3072. }
  3073. /* Requeue all commands in outstanding command list. */
  3074. qla2x00_abort_all_cmds(vha, DID_RESET << 16);
  3075. if (unlikely(pci_channel_offline(ha->pdev) &&
  3076. ha->flags.pci_channel_io_perm_failure)) {
  3077. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3078. status = 0;
  3079. return status;
  3080. }
  3081. ha->isp_ops->get_flash_version(vha, req->ring);
  3082. ha->isp_ops->nvram_config(vha);
  3083. if (!qla2x00_restart_isp(vha)) {
  3084. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3085. if (!atomic_read(&vha->loop_down_timer)) {
  3086. /*
  3087. * Issue marker command only when we are going
  3088. * to start the I/O .
  3089. */
  3090. vha->marker_needed = 1;
  3091. }
  3092. vha->flags.online = 1;
  3093. ha->isp_ops->enable_intrs(ha);
  3094. ha->isp_abort_cnt = 0;
  3095. clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3096. if (IS_QLA81XX(ha))
  3097. qla2x00_get_fw_version(vha,
  3098. &ha->fw_major_version,
  3099. &ha->fw_minor_version,
  3100. &ha->fw_subminor_version,
  3101. &ha->fw_attributes, &ha->fw_memory_size,
  3102. ha->mpi_version, &ha->mpi_capabilities,
  3103. ha->phy_version);
  3104. if (ha->fce) {
  3105. ha->flags.fce_enabled = 1;
  3106. memset(ha->fce, 0,
  3107. fce_calc_size(ha->fce_bufs));
  3108. rval = qla2x00_enable_fce_trace(vha,
  3109. ha->fce_dma, ha->fce_bufs, ha->fce_mb,
  3110. &ha->fce_bufs);
  3111. if (rval) {
  3112. qla_printk(KERN_WARNING, ha,
  3113. "Unable to reinitialize FCE "
  3114. "(%d).\n", rval);
  3115. ha->flags.fce_enabled = 0;
  3116. }
  3117. }
  3118. if (ha->eft) {
  3119. memset(ha->eft, 0, EFT_SIZE);
  3120. rval = qla2x00_enable_eft_trace(vha,
  3121. ha->eft_dma, EFT_NUM_BUFFERS);
  3122. if (rval) {
  3123. qla_printk(KERN_WARNING, ha,
  3124. "Unable to reinitialize EFT "
  3125. "(%d).\n", rval);
  3126. }
  3127. }
  3128. } else { /* failed the ISP abort */
  3129. vha->flags.online = 1;
  3130. if (test_bit(ISP_ABORT_RETRY, &vha->dpc_flags)) {
  3131. if (ha->isp_abort_cnt == 0) {
  3132. qla_printk(KERN_WARNING, ha,
  3133. "ISP error recovery failed - "
  3134. "board disabled\n");
  3135. /*
  3136. * The next call disables the board
  3137. * completely.
  3138. */
  3139. ha->isp_ops->reset_adapter(vha);
  3140. vha->flags.online = 0;
  3141. clear_bit(ISP_ABORT_RETRY,
  3142. &vha->dpc_flags);
  3143. status = 0;
  3144. } else { /* schedule another ISP abort */
  3145. ha->isp_abort_cnt--;
  3146. DEBUG(printk("qla%ld: ISP abort - "
  3147. "retry remaining %d\n",
  3148. vha->host_no, ha->isp_abort_cnt));
  3149. status = 1;
  3150. }
  3151. } else {
  3152. ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT;
  3153. DEBUG(printk("qla2x00(%ld): ISP error recovery "
  3154. "- retrying (%d) more times\n",
  3155. vha->host_no, ha->isp_abort_cnt));
  3156. set_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
  3157. status = 1;
  3158. }
  3159. }
  3160. }
  3161. if (!status) {
  3162. DEBUG(printk(KERN_INFO
  3163. "qla2x00_abort_isp(%ld): succeeded.\n",
  3164. vha->host_no));
  3165. list_for_each_entry_safe(vp, tvp, &ha->vp_list, list) {
  3166. if (vp->vp_idx)
  3167. qla2x00_vp_abort_isp(vp);
  3168. }
  3169. } else {
  3170. qla_printk(KERN_INFO, ha,
  3171. "qla2x00_abort_isp: **** FAILED ****\n");
  3172. }
  3173. return(status);
  3174. }
  3175. /*
  3176. * qla2x00_restart_isp
  3177. * restarts the ISP after a reset
  3178. *
  3179. * Input:
  3180. * ha = adapter block pointer.
  3181. *
  3182. * Returns:
  3183. * 0 = success
  3184. */
  3185. static int
  3186. qla2x00_restart_isp(scsi_qla_host_t *vha)
  3187. {
  3188. int status = 0;
  3189. uint32_t wait_time;
  3190. struct qla_hw_data *ha = vha->hw;
  3191. struct req_que *req = ha->req_q_map[0];
  3192. struct rsp_que *rsp = ha->rsp_q_map[0];
  3193. /* If firmware needs to be loaded */
  3194. if (qla2x00_isp_firmware(vha)) {
  3195. vha->flags.online = 0;
  3196. status = ha->isp_ops->chip_diag(vha);
  3197. if (!status)
  3198. status = qla2x00_setup_chip(vha);
  3199. }
  3200. if (!status && !(status = qla2x00_init_rings(vha))) {
  3201. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3202. ha->flags.chip_reset_done = 1;
  3203. /* Initialize the queues in use */
  3204. qla25xx_init_queues(ha);
  3205. status = qla2x00_fw_ready(vha);
  3206. if (!status) {
  3207. DEBUG(printk("%s(): Start configure loop, "
  3208. "status = %d\n", __func__, status));
  3209. /* Issue a marker after FW becomes ready. */
  3210. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3211. vha->flags.online = 1;
  3212. /* Wait at most MAX_TARGET RSCNs for a stable link. */
  3213. wait_time = 256;
  3214. do {
  3215. clear_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3216. qla2x00_configure_loop(vha);
  3217. wait_time--;
  3218. } while (!atomic_read(&vha->loop_down_timer) &&
  3219. !(test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags))
  3220. && wait_time && (test_bit(LOOP_RESYNC_NEEDED,
  3221. &vha->dpc_flags)));
  3222. }
  3223. /* if no cable then assume it's good */
  3224. if ((vha->device_flags & DFLG_NO_CABLE))
  3225. status = 0;
  3226. DEBUG(printk("%s(): Configure loop done, status = 0x%x\n",
  3227. __func__,
  3228. status));
  3229. }
  3230. return (status);
  3231. }
  3232. static int
  3233. qla25xx_init_queues(struct qla_hw_data *ha)
  3234. {
  3235. struct rsp_que *rsp = NULL;
  3236. struct req_que *req = NULL;
  3237. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3238. int ret = -1;
  3239. int i;
  3240. for (i = 1; i < ha->max_rsp_queues; i++) {
  3241. rsp = ha->rsp_q_map[i];
  3242. if (rsp) {
  3243. rsp->options &= ~BIT_0;
  3244. ret = qla25xx_init_rsp_que(base_vha, rsp);
  3245. if (ret != QLA_SUCCESS)
  3246. DEBUG2_17(printk(KERN_WARNING
  3247. "%s Rsp que:%d init failed\n", __func__,
  3248. rsp->id));
  3249. else
  3250. DEBUG2_17(printk(KERN_INFO
  3251. "%s Rsp que:%d inited\n", __func__,
  3252. rsp->id));
  3253. }
  3254. }
  3255. for (i = 1; i < ha->max_req_queues; i++) {
  3256. req = ha->req_q_map[i];
  3257. if (req) {
  3258. /* Clear outstanding commands array. */
  3259. req->options &= ~BIT_0;
  3260. ret = qla25xx_init_req_que(base_vha, req);
  3261. if (ret != QLA_SUCCESS)
  3262. DEBUG2_17(printk(KERN_WARNING
  3263. "%s Req que:%d init failed\n", __func__,
  3264. req->id));
  3265. else
  3266. DEBUG2_17(printk(KERN_WARNING
  3267. "%s Req que:%d inited\n", __func__,
  3268. req->id));
  3269. }
  3270. }
  3271. return ret;
  3272. }
  3273. /*
  3274. * qla2x00_reset_adapter
  3275. * Reset adapter.
  3276. *
  3277. * Input:
  3278. * ha = adapter block pointer.
  3279. */
  3280. void
  3281. qla2x00_reset_adapter(scsi_qla_host_t *vha)
  3282. {
  3283. unsigned long flags = 0;
  3284. struct qla_hw_data *ha = vha->hw;
  3285. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3286. vha->flags.online = 0;
  3287. ha->isp_ops->disable_intrs(ha);
  3288. spin_lock_irqsave(&ha->hardware_lock, flags);
  3289. WRT_REG_WORD(&reg->hccr, HCCR_RESET_RISC);
  3290. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3291. WRT_REG_WORD(&reg->hccr, HCCR_RELEASE_RISC);
  3292. RD_REG_WORD(&reg->hccr); /* PCI Posting. */
  3293. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3294. }
  3295. void
  3296. qla24xx_reset_adapter(scsi_qla_host_t *vha)
  3297. {
  3298. unsigned long flags = 0;
  3299. struct qla_hw_data *ha = vha->hw;
  3300. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  3301. vha->flags.online = 0;
  3302. ha->isp_ops->disable_intrs(ha);
  3303. spin_lock_irqsave(&ha->hardware_lock, flags);
  3304. WRT_REG_DWORD(&reg->hccr, HCCRX_SET_RISC_RESET);
  3305. RD_REG_DWORD(&reg->hccr);
  3306. WRT_REG_DWORD(&reg->hccr, HCCRX_REL_RISC_PAUSE);
  3307. RD_REG_DWORD(&reg->hccr);
  3308. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3309. if (IS_NOPOLLING_TYPE(ha))
  3310. ha->isp_ops->enable_intrs(ha);
  3311. }
  3312. /* On sparc systems, obtain port and node WWN from firmware
  3313. * properties.
  3314. */
  3315. static void qla24xx_nvram_wwn_from_ofw(scsi_qla_host_t *vha,
  3316. struct nvram_24xx *nv)
  3317. {
  3318. #ifdef CONFIG_SPARC
  3319. struct qla_hw_data *ha = vha->hw;
  3320. struct pci_dev *pdev = ha->pdev;
  3321. struct device_node *dp = pci_device_to_OF_node(pdev);
  3322. const u8 *val;
  3323. int len;
  3324. val = of_get_property(dp, "port-wwn", &len);
  3325. if (val && len >= WWN_SIZE)
  3326. memcpy(nv->port_name, val, WWN_SIZE);
  3327. val = of_get_property(dp, "node-wwn", &len);
  3328. if (val && len >= WWN_SIZE)
  3329. memcpy(nv->node_name, val, WWN_SIZE);
  3330. #endif
  3331. }
  3332. int
  3333. qla24xx_nvram_config(scsi_qla_host_t *vha)
  3334. {
  3335. int rval;
  3336. struct init_cb_24xx *icb;
  3337. struct nvram_24xx *nv;
  3338. uint32_t *dptr;
  3339. uint8_t *dptr1, *dptr2;
  3340. uint32_t chksum;
  3341. uint16_t cnt;
  3342. struct qla_hw_data *ha = vha->hw;
  3343. rval = QLA_SUCCESS;
  3344. icb = (struct init_cb_24xx *)ha->init_cb;
  3345. nv = ha->nvram;
  3346. /* Determine NVRAM starting address. */
  3347. if (ha->flags.port0) {
  3348. ha->nvram_base = FA_NVRAM_FUNC0_ADDR;
  3349. ha->vpd_base = FA_NVRAM_VPD0_ADDR;
  3350. } else {
  3351. ha->nvram_base = FA_NVRAM_FUNC1_ADDR;
  3352. ha->vpd_base = FA_NVRAM_VPD1_ADDR;
  3353. }
  3354. ha->nvram_size = sizeof(struct nvram_24xx);
  3355. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3356. /* Get VPD data into cache */
  3357. ha->vpd = ha->nvram + VPD_OFFSET;
  3358. ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd,
  3359. ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4);
  3360. /* Get NVRAM data into cache and calculate checksum. */
  3361. dptr = (uint32_t *)nv;
  3362. ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base,
  3363. ha->nvram_size);
  3364. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3365. chksum += le32_to_cpu(*dptr++);
  3366. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3367. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3368. /* Bad NVRAM data, set defaults parameters. */
  3369. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  3370. || nv->id[3] != ' ' ||
  3371. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  3372. /* Reset NVRAM data. */
  3373. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  3374. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  3375. le16_to_cpu(nv->nvram_version));
  3376. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  3377. "invalid -- WWPN) defaults.\n");
  3378. /*
  3379. * Set default initialization control block.
  3380. */
  3381. memset(nv, 0, ha->nvram_size);
  3382. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  3383. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  3384. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  3385. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3386. nv->exchange_count = __constant_cpu_to_le16(0);
  3387. nv->hard_address = __constant_cpu_to_le16(124);
  3388. nv->port_name[0] = 0x21;
  3389. nv->port_name[1] = 0x00 + ha->port_no;
  3390. nv->port_name[2] = 0x00;
  3391. nv->port_name[3] = 0xe0;
  3392. nv->port_name[4] = 0x8b;
  3393. nv->port_name[5] = 0x1c;
  3394. nv->port_name[6] = 0x55;
  3395. nv->port_name[7] = 0x86;
  3396. nv->node_name[0] = 0x20;
  3397. nv->node_name[1] = 0x00;
  3398. nv->node_name[2] = 0x00;
  3399. nv->node_name[3] = 0xe0;
  3400. nv->node_name[4] = 0x8b;
  3401. nv->node_name[5] = 0x1c;
  3402. nv->node_name[6] = 0x55;
  3403. nv->node_name[7] = 0x86;
  3404. qla24xx_nvram_wwn_from_ofw(vha, nv);
  3405. nv->login_retry_count = __constant_cpu_to_le16(8);
  3406. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  3407. nv->login_timeout = __constant_cpu_to_le16(0);
  3408. nv->firmware_options_1 =
  3409. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  3410. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  3411. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  3412. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  3413. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  3414. nv->efi_parameters = __constant_cpu_to_le32(0);
  3415. nv->reset_delay = 5;
  3416. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  3417. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  3418. nv->link_down_timeout = __constant_cpu_to_le16(30);
  3419. rval = 1;
  3420. }
  3421. /* Reset Initialization control block */
  3422. memset(icb, 0, ha->init_cb_size);
  3423. /* Copy 1st segment. */
  3424. dptr1 = (uint8_t *)icb;
  3425. dptr2 = (uint8_t *)&nv->version;
  3426. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  3427. while (cnt--)
  3428. *dptr1++ = *dptr2++;
  3429. icb->login_retry_count = nv->login_retry_count;
  3430. icb->link_down_on_nos = nv->link_down_on_nos;
  3431. /* Copy 2nd segment. */
  3432. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  3433. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  3434. cnt = (uint8_t *)&icb->reserved_3 -
  3435. (uint8_t *)&icb->interrupt_delay_timer;
  3436. while (cnt--)
  3437. *dptr1++ = *dptr2++;
  3438. /*
  3439. * Setup driver NVRAM options.
  3440. */
  3441. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  3442. "QLA2462");
  3443. /* Use alternate WWN? */
  3444. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  3445. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  3446. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  3447. }
  3448. /* Prepare nodename */
  3449. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  3450. /*
  3451. * Firmware will apply the following mask if the nodename was
  3452. * not provided.
  3453. */
  3454. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  3455. icb->node_name[0] &= 0xF0;
  3456. }
  3457. /* Set host adapter parameters. */
  3458. ha->flags.disable_risc_code_load = 0;
  3459. ha->flags.enable_lip_reset = 0;
  3460. ha->flags.enable_lip_full_login =
  3461. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  3462. ha->flags.enable_target_reset =
  3463. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  3464. ha->flags.enable_led_scheme = 0;
  3465. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  3466. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  3467. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  3468. memcpy(ha->fw_seriallink_options24, nv->seriallink_options,
  3469. sizeof(ha->fw_seriallink_options24));
  3470. /* save HBA serial number */
  3471. ha->serial0 = icb->port_name[5];
  3472. ha->serial1 = icb->port_name[6];
  3473. ha->serial2 = icb->port_name[7];
  3474. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  3475. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  3476. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  3477. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  3478. /* Set minimum login_timeout to 4 seconds. */
  3479. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  3480. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  3481. if (le16_to_cpu(nv->login_timeout) < 4)
  3482. nv->login_timeout = __constant_cpu_to_le16(4);
  3483. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  3484. icb->login_timeout = nv->login_timeout;
  3485. /* Set minimum RATOV to 100 tenths of a second. */
  3486. ha->r_a_tov = 100;
  3487. ha->loop_reset_delay = nv->reset_delay;
  3488. /* Link Down Timeout = 0:
  3489. *
  3490. * When Port Down timer expires we will start returning
  3491. * I/O's to OS with "DID_NO_CONNECT".
  3492. *
  3493. * Link Down Timeout != 0:
  3494. *
  3495. * The driver waits for the link to come up after link down
  3496. * before returning I/Os to OS with "DID_NO_CONNECT".
  3497. */
  3498. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  3499. ha->loop_down_abort_time =
  3500. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  3501. } else {
  3502. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  3503. ha->loop_down_abort_time =
  3504. (LOOP_DOWN_TIME - ha->link_down_timeout);
  3505. }
  3506. /* Need enough time to try and get the port back. */
  3507. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  3508. if (qlport_down_retry)
  3509. ha->port_down_retry_count = qlport_down_retry;
  3510. /* Set login_retry_count */
  3511. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  3512. if (ha->port_down_retry_count ==
  3513. le16_to_cpu(nv->port_down_retry_count) &&
  3514. ha->port_down_retry_count > 3)
  3515. ha->login_retry_count = ha->port_down_retry_count;
  3516. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  3517. ha->login_retry_count = ha->port_down_retry_count;
  3518. if (ql2xloginretrycount)
  3519. ha->login_retry_count = ql2xloginretrycount;
  3520. /* Enable ZIO. */
  3521. if (!vha->flags.init_done) {
  3522. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  3523. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  3524. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  3525. le16_to_cpu(icb->interrupt_delay_timer): 2;
  3526. }
  3527. icb->firmware_options_2 &= __constant_cpu_to_le32(
  3528. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  3529. vha->flags.process_response_queue = 0;
  3530. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  3531. ha->zio_mode = QLA_ZIO_MODE_6;
  3532. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  3533. "(%d us).\n", vha->host_no, ha->zio_mode,
  3534. ha->zio_timer * 100));
  3535. qla_printk(KERN_INFO, ha,
  3536. "ZIO mode %d enabled; timer delay (%d us).\n",
  3537. ha->zio_mode, ha->zio_timer * 100);
  3538. icb->firmware_options_2 |= cpu_to_le32(
  3539. (uint32_t)ha->zio_mode);
  3540. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  3541. vha->flags.process_response_queue = 1;
  3542. }
  3543. if (rval) {
  3544. DEBUG2_3(printk(KERN_WARNING
  3545. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  3546. }
  3547. return (rval);
  3548. }
  3549. static int
  3550. qla24xx_load_risc_flash(scsi_qla_host_t *vha, uint32_t *srisc_addr,
  3551. uint32_t faddr)
  3552. {
  3553. int rval = QLA_SUCCESS;
  3554. int segments, fragment;
  3555. uint32_t *dcode, dlen;
  3556. uint32_t risc_addr;
  3557. uint32_t risc_size;
  3558. uint32_t i;
  3559. struct qla_hw_data *ha = vha->hw;
  3560. struct req_que *req = ha->req_q_map[0];
  3561. qla_printk(KERN_INFO, ha,
  3562. "FW: Loading from flash (%x)...\n", faddr);
  3563. rval = QLA_SUCCESS;
  3564. segments = FA_RISC_CODE_SEGMENTS;
  3565. dcode = (uint32_t *)req->ring;
  3566. *srisc_addr = 0;
  3567. /* Validate firmware image by checking version. */
  3568. qla24xx_read_flash_data(vha, dcode, faddr + 4, 4);
  3569. for (i = 0; i < 4; i++)
  3570. dcode[i] = be32_to_cpu(dcode[i]);
  3571. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3572. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3573. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3574. dcode[3] == 0)) {
  3575. qla_printk(KERN_WARNING, ha,
  3576. "Unable to verify integrity of flash firmware image!\n");
  3577. qla_printk(KERN_WARNING, ha,
  3578. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3579. dcode[1], dcode[2], dcode[3]);
  3580. return QLA_FUNCTION_FAILED;
  3581. }
  3582. while (segments && rval == QLA_SUCCESS) {
  3583. /* Read segment's load information. */
  3584. qla24xx_read_flash_data(vha, dcode, faddr, 4);
  3585. risc_addr = be32_to_cpu(dcode[2]);
  3586. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3587. risc_size = be32_to_cpu(dcode[3]);
  3588. fragment = 0;
  3589. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3590. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3591. if (dlen > risc_size)
  3592. dlen = risc_size;
  3593. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3594. "addr %x, number of dwords 0x%x, offset 0x%x.\n",
  3595. vha->host_no, risc_addr, dlen, faddr));
  3596. qla24xx_read_flash_data(vha, dcode, faddr, dlen);
  3597. for (i = 0; i < dlen; i++)
  3598. dcode[i] = swab32(dcode[i]);
  3599. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3600. dlen);
  3601. if (rval) {
  3602. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3603. "segment %d of firmware\n", vha->host_no,
  3604. fragment));
  3605. qla_printk(KERN_WARNING, ha,
  3606. "[ERROR] Failed to load segment %d of "
  3607. "firmware\n", fragment);
  3608. break;
  3609. }
  3610. faddr += dlen;
  3611. risc_addr += dlen;
  3612. risc_size -= dlen;
  3613. fragment++;
  3614. }
  3615. /* Next segment. */
  3616. segments--;
  3617. }
  3618. return rval;
  3619. }
  3620. #define QLA_FW_URL "ftp://ftp.qlogic.com/outgoing/linux/firmware/"
  3621. int
  3622. qla2x00_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3623. {
  3624. int rval;
  3625. int i, fragment;
  3626. uint16_t *wcode, *fwcode;
  3627. uint32_t risc_addr, risc_size, fwclen, wlen, *seg;
  3628. struct fw_blob *blob;
  3629. struct qla_hw_data *ha = vha->hw;
  3630. struct req_que *req = ha->req_q_map[0];
  3631. /* Load firmware blob. */
  3632. blob = qla2x00_request_firmware(vha);
  3633. if (!blob) {
  3634. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3635. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3636. "from: " QLA_FW_URL ".\n");
  3637. return QLA_FUNCTION_FAILED;
  3638. }
  3639. rval = QLA_SUCCESS;
  3640. wcode = (uint16_t *)req->ring;
  3641. *srisc_addr = 0;
  3642. fwcode = (uint16_t *)blob->fw->data;
  3643. fwclen = 0;
  3644. /* Validate firmware image by checking version. */
  3645. if (blob->fw->size < 8 * sizeof(uint16_t)) {
  3646. qla_printk(KERN_WARNING, ha,
  3647. "Unable to verify integrity of firmware image (%Zd)!\n",
  3648. blob->fw->size);
  3649. goto fail_fw_integrity;
  3650. }
  3651. for (i = 0; i < 4; i++)
  3652. wcode[i] = be16_to_cpu(fwcode[i + 4]);
  3653. if ((wcode[0] == 0xffff && wcode[1] == 0xffff && wcode[2] == 0xffff &&
  3654. wcode[3] == 0xffff) || (wcode[0] == 0 && wcode[1] == 0 &&
  3655. wcode[2] == 0 && wcode[3] == 0)) {
  3656. qla_printk(KERN_WARNING, ha,
  3657. "Unable to verify integrity of firmware image!\n");
  3658. qla_printk(KERN_WARNING, ha,
  3659. "Firmware data: %04x %04x %04x %04x!\n", wcode[0],
  3660. wcode[1], wcode[2], wcode[3]);
  3661. goto fail_fw_integrity;
  3662. }
  3663. seg = blob->segs;
  3664. while (*seg && rval == QLA_SUCCESS) {
  3665. risc_addr = *seg;
  3666. *srisc_addr = *srisc_addr == 0 ? *seg : *srisc_addr;
  3667. risc_size = be16_to_cpu(fwcode[3]);
  3668. /* Validate firmware image size. */
  3669. fwclen += risc_size * sizeof(uint16_t);
  3670. if (blob->fw->size < fwclen) {
  3671. qla_printk(KERN_WARNING, ha,
  3672. "Unable to verify integrity of firmware image "
  3673. "(%Zd)!\n", blob->fw->size);
  3674. goto fail_fw_integrity;
  3675. }
  3676. fragment = 0;
  3677. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3678. wlen = (uint16_t)(ha->fw_transfer_size >> 1);
  3679. if (wlen > risc_size)
  3680. wlen = risc_size;
  3681. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3682. "addr %x, number of words 0x%x.\n", vha->host_no,
  3683. risc_addr, wlen));
  3684. for (i = 0; i < wlen; i++)
  3685. wcode[i] = swab16(fwcode[i]);
  3686. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3687. wlen);
  3688. if (rval) {
  3689. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3690. "segment %d of firmware\n", vha->host_no,
  3691. fragment));
  3692. qla_printk(KERN_WARNING, ha,
  3693. "[ERROR] Failed to load segment %d of "
  3694. "firmware\n", fragment);
  3695. break;
  3696. }
  3697. fwcode += wlen;
  3698. risc_addr += wlen;
  3699. risc_size -= wlen;
  3700. fragment++;
  3701. }
  3702. /* Next segment. */
  3703. seg++;
  3704. }
  3705. return rval;
  3706. fail_fw_integrity:
  3707. return QLA_FUNCTION_FAILED;
  3708. }
  3709. static int
  3710. qla24xx_load_risc_blob(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3711. {
  3712. int rval;
  3713. int segments, fragment;
  3714. uint32_t *dcode, dlen;
  3715. uint32_t risc_addr;
  3716. uint32_t risc_size;
  3717. uint32_t i;
  3718. struct fw_blob *blob;
  3719. uint32_t *fwcode, fwclen;
  3720. struct qla_hw_data *ha = vha->hw;
  3721. struct req_que *req = ha->req_q_map[0];
  3722. /* Load firmware blob. */
  3723. blob = qla2x00_request_firmware(vha);
  3724. if (!blob) {
  3725. qla_printk(KERN_ERR, ha, "Firmware image unavailable.\n");
  3726. qla_printk(KERN_ERR, ha, "Firmware images can be retrieved "
  3727. "from: " QLA_FW_URL ".\n");
  3728. return QLA_FUNCTION_FAILED;
  3729. }
  3730. qla_printk(KERN_INFO, ha,
  3731. "FW: Loading via request-firmware...\n");
  3732. rval = QLA_SUCCESS;
  3733. segments = FA_RISC_CODE_SEGMENTS;
  3734. dcode = (uint32_t *)req->ring;
  3735. *srisc_addr = 0;
  3736. fwcode = (uint32_t *)blob->fw->data;
  3737. fwclen = 0;
  3738. /* Validate firmware image by checking version. */
  3739. if (blob->fw->size < 8 * sizeof(uint32_t)) {
  3740. qla_printk(KERN_WARNING, ha,
  3741. "Unable to verify integrity of firmware image (%Zd)!\n",
  3742. blob->fw->size);
  3743. goto fail_fw_integrity;
  3744. }
  3745. for (i = 0; i < 4; i++)
  3746. dcode[i] = be32_to_cpu(fwcode[i + 4]);
  3747. if ((dcode[0] == 0xffffffff && dcode[1] == 0xffffffff &&
  3748. dcode[2] == 0xffffffff && dcode[3] == 0xffffffff) ||
  3749. (dcode[0] == 0 && dcode[1] == 0 && dcode[2] == 0 &&
  3750. dcode[3] == 0)) {
  3751. qla_printk(KERN_WARNING, ha,
  3752. "Unable to verify integrity of firmware image!\n");
  3753. qla_printk(KERN_WARNING, ha,
  3754. "Firmware data: %08x %08x %08x %08x!\n", dcode[0],
  3755. dcode[1], dcode[2], dcode[3]);
  3756. goto fail_fw_integrity;
  3757. }
  3758. while (segments && rval == QLA_SUCCESS) {
  3759. risc_addr = be32_to_cpu(fwcode[2]);
  3760. *srisc_addr = *srisc_addr == 0 ? risc_addr : *srisc_addr;
  3761. risc_size = be32_to_cpu(fwcode[3]);
  3762. /* Validate firmware image size. */
  3763. fwclen += risc_size * sizeof(uint32_t);
  3764. if (blob->fw->size < fwclen) {
  3765. qla_printk(KERN_WARNING, ha,
  3766. "Unable to verify integrity of firmware image "
  3767. "(%Zd)!\n", blob->fw->size);
  3768. goto fail_fw_integrity;
  3769. }
  3770. fragment = 0;
  3771. while (risc_size > 0 && rval == QLA_SUCCESS) {
  3772. dlen = (uint32_t)(ha->fw_transfer_size >> 2);
  3773. if (dlen > risc_size)
  3774. dlen = risc_size;
  3775. DEBUG7(printk("scsi(%ld): Loading risc segment@ risc "
  3776. "addr %x, number of dwords 0x%x.\n", vha->host_no,
  3777. risc_addr, dlen));
  3778. for (i = 0; i < dlen; i++)
  3779. dcode[i] = swab32(fwcode[i]);
  3780. rval = qla2x00_load_ram(vha, req->dma, risc_addr,
  3781. dlen);
  3782. if (rval) {
  3783. DEBUG(printk("scsi(%ld):[ERROR] Failed to load "
  3784. "segment %d of firmware\n", vha->host_no,
  3785. fragment));
  3786. qla_printk(KERN_WARNING, ha,
  3787. "[ERROR] Failed to load segment %d of "
  3788. "firmware\n", fragment);
  3789. break;
  3790. }
  3791. fwcode += dlen;
  3792. risc_addr += dlen;
  3793. risc_size -= dlen;
  3794. fragment++;
  3795. }
  3796. /* Next segment. */
  3797. segments--;
  3798. }
  3799. return rval;
  3800. fail_fw_integrity:
  3801. return QLA_FUNCTION_FAILED;
  3802. }
  3803. int
  3804. qla24xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3805. {
  3806. int rval;
  3807. if (ql2xfwloadbin == 1)
  3808. return qla81xx_load_risc(vha, srisc_addr);
  3809. /*
  3810. * FW Load priority:
  3811. * 1) Firmware via request-firmware interface (.bin file).
  3812. * 2) Firmware residing in flash.
  3813. */
  3814. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3815. if (rval == QLA_SUCCESS)
  3816. return rval;
  3817. return qla24xx_load_risc_flash(vha, srisc_addr,
  3818. vha->hw->flt_region_fw);
  3819. }
  3820. int
  3821. qla81xx_load_risc(scsi_qla_host_t *vha, uint32_t *srisc_addr)
  3822. {
  3823. int rval;
  3824. struct qla_hw_data *ha = vha->hw;
  3825. if (ql2xfwloadbin == 2)
  3826. goto try_blob_fw;
  3827. /*
  3828. * FW Load priority:
  3829. * 1) Firmware residing in flash.
  3830. * 2) Firmware via request-firmware interface (.bin file).
  3831. * 3) Golden-Firmware residing in flash -- limited operation.
  3832. */
  3833. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw);
  3834. if (rval == QLA_SUCCESS)
  3835. return rval;
  3836. try_blob_fw:
  3837. rval = qla24xx_load_risc_blob(vha, srisc_addr);
  3838. if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw)
  3839. return rval;
  3840. qla_printk(KERN_ERR, ha,
  3841. "FW: Attempting to fallback to golden firmware...\n");
  3842. rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw);
  3843. if (rval != QLA_SUCCESS)
  3844. return rval;
  3845. qla_printk(KERN_ERR, ha,
  3846. "FW: Please update operational firmware...\n");
  3847. ha->flags.running_gold_fw = 1;
  3848. return rval;
  3849. }
  3850. void
  3851. qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
  3852. {
  3853. int ret, retries;
  3854. struct qla_hw_data *ha = vha->hw;
  3855. if (ha->flags.pci_channel_io_perm_failure)
  3856. return;
  3857. if (!IS_FWI2_CAPABLE(ha))
  3858. return;
  3859. if (!ha->fw_major_version)
  3860. return;
  3861. ret = qla2x00_stop_firmware(vha);
  3862. for (retries = 5; ret != QLA_SUCCESS && ret != QLA_FUNCTION_TIMEOUT &&
  3863. ret != QLA_INVALID_COMMAND && retries ; retries--) {
  3864. ha->isp_ops->reset_chip(vha);
  3865. if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS)
  3866. continue;
  3867. if (qla2x00_setup_chip(vha) != QLA_SUCCESS)
  3868. continue;
  3869. qla_printk(KERN_INFO, ha,
  3870. "Attempting retry of stop-firmware command...\n");
  3871. ret = qla2x00_stop_firmware(vha);
  3872. }
  3873. }
  3874. int
  3875. qla24xx_configure_vhba(scsi_qla_host_t *vha)
  3876. {
  3877. int rval = QLA_SUCCESS;
  3878. uint16_t mb[MAILBOX_REGISTER_COUNT];
  3879. struct qla_hw_data *ha = vha->hw;
  3880. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  3881. struct req_que *req;
  3882. struct rsp_que *rsp;
  3883. if (!vha->vp_idx)
  3884. return -EINVAL;
  3885. rval = qla2x00_fw_ready(base_vha);
  3886. if (ha->flags.cpu_affinity_enabled)
  3887. req = ha->req_q_map[0];
  3888. else
  3889. req = vha->req;
  3890. rsp = req->rsp;
  3891. if (rval == QLA_SUCCESS) {
  3892. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  3893. qla2x00_marker(vha, req, rsp, 0, 0, MK_SYNC_ALL);
  3894. }
  3895. vha->flags.management_server_logged_in = 0;
  3896. /* Login to SNS first */
  3897. ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, BIT_1);
  3898. if (mb[0] != MBS_COMMAND_COMPLETE) {
  3899. DEBUG15(qla_printk(KERN_INFO, ha,
  3900. "Failed SNS login: loop_id=%x mb[0]=%x mb[1]=%x "
  3901. "mb[2]=%x mb[6]=%x mb[7]=%x\n", NPH_SNS,
  3902. mb[0], mb[1], mb[2], mb[6], mb[7]));
  3903. return (QLA_FUNCTION_FAILED);
  3904. }
  3905. atomic_set(&vha->loop_down_timer, 0);
  3906. atomic_set(&vha->loop_state, LOOP_UP);
  3907. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  3908. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  3909. rval = qla2x00_loop_resync(base_vha);
  3910. return rval;
  3911. }
  3912. /* 84XX Support **************************************************************/
  3913. static LIST_HEAD(qla_cs84xx_list);
  3914. static DEFINE_MUTEX(qla_cs84xx_mutex);
  3915. static struct qla_chip_state_84xx *
  3916. qla84xx_get_chip(struct scsi_qla_host *vha)
  3917. {
  3918. struct qla_chip_state_84xx *cs84xx;
  3919. struct qla_hw_data *ha = vha->hw;
  3920. mutex_lock(&qla_cs84xx_mutex);
  3921. /* Find any shared 84xx chip. */
  3922. list_for_each_entry(cs84xx, &qla_cs84xx_list, list) {
  3923. if (cs84xx->bus == ha->pdev->bus) {
  3924. kref_get(&cs84xx->kref);
  3925. goto done;
  3926. }
  3927. }
  3928. cs84xx = kzalloc(sizeof(*cs84xx), GFP_KERNEL);
  3929. if (!cs84xx)
  3930. goto done;
  3931. kref_init(&cs84xx->kref);
  3932. spin_lock_init(&cs84xx->access_lock);
  3933. mutex_init(&cs84xx->fw_update_mutex);
  3934. cs84xx->bus = ha->pdev->bus;
  3935. list_add_tail(&cs84xx->list, &qla_cs84xx_list);
  3936. done:
  3937. mutex_unlock(&qla_cs84xx_mutex);
  3938. return cs84xx;
  3939. }
  3940. static void
  3941. __qla84xx_chip_release(struct kref *kref)
  3942. {
  3943. struct qla_chip_state_84xx *cs84xx =
  3944. container_of(kref, struct qla_chip_state_84xx, kref);
  3945. mutex_lock(&qla_cs84xx_mutex);
  3946. list_del(&cs84xx->list);
  3947. mutex_unlock(&qla_cs84xx_mutex);
  3948. kfree(cs84xx);
  3949. }
  3950. void
  3951. qla84xx_put_chip(struct scsi_qla_host *vha)
  3952. {
  3953. struct qla_hw_data *ha = vha->hw;
  3954. if (ha->cs84xx)
  3955. kref_put(&ha->cs84xx->kref, __qla84xx_chip_release);
  3956. }
  3957. static int
  3958. qla84xx_init_chip(scsi_qla_host_t *vha)
  3959. {
  3960. int rval;
  3961. uint16_t status[2];
  3962. struct qla_hw_data *ha = vha->hw;
  3963. mutex_lock(&ha->cs84xx->fw_update_mutex);
  3964. rval = qla84xx_verify_chip(vha, status);
  3965. mutex_unlock(&ha->cs84xx->fw_update_mutex);
  3966. return rval != QLA_SUCCESS || status[0] ? QLA_FUNCTION_FAILED:
  3967. QLA_SUCCESS;
  3968. }
  3969. /* 81XX Support **************************************************************/
  3970. int
  3971. qla81xx_nvram_config(scsi_qla_host_t *vha)
  3972. {
  3973. int rval;
  3974. struct init_cb_81xx *icb;
  3975. struct nvram_81xx *nv;
  3976. uint32_t *dptr;
  3977. uint8_t *dptr1, *dptr2;
  3978. uint32_t chksum;
  3979. uint16_t cnt;
  3980. struct qla_hw_data *ha = vha->hw;
  3981. rval = QLA_SUCCESS;
  3982. icb = (struct init_cb_81xx *)ha->init_cb;
  3983. nv = ha->nvram;
  3984. /* Determine NVRAM starting address. */
  3985. ha->nvram_size = sizeof(struct nvram_81xx);
  3986. ha->vpd_size = FA_NVRAM_VPD_SIZE;
  3987. /* Get VPD data into cache */
  3988. ha->vpd = ha->nvram + VPD_OFFSET;
  3989. ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2,
  3990. ha->vpd_size);
  3991. /* Get NVRAM data into cache and calculate checksum. */
  3992. ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2,
  3993. ha->nvram_size);
  3994. dptr = (uint32_t *)nv;
  3995. for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++)
  3996. chksum += le32_to_cpu(*dptr++);
  3997. DEBUG5(printk("scsi(%ld): Contents of NVRAM\n", vha->host_no));
  3998. DEBUG5(qla2x00_dump_buffer((uint8_t *)nv, ha->nvram_size));
  3999. /* Bad NVRAM data, set defaults parameters. */
  4000. if (chksum || nv->id[0] != 'I' || nv->id[1] != 'S' || nv->id[2] != 'P'
  4001. || nv->id[3] != ' ' ||
  4002. nv->nvram_version < __constant_cpu_to_le16(ICB_VERSION)) {
  4003. /* Reset NVRAM data. */
  4004. qla_printk(KERN_WARNING, ha, "Inconsistent NVRAM detected: "
  4005. "checksum=0x%x id=%c version=0x%x.\n", chksum, nv->id[0],
  4006. le16_to_cpu(nv->nvram_version));
  4007. qla_printk(KERN_WARNING, ha, "Falling back to functioning (yet "
  4008. "invalid -- WWPN) defaults.\n");
  4009. /*
  4010. * Set default initialization control block.
  4011. */
  4012. memset(nv, 0, ha->nvram_size);
  4013. nv->nvram_version = __constant_cpu_to_le16(ICB_VERSION);
  4014. nv->version = __constant_cpu_to_le16(ICB_VERSION);
  4015. nv->frame_payload_size = __constant_cpu_to_le16(2048);
  4016. nv->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4017. nv->exchange_count = __constant_cpu_to_le16(0);
  4018. nv->port_name[0] = 0x21;
  4019. nv->port_name[1] = 0x00 + ha->port_no;
  4020. nv->port_name[2] = 0x00;
  4021. nv->port_name[3] = 0xe0;
  4022. nv->port_name[4] = 0x8b;
  4023. nv->port_name[5] = 0x1c;
  4024. nv->port_name[6] = 0x55;
  4025. nv->port_name[7] = 0x86;
  4026. nv->node_name[0] = 0x20;
  4027. nv->node_name[1] = 0x00;
  4028. nv->node_name[2] = 0x00;
  4029. nv->node_name[3] = 0xe0;
  4030. nv->node_name[4] = 0x8b;
  4031. nv->node_name[5] = 0x1c;
  4032. nv->node_name[6] = 0x55;
  4033. nv->node_name[7] = 0x86;
  4034. nv->login_retry_count = __constant_cpu_to_le16(8);
  4035. nv->interrupt_delay_timer = __constant_cpu_to_le16(0);
  4036. nv->login_timeout = __constant_cpu_to_le16(0);
  4037. nv->firmware_options_1 =
  4038. __constant_cpu_to_le32(BIT_14|BIT_13|BIT_2|BIT_1);
  4039. nv->firmware_options_2 = __constant_cpu_to_le32(2 << 4);
  4040. nv->firmware_options_2 |= __constant_cpu_to_le32(BIT_12);
  4041. nv->firmware_options_3 = __constant_cpu_to_le32(2 << 13);
  4042. nv->host_p = __constant_cpu_to_le32(BIT_11|BIT_10);
  4043. nv->efi_parameters = __constant_cpu_to_le32(0);
  4044. nv->reset_delay = 5;
  4045. nv->max_luns_per_target = __constant_cpu_to_le16(128);
  4046. nv->port_down_retry_count = __constant_cpu_to_le16(30);
  4047. nv->link_down_timeout = __constant_cpu_to_le16(30);
  4048. nv->enode_mac[0] = 0x00;
  4049. nv->enode_mac[1] = 0x02;
  4050. nv->enode_mac[2] = 0x03;
  4051. nv->enode_mac[3] = 0x04;
  4052. nv->enode_mac[4] = 0x05;
  4053. nv->enode_mac[5] = 0x06 + ha->port_no;
  4054. rval = 1;
  4055. }
  4056. /* Reset Initialization control block */
  4057. memset(icb, 0, sizeof(struct init_cb_81xx));
  4058. /* Copy 1st segment. */
  4059. dptr1 = (uint8_t *)icb;
  4060. dptr2 = (uint8_t *)&nv->version;
  4061. cnt = (uint8_t *)&icb->response_q_inpointer - (uint8_t *)&icb->version;
  4062. while (cnt--)
  4063. *dptr1++ = *dptr2++;
  4064. icb->login_retry_count = nv->login_retry_count;
  4065. /* Copy 2nd segment. */
  4066. dptr1 = (uint8_t *)&icb->interrupt_delay_timer;
  4067. dptr2 = (uint8_t *)&nv->interrupt_delay_timer;
  4068. cnt = (uint8_t *)&icb->reserved_5 -
  4069. (uint8_t *)&icb->interrupt_delay_timer;
  4070. while (cnt--)
  4071. *dptr1++ = *dptr2++;
  4072. memcpy(icb->enode_mac, nv->enode_mac, sizeof(icb->enode_mac));
  4073. /* Some boards (with valid NVRAMs) still have NULL enode_mac!! */
  4074. if (!memcmp(icb->enode_mac, "\0\0\0\0\0\0", sizeof(icb->enode_mac))) {
  4075. icb->enode_mac[0] = 0x01;
  4076. icb->enode_mac[1] = 0x02;
  4077. icb->enode_mac[2] = 0x03;
  4078. icb->enode_mac[3] = 0x04;
  4079. icb->enode_mac[4] = 0x05;
  4080. icb->enode_mac[5] = 0x06 + ha->port_no;
  4081. }
  4082. /* Use extended-initialization control block. */
  4083. memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
  4084. /*
  4085. * Setup driver NVRAM options.
  4086. */
  4087. qla2x00_set_model_info(vha, nv->model_name, sizeof(nv->model_name),
  4088. "QLE81XX");
  4089. /* Use alternate WWN? */
  4090. if (nv->host_p & __constant_cpu_to_le32(BIT_15)) {
  4091. memcpy(icb->node_name, nv->alternate_node_name, WWN_SIZE);
  4092. memcpy(icb->port_name, nv->alternate_port_name, WWN_SIZE);
  4093. }
  4094. /* Prepare nodename */
  4095. if ((icb->firmware_options_1 & __constant_cpu_to_le32(BIT_14)) == 0) {
  4096. /*
  4097. * Firmware will apply the following mask if the nodename was
  4098. * not provided.
  4099. */
  4100. memcpy(icb->node_name, icb->port_name, WWN_SIZE);
  4101. icb->node_name[0] &= 0xF0;
  4102. }
  4103. /* Set host adapter parameters. */
  4104. ha->flags.disable_risc_code_load = 0;
  4105. ha->flags.enable_lip_reset = 0;
  4106. ha->flags.enable_lip_full_login =
  4107. le32_to_cpu(nv->host_p) & BIT_10 ? 1: 0;
  4108. ha->flags.enable_target_reset =
  4109. le32_to_cpu(nv->host_p) & BIT_11 ? 1: 0;
  4110. ha->flags.enable_led_scheme = 0;
  4111. ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0;
  4112. ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) &
  4113. (BIT_6 | BIT_5 | BIT_4)) >> 4;
  4114. /* save HBA serial number */
  4115. ha->serial0 = icb->port_name[5];
  4116. ha->serial1 = icb->port_name[6];
  4117. ha->serial2 = icb->port_name[7];
  4118. memcpy(vha->node_name, icb->node_name, WWN_SIZE);
  4119. memcpy(vha->port_name, icb->port_name, WWN_SIZE);
  4120. icb->execution_throttle = __constant_cpu_to_le16(0xFFFF);
  4121. ha->retry_count = le16_to_cpu(nv->login_retry_count);
  4122. /* Set minimum login_timeout to 4 seconds. */
  4123. if (le16_to_cpu(nv->login_timeout) < ql2xlogintimeout)
  4124. nv->login_timeout = cpu_to_le16(ql2xlogintimeout);
  4125. if (le16_to_cpu(nv->login_timeout) < 4)
  4126. nv->login_timeout = __constant_cpu_to_le16(4);
  4127. ha->login_timeout = le16_to_cpu(nv->login_timeout);
  4128. icb->login_timeout = nv->login_timeout;
  4129. /* Set minimum RATOV to 100 tenths of a second. */
  4130. ha->r_a_tov = 100;
  4131. ha->loop_reset_delay = nv->reset_delay;
  4132. /* Link Down Timeout = 0:
  4133. *
  4134. * When Port Down timer expires we will start returning
  4135. * I/O's to OS with "DID_NO_CONNECT".
  4136. *
  4137. * Link Down Timeout != 0:
  4138. *
  4139. * The driver waits for the link to come up after link down
  4140. * before returning I/Os to OS with "DID_NO_CONNECT".
  4141. */
  4142. if (le16_to_cpu(nv->link_down_timeout) == 0) {
  4143. ha->loop_down_abort_time =
  4144. (LOOP_DOWN_TIME - LOOP_DOWN_TIMEOUT);
  4145. } else {
  4146. ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout);
  4147. ha->loop_down_abort_time =
  4148. (LOOP_DOWN_TIME - ha->link_down_timeout);
  4149. }
  4150. /* Need enough time to try and get the port back. */
  4151. ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count);
  4152. if (qlport_down_retry)
  4153. ha->port_down_retry_count = qlport_down_retry;
  4154. /* Set login_retry_count */
  4155. ha->login_retry_count = le16_to_cpu(nv->login_retry_count);
  4156. if (ha->port_down_retry_count ==
  4157. le16_to_cpu(nv->port_down_retry_count) &&
  4158. ha->port_down_retry_count > 3)
  4159. ha->login_retry_count = ha->port_down_retry_count;
  4160. else if (ha->port_down_retry_count > (int)ha->login_retry_count)
  4161. ha->login_retry_count = ha->port_down_retry_count;
  4162. if (ql2xloginretrycount)
  4163. ha->login_retry_count = ql2xloginretrycount;
  4164. /* Enable ZIO. */
  4165. if (!vha->flags.init_done) {
  4166. ha->zio_mode = le32_to_cpu(icb->firmware_options_2) &
  4167. (BIT_3 | BIT_2 | BIT_1 | BIT_0);
  4168. ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ?
  4169. le16_to_cpu(icb->interrupt_delay_timer): 2;
  4170. }
  4171. icb->firmware_options_2 &= __constant_cpu_to_le32(
  4172. ~(BIT_3 | BIT_2 | BIT_1 | BIT_0));
  4173. vha->flags.process_response_queue = 0;
  4174. if (ha->zio_mode != QLA_ZIO_DISABLED) {
  4175. ha->zio_mode = QLA_ZIO_MODE_6;
  4176. DEBUG2(printk("scsi(%ld): ZIO mode %d enabled; timer delay "
  4177. "(%d us).\n", vha->host_no, ha->zio_mode,
  4178. ha->zio_timer * 100));
  4179. qla_printk(KERN_INFO, ha,
  4180. "ZIO mode %d enabled; timer delay (%d us).\n",
  4181. ha->zio_mode, ha->zio_timer * 100);
  4182. icb->firmware_options_2 |= cpu_to_le32(
  4183. (uint32_t)ha->zio_mode);
  4184. icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer);
  4185. vha->flags.process_response_queue = 1;
  4186. }
  4187. if (rval) {
  4188. DEBUG2_3(printk(KERN_WARNING
  4189. "scsi(%ld): NVRAM configuration failed!\n", vha->host_no));
  4190. }
  4191. return (rval);
  4192. }
  4193. void
  4194. qla81xx_update_fw_options(scsi_qla_host_t *ha)
  4195. {
  4196. }