hpsa_cmd.h 8.0 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326
  1. /*
  2. * Disk Array driver for HP Smart Array SAS controllers
  3. * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; version 2 of the License.
  8. *
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  12. * NON INFRINGEMENT. See the GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. *
  18. * Questions/Comments/Bugfixes to iss_storagedev@hp.com
  19. *
  20. */
  21. #ifndef HPSA_CMD_H
  22. #define HPSA_CMD_H
  23. /* general boundary defintions */
  24. #define SENSEINFOBYTES 32 /* may vary between hbas */
  25. #define MAXSGENTRIES 31
  26. #define MAXREPLYQS 256
  27. /* Command Status value */
  28. #define CMD_SUCCESS 0x0000
  29. #define CMD_TARGET_STATUS 0x0001
  30. #define CMD_DATA_UNDERRUN 0x0002
  31. #define CMD_DATA_OVERRUN 0x0003
  32. #define CMD_INVALID 0x0004
  33. #define CMD_PROTOCOL_ERR 0x0005
  34. #define CMD_HARDWARE_ERR 0x0006
  35. #define CMD_CONNECTION_LOST 0x0007
  36. #define CMD_ABORTED 0x0008
  37. #define CMD_ABORT_FAILED 0x0009
  38. #define CMD_UNSOLICITED_ABORT 0x000A
  39. #define CMD_TIMEOUT 0x000B
  40. #define CMD_UNABORTABLE 0x000C
  41. /* Unit Attentions ASC's as defined for the MSA2012sa */
  42. #define POWER_OR_RESET 0x29
  43. #define STATE_CHANGED 0x2a
  44. #define UNIT_ATTENTION_CLEARED 0x2f
  45. #define LUN_FAILED 0x3e
  46. #define REPORT_LUNS_CHANGED 0x3f
  47. /* Unit Attentions ASCQ's as defined for the MSA2012sa */
  48. /* These ASCQ's defined for ASC = POWER_OR_RESET */
  49. #define POWER_ON_RESET 0x00
  50. #define POWER_ON_REBOOT 0x01
  51. #define SCSI_BUS_RESET 0x02
  52. #define MSA_TARGET_RESET 0x03
  53. #define CONTROLLER_FAILOVER 0x04
  54. #define TRANSCEIVER_SE 0x05
  55. #define TRANSCEIVER_LVD 0x06
  56. /* These ASCQ's defined for ASC = STATE_CHANGED */
  57. #define RESERVATION_PREEMPTED 0x03
  58. #define ASYM_ACCESS_CHANGED 0x06
  59. #define LUN_CAPACITY_CHANGED 0x09
  60. /* transfer direction */
  61. #define XFER_NONE 0x00
  62. #define XFER_WRITE 0x01
  63. #define XFER_READ 0x02
  64. #define XFER_RSVD 0x03
  65. /* task attribute */
  66. #define ATTR_UNTAGGED 0x00
  67. #define ATTR_SIMPLE 0x04
  68. #define ATTR_HEADOFQUEUE 0x05
  69. #define ATTR_ORDERED 0x06
  70. #define ATTR_ACA 0x07
  71. /* cdb type */
  72. #define TYPE_CMD 0x00
  73. #define TYPE_MSG 0x01
  74. /* config space register offsets */
  75. #define CFG_VENDORID 0x00
  76. #define CFG_DEVICEID 0x02
  77. #define CFG_I2OBAR 0x10
  78. #define CFG_MEM1BAR 0x14
  79. /* i2o space register offsets */
  80. #define I2O_IBDB_SET 0x20
  81. #define I2O_IBDB_CLEAR 0x70
  82. #define I2O_INT_STATUS 0x30
  83. #define I2O_INT_MASK 0x34
  84. #define I2O_IBPOST_Q 0x40
  85. #define I2O_OBPOST_Q 0x44
  86. #define I2O_DMA1_CFG 0x214
  87. /* Configuration Table */
  88. #define CFGTBL_ChangeReq 0x00000001l
  89. #define CFGTBL_AccCmds 0x00000001l
  90. #define CFGTBL_Trans_Simple 0x00000002l
  91. #define CFGTBL_BusType_Ultra2 0x00000001l
  92. #define CFGTBL_BusType_Ultra3 0x00000002l
  93. #define CFGTBL_BusType_Fibre1G 0x00000100l
  94. #define CFGTBL_BusType_Fibre2G 0x00000200l
  95. struct vals32 {
  96. __u32 lower;
  97. __u32 upper;
  98. };
  99. union u64bit {
  100. struct vals32 val32;
  101. __u64 val;
  102. };
  103. /* FIXME this is a per controller value (barf!) */
  104. #define HPSA_MAX_TARGETS_PER_CTLR 16
  105. #define HPSA_MAX_LUN 256
  106. #define HPSA_MAX_PHYS_LUN 1024
  107. /* SCSI-3 Commands */
  108. #pragma pack(1)
  109. #define HPSA_INQUIRY 0x12
  110. struct InquiryData {
  111. __u8 data_byte[36];
  112. };
  113. #define HPSA_REPORT_LOG 0xc2 /* Report Logical LUNs */
  114. #define HPSA_REPORT_PHYS 0xc3 /* Report Physical LUNs */
  115. struct ReportLUNdata {
  116. __u8 LUNListLength[4];
  117. __u32 reserved;
  118. __u8 LUN[HPSA_MAX_LUN][8];
  119. };
  120. struct ReportExtendedLUNdata {
  121. __u8 LUNListLength[4];
  122. __u8 extended_response_flag;
  123. __u8 reserved[3];
  124. __u8 LUN[HPSA_MAX_LUN][24];
  125. };
  126. struct SenseSubsystem_info {
  127. __u8 reserved[36];
  128. __u8 portname[8];
  129. __u8 reserved1[1108];
  130. };
  131. #define HPSA_READ_CAPACITY 0x25 /* Read Capacity */
  132. struct ReadCapdata {
  133. __u8 total_size[4]; /* Total size in blocks */
  134. __u8 block_size[4]; /* Size of blocks in bytes */
  135. };
  136. #if 0
  137. /* 12 byte commands not implemented in firmware yet. */
  138. #define HPSA_READ 0xa8
  139. #define HPSA_WRITE 0xaa
  140. #endif
  141. #define HPSA_READ 0x28 /* Read(10) */
  142. #define HPSA_WRITE 0x2a /* Write(10) */
  143. /* BMIC commands */
  144. #define BMIC_READ 0x26
  145. #define BMIC_WRITE 0x27
  146. #define BMIC_CACHE_FLUSH 0xc2
  147. #define HPSA_CACHE_FLUSH 0x01 /* C2 was already being used by HPSA */
  148. /* Command List Structure */
  149. union SCSI3Addr {
  150. struct {
  151. __u8 Dev;
  152. __u8 Bus:6;
  153. __u8 Mode:2; /* b00 */
  154. } PeripDev;
  155. struct {
  156. __u8 DevLSB;
  157. __u8 DevMSB:6;
  158. __u8 Mode:2; /* b01 */
  159. } LogDev;
  160. struct {
  161. __u8 Dev:5;
  162. __u8 Bus:3;
  163. __u8 Targ:6;
  164. __u8 Mode:2; /* b10 */
  165. } LogUnit;
  166. };
  167. struct PhysDevAddr {
  168. __u32 TargetId:24;
  169. __u32 Bus:6;
  170. __u32 Mode:2;
  171. /* 2 level target device addr */
  172. union SCSI3Addr Target[2];
  173. };
  174. struct LogDevAddr {
  175. __u32 VolId:30;
  176. __u32 Mode:2;
  177. __u8 reserved[4];
  178. };
  179. union LUNAddr {
  180. __u8 LunAddrBytes[8];
  181. union SCSI3Addr SCSI3Lun[4];
  182. struct PhysDevAddr PhysDev;
  183. struct LogDevAddr LogDev;
  184. };
  185. struct CommandListHeader {
  186. __u8 ReplyQueue;
  187. __u8 SGList;
  188. __u16 SGTotal;
  189. struct vals32 Tag;
  190. union LUNAddr LUN;
  191. };
  192. struct RequestBlock {
  193. __u8 CDBLen;
  194. struct {
  195. __u8 Type:3;
  196. __u8 Attribute:3;
  197. __u8 Direction:2;
  198. } Type;
  199. __u16 Timeout;
  200. __u8 CDB[16];
  201. };
  202. struct ErrDescriptor {
  203. struct vals32 Addr;
  204. __u32 Len;
  205. };
  206. struct SGDescriptor {
  207. struct vals32 Addr;
  208. __u32 Len;
  209. __u32 Ext;
  210. };
  211. union MoreErrInfo {
  212. struct {
  213. __u8 Reserved[3];
  214. __u8 Type;
  215. __u32 ErrorInfo;
  216. } Common_Info;
  217. struct {
  218. __u8 Reserved[2];
  219. __u8 offense_size; /* size of offending entry */
  220. __u8 offense_num; /* byte # of offense 0-base */
  221. __u32 offense_value;
  222. } Invalid_Cmd;
  223. };
  224. struct ErrorInfo {
  225. __u8 ScsiStatus;
  226. __u8 SenseLen;
  227. __u16 CommandStatus;
  228. __u32 ResidualCnt;
  229. union MoreErrInfo MoreErrInfo;
  230. __u8 SenseInfo[SENSEINFOBYTES];
  231. };
  232. /* Command types */
  233. #define CMD_IOCTL_PEND 0x01
  234. #define CMD_SCSI 0x03
  235. struct ctlr_info; /* defined in hpsa.h */
  236. /* The size of this structure needs to be divisible by 8
  237. * od on all architectures, because the controller uses 2
  238. * lower bits of the address, and the driver uses 1 lower
  239. * bit (3 bits total.)
  240. */
  241. struct CommandList {
  242. struct CommandListHeader Header;
  243. struct RequestBlock Request;
  244. struct ErrDescriptor ErrDesc;
  245. struct SGDescriptor SG[MAXSGENTRIES];
  246. /* information associated with the command */
  247. __u32 busaddr; /* physical addr of this record */
  248. struct ErrorInfo *err_info; /* pointer to the allocated mem */
  249. struct ctlr_info *h;
  250. int cmd_type;
  251. long cmdindex;
  252. struct hlist_node list;
  253. struct CommandList *prev;
  254. struct CommandList *next;
  255. struct request *rq;
  256. struct completion *waiting;
  257. int retry_count;
  258. void *scsi_cmd;
  259. };
  260. /* Configuration Table Structure */
  261. struct HostWrite {
  262. __u32 TransportRequest;
  263. __u32 Reserved;
  264. __u32 CoalIntDelay;
  265. __u32 CoalIntCount;
  266. };
  267. struct CfgTable {
  268. __u8 Signature[4];
  269. __u32 SpecValence;
  270. __u32 TransportSupport;
  271. __u32 TransportActive;
  272. struct HostWrite HostWrite;
  273. __u32 CmdsOutMax;
  274. __u32 BusTypes;
  275. __u32 Reserved;
  276. __u8 ServerName[16];
  277. __u32 HeartBeat;
  278. __u32 SCSI_Prefetch;
  279. };
  280. struct hpsa_pci_info {
  281. unsigned char bus;
  282. unsigned char dev_fn;
  283. unsigned short domain;
  284. __u32 board_id;
  285. };
  286. #pragma pack()
  287. #endif /* HPSA_CMD_H */