ctcm_fsms.c 74 KB

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  1. /*
  2. * drivers/s390/net/ctcm_fsms.c
  3. *
  4. * Copyright IBM Corp. 2001, 2007
  5. * Authors: Fritz Elfert (felfert@millenux.com)
  6. * Peter Tiedemann (ptiedem@de.ibm.com)
  7. * MPC additions :
  8. * Belinda Thompson (belindat@us.ibm.com)
  9. * Andy Richter (richtera@us.ibm.com)
  10. */
  11. #undef DEBUG
  12. #undef DEBUGDATA
  13. #undef DEBUGCCW
  14. #define KMSG_COMPONENT "ctcm"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/timer.h>
  24. #include <linux/bitops.h>
  25. #include <linux/signal.h>
  26. #include <linux/string.h>
  27. #include <linux/ip.h>
  28. #include <linux/if_arp.h>
  29. #include <linux/tcp.h>
  30. #include <linux/skbuff.h>
  31. #include <linux/ctype.h>
  32. #include <net/dst.h>
  33. #include <linux/io.h>
  34. #include <asm/ccwdev.h>
  35. #include <asm/ccwgroup.h>
  36. #include <linux/uaccess.h>
  37. #include <asm/idals.h>
  38. #include "fsm.h"
  39. #include "ctcm_dbug.h"
  40. #include "ctcm_main.h"
  41. #include "ctcm_fsms.h"
  42. const char *dev_state_names[] = {
  43. [DEV_STATE_STOPPED] = "Stopped",
  44. [DEV_STATE_STARTWAIT_RXTX] = "StartWait RXTX",
  45. [DEV_STATE_STARTWAIT_RX] = "StartWait RX",
  46. [DEV_STATE_STARTWAIT_TX] = "StartWait TX",
  47. [DEV_STATE_STOPWAIT_RXTX] = "StopWait RXTX",
  48. [DEV_STATE_STOPWAIT_RX] = "StopWait RX",
  49. [DEV_STATE_STOPWAIT_TX] = "StopWait TX",
  50. [DEV_STATE_RUNNING] = "Running",
  51. };
  52. const char *dev_event_names[] = {
  53. [DEV_EVENT_START] = "Start",
  54. [DEV_EVENT_STOP] = "Stop",
  55. [DEV_EVENT_RXUP] = "RX up",
  56. [DEV_EVENT_TXUP] = "TX up",
  57. [DEV_EVENT_RXDOWN] = "RX down",
  58. [DEV_EVENT_TXDOWN] = "TX down",
  59. [DEV_EVENT_RESTART] = "Restart",
  60. };
  61. const char *ctc_ch_event_names[] = {
  62. [CTC_EVENT_IO_SUCCESS] = "ccw_device success",
  63. [CTC_EVENT_IO_EBUSY] = "ccw_device busy",
  64. [CTC_EVENT_IO_ENODEV] = "ccw_device enodev",
  65. [CTC_EVENT_IO_UNKNOWN] = "ccw_device unknown",
  66. [CTC_EVENT_ATTNBUSY] = "Status ATTN & BUSY",
  67. [CTC_EVENT_ATTN] = "Status ATTN",
  68. [CTC_EVENT_BUSY] = "Status BUSY",
  69. [CTC_EVENT_UC_RCRESET] = "Unit check remote reset",
  70. [CTC_EVENT_UC_RSRESET] = "Unit check remote system reset",
  71. [CTC_EVENT_UC_TXTIMEOUT] = "Unit check TX timeout",
  72. [CTC_EVENT_UC_TXPARITY] = "Unit check TX parity",
  73. [CTC_EVENT_UC_HWFAIL] = "Unit check Hardware failure",
  74. [CTC_EVENT_UC_RXPARITY] = "Unit check RX parity",
  75. [CTC_EVENT_UC_ZERO] = "Unit check ZERO",
  76. [CTC_EVENT_UC_UNKNOWN] = "Unit check Unknown",
  77. [CTC_EVENT_SC_UNKNOWN] = "SubChannel check Unknown",
  78. [CTC_EVENT_MC_FAIL] = "Machine check failure",
  79. [CTC_EVENT_MC_GOOD] = "Machine check operational",
  80. [CTC_EVENT_IRQ] = "IRQ normal",
  81. [CTC_EVENT_FINSTAT] = "IRQ final",
  82. [CTC_EVENT_TIMER] = "Timer",
  83. [CTC_EVENT_START] = "Start",
  84. [CTC_EVENT_STOP] = "Stop",
  85. /*
  86. * additional MPC events
  87. */
  88. [CTC_EVENT_SEND_XID] = "XID Exchange",
  89. [CTC_EVENT_RSWEEP_TIMER] = "MPC Group Sweep Timer",
  90. };
  91. const char *ctc_ch_state_names[] = {
  92. [CTC_STATE_IDLE] = "Idle",
  93. [CTC_STATE_STOPPED] = "Stopped",
  94. [CTC_STATE_STARTWAIT] = "StartWait",
  95. [CTC_STATE_STARTRETRY] = "StartRetry",
  96. [CTC_STATE_SETUPWAIT] = "SetupWait",
  97. [CTC_STATE_RXINIT] = "RX init",
  98. [CTC_STATE_TXINIT] = "TX init",
  99. [CTC_STATE_RX] = "RX",
  100. [CTC_STATE_TX] = "TX",
  101. [CTC_STATE_RXIDLE] = "RX idle",
  102. [CTC_STATE_TXIDLE] = "TX idle",
  103. [CTC_STATE_RXERR] = "RX error",
  104. [CTC_STATE_TXERR] = "TX error",
  105. [CTC_STATE_TERM] = "Terminating",
  106. [CTC_STATE_DTERM] = "Restarting",
  107. [CTC_STATE_NOTOP] = "Not operational",
  108. /*
  109. * additional MPC states
  110. */
  111. [CH_XID0_PENDING] = "Pending XID0 Start",
  112. [CH_XID0_INPROGRESS] = "In XID0 Negotiations ",
  113. [CH_XID7_PENDING] = "Pending XID7 P1 Start",
  114. [CH_XID7_PENDING1] = "Active XID7 P1 Exchange ",
  115. [CH_XID7_PENDING2] = "Pending XID7 P2 Start ",
  116. [CH_XID7_PENDING3] = "Active XID7 P2 Exchange ",
  117. [CH_XID7_PENDING4] = "XID7 Complete - Pending READY ",
  118. };
  119. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg);
  120. /*
  121. * ----- static ctcm actions for channel statemachine -----
  122. *
  123. */
  124. static void chx_txdone(fsm_instance *fi, int event, void *arg);
  125. static void chx_rx(fsm_instance *fi, int event, void *arg);
  126. static void chx_rxidle(fsm_instance *fi, int event, void *arg);
  127. static void chx_firstio(fsm_instance *fi, int event, void *arg);
  128. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  129. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  130. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  131. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  132. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  133. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  134. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  135. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  136. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  137. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  138. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  139. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  140. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  141. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  142. /*
  143. * ----- static ctcmpc actions for ctcmpc channel statemachine -----
  144. *
  145. */
  146. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg);
  147. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg);
  148. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg);
  149. /* shared :
  150. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  151. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  152. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  153. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  154. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  155. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  156. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  157. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  158. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  159. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  160. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  161. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  162. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  163. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  164. */
  165. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg);
  166. static void ctcmpc_chx_attnbusy(fsm_instance *, int, void *);
  167. static void ctcmpc_chx_resend(fsm_instance *, int, void *);
  168. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg);
  169. /**
  170. * Check return code of a preceeding ccw_device call, halt_IO etc...
  171. *
  172. * ch : The channel, the error belongs to.
  173. * Returns the error code (!= 0) to inspect.
  174. */
  175. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg)
  176. {
  177. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  178. "%s(%s): %s: %04x\n",
  179. CTCM_FUNTAIL, ch->id, msg, rc);
  180. switch (rc) {
  181. case -EBUSY:
  182. pr_info("%s: The communication peer is busy\n",
  183. ch->id);
  184. fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch);
  185. break;
  186. case -ENODEV:
  187. pr_err("%s: The specified target device is not valid\n",
  188. ch->id);
  189. fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch);
  190. break;
  191. default:
  192. pr_err("An I/O operation resulted in error %04x\n",
  193. rc);
  194. fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch);
  195. }
  196. }
  197. void ctcm_purge_skb_queue(struct sk_buff_head *q)
  198. {
  199. struct sk_buff *skb;
  200. CTCM_DBF_TEXT(TRACE, CTC_DBF_DEBUG, __func__);
  201. while ((skb = skb_dequeue(q))) {
  202. atomic_dec(&skb->users);
  203. dev_kfree_skb_any(skb);
  204. }
  205. }
  206. /**
  207. * NOP action for statemachines
  208. */
  209. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg)
  210. {
  211. }
  212. /*
  213. * Actions for channel - statemachines.
  214. */
  215. /**
  216. * Normal data has been send. Free the corresponding
  217. * skb (it's in io_queue), reset dev->tbusy and
  218. * revert to idle state.
  219. *
  220. * fi An instance of a channel statemachine.
  221. * event The event, just happened.
  222. * arg Generic pointer, casted from channel * upon call.
  223. */
  224. static void chx_txdone(fsm_instance *fi, int event, void *arg)
  225. {
  226. struct channel *ch = arg;
  227. struct net_device *dev = ch->netdev;
  228. struct ctcm_priv *priv = dev->ml_priv;
  229. struct sk_buff *skb;
  230. int first = 1;
  231. int i;
  232. unsigned long duration;
  233. struct timespec done_stamp = current_kernel_time(); /* xtime */
  234. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  235. duration =
  236. (done_stamp.tv_sec - ch->prof.send_stamp.tv_sec) * 1000000 +
  237. (done_stamp.tv_nsec - ch->prof.send_stamp.tv_nsec) / 1000;
  238. if (duration > ch->prof.tx_time)
  239. ch->prof.tx_time = duration;
  240. if (ch->irb->scsw.cmd.count != 0)
  241. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  242. "%s(%s): TX not complete, remaining %d bytes",
  243. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  244. fsm_deltimer(&ch->timer);
  245. while ((skb = skb_dequeue(&ch->io_queue))) {
  246. priv->stats.tx_packets++;
  247. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  248. if (first) {
  249. priv->stats.tx_bytes += 2;
  250. first = 0;
  251. }
  252. atomic_dec(&skb->users);
  253. dev_kfree_skb_irq(skb);
  254. }
  255. spin_lock(&ch->collect_lock);
  256. clear_normalized_cda(&ch->ccw[4]);
  257. if (ch->collect_len > 0) {
  258. int rc;
  259. if (ctcm_checkalloc_buffer(ch)) {
  260. spin_unlock(&ch->collect_lock);
  261. return;
  262. }
  263. ch->trans_skb->data = ch->trans_skb_data;
  264. skb_reset_tail_pointer(ch->trans_skb);
  265. ch->trans_skb->len = 0;
  266. if (ch->prof.maxmulti < (ch->collect_len + 2))
  267. ch->prof.maxmulti = ch->collect_len + 2;
  268. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  269. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  270. *((__u16 *)skb_put(ch->trans_skb, 2)) = ch->collect_len + 2;
  271. i = 0;
  272. while ((skb = skb_dequeue(&ch->collect_queue))) {
  273. skb_copy_from_linear_data(skb,
  274. skb_put(ch->trans_skb, skb->len), skb->len);
  275. priv->stats.tx_packets++;
  276. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  277. atomic_dec(&skb->users);
  278. dev_kfree_skb_irq(skb);
  279. i++;
  280. }
  281. ch->collect_len = 0;
  282. spin_unlock(&ch->collect_lock);
  283. ch->ccw[1].count = ch->trans_skb->len;
  284. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  285. ch->prof.send_stamp = current_kernel_time(); /* xtime */
  286. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  287. (unsigned long)ch, 0xff, 0);
  288. ch->prof.doios_multi++;
  289. if (rc != 0) {
  290. priv->stats.tx_dropped += i;
  291. priv->stats.tx_errors += i;
  292. fsm_deltimer(&ch->timer);
  293. ctcm_ccw_check_rc(ch, rc, "chained TX");
  294. }
  295. } else {
  296. spin_unlock(&ch->collect_lock);
  297. fsm_newstate(fi, CTC_STATE_TXIDLE);
  298. }
  299. ctcm_clear_busy_do(dev);
  300. }
  301. /**
  302. * Initial data is sent.
  303. * Notify device statemachine that we are up and
  304. * running.
  305. *
  306. * fi An instance of a channel statemachine.
  307. * event The event, just happened.
  308. * arg Generic pointer, casted from channel * upon call.
  309. */
  310. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg)
  311. {
  312. struct channel *ch = arg;
  313. struct net_device *dev = ch->netdev;
  314. struct ctcm_priv *priv = dev->ml_priv;
  315. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  316. fsm_deltimer(&ch->timer);
  317. fsm_newstate(fi, CTC_STATE_TXIDLE);
  318. fsm_event(priv->fsm, DEV_EVENT_TXUP, ch->netdev);
  319. }
  320. /**
  321. * Got normal data, check for sanity, queue it up, allocate new buffer
  322. * trigger bottom half, and initiate next read.
  323. *
  324. * fi An instance of a channel statemachine.
  325. * event The event, just happened.
  326. * arg Generic pointer, casted from channel * upon call.
  327. */
  328. static void chx_rx(fsm_instance *fi, int event, void *arg)
  329. {
  330. struct channel *ch = arg;
  331. struct net_device *dev = ch->netdev;
  332. struct ctcm_priv *priv = dev->ml_priv;
  333. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  334. struct sk_buff *skb = ch->trans_skb;
  335. __u16 block_len = *((__u16 *)skb->data);
  336. int check_len;
  337. int rc;
  338. fsm_deltimer(&ch->timer);
  339. if (len < 8) {
  340. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  341. "%s(%s): got packet with length %d < 8\n",
  342. CTCM_FUNTAIL, dev->name, len);
  343. priv->stats.rx_dropped++;
  344. priv->stats.rx_length_errors++;
  345. goto again;
  346. }
  347. if (len > ch->max_bufsize) {
  348. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  349. "%s(%s): got packet with length %d > %d\n",
  350. CTCM_FUNTAIL, dev->name, len, ch->max_bufsize);
  351. priv->stats.rx_dropped++;
  352. priv->stats.rx_length_errors++;
  353. goto again;
  354. }
  355. /*
  356. * VM TCP seems to have a bug sending 2 trailing bytes of garbage.
  357. */
  358. switch (ch->protocol) {
  359. case CTCM_PROTO_S390:
  360. case CTCM_PROTO_OS390:
  361. check_len = block_len + 2;
  362. break;
  363. default:
  364. check_len = block_len;
  365. break;
  366. }
  367. if ((len < block_len) || (len > check_len)) {
  368. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  369. "%s(%s): got block length %d != rx length %d\n",
  370. CTCM_FUNTAIL, dev->name, block_len, len);
  371. if (do_debug)
  372. ctcmpc_dump_skb(skb, 0);
  373. *((__u16 *)skb->data) = len;
  374. priv->stats.rx_dropped++;
  375. priv->stats.rx_length_errors++;
  376. goto again;
  377. }
  378. if (block_len > 2) {
  379. *((__u16 *)skb->data) = block_len - 2;
  380. ctcm_unpack_skb(ch, skb);
  381. }
  382. again:
  383. skb->data = ch->trans_skb_data;
  384. skb_reset_tail_pointer(skb);
  385. skb->len = 0;
  386. if (ctcm_checkalloc_buffer(ch))
  387. return;
  388. ch->ccw[1].count = ch->max_bufsize;
  389. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  390. (unsigned long)ch, 0xff, 0);
  391. if (rc != 0)
  392. ctcm_ccw_check_rc(ch, rc, "normal RX");
  393. }
  394. /**
  395. * Initialize connection by sending a __u16 of value 0.
  396. *
  397. * fi An instance of a channel statemachine.
  398. * event The event, just happened.
  399. * arg Generic pointer, casted from channel * upon call.
  400. */
  401. static void chx_firstio(fsm_instance *fi, int event, void *arg)
  402. {
  403. int rc;
  404. struct channel *ch = arg;
  405. int fsmstate = fsm_getstate(fi);
  406. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  407. "%s(%s) : %02x",
  408. CTCM_FUNTAIL, ch->id, fsmstate);
  409. ch->sense_rc = 0; /* reset unit check report control */
  410. if (fsmstate == CTC_STATE_TXIDLE)
  411. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  412. "%s(%s): remote side issued READ?, init.\n",
  413. CTCM_FUNTAIL, ch->id);
  414. fsm_deltimer(&ch->timer);
  415. if (ctcm_checkalloc_buffer(ch))
  416. return;
  417. if ((fsmstate == CTC_STATE_SETUPWAIT) &&
  418. (ch->protocol == CTCM_PROTO_OS390)) {
  419. /* OS/390 resp. z/OS */
  420. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  421. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  422. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
  423. CTC_EVENT_TIMER, ch);
  424. chx_rxidle(fi, event, arg);
  425. } else {
  426. struct net_device *dev = ch->netdev;
  427. struct ctcm_priv *priv = dev->ml_priv;
  428. fsm_newstate(fi, CTC_STATE_TXIDLE);
  429. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  430. }
  431. return;
  432. }
  433. /*
  434. * Don't setup a timer for receiving the initial RX frame
  435. * if in compatibility mode, since VM TCP delays the initial
  436. * frame until it has some data to send.
  437. */
  438. if ((CHANNEL_DIRECTION(ch->flags) == WRITE) ||
  439. (ch->protocol != CTCM_PROTO_S390))
  440. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  441. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  442. ch->ccw[1].count = 2; /* Transfer only length */
  443. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == READ)
  444. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  445. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  446. (unsigned long)ch, 0xff, 0);
  447. if (rc != 0) {
  448. fsm_deltimer(&ch->timer);
  449. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  450. ctcm_ccw_check_rc(ch, rc, "init IO");
  451. }
  452. /*
  453. * If in compatibility mode since we don't setup a timer, we
  454. * also signal RX channel up immediately. This enables us
  455. * to send packets early which in turn usually triggers some
  456. * reply from VM TCP which brings up the RX channel to it's
  457. * final state.
  458. */
  459. if ((CHANNEL_DIRECTION(ch->flags) == READ) &&
  460. (ch->protocol == CTCM_PROTO_S390)) {
  461. struct net_device *dev = ch->netdev;
  462. struct ctcm_priv *priv = dev->ml_priv;
  463. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  464. }
  465. }
  466. /**
  467. * Got initial data, check it. If OK,
  468. * notify device statemachine that we are up and
  469. * running.
  470. *
  471. * fi An instance of a channel statemachine.
  472. * event The event, just happened.
  473. * arg Generic pointer, casted from channel * upon call.
  474. */
  475. static void chx_rxidle(fsm_instance *fi, int event, void *arg)
  476. {
  477. struct channel *ch = arg;
  478. struct net_device *dev = ch->netdev;
  479. struct ctcm_priv *priv = dev->ml_priv;
  480. __u16 buflen;
  481. int rc;
  482. fsm_deltimer(&ch->timer);
  483. buflen = *((__u16 *)ch->trans_skb->data);
  484. CTCM_PR_DEBUG("%s: %s: Initial RX count = %d\n",
  485. __func__, dev->name, buflen);
  486. if (buflen >= CTCM_INITIAL_BLOCKLEN) {
  487. if (ctcm_checkalloc_buffer(ch))
  488. return;
  489. ch->ccw[1].count = ch->max_bufsize;
  490. fsm_newstate(fi, CTC_STATE_RXIDLE);
  491. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  492. (unsigned long)ch, 0xff, 0);
  493. if (rc != 0) {
  494. fsm_newstate(fi, CTC_STATE_RXINIT);
  495. ctcm_ccw_check_rc(ch, rc, "initial RX");
  496. } else
  497. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  498. } else {
  499. CTCM_PR_DEBUG("%s: %s: Initial RX count %d not %d\n",
  500. __func__, dev->name,
  501. buflen, CTCM_INITIAL_BLOCKLEN);
  502. chx_firstio(fi, event, arg);
  503. }
  504. }
  505. /**
  506. * Set channel into extended mode.
  507. *
  508. * fi An instance of a channel statemachine.
  509. * event The event, just happened.
  510. * arg Generic pointer, casted from channel * upon call.
  511. */
  512. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg)
  513. {
  514. struct channel *ch = arg;
  515. int rc;
  516. unsigned long saveflags = 0;
  517. int timeout = CTCM_TIME_5_SEC;
  518. fsm_deltimer(&ch->timer);
  519. if (IS_MPC(ch)) {
  520. timeout = 1500;
  521. CTCM_PR_DEBUG("enter %s: cp=%i ch=0x%p id=%s\n",
  522. __func__, smp_processor_id(), ch, ch->id);
  523. }
  524. fsm_addtimer(&ch->timer, timeout, CTC_EVENT_TIMER, ch);
  525. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  526. CTCM_CCW_DUMP((char *)&ch->ccw[6], sizeof(struct ccw1) * 2);
  527. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  528. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  529. /* Such conditional locking is undeterministic in
  530. * static view. => ignore sparse warnings here. */
  531. rc = ccw_device_start(ch->cdev, &ch->ccw[6],
  532. (unsigned long)ch, 0xff, 0);
  533. if (event == CTC_EVENT_TIMER) /* see above comments */
  534. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  535. if (rc != 0) {
  536. fsm_deltimer(&ch->timer);
  537. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  538. ctcm_ccw_check_rc(ch, rc, "set Mode");
  539. } else
  540. ch->retry = 0;
  541. }
  542. /**
  543. * Setup channel.
  544. *
  545. * fi An instance of a channel statemachine.
  546. * event The event, just happened.
  547. * arg Generic pointer, casted from channel * upon call.
  548. */
  549. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
  550. {
  551. struct channel *ch = arg;
  552. unsigned long saveflags;
  553. int rc;
  554. CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
  555. CTCM_FUNTAIL, ch->id,
  556. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX");
  557. if (ch->trans_skb != NULL) {
  558. clear_normalized_cda(&ch->ccw[1]);
  559. dev_kfree_skb(ch->trans_skb);
  560. ch->trans_skb = NULL;
  561. }
  562. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  563. ch->ccw[1].cmd_code = CCW_CMD_READ;
  564. ch->ccw[1].flags = CCW_FLAG_SLI;
  565. ch->ccw[1].count = 0;
  566. } else {
  567. ch->ccw[1].cmd_code = CCW_CMD_WRITE;
  568. ch->ccw[1].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  569. ch->ccw[1].count = 0;
  570. }
  571. if (ctcm_checkalloc_buffer(ch)) {
  572. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  573. "%s(%s): %s trans_skb alloc delayed "
  574. "until first transfer",
  575. CTCM_FUNTAIL, ch->id,
  576. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX");
  577. }
  578. ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
  579. ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  580. ch->ccw[0].count = 0;
  581. ch->ccw[0].cda = 0;
  582. ch->ccw[2].cmd_code = CCW_CMD_NOOP; /* jointed CE + DE */
  583. ch->ccw[2].flags = CCW_FLAG_SLI;
  584. ch->ccw[2].count = 0;
  585. ch->ccw[2].cda = 0;
  586. memcpy(&ch->ccw[3], &ch->ccw[0], sizeof(struct ccw1) * 3);
  587. ch->ccw[4].cda = 0;
  588. ch->ccw[4].flags &= ~CCW_FLAG_IDA;
  589. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  590. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  591. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  592. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  593. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  594. if (rc != 0) {
  595. if (rc != -EBUSY)
  596. fsm_deltimer(&ch->timer);
  597. ctcm_ccw_check_rc(ch, rc, "initial HaltIO");
  598. }
  599. }
  600. /**
  601. * Shutdown a channel.
  602. *
  603. * fi An instance of a channel statemachine.
  604. * event The event, just happened.
  605. * arg Generic pointer, casted from channel * upon call.
  606. */
  607. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg)
  608. {
  609. struct channel *ch = arg;
  610. unsigned long saveflags = 0;
  611. int rc;
  612. int oldstate;
  613. fsm_deltimer(&ch->timer);
  614. if (IS_MPC(ch))
  615. fsm_deltimer(&ch->sweep_timer);
  616. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  617. if (event == CTC_EVENT_STOP) /* only for STOP not yet locked */
  618. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  619. /* Such conditional locking is undeterministic in
  620. * static view. => ignore sparse warnings here. */
  621. oldstate = fsm_getstate(fi);
  622. fsm_newstate(fi, CTC_STATE_TERM);
  623. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  624. if (event == CTC_EVENT_STOP)
  625. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  626. /* see remark above about conditional locking */
  627. if (rc != 0 && rc != -EBUSY) {
  628. fsm_deltimer(&ch->timer);
  629. if (event != CTC_EVENT_STOP) {
  630. fsm_newstate(fi, oldstate);
  631. ctcm_ccw_check_rc(ch, rc, (char *)__func__);
  632. }
  633. }
  634. }
  635. /**
  636. * Cleanup helper for chx_fail and chx_stopped
  637. * cleanup channels queue and notify interface statemachine.
  638. *
  639. * fi An instance of a channel statemachine.
  640. * state The next state (depending on caller).
  641. * ch The channel to operate on.
  642. */
  643. static void ctcm_chx_cleanup(fsm_instance *fi, int state,
  644. struct channel *ch)
  645. {
  646. struct net_device *dev = ch->netdev;
  647. struct ctcm_priv *priv = dev->ml_priv;
  648. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  649. "%s(%s): %s[%d]\n",
  650. CTCM_FUNTAIL, dev->name, ch->id, state);
  651. fsm_deltimer(&ch->timer);
  652. if (IS_MPC(ch))
  653. fsm_deltimer(&ch->sweep_timer);
  654. fsm_newstate(fi, state);
  655. if (state == CTC_STATE_STOPPED && ch->trans_skb != NULL) {
  656. clear_normalized_cda(&ch->ccw[1]);
  657. dev_kfree_skb_any(ch->trans_skb);
  658. ch->trans_skb = NULL;
  659. }
  660. ch->th_seg = 0x00;
  661. ch->th_seq_num = 0x00;
  662. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  663. skb_queue_purge(&ch->io_queue);
  664. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  665. } else {
  666. ctcm_purge_skb_queue(&ch->io_queue);
  667. if (IS_MPC(ch))
  668. ctcm_purge_skb_queue(&ch->sweep_queue);
  669. spin_lock(&ch->collect_lock);
  670. ctcm_purge_skb_queue(&ch->collect_queue);
  671. ch->collect_len = 0;
  672. spin_unlock(&ch->collect_lock);
  673. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  674. }
  675. }
  676. /**
  677. * A channel has successfully been halted.
  678. * Cleanup it's queue and notify interface statemachine.
  679. *
  680. * fi An instance of a channel statemachine.
  681. * event The event, just happened.
  682. * arg Generic pointer, casted from channel * upon call.
  683. */
  684. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg)
  685. {
  686. ctcm_chx_cleanup(fi, CTC_STATE_STOPPED, arg);
  687. }
  688. /**
  689. * A stop command from device statemachine arrived and we are in
  690. * not operational mode. Set state to stopped.
  691. *
  692. * fi An instance of a channel statemachine.
  693. * event The event, just happened.
  694. * arg Generic pointer, casted from channel * upon call.
  695. */
  696. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg)
  697. {
  698. fsm_newstate(fi, CTC_STATE_STOPPED);
  699. }
  700. /**
  701. * A machine check for no path, not operational status or gone device has
  702. * happened.
  703. * Cleanup queue and notify interface statemachine.
  704. *
  705. * fi An instance of a channel statemachine.
  706. * event The event, just happened.
  707. * arg Generic pointer, casted from channel * upon call.
  708. */
  709. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg)
  710. {
  711. ctcm_chx_cleanup(fi, CTC_STATE_NOTOP, arg);
  712. }
  713. /**
  714. * Handle error during setup of channel.
  715. *
  716. * fi An instance of a channel statemachine.
  717. * event The event, just happened.
  718. * arg Generic pointer, casted from channel * upon call.
  719. */
  720. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
  721. {
  722. struct channel *ch = arg;
  723. struct net_device *dev = ch->netdev;
  724. struct ctcm_priv *priv = dev->ml_priv;
  725. /*
  726. * Special case: Got UC_RCRESET on setmode.
  727. * This means that remote side isn't setup. In this case
  728. * simply retry after some 10 secs...
  729. */
  730. if ((fsm_getstate(fi) == CTC_STATE_SETUPWAIT) &&
  731. ((event == CTC_EVENT_UC_RCRESET) ||
  732. (event == CTC_EVENT_UC_RSRESET))) {
  733. fsm_newstate(fi, CTC_STATE_STARTRETRY);
  734. fsm_deltimer(&ch->timer);
  735. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  736. if (!IS_MPC(ch) && (CHANNEL_DIRECTION(ch->flags) == READ)) {
  737. int rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  738. if (rc != 0)
  739. ctcm_ccw_check_rc(ch, rc,
  740. "HaltIO in chx_setuperr");
  741. }
  742. return;
  743. }
  744. CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
  745. "%s(%s) : %s error during %s channel setup state=%s\n",
  746. CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
  747. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX",
  748. fsm_getstate_str(fi));
  749. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  750. fsm_newstate(fi, CTC_STATE_RXERR);
  751. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  752. } else {
  753. fsm_newstate(fi, CTC_STATE_TXERR);
  754. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  755. }
  756. }
  757. /**
  758. * Restart a channel after an error.
  759. *
  760. * fi An instance of a channel statemachine.
  761. * event The event, just happened.
  762. * arg Generic pointer, casted from channel * upon call.
  763. */
  764. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg)
  765. {
  766. struct channel *ch = arg;
  767. struct net_device *dev = ch->netdev;
  768. unsigned long saveflags = 0;
  769. int oldstate;
  770. int rc;
  771. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  772. "%s: %s[%d] of %s\n",
  773. CTCM_FUNTAIL, ch->id, event, dev->name);
  774. fsm_deltimer(&ch->timer);
  775. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  776. oldstate = fsm_getstate(fi);
  777. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  778. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  779. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  780. /* Such conditional locking is a known problem for
  781. * sparse because its undeterministic in static view.
  782. * Warnings should be ignored here. */
  783. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  784. if (event == CTC_EVENT_TIMER)
  785. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  786. if (rc != 0) {
  787. if (rc != -EBUSY) {
  788. fsm_deltimer(&ch->timer);
  789. fsm_newstate(fi, oldstate);
  790. }
  791. ctcm_ccw_check_rc(ch, rc, "HaltIO in ctcm_chx_restart");
  792. }
  793. }
  794. /**
  795. * Handle error during RX initial handshake (exchange of
  796. * 0-length block header)
  797. *
  798. * fi An instance of a channel statemachine.
  799. * event The event, just happened.
  800. * arg Generic pointer, casted from channel * upon call.
  801. */
  802. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg)
  803. {
  804. struct channel *ch = arg;
  805. struct net_device *dev = ch->netdev;
  806. struct ctcm_priv *priv = dev->ml_priv;
  807. if (event == CTC_EVENT_TIMER) {
  808. if (!IS_MPCDEV(dev))
  809. /* TODO : check if MPC deletes timer somewhere */
  810. fsm_deltimer(&ch->timer);
  811. if (ch->retry++ < 3)
  812. ctcm_chx_restart(fi, event, arg);
  813. else {
  814. fsm_newstate(fi, CTC_STATE_RXERR);
  815. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  816. }
  817. } else {
  818. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  819. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  820. ctc_ch_event_names[event], fsm_getstate_str(fi));
  821. dev_warn(&dev->dev,
  822. "Initialization failed with RX/TX init handshake "
  823. "error %s\n", ctc_ch_event_names[event]);
  824. }
  825. }
  826. /**
  827. * Notify device statemachine if we gave up initialization
  828. * of RX channel.
  829. *
  830. * fi An instance of a channel statemachine.
  831. * event The event, just happened.
  832. * arg Generic pointer, casted from channel * upon call.
  833. */
  834. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg)
  835. {
  836. struct channel *ch = arg;
  837. struct net_device *dev = ch->netdev;
  838. struct ctcm_priv *priv = dev->ml_priv;
  839. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  840. "%s(%s): RX %s busy, init. fail",
  841. CTCM_FUNTAIL, dev->name, ch->id);
  842. fsm_newstate(fi, CTC_STATE_RXERR);
  843. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  844. }
  845. /**
  846. * Handle RX Unit check remote reset (remote disconnected)
  847. *
  848. * fi An instance of a channel statemachine.
  849. * event The event, just happened.
  850. * arg Generic pointer, casted from channel * upon call.
  851. */
  852. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
  853. {
  854. struct channel *ch = arg;
  855. struct channel *ch2;
  856. struct net_device *dev = ch->netdev;
  857. struct ctcm_priv *priv = dev->ml_priv;
  858. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  859. "%s: %s: remote disconnect - re-init ...",
  860. CTCM_FUNTAIL, dev->name);
  861. fsm_deltimer(&ch->timer);
  862. /*
  863. * Notify device statemachine
  864. */
  865. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  866. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  867. fsm_newstate(fi, CTC_STATE_DTERM);
  868. ch2 = priv->channel[WRITE];
  869. fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
  870. ccw_device_halt(ch->cdev, (unsigned long)ch);
  871. ccw_device_halt(ch2->cdev, (unsigned long)ch2);
  872. }
  873. /**
  874. * Handle error during TX channel initialization.
  875. *
  876. * fi An instance of a channel statemachine.
  877. * event The event, just happened.
  878. * arg Generic pointer, casted from channel * upon call.
  879. */
  880. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg)
  881. {
  882. struct channel *ch = arg;
  883. struct net_device *dev = ch->netdev;
  884. struct ctcm_priv *priv = dev->ml_priv;
  885. if (event == CTC_EVENT_TIMER) {
  886. fsm_deltimer(&ch->timer);
  887. if (ch->retry++ < 3)
  888. ctcm_chx_restart(fi, event, arg);
  889. else {
  890. fsm_newstate(fi, CTC_STATE_TXERR);
  891. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  892. }
  893. } else {
  894. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  895. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  896. ctc_ch_event_names[event], fsm_getstate_str(fi));
  897. dev_warn(&dev->dev,
  898. "Initialization failed with RX/TX init handshake "
  899. "error %s\n", ctc_ch_event_names[event]);
  900. }
  901. }
  902. /**
  903. * Handle TX timeout by retrying operation.
  904. *
  905. * fi An instance of a channel statemachine.
  906. * event The event, just happened.
  907. * arg Generic pointer, casted from channel * upon call.
  908. */
  909. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg)
  910. {
  911. struct channel *ch = arg;
  912. struct net_device *dev = ch->netdev;
  913. struct ctcm_priv *priv = dev->ml_priv;
  914. struct sk_buff *skb;
  915. CTCM_PR_DEBUG("Enter: %s: cp=%i ch=0x%p id=%s\n",
  916. __func__, smp_processor_id(), ch, ch->id);
  917. fsm_deltimer(&ch->timer);
  918. if (ch->retry++ > 3) {
  919. struct mpc_group *gptr = priv->mpcg;
  920. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  921. "%s: %s: retries exceeded",
  922. CTCM_FUNTAIL, ch->id);
  923. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  924. /* call restart if not MPC or if MPC and mpcg fsm is ready.
  925. use gptr as mpc indicator */
  926. if (!(gptr && (fsm_getstate(gptr->fsm) != MPCG_STATE_READY)))
  927. ctcm_chx_restart(fi, event, arg);
  928. goto done;
  929. }
  930. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  931. "%s : %s: retry %d",
  932. CTCM_FUNTAIL, ch->id, ch->retry);
  933. skb = skb_peek(&ch->io_queue);
  934. if (skb) {
  935. int rc = 0;
  936. unsigned long saveflags = 0;
  937. clear_normalized_cda(&ch->ccw[4]);
  938. ch->ccw[4].count = skb->len;
  939. if (set_normalized_cda(&ch->ccw[4], skb->data)) {
  940. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  941. "%s: %s: IDAL alloc failed",
  942. CTCM_FUNTAIL, ch->id);
  943. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  944. ctcm_chx_restart(fi, event, arg);
  945. goto done;
  946. }
  947. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  948. if (event == CTC_EVENT_TIMER) /* for TIMER not yet locked */
  949. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  950. /* Such conditional locking is a known problem for
  951. * sparse because its undeterministic in static view.
  952. * Warnings should be ignored here. */
  953. if (do_debug_ccw)
  954. ctcmpc_dumpit((char *)&ch->ccw[3],
  955. sizeof(struct ccw1) * 3);
  956. rc = ccw_device_start(ch->cdev, &ch->ccw[3],
  957. (unsigned long)ch, 0xff, 0);
  958. if (event == CTC_EVENT_TIMER)
  959. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev),
  960. saveflags);
  961. if (rc != 0) {
  962. fsm_deltimer(&ch->timer);
  963. ctcm_ccw_check_rc(ch, rc, "TX in chx_txretry");
  964. ctcm_purge_skb_queue(&ch->io_queue);
  965. }
  966. }
  967. done:
  968. return;
  969. }
  970. /**
  971. * Handle fatal errors during an I/O command.
  972. *
  973. * fi An instance of a channel statemachine.
  974. * event The event, just happened.
  975. * arg Generic pointer, casted from channel * upon call.
  976. */
  977. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
  978. {
  979. struct channel *ch = arg;
  980. struct net_device *dev = ch->netdev;
  981. struct ctcm_priv *priv = dev->ml_priv;
  982. int rd = CHANNEL_DIRECTION(ch->flags);
  983. fsm_deltimer(&ch->timer);
  984. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  985. "%s: %s: %s unrecoverable channel error",
  986. CTCM_FUNTAIL, ch->id, rd == READ ? "RX" : "TX");
  987. if (IS_MPC(ch)) {
  988. priv->stats.tx_dropped++;
  989. priv->stats.tx_errors++;
  990. }
  991. if (rd == READ) {
  992. fsm_newstate(fi, CTC_STATE_RXERR);
  993. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  994. } else {
  995. fsm_newstate(fi, CTC_STATE_TXERR);
  996. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  997. }
  998. }
  999. /*
  1000. * The ctcm statemachine for a channel.
  1001. */
  1002. const fsm_node ch_fsm[] = {
  1003. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1004. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1005. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1006. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1007. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1008. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1009. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1010. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1011. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1012. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1013. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1014. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1015. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1016. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1017. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1018. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1019. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1020. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1021. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1022. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1023. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1024. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, chx_firstio },
  1025. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1026. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1027. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1028. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1029. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1030. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1031. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1032. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, chx_rxidle },
  1033. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1034. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1035. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1036. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1037. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1038. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, chx_firstio },
  1039. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1040. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1041. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1042. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, chx_rx },
  1043. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1044. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1045. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1046. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, chx_rx },
  1047. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1048. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1049. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1050. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1051. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1052. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1053. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1054. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1055. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1056. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1057. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, chx_firstio },
  1058. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1059. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1060. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1061. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1062. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1063. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1064. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1065. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1066. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1067. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1068. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1069. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1070. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1071. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1072. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1073. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1074. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1075. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1076. { CTC_STATE_TX, CTC_EVENT_FINSTAT, chx_txdone },
  1077. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_txretry },
  1078. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_txretry },
  1079. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1080. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1081. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1082. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1083. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1084. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1085. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1086. };
  1087. int ch_fsm_len = ARRAY_SIZE(ch_fsm);
  1088. /*
  1089. * MPC actions for mpc channel statemachine
  1090. * handling of MPC protocol requires extra
  1091. * statemachine and actions which are prefixed ctcmpc_ .
  1092. * The ctc_ch_states and ctc_ch_state_names,
  1093. * ctc_ch_events and ctc_ch_event_names share the ctcm definitions
  1094. * which are expanded by some elements.
  1095. */
  1096. /*
  1097. * Actions for mpc channel statemachine.
  1098. */
  1099. /**
  1100. * Normal data has been send. Free the corresponding
  1101. * skb (it's in io_queue), reset dev->tbusy and
  1102. * revert to idle state.
  1103. *
  1104. * fi An instance of a channel statemachine.
  1105. * event The event, just happened.
  1106. * arg Generic pointer, casted from channel * upon call.
  1107. */
  1108. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg)
  1109. {
  1110. struct channel *ch = arg;
  1111. struct net_device *dev = ch->netdev;
  1112. struct ctcm_priv *priv = dev->ml_priv;
  1113. struct mpc_group *grp = priv->mpcg;
  1114. struct sk_buff *skb;
  1115. int first = 1;
  1116. int i;
  1117. __u32 data_space;
  1118. unsigned long duration;
  1119. struct sk_buff *peekskb;
  1120. int rc;
  1121. struct th_header *header;
  1122. struct pdu *p_header;
  1123. struct timespec done_stamp = current_kernel_time(); /* xtime */
  1124. CTCM_PR_DEBUG("Enter %s: %s cp:%i\n",
  1125. __func__, dev->name, smp_processor_id());
  1126. duration =
  1127. (done_stamp.tv_sec - ch->prof.send_stamp.tv_sec) * 1000000 +
  1128. (done_stamp.tv_nsec - ch->prof.send_stamp.tv_nsec) / 1000;
  1129. if (duration > ch->prof.tx_time)
  1130. ch->prof.tx_time = duration;
  1131. if (ch->irb->scsw.cmd.count != 0)
  1132. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
  1133. "%s(%s): TX not complete, remaining %d bytes",
  1134. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  1135. fsm_deltimer(&ch->timer);
  1136. while ((skb = skb_dequeue(&ch->io_queue))) {
  1137. priv->stats.tx_packets++;
  1138. priv->stats.tx_bytes += skb->len - TH_HEADER_LENGTH;
  1139. if (first) {
  1140. priv->stats.tx_bytes += 2;
  1141. first = 0;
  1142. }
  1143. atomic_dec(&skb->users);
  1144. dev_kfree_skb_irq(skb);
  1145. }
  1146. spin_lock(&ch->collect_lock);
  1147. clear_normalized_cda(&ch->ccw[4]);
  1148. if ((ch->collect_len <= 0) || (grp->in_sweep != 0)) {
  1149. spin_unlock(&ch->collect_lock);
  1150. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1151. goto done;
  1152. }
  1153. if (ctcm_checkalloc_buffer(ch)) {
  1154. spin_unlock(&ch->collect_lock);
  1155. goto done;
  1156. }
  1157. ch->trans_skb->data = ch->trans_skb_data;
  1158. skb_reset_tail_pointer(ch->trans_skb);
  1159. ch->trans_skb->len = 0;
  1160. if (ch->prof.maxmulti < (ch->collect_len + TH_HEADER_LENGTH))
  1161. ch->prof.maxmulti = ch->collect_len + TH_HEADER_LENGTH;
  1162. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  1163. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  1164. i = 0;
  1165. p_header = NULL;
  1166. data_space = grp->group_max_buflen - TH_HEADER_LENGTH;
  1167. CTCM_PR_DBGDATA("%s: building trans_skb from collect_q"
  1168. " data_space:%04x\n",
  1169. __func__, data_space);
  1170. while ((skb = skb_dequeue(&ch->collect_queue))) {
  1171. memcpy(skb_put(ch->trans_skb, skb->len), skb->data, skb->len);
  1172. p_header = (struct pdu *)
  1173. (skb_tail_pointer(ch->trans_skb) - skb->len);
  1174. p_header->pdu_flag = 0x00;
  1175. if (skb->protocol == ntohs(ETH_P_SNAP))
  1176. p_header->pdu_flag |= 0x60;
  1177. else
  1178. p_header->pdu_flag |= 0x20;
  1179. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1180. __func__, ch->trans_skb->len);
  1181. CTCM_PR_DBGDATA("%s: pdu header and data for up"
  1182. " to 32 bytes sent to vtam\n", __func__);
  1183. CTCM_D3_DUMP((char *)p_header, min_t(int, skb->len, 32));
  1184. ch->collect_len -= skb->len;
  1185. data_space -= skb->len;
  1186. priv->stats.tx_packets++;
  1187. priv->stats.tx_bytes += skb->len;
  1188. atomic_dec(&skb->users);
  1189. dev_kfree_skb_any(skb);
  1190. peekskb = skb_peek(&ch->collect_queue);
  1191. if (peekskb->len > data_space)
  1192. break;
  1193. i++;
  1194. }
  1195. /* p_header points to the last one we handled */
  1196. if (p_header)
  1197. p_header->pdu_flag |= PDU_LAST; /*Say it's the last one*/
  1198. header = kzalloc(TH_HEADER_LENGTH, gfp_type());
  1199. if (!header) {
  1200. spin_unlock(&ch->collect_lock);
  1201. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1202. goto done;
  1203. }
  1204. header->th_ch_flag = TH_HAS_PDU; /* Normal data */
  1205. ch->th_seq_num++;
  1206. header->th_seq_num = ch->th_seq_num;
  1207. CTCM_PR_DBGDATA("%s: ToVTAM_th_seq= %08x\n" ,
  1208. __func__, ch->th_seq_num);
  1209. memcpy(skb_push(ch->trans_skb, TH_HEADER_LENGTH), header,
  1210. TH_HEADER_LENGTH); /* put the TH on the packet */
  1211. kfree(header);
  1212. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1213. __func__, ch->trans_skb->len);
  1214. CTCM_PR_DBGDATA("%s: up-to-50 bytes of trans_skb "
  1215. "data to vtam from collect_q\n", __func__);
  1216. CTCM_D3_DUMP((char *)ch->trans_skb->data,
  1217. min_t(int, ch->trans_skb->len, 50));
  1218. spin_unlock(&ch->collect_lock);
  1219. clear_normalized_cda(&ch->ccw[1]);
  1220. if (set_normalized_cda(&ch->ccw[1], ch->trans_skb->data)) {
  1221. dev_kfree_skb_any(ch->trans_skb);
  1222. ch->trans_skb = NULL;
  1223. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_ERROR,
  1224. "%s: %s: IDAL alloc failed",
  1225. CTCM_FUNTAIL, ch->id);
  1226. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1227. return;
  1228. }
  1229. ch->ccw[1].count = ch->trans_skb->len;
  1230. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  1231. ch->prof.send_stamp = current_kernel_time(); /* xtime */
  1232. if (do_debug_ccw)
  1233. ctcmpc_dumpit((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1234. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1235. (unsigned long)ch, 0xff, 0);
  1236. ch->prof.doios_multi++;
  1237. if (rc != 0) {
  1238. priv->stats.tx_dropped += i;
  1239. priv->stats.tx_errors += i;
  1240. fsm_deltimer(&ch->timer);
  1241. ctcm_ccw_check_rc(ch, rc, "chained TX");
  1242. }
  1243. done:
  1244. ctcm_clear_busy(dev);
  1245. return;
  1246. }
  1247. /**
  1248. * Got normal data, check for sanity, queue it up, allocate new buffer
  1249. * trigger bottom half, and initiate next read.
  1250. *
  1251. * fi An instance of a channel statemachine.
  1252. * event The event, just happened.
  1253. * arg Generic pointer, casted from channel * upon call.
  1254. */
  1255. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg)
  1256. {
  1257. struct channel *ch = arg;
  1258. struct net_device *dev = ch->netdev;
  1259. struct ctcm_priv *priv = dev->ml_priv;
  1260. struct mpc_group *grp = priv->mpcg;
  1261. struct sk_buff *skb = ch->trans_skb;
  1262. struct sk_buff *new_skb;
  1263. unsigned long saveflags = 0; /* avoids compiler warning */
  1264. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  1265. CTCM_PR_DEBUG("%s: %s: cp:%i %s maxbuf : %04x, len: %04x\n",
  1266. CTCM_FUNTAIL, dev->name, smp_processor_id(),
  1267. ch->id, ch->max_bufsize, len);
  1268. fsm_deltimer(&ch->timer);
  1269. if (skb == NULL) {
  1270. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1271. "%s(%s): TRANS_SKB = NULL",
  1272. CTCM_FUNTAIL, dev->name);
  1273. goto again;
  1274. }
  1275. if (len < TH_HEADER_LENGTH) {
  1276. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1277. "%s(%s): packet length %d to short",
  1278. CTCM_FUNTAIL, dev->name, len);
  1279. priv->stats.rx_dropped++;
  1280. priv->stats.rx_length_errors++;
  1281. } else {
  1282. /* must have valid th header or game over */
  1283. __u32 block_len = len;
  1284. len = TH_HEADER_LENGTH + XID2_LENGTH + 4;
  1285. new_skb = __dev_alloc_skb(ch->max_bufsize, GFP_ATOMIC);
  1286. if (new_skb == NULL) {
  1287. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1288. "%s(%d): skb allocation failed",
  1289. CTCM_FUNTAIL, dev->name);
  1290. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1291. goto again;
  1292. }
  1293. switch (fsm_getstate(grp->fsm)) {
  1294. case MPCG_STATE_RESET:
  1295. case MPCG_STATE_INOP:
  1296. dev_kfree_skb_any(new_skb);
  1297. break;
  1298. case MPCG_STATE_FLOWC:
  1299. case MPCG_STATE_READY:
  1300. memcpy(skb_put(new_skb, block_len),
  1301. skb->data, block_len);
  1302. skb_queue_tail(&ch->io_queue, new_skb);
  1303. tasklet_schedule(&ch->ch_tasklet);
  1304. break;
  1305. default:
  1306. memcpy(skb_put(new_skb, len), skb->data, len);
  1307. skb_queue_tail(&ch->io_queue, new_skb);
  1308. tasklet_hi_schedule(&ch->ch_tasklet);
  1309. break;
  1310. }
  1311. }
  1312. again:
  1313. switch (fsm_getstate(grp->fsm)) {
  1314. int rc, dolock;
  1315. case MPCG_STATE_FLOWC:
  1316. case MPCG_STATE_READY:
  1317. if (ctcm_checkalloc_buffer(ch))
  1318. break;
  1319. ch->trans_skb->data = ch->trans_skb_data;
  1320. skb_reset_tail_pointer(ch->trans_skb);
  1321. ch->trans_skb->len = 0;
  1322. ch->ccw[1].count = ch->max_bufsize;
  1323. if (do_debug_ccw)
  1324. ctcmpc_dumpit((char *)&ch->ccw[0],
  1325. sizeof(struct ccw1) * 3);
  1326. dolock = !in_irq();
  1327. if (dolock)
  1328. spin_lock_irqsave(
  1329. get_ccwdev_lock(ch->cdev), saveflags);
  1330. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1331. (unsigned long)ch, 0xff, 0);
  1332. if (dolock) /* see remark about conditional locking */
  1333. spin_unlock_irqrestore(
  1334. get_ccwdev_lock(ch->cdev), saveflags);
  1335. if (rc != 0)
  1336. ctcm_ccw_check_rc(ch, rc, "normal RX");
  1337. default:
  1338. break;
  1339. }
  1340. CTCM_PR_DEBUG("Exit %s: %s, ch=0x%p, id=%s\n",
  1341. __func__, dev->name, ch, ch->id);
  1342. }
  1343. /**
  1344. * Initialize connection by sending a __u16 of value 0.
  1345. *
  1346. * fi An instance of a channel statemachine.
  1347. * event The event, just happened.
  1348. * arg Generic pointer, casted from channel * upon call.
  1349. */
  1350. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
  1351. {
  1352. struct channel *ch = arg;
  1353. struct net_device *dev = ch->netdev;
  1354. struct ctcm_priv *priv = dev->ml_priv;
  1355. struct mpc_group *gptr = priv->mpcg;
  1356. CTCM_PR_DEBUG("Enter %s: id=%s, ch=0x%p\n",
  1357. __func__, ch->id, ch);
  1358. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_INFO,
  1359. "%s: %s: chstate:%i, grpstate:%i, prot:%i\n",
  1360. CTCM_FUNTAIL, ch->id, fsm_getstate(fi),
  1361. fsm_getstate(gptr->fsm), ch->protocol);
  1362. if (fsm_getstate(fi) == CTC_STATE_TXIDLE)
  1363. MPC_DBF_DEV_NAME(TRACE, dev, "remote side issued READ? ");
  1364. fsm_deltimer(&ch->timer);
  1365. if (ctcm_checkalloc_buffer(ch))
  1366. goto done;
  1367. switch (fsm_getstate(fi)) {
  1368. case CTC_STATE_STARTRETRY:
  1369. case CTC_STATE_SETUPWAIT:
  1370. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  1371. ctcmpc_chx_rxidle(fi, event, arg);
  1372. } else {
  1373. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1374. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  1375. }
  1376. goto done;
  1377. default:
  1378. break;
  1379. };
  1380. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == READ)
  1381. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  1382. done:
  1383. CTCM_PR_DEBUG("Exit %s: id=%s, ch=0x%p\n",
  1384. __func__, ch->id, ch);
  1385. return;
  1386. }
  1387. /**
  1388. * Got initial data, check it. If OK,
  1389. * notify device statemachine that we are up and
  1390. * running.
  1391. *
  1392. * fi An instance of a channel statemachine.
  1393. * event The event, just happened.
  1394. * arg Generic pointer, casted from channel * upon call.
  1395. */
  1396. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg)
  1397. {
  1398. struct channel *ch = arg;
  1399. struct net_device *dev = ch->netdev;
  1400. struct ctcm_priv *priv = dev->ml_priv;
  1401. struct mpc_group *grp = priv->mpcg;
  1402. int rc;
  1403. unsigned long saveflags = 0; /* avoids compiler warning */
  1404. fsm_deltimer(&ch->timer);
  1405. CTCM_PR_DEBUG("%s: %s: %s: cp:%i, chstate:%i grpstate:%i\n",
  1406. __func__, ch->id, dev->name, smp_processor_id(),
  1407. fsm_getstate(fi), fsm_getstate(grp->fsm));
  1408. fsm_newstate(fi, CTC_STATE_RXIDLE);
  1409. /* XID processing complete */
  1410. switch (fsm_getstate(grp->fsm)) {
  1411. case MPCG_STATE_FLOWC:
  1412. case MPCG_STATE_READY:
  1413. if (ctcm_checkalloc_buffer(ch))
  1414. goto done;
  1415. ch->trans_skb->data = ch->trans_skb_data;
  1416. skb_reset_tail_pointer(ch->trans_skb);
  1417. ch->trans_skb->len = 0;
  1418. ch->ccw[1].count = ch->max_bufsize;
  1419. CTCM_CCW_DUMP((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1420. if (event == CTC_EVENT_START)
  1421. /* see remark about conditional locking */
  1422. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  1423. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1424. (unsigned long)ch, 0xff, 0);
  1425. if (event == CTC_EVENT_START)
  1426. spin_unlock_irqrestore(
  1427. get_ccwdev_lock(ch->cdev), saveflags);
  1428. if (rc != 0) {
  1429. fsm_newstate(fi, CTC_STATE_RXINIT);
  1430. ctcm_ccw_check_rc(ch, rc, "initial RX");
  1431. goto done;
  1432. }
  1433. break;
  1434. default:
  1435. break;
  1436. }
  1437. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  1438. done:
  1439. return;
  1440. }
  1441. /*
  1442. * ctcmpc channel FSM action
  1443. * called from several points in ctcmpc_ch_fsm
  1444. * ctcmpc only
  1445. */
  1446. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg)
  1447. {
  1448. struct channel *ch = arg;
  1449. struct net_device *dev = ch->netdev;
  1450. struct ctcm_priv *priv = dev->ml_priv;
  1451. struct mpc_group *grp = priv->mpcg;
  1452. CTCM_PR_DEBUG("%s(%s): %s(ch=0x%p), cp=%i, ChStat:%s, GrpStat:%s\n",
  1453. __func__, dev->name, ch->id, ch, smp_processor_id(),
  1454. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1455. switch (fsm_getstate(grp->fsm)) {
  1456. case MPCG_STATE_XID2INITW:
  1457. /* ok..start yside xid exchanges */
  1458. if (!ch->in_mpcgroup)
  1459. break;
  1460. if (fsm_getstate(ch->fsm) == CH_XID0_PENDING) {
  1461. fsm_deltimer(&grp->timer);
  1462. fsm_addtimer(&grp->timer,
  1463. MPC_XID_TIMEOUT_VALUE,
  1464. MPCG_EVENT_TIMER, dev);
  1465. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1466. } else if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1467. /* attn rcvd before xid0 processed via bh */
  1468. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1469. break;
  1470. case MPCG_STATE_XID2INITX:
  1471. case MPCG_STATE_XID0IOWAIT:
  1472. case MPCG_STATE_XID0IOWAIX:
  1473. /* attn rcvd before xid0 processed on ch
  1474. but mid-xid0 processing for group */
  1475. if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1476. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1477. break;
  1478. case MPCG_STATE_XID7INITW:
  1479. case MPCG_STATE_XID7INITX:
  1480. case MPCG_STATE_XID7INITI:
  1481. case MPCG_STATE_XID7INITZ:
  1482. switch (fsm_getstate(ch->fsm)) {
  1483. case CH_XID7_PENDING:
  1484. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1485. break;
  1486. case CH_XID7_PENDING2:
  1487. fsm_newstate(ch->fsm, CH_XID7_PENDING3);
  1488. break;
  1489. }
  1490. fsm_event(grp->fsm, MPCG_EVENT_XID7DONE, dev);
  1491. break;
  1492. }
  1493. return;
  1494. }
  1495. /*
  1496. * ctcmpc channel FSM action
  1497. * called from one point in ctcmpc_ch_fsm
  1498. * ctcmpc only
  1499. */
  1500. static void ctcmpc_chx_attnbusy(fsm_instance *fsm, int event, void *arg)
  1501. {
  1502. struct channel *ch = arg;
  1503. struct net_device *dev = ch->netdev;
  1504. struct ctcm_priv *priv = dev->ml_priv;
  1505. struct mpc_group *grp = priv->mpcg;
  1506. CTCM_PR_DEBUG("%s(%s): %s\n ChState:%s GrpState:%s\n",
  1507. __func__, dev->name, ch->id,
  1508. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1509. fsm_deltimer(&ch->timer);
  1510. switch (fsm_getstate(grp->fsm)) {
  1511. case MPCG_STATE_XID0IOWAIT:
  1512. /* vtam wants to be primary.start yside xid exchanges*/
  1513. /* only receive one attn-busy at a time so must not */
  1514. /* change state each time */
  1515. grp->changed_side = 1;
  1516. fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
  1517. break;
  1518. case MPCG_STATE_XID2INITW:
  1519. if (grp->changed_side == 1) {
  1520. grp->changed_side = 2;
  1521. break;
  1522. }
  1523. /* process began via call to establish_conn */
  1524. /* so must report failure instead of reverting */
  1525. /* back to ready-for-xid passive state */
  1526. if (grp->estconnfunc)
  1527. goto done;
  1528. /* this attnbusy is NOT the result of xside xid */
  1529. /* collisions so yside must have been triggered */
  1530. /* by an ATTN that was not intended to start XID */
  1531. /* processing. Revert back to ready-for-xid and */
  1532. /* wait for ATTN interrupt to signal xid start */
  1533. if (fsm_getstate(ch->fsm) == CH_XID0_INPROGRESS) {
  1534. fsm_newstate(ch->fsm, CH_XID0_PENDING) ;
  1535. fsm_deltimer(&grp->timer);
  1536. goto done;
  1537. }
  1538. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1539. goto done;
  1540. case MPCG_STATE_XID2INITX:
  1541. /* XID2 was received before ATTN Busy for second
  1542. channel.Send yside xid for second channel.
  1543. */
  1544. if (grp->changed_side == 1) {
  1545. grp->changed_side = 2;
  1546. break;
  1547. }
  1548. case MPCG_STATE_XID0IOWAIX:
  1549. case MPCG_STATE_XID7INITW:
  1550. case MPCG_STATE_XID7INITX:
  1551. case MPCG_STATE_XID7INITI:
  1552. case MPCG_STATE_XID7INITZ:
  1553. default:
  1554. /* multiple attn-busy indicates too out-of-sync */
  1555. /* and they are certainly not being received as part */
  1556. /* of valid mpc group negotiations.. */
  1557. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1558. goto done;
  1559. }
  1560. if (grp->changed_side == 1) {
  1561. fsm_deltimer(&grp->timer);
  1562. fsm_addtimer(&grp->timer, MPC_XID_TIMEOUT_VALUE,
  1563. MPCG_EVENT_TIMER, dev);
  1564. }
  1565. if (ch->in_mpcgroup)
  1566. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1567. else
  1568. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1569. "%s(%s): channel %s not added to group",
  1570. CTCM_FUNTAIL, dev->name, ch->id);
  1571. done:
  1572. return;
  1573. }
  1574. /*
  1575. * ctcmpc channel FSM action
  1576. * called from several points in ctcmpc_ch_fsm
  1577. * ctcmpc only
  1578. */
  1579. static void ctcmpc_chx_resend(fsm_instance *fsm, int event, void *arg)
  1580. {
  1581. struct channel *ch = arg;
  1582. struct net_device *dev = ch->netdev;
  1583. struct ctcm_priv *priv = dev->ml_priv;
  1584. struct mpc_group *grp = priv->mpcg;
  1585. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1586. return;
  1587. }
  1588. /*
  1589. * ctcmpc channel FSM action
  1590. * called from several points in ctcmpc_ch_fsm
  1591. * ctcmpc only
  1592. */
  1593. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
  1594. {
  1595. struct channel *ach = arg;
  1596. struct net_device *dev = ach->netdev;
  1597. struct ctcm_priv *priv = dev->ml_priv;
  1598. struct mpc_group *grp = priv->mpcg;
  1599. struct channel *wch = priv->channel[WRITE];
  1600. struct channel *rch = priv->channel[READ];
  1601. struct sk_buff *skb;
  1602. struct th_sweep *header;
  1603. int rc = 0;
  1604. unsigned long saveflags = 0;
  1605. CTCM_PR_DEBUG("ctcmpc enter: %s(): cp=%i ch=0x%p id=%s\n",
  1606. __func__, smp_processor_id(), ach, ach->id);
  1607. if (grp->in_sweep == 0)
  1608. goto done;
  1609. CTCM_PR_DBGDATA("%s: 1: ToVTAM_th_seq= %08x\n" ,
  1610. __func__, wch->th_seq_num);
  1611. CTCM_PR_DBGDATA("%s: 1: FromVTAM_th_seq= %08x\n" ,
  1612. __func__, rch->th_seq_num);
  1613. if (fsm_getstate(wch->fsm) != CTC_STATE_TXIDLE) {
  1614. /* give the previous IO time to complete */
  1615. fsm_addtimer(&wch->sweep_timer,
  1616. 200, CTC_EVENT_RSWEEP_TIMER, wch);
  1617. goto done;
  1618. }
  1619. skb = skb_dequeue(&wch->sweep_queue);
  1620. if (!skb)
  1621. goto done;
  1622. if (set_normalized_cda(&wch->ccw[4], skb->data)) {
  1623. grp->in_sweep = 0;
  1624. ctcm_clear_busy_do(dev);
  1625. dev_kfree_skb_any(skb);
  1626. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1627. goto done;
  1628. } else {
  1629. atomic_inc(&skb->users);
  1630. skb_queue_tail(&wch->io_queue, skb);
  1631. }
  1632. /* send out the sweep */
  1633. wch->ccw[4].count = skb->len;
  1634. header = (struct th_sweep *)skb->data;
  1635. switch (header->th.th_ch_flag) {
  1636. case TH_SWEEP_REQ:
  1637. grp->sweep_req_pend_num--;
  1638. break;
  1639. case TH_SWEEP_RESP:
  1640. grp->sweep_rsp_pend_num--;
  1641. break;
  1642. }
  1643. header->sw.th_last_seq = wch->th_seq_num;
  1644. CTCM_CCW_DUMP((char *)&wch->ccw[3], sizeof(struct ccw1) * 3);
  1645. CTCM_PR_DBGDATA("%s: sweep packet\n", __func__);
  1646. CTCM_D3_DUMP((char *)header, TH_SWEEP_LENGTH);
  1647. fsm_addtimer(&wch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, wch);
  1648. fsm_newstate(wch->fsm, CTC_STATE_TX);
  1649. spin_lock_irqsave(get_ccwdev_lock(wch->cdev), saveflags);
  1650. wch->prof.send_stamp = current_kernel_time(); /* xtime */
  1651. rc = ccw_device_start(wch->cdev, &wch->ccw[3],
  1652. (unsigned long) wch, 0xff, 0);
  1653. spin_unlock_irqrestore(get_ccwdev_lock(wch->cdev), saveflags);
  1654. if ((grp->sweep_req_pend_num == 0) &&
  1655. (grp->sweep_rsp_pend_num == 0)) {
  1656. grp->in_sweep = 0;
  1657. rch->th_seq_num = 0x00;
  1658. wch->th_seq_num = 0x00;
  1659. ctcm_clear_busy_do(dev);
  1660. }
  1661. CTCM_PR_DBGDATA("%s: To-/From-VTAM_th_seq = %08x/%08x\n" ,
  1662. __func__, wch->th_seq_num, rch->th_seq_num);
  1663. if (rc != 0)
  1664. ctcm_ccw_check_rc(wch, rc, "send sweep");
  1665. done:
  1666. return;
  1667. }
  1668. /*
  1669. * The ctcmpc statemachine for a channel.
  1670. */
  1671. const fsm_node ctcmpc_ch_fsm[] = {
  1672. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1673. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1674. { CTC_STATE_STOPPED, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1675. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1676. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1677. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1678. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1679. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1680. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1681. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1682. { CTC_STATE_NOTOP, CTC_EVENT_UC_RCRESET, ctcm_chx_stop },
  1683. { CTC_STATE_NOTOP, CTC_EVENT_UC_RSRESET, ctcm_chx_stop },
  1684. { CTC_STATE_NOTOP, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1685. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1686. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1687. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1688. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1689. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1690. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1691. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1692. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1693. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1694. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1695. { CTC_STATE_STARTRETRY, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1696. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1697. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1698. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1699. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1700. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1701. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1702. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1703. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1704. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1705. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1706. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, ctcmpc_chx_rxidle },
  1707. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1708. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1709. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1710. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1711. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1712. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, ctcmpc_chx_firstio },
  1713. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1714. { CH_XID0_PENDING, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1715. { CH_XID0_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1716. { CH_XID0_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1717. { CH_XID0_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1718. { CH_XID0_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1719. { CH_XID0_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1720. { CH_XID0_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1721. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1722. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1723. { CH_XID0_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1724. { CH_XID0_INPROGRESS, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1725. { CH_XID0_INPROGRESS, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1726. { CH_XID0_INPROGRESS, CTC_EVENT_STOP, ctcm_chx_haltio },
  1727. { CH_XID0_INPROGRESS, CTC_EVENT_START, ctcm_action_nop },
  1728. { CH_XID0_INPROGRESS, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1729. { CH_XID0_INPROGRESS, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1730. { CH_XID0_INPROGRESS, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1731. { CH_XID0_INPROGRESS, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1732. { CH_XID0_INPROGRESS, CTC_EVENT_ATTNBUSY, ctcmpc_chx_attnbusy },
  1733. { CH_XID0_INPROGRESS, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1734. { CH_XID0_INPROGRESS, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1735. { CH_XID7_PENDING, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1736. { CH_XID7_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1737. { CH_XID7_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1738. { CH_XID7_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1739. { CH_XID7_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1740. { CH_XID7_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1741. { CH_XID7_PENDING, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1742. { CH_XID7_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1743. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1744. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1745. { CH_XID7_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1746. { CH_XID7_PENDING, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1747. { CH_XID7_PENDING, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1748. { CH_XID7_PENDING1, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1749. { CH_XID7_PENDING1, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1750. { CH_XID7_PENDING1, CTC_EVENT_STOP, ctcm_chx_haltio },
  1751. { CH_XID7_PENDING1, CTC_EVENT_START, ctcm_action_nop },
  1752. { CH_XID7_PENDING1, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1753. { CH_XID7_PENDING1, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1754. { CH_XID7_PENDING1, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1755. { CH_XID7_PENDING1, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1756. { CH_XID7_PENDING1, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1757. { CH_XID7_PENDING1, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1758. { CH_XID7_PENDING1, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1759. { CH_XID7_PENDING1, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1760. { CH_XID7_PENDING2, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1761. { CH_XID7_PENDING2, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1762. { CH_XID7_PENDING2, CTC_EVENT_STOP, ctcm_chx_haltio },
  1763. { CH_XID7_PENDING2, CTC_EVENT_START, ctcm_action_nop },
  1764. { CH_XID7_PENDING2, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1765. { CH_XID7_PENDING2, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1766. { CH_XID7_PENDING2, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1767. { CH_XID7_PENDING2, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1768. { CH_XID7_PENDING2, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1769. { CH_XID7_PENDING2, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1770. { CH_XID7_PENDING2, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1771. { CH_XID7_PENDING2, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1772. { CH_XID7_PENDING3, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1773. { CH_XID7_PENDING3, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1774. { CH_XID7_PENDING3, CTC_EVENT_STOP, ctcm_chx_haltio },
  1775. { CH_XID7_PENDING3, CTC_EVENT_START, ctcm_action_nop },
  1776. { CH_XID7_PENDING3, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1777. { CH_XID7_PENDING3, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1778. { CH_XID7_PENDING3, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1779. { CH_XID7_PENDING3, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1780. { CH_XID7_PENDING3, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1781. { CH_XID7_PENDING3, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1782. { CH_XID7_PENDING3, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1783. { CH_XID7_PENDING3, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1784. { CH_XID7_PENDING4, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1785. { CH_XID7_PENDING4, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1786. { CH_XID7_PENDING4, CTC_EVENT_STOP, ctcm_chx_haltio },
  1787. { CH_XID7_PENDING4, CTC_EVENT_START, ctcm_action_nop },
  1788. { CH_XID7_PENDING4, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1789. { CH_XID7_PENDING4, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1790. { CH_XID7_PENDING4, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1791. { CH_XID7_PENDING4, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1792. { CH_XID7_PENDING4, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1793. { CH_XID7_PENDING4, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1794. { CH_XID7_PENDING4, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1795. { CH_XID7_PENDING4, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1796. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1797. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1798. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1799. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1800. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1801. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1802. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1803. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1804. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1805. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1806. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1807. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1808. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1809. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1810. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1811. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1812. { CTC_STATE_TXINIT, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1813. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1814. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1815. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1816. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1817. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1818. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1819. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1820. { CTC_STATE_TXIDLE, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1821. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1822. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1823. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1824. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1825. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1826. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1827. { CTC_STATE_TERM, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1828. { CTC_STATE_TERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1829. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1830. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1831. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1832. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1833. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1834. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1835. { CTC_STATE_DTERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1836. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1837. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1838. { CTC_STATE_TX, CTC_EVENT_FINSTAT, ctcmpc_chx_txdone },
  1839. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1840. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1841. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1842. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1843. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1844. { CTC_STATE_TX, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1845. { CTC_STATE_TX, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1846. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1847. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1848. { CTC_STATE_TXERR, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1849. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1850. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1851. };
  1852. int mpc_ch_fsm_len = ARRAY_SIZE(ctcmpc_ch_fsm);
  1853. /*
  1854. * Actions for interface - statemachine.
  1855. */
  1856. /**
  1857. * Startup channels by sending CTC_EVENT_START to each channel.
  1858. *
  1859. * fi An instance of an interface statemachine.
  1860. * event The event, just happened.
  1861. * arg Generic pointer, casted from struct net_device * upon call.
  1862. */
  1863. static void dev_action_start(fsm_instance *fi, int event, void *arg)
  1864. {
  1865. struct net_device *dev = arg;
  1866. struct ctcm_priv *priv = dev->ml_priv;
  1867. int direction;
  1868. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1869. fsm_deltimer(&priv->restart_timer);
  1870. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1871. if (IS_MPC(priv))
  1872. priv->mpcg->channels_terminating = 0;
  1873. for (direction = READ; direction <= WRITE; direction++) {
  1874. struct channel *ch = priv->channel[direction];
  1875. fsm_event(ch->fsm, CTC_EVENT_START, ch);
  1876. }
  1877. }
  1878. /**
  1879. * Shutdown channels by sending CTC_EVENT_STOP to each channel.
  1880. *
  1881. * fi An instance of an interface statemachine.
  1882. * event The event, just happened.
  1883. * arg Generic pointer, casted from struct net_device * upon call.
  1884. */
  1885. static void dev_action_stop(fsm_instance *fi, int event, void *arg)
  1886. {
  1887. int direction;
  1888. struct net_device *dev = arg;
  1889. struct ctcm_priv *priv = dev->ml_priv;
  1890. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1891. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1892. for (direction = READ; direction <= WRITE; direction++) {
  1893. struct channel *ch = priv->channel[direction];
  1894. fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
  1895. ch->th_seq_num = 0x00;
  1896. CTCM_PR_DEBUG("%s: CH_th_seq= %08x\n",
  1897. __func__, ch->th_seq_num);
  1898. }
  1899. if (IS_MPC(priv))
  1900. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1901. }
  1902. static void dev_action_restart(fsm_instance *fi, int event, void *arg)
  1903. {
  1904. int restart_timer;
  1905. struct net_device *dev = arg;
  1906. struct ctcm_priv *priv = dev->ml_priv;
  1907. CTCMY_DBF_DEV_NAME(TRACE, dev, "");
  1908. if (IS_MPC(priv)) {
  1909. restart_timer = CTCM_TIME_1_SEC;
  1910. } else {
  1911. restart_timer = CTCM_TIME_5_SEC;
  1912. }
  1913. dev_info(&dev->dev, "Restarting device\n");
  1914. dev_action_stop(fi, event, arg);
  1915. fsm_event(priv->fsm, DEV_EVENT_STOP, dev);
  1916. if (IS_MPC(priv))
  1917. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1918. /* going back into start sequence too quickly can */
  1919. /* result in the other side becoming unreachable due */
  1920. /* to sense reported when IO is aborted */
  1921. fsm_addtimer(&priv->restart_timer, restart_timer,
  1922. DEV_EVENT_START, dev);
  1923. }
  1924. /**
  1925. * Called from channel statemachine
  1926. * when a channel is up and running.
  1927. *
  1928. * fi An instance of an interface statemachine.
  1929. * event The event, just happened.
  1930. * arg Generic pointer, casted from struct net_device * upon call.
  1931. */
  1932. static void dev_action_chup(fsm_instance *fi, int event, void *arg)
  1933. {
  1934. struct net_device *dev = arg;
  1935. struct ctcm_priv *priv = dev->ml_priv;
  1936. int dev_stat = fsm_getstate(fi);
  1937. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  1938. "%s(%s): priv = %p [%d,%d]\n ", CTCM_FUNTAIL,
  1939. dev->name, dev->ml_priv, dev_stat, event);
  1940. switch (fsm_getstate(fi)) {
  1941. case DEV_STATE_STARTWAIT_RXTX:
  1942. if (event == DEV_EVENT_RXUP)
  1943. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1944. else
  1945. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1946. break;
  1947. case DEV_STATE_STARTWAIT_RX:
  1948. if (event == DEV_EVENT_RXUP) {
  1949. fsm_newstate(fi, DEV_STATE_RUNNING);
  1950. dev_info(&dev->dev,
  1951. "Connected with remote side\n");
  1952. ctcm_clear_busy(dev);
  1953. }
  1954. break;
  1955. case DEV_STATE_STARTWAIT_TX:
  1956. if (event == DEV_EVENT_TXUP) {
  1957. fsm_newstate(fi, DEV_STATE_RUNNING);
  1958. dev_info(&dev->dev,
  1959. "Connected with remote side\n");
  1960. ctcm_clear_busy(dev);
  1961. }
  1962. break;
  1963. case DEV_STATE_STOPWAIT_TX:
  1964. if (event == DEV_EVENT_RXUP)
  1965. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1966. break;
  1967. case DEV_STATE_STOPWAIT_RX:
  1968. if (event == DEV_EVENT_TXUP)
  1969. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1970. break;
  1971. }
  1972. if (IS_MPC(priv)) {
  1973. if (event == DEV_EVENT_RXUP)
  1974. mpc_channel_action(priv->channel[READ],
  1975. READ, MPC_CHANNEL_ADD);
  1976. else
  1977. mpc_channel_action(priv->channel[WRITE],
  1978. WRITE, MPC_CHANNEL_ADD);
  1979. }
  1980. }
  1981. /**
  1982. * Called from device statemachine
  1983. * when a channel has been shutdown.
  1984. *
  1985. * fi An instance of an interface statemachine.
  1986. * event The event, just happened.
  1987. * arg Generic pointer, casted from struct net_device * upon call.
  1988. */
  1989. static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
  1990. {
  1991. struct net_device *dev = arg;
  1992. struct ctcm_priv *priv = dev->ml_priv;
  1993. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1994. switch (fsm_getstate(fi)) {
  1995. case DEV_STATE_RUNNING:
  1996. if (event == DEV_EVENT_TXDOWN)
  1997. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1998. else
  1999. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  2000. break;
  2001. case DEV_STATE_STARTWAIT_RX:
  2002. if (event == DEV_EVENT_TXDOWN)
  2003. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2004. break;
  2005. case DEV_STATE_STARTWAIT_TX:
  2006. if (event == DEV_EVENT_RXDOWN)
  2007. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2008. break;
  2009. case DEV_STATE_STOPWAIT_RXTX:
  2010. if (event == DEV_EVENT_TXDOWN)
  2011. fsm_newstate(fi, DEV_STATE_STOPWAIT_RX);
  2012. else
  2013. fsm_newstate(fi, DEV_STATE_STOPWAIT_TX);
  2014. break;
  2015. case DEV_STATE_STOPWAIT_RX:
  2016. if (event == DEV_EVENT_RXDOWN)
  2017. fsm_newstate(fi, DEV_STATE_STOPPED);
  2018. break;
  2019. case DEV_STATE_STOPWAIT_TX:
  2020. if (event == DEV_EVENT_TXDOWN)
  2021. fsm_newstate(fi, DEV_STATE_STOPPED);
  2022. break;
  2023. }
  2024. if (IS_MPC(priv)) {
  2025. if (event == DEV_EVENT_RXDOWN)
  2026. mpc_channel_action(priv->channel[READ],
  2027. READ, MPC_CHANNEL_REMOVE);
  2028. else
  2029. mpc_channel_action(priv->channel[WRITE],
  2030. WRITE, MPC_CHANNEL_REMOVE);
  2031. }
  2032. }
  2033. const fsm_node dev_fsm[] = {
  2034. { DEV_STATE_STOPPED, DEV_EVENT_START, dev_action_start },
  2035. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_START, dev_action_start },
  2036. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2037. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2038. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2039. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_START, dev_action_start },
  2040. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2041. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2042. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2043. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2044. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_START, dev_action_start },
  2045. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2046. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2047. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2048. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2049. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_STOP, dev_action_stop },
  2050. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXUP, dev_action_chup },
  2051. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXUP, dev_action_chup },
  2052. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2053. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2054. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2055. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_STOP, dev_action_stop },
  2056. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2057. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2058. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2059. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2060. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_STOP, dev_action_stop },
  2061. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2062. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2063. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2064. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2065. { DEV_STATE_RUNNING, DEV_EVENT_STOP, dev_action_stop },
  2066. { DEV_STATE_RUNNING, DEV_EVENT_RXDOWN, dev_action_chdown },
  2067. { DEV_STATE_RUNNING, DEV_EVENT_TXDOWN, dev_action_chdown },
  2068. { DEV_STATE_RUNNING, DEV_EVENT_TXUP, ctcm_action_nop },
  2069. { DEV_STATE_RUNNING, DEV_EVENT_RXUP, ctcm_action_nop },
  2070. { DEV_STATE_RUNNING, DEV_EVENT_RESTART, dev_action_restart },
  2071. };
  2072. int dev_fsm_len = ARRAY_SIZE(dev_fsm);
  2073. /* --- This is the END my friend --- */