qdio_setup.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478
  1. /*
  2. * driver/s390/cio/qdio_setup.c
  3. *
  4. * qdio queue initialization
  5. *
  6. * Copyright (C) IBM Corp. 2008
  7. * Author(s): Jan Glauber <jang@linux.vnet.ibm.com>
  8. */
  9. #include <linux/kernel.h>
  10. #include <linux/slab.h>
  11. #include <asm/qdio.h>
  12. #include "cio.h"
  13. #include "css.h"
  14. #include "device.h"
  15. #include "ioasm.h"
  16. #include "chsc.h"
  17. #include "qdio.h"
  18. #include "qdio_debug.h"
  19. static struct kmem_cache *qdio_q_cache;
  20. /*
  21. * qebsm is only available under 64bit but the adapter sets the feature
  22. * flag anyway, so we manually override it.
  23. */
  24. static inline int qebsm_possible(void)
  25. {
  26. #ifdef CONFIG_64BIT
  27. return css_general_characteristics.qebsm;
  28. #endif
  29. return 0;
  30. }
  31. /*
  32. * qib_param_field: pointer to 128 bytes or NULL, if no param field
  33. * nr_input_qs: pointer to nr_queues*128 words of data or NULL
  34. */
  35. static void set_impl_params(struct qdio_irq *irq_ptr,
  36. unsigned int qib_param_field_format,
  37. unsigned char *qib_param_field,
  38. unsigned long *input_slib_elements,
  39. unsigned long *output_slib_elements)
  40. {
  41. struct qdio_q *q;
  42. int i, j;
  43. if (!irq_ptr)
  44. return;
  45. irq_ptr->qib.pfmt = qib_param_field_format;
  46. if (qib_param_field)
  47. memcpy(irq_ptr->qib.parm, qib_param_field,
  48. QDIO_MAX_BUFFERS_PER_Q);
  49. if (!input_slib_elements)
  50. goto output;
  51. for_each_input_queue(irq_ptr, q, i) {
  52. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  53. q->slib->slibe[j].parms =
  54. input_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
  55. }
  56. output:
  57. if (!output_slib_elements)
  58. return;
  59. for_each_output_queue(irq_ptr, q, i) {
  60. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  61. q->slib->slibe[j].parms =
  62. output_slib_elements[i * QDIO_MAX_BUFFERS_PER_Q + j];
  63. }
  64. }
  65. static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues)
  66. {
  67. struct qdio_q *q;
  68. int i;
  69. for (i = 0; i < nr_queues; i++) {
  70. q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL);
  71. if (!q)
  72. return -ENOMEM;
  73. q->slib = (struct slib *) __get_free_page(GFP_KERNEL);
  74. if (!q->slib) {
  75. kmem_cache_free(qdio_q_cache, q);
  76. return -ENOMEM;
  77. }
  78. irq_ptr_qs[i] = q;
  79. }
  80. return 0;
  81. }
  82. int qdio_allocate_qs(struct qdio_irq *irq_ptr, int nr_input_qs, int nr_output_qs)
  83. {
  84. int rc;
  85. rc = __qdio_allocate_qs(irq_ptr->input_qs, nr_input_qs);
  86. if (rc)
  87. return rc;
  88. rc = __qdio_allocate_qs(irq_ptr->output_qs, nr_output_qs);
  89. return rc;
  90. }
  91. static void setup_queues_misc(struct qdio_q *q, struct qdio_irq *irq_ptr,
  92. qdio_handler_t *handler, int i)
  93. {
  94. /* must be cleared by every qdio_establish */
  95. memset(q, 0, ((char *)&q->slib) - ((char *)q));
  96. memset(q->slib, 0, PAGE_SIZE);
  97. q->irq_ptr = irq_ptr;
  98. q->mask = 1 << (31 - i);
  99. q->nr = i;
  100. q->handler = handler;
  101. }
  102. static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr,
  103. void **sbals_array, int i)
  104. {
  105. struct qdio_q *prev;
  106. int j;
  107. DBF_HEX(&q, sizeof(void *));
  108. q->sl = (struct sl *)((char *)q->slib + PAGE_SIZE / 2);
  109. /* fill in sbal */
  110. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) {
  111. q->sbal[j] = *sbals_array++;
  112. BUG_ON((unsigned long)q->sbal[j] & 0xff);
  113. }
  114. /* fill in slib */
  115. if (i > 0) {
  116. prev = (q->is_input_q) ? irq_ptr->input_qs[i - 1]
  117. : irq_ptr->output_qs[i - 1];
  118. prev->slib->nsliba = (unsigned long)q->slib;
  119. }
  120. q->slib->sla = (unsigned long)q->sl;
  121. q->slib->slsba = (unsigned long)&q->slsb.val[0];
  122. /* fill in sl */
  123. for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++)
  124. q->sl->element[j].sbal = (unsigned long)q->sbal[j];
  125. }
  126. static void setup_queues(struct qdio_irq *irq_ptr,
  127. struct qdio_initialize *qdio_init)
  128. {
  129. struct qdio_q *q;
  130. void **input_sbal_array = qdio_init->input_sbal_addr_array;
  131. void **output_sbal_array = qdio_init->output_sbal_addr_array;
  132. int i;
  133. for_each_input_queue(irq_ptr, q, i) {
  134. DBF_EVENT("in-q:%1d", i);
  135. setup_queues_misc(q, irq_ptr, qdio_init->input_handler, i);
  136. q->is_input_q = 1;
  137. setup_storage_lists(q, irq_ptr, input_sbal_array, i);
  138. input_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
  139. if (is_thinint_irq(irq_ptr))
  140. tasklet_init(&q->tasklet, tiqdio_inbound_processing,
  141. (unsigned long) q);
  142. else
  143. tasklet_init(&q->tasklet, qdio_inbound_processing,
  144. (unsigned long) q);
  145. }
  146. for_each_output_queue(irq_ptr, q, i) {
  147. DBF_EVENT("outq:%1d", i);
  148. setup_queues_misc(q, irq_ptr, qdio_init->output_handler, i);
  149. q->is_input_q = 0;
  150. setup_storage_lists(q, irq_ptr, output_sbal_array, i);
  151. output_sbal_array += QDIO_MAX_BUFFERS_PER_Q;
  152. tasklet_init(&q->tasklet, qdio_outbound_processing,
  153. (unsigned long) q);
  154. setup_timer(&q->u.out.timer, (void(*)(unsigned long))
  155. &qdio_outbound_timer, (unsigned long)q);
  156. }
  157. }
  158. static void process_ac_flags(struct qdio_irq *irq_ptr, unsigned char qdioac)
  159. {
  160. if (qdioac & AC1_SIGA_INPUT_NEEDED)
  161. irq_ptr->siga_flag.input = 1;
  162. if (qdioac & AC1_SIGA_OUTPUT_NEEDED)
  163. irq_ptr->siga_flag.output = 1;
  164. if (qdioac & AC1_SIGA_SYNC_NEEDED)
  165. irq_ptr->siga_flag.sync = 1;
  166. if (qdioac & AC1_AUTOMATIC_SYNC_ON_THININT)
  167. irq_ptr->siga_flag.no_sync_ti = 1;
  168. if (qdioac & AC1_AUTOMATIC_SYNC_ON_OUT_PCI)
  169. irq_ptr->siga_flag.no_sync_out_pci = 1;
  170. if (irq_ptr->siga_flag.no_sync_out_pci &&
  171. irq_ptr->siga_flag.no_sync_ti)
  172. irq_ptr->siga_flag.no_sync_out_ti = 1;
  173. }
  174. static void check_and_setup_qebsm(struct qdio_irq *irq_ptr,
  175. unsigned char qdioac, unsigned long token)
  176. {
  177. if (!(irq_ptr->qib.rflags & QIB_RFLAGS_ENABLE_QEBSM))
  178. goto no_qebsm;
  179. if (!(qdioac & AC1_SC_QEBSM_AVAILABLE) ||
  180. (!(qdioac & AC1_SC_QEBSM_ENABLED)))
  181. goto no_qebsm;
  182. irq_ptr->sch_token = token;
  183. DBF_EVENT("V=V:1");
  184. DBF_EVENT("%8lx", irq_ptr->sch_token);
  185. return;
  186. no_qebsm:
  187. irq_ptr->sch_token = 0;
  188. irq_ptr->qib.rflags &= ~QIB_RFLAGS_ENABLE_QEBSM;
  189. DBF_EVENT("noV=V");
  190. }
  191. /*
  192. * If there is a qdio_irq we use the chsc_page and store the information
  193. * in the qdio_irq, otherwise we copy it to the specified structure.
  194. */
  195. int qdio_setup_get_ssqd(struct qdio_irq *irq_ptr,
  196. struct subchannel_id *schid,
  197. struct qdio_ssqd_desc *data)
  198. {
  199. struct chsc_ssqd_area *ssqd;
  200. int rc;
  201. DBF_EVENT("getssqd:%4x", schid->sch_no);
  202. if (irq_ptr != NULL)
  203. ssqd = (struct chsc_ssqd_area *)irq_ptr->chsc_page;
  204. else
  205. ssqd = (struct chsc_ssqd_area *)__get_free_page(GFP_KERNEL);
  206. memset(ssqd, 0, PAGE_SIZE);
  207. ssqd->request = (struct chsc_header) {
  208. .length = 0x0010,
  209. .code = 0x0024,
  210. };
  211. ssqd->first_sch = schid->sch_no;
  212. ssqd->last_sch = schid->sch_no;
  213. ssqd->ssid = schid->ssid;
  214. if (chsc(ssqd))
  215. return -EIO;
  216. rc = chsc_error_from_response(ssqd->response.code);
  217. if (rc)
  218. return rc;
  219. if (!(ssqd->qdio_ssqd.flags & CHSC_FLAG_QDIO_CAPABILITY) ||
  220. !(ssqd->qdio_ssqd.flags & CHSC_FLAG_VALIDITY) ||
  221. (ssqd->qdio_ssqd.sch != schid->sch_no))
  222. return -EINVAL;
  223. if (irq_ptr != NULL)
  224. memcpy(&irq_ptr->ssqd_desc, &ssqd->qdio_ssqd,
  225. sizeof(struct qdio_ssqd_desc));
  226. else {
  227. memcpy(data, &ssqd->qdio_ssqd,
  228. sizeof(struct qdio_ssqd_desc));
  229. free_page((unsigned long)ssqd);
  230. }
  231. return 0;
  232. }
  233. void qdio_setup_ssqd_info(struct qdio_irq *irq_ptr)
  234. {
  235. unsigned char qdioac;
  236. int rc;
  237. rc = qdio_setup_get_ssqd(irq_ptr, &irq_ptr->schid, NULL);
  238. if (rc) {
  239. DBF_ERROR("%4x ssqd ERR", irq_ptr->schid.sch_no);
  240. DBF_ERROR("rc:%x", rc);
  241. /* all flags set, worst case */
  242. qdioac = AC1_SIGA_INPUT_NEEDED | AC1_SIGA_OUTPUT_NEEDED |
  243. AC1_SIGA_SYNC_NEEDED;
  244. } else
  245. qdioac = irq_ptr->ssqd_desc.qdioac1;
  246. check_and_setup_qebsm(irq_ptr, qdioac, irq_ptr->ssqd_desc.sch_token);
  247. process_ac_flags(irq_ptr, qdioac);
  248. DBF_EVENT("qdioac:%4x", qdioac);
  249. }
  250. void qdio_release_memory(struct qdio_irq *irq_ptr)
  251. {
  252. struct qdio_q *q;
  253. int i;
  254. /*
  255. * Must check queue array manually since irq_ptr->nr_input_queues /
  256. * irq_ptr->nr_input_queues may not yet be set.
  257. */
  258. for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
  259. q = irq_ptr->input_qs[i];
  260. if (q) {
  261. free_page((unsigned long) q->slib);
  262. kmem_cache_free(qdio_q_cache, q);
  263. }
  264. }
  265. for (i = 0; i < QDIO_MAX_QUEUES_PER_IRQ; i++) {
  266. q = irq_ptr->output_qs[i];
  267. if (q) {
  268. free_page((unsigned long) q->slib);
  269. kmem_cache_free(qdio_q_cache, q);
  270. }
  271. }
  272. free_page((unsigned long) irq_ptr->qdr);
  273. free_page(irq_ptr->chsc_page);
  274. free_page((unsigned long) irq_ptr);
  275. }
  276. static void __qdio_allocate_fill_qdr(struct qdio_irq *irq_ptr,
  277. struct qdio_q **irq_ptr_qs,
  278. int i, int nr)
  279. {
  280. irq_ptr->qdr->qdf0[i + nr].sliba =
  281. (unsigned long)irq_ptr_qs[i]->slib;
  282. irq_ptr->qdr->qdf0[i + nr].sla =
  283. (unsigned long)irq_ptr_qs[i]->sl;
  284. irq_ptr->qdr->qdf0[i + nr].slsba =
  285. (unsigned long)&irq_ptr_qs[i]->slsb.val[0];
  286. irq_ptr->qdr->qdf0[i + nr].akey = PAGE_DEFAULT_KEY;
  287. irq_ptr->qdr->qdf0[i + nr].bkey = PAGE_DEFAULT_KEY;
  288. irq_ptr->qdr->qdf0[i + nr].ckey = PAGE_DEFAULT_KEY;
  289. irq_ptr->qdr->qdf0[i + nr].dkey = PAGE_DEFAULT_KEY;
  290. }
  291. static void setup_qdr(struct qdio_irq *irq_ptr,
  292. struct qdio_initialize *qdio_init)
  293. {
  294. int i;
  295. irq_ptr->qdr->qfmt = qdio_init->q_format;
  296. irq_ptr->qdr->iqdcnt = qdio_init->no_input_qs;
  297. irq_ptr->qdr->oqdcnt = qdio_init->no_output_qs;
  298. irq_ptr->qdr->iqdsz = sizeof(struct qdesfmt0) / 4; /* size in words */
  299. irq_ptr->qdr->oqdsz = sizeof(struct qdesfmt0) / 4;
  300. irq_ptr->qdr->qiba = (unsigned long)&irq_ptr->qib;
  301. irq_ptr->qdr->qkey = PAGE_DEFAULT_KEY;
  302. for (i = 0; i < qdio_init->no_input_qs; i++)
  303. __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->input_qs, i, 0);
  304. for (i = 0; i < qdio_init->no_output_qs; i++)
  305. __qdio_allocate_fill_qdr(irq_ptr, irq_ptr->output_qs, i,
  306. qdio_init->no_input_qs);
  307. }
  308. static void setup_qib(struct qdio_irq *irq_ptr,
  309. struct qdio_initialize *init_data)
  310. {
  311. if (qebsm_possible())
  312. irq_ptr->qib.rflags |= QIB_RFLAGS_ENABLE_QEBSM;
  313. irq_ptr->qib.qfmt = init_data->q_format;
  314. if (init_data->no_input_qs)
  315. irq_ptr->qib.isliba =
  316. (unsigned long)(irq_ptr->input_qs[0]->slib);
  317. if (init_data->no_output_qs)
  318. irq_ptr->qib.osliba =
  319. (unsigned long)(irq_ptr->output_qs[0]->slib);
  320. memcpy(irq_ptr->qib.ebcnam, init_data->adapter_name, 8);
  321. }
  322. int qdio_setup_irq(struct qdio_initialize *init_data)
  323. {
  324. struct ciw *ciw;
  325. struct qdio_irq *irq_ptr = init_data->cdev->private->qdio_data;
  326. int rc;
  327. memset(irq_ptr, 0, ((char *)&irq_ptr->qdr) - ((char *)irq_ptr));
  328. /* wipes qib.ac, required by ar7063 */
  329. memset(irq_ptr->qdr, 0, sizeof(struct qdr));
  330. irq_ptr->int_parm = init_data->int_parm;
  331. irq_ptr->nr_input_qs = init_data->no_input_qs;
  332. irq_ptr->nr_output_qs = init_data->no_output_qs;
  333. irq_ptr->schid = ccw_device_get_subchannel_id(init_data->cdev);
  334. irq_ptr->cdev = init_data->cdev;
  335. setup_queues(irq_ptr, init_data);
  336. setup_qib(irq_ptr, init_data);
  337. qdio_setup_thinint(irq_ptr);
  338. set_impl_params(irq_ptr, init_data->qib_param_field_format,
  339. init_data->qib_param_field,
  340. init_data->input_slib_elements,
  341. init_data->output_slib_elements);
  342. /* fill input and output descriptors */
  343. setup_qdr(irq_ptr, init_data);
  344. /* qdr, qib, sls, slsbs, slibs, sbales are filled now */
  345. /* get qdio commands */
  346. ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
  347. if (!ciw) {
  348. DBF_ERROR("%4x NO EQ", irq_ptr->schid.sch_no);
  349. rc = -EINVAL;
  350. goto out_err;
  351. }
  352. irq_ptr->equeue = *ciw;
  353. ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
  354. if (!ciw) {
  355. DBF_ERROR("%4x NO AQ", irq_ptr->schid.sch_no);
  356. rc = -EINVAL;
  357. goto out_err;
  358. }
  359. irq_ptr->aqueue = *ciw;
  360. /* set new interrupt handler */
  361. irq_ptr->orig_handler = init_data->cdev->handler;
  362. init_data->cdev->handler = qdio_int_handler;
  363. return 0;
  364. out_err:
  365. qdio_release_memory(irq_ptr);
  366. return rc;
  367. }
  368. void qdio_print_subchannel_info(struct qdio_irq *irq_ptr,
  369. struct ccw_device *cdev)
  370. {
  371. char s[80];
  372. snprintf(s, 80, "qdio: %s %s on SC %x using "
  373. "AI:%d QEBSM:%d PCI:%d TDD:%d SIGA:%s%s%s%s%s%s\n",
  374. dev_name(&cdev->dev),
  375. (irq_ptr->qib.qfmt == QDIO_QETH_QFMT) ? "OSA" :
  376. ((irq_ptr->qib.qfmt == QDIO_ZFCP_QFMT) ? "ZFCP" : "HS"),
  377. irq_ptr->schid.sch_no,
  378. is_thinint_irq(irq_ptr),
  379. (irq_ptr->sch_token) ? 1 : 0,
  380. (irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED) ? 1 : 0,
  381. css_general_characteristics.aif_tdd,
  382. (irq_ptr->siga_flag.input) ? "R" : " ",
  383. (irq_ptr->siga_flag.output) ? "W" : " ",
  384. (irq_ptr->siga_flag.sync) ? "S" : " ",
  385. (!irq_ptr->siga_flag.no_sync_ti) ? "A" : " ",
  386. (!irq_ptr->siga_flag.no_sync_out_ti) ? "O" : " ",
  387. (!irq_ptr->siga_flag.no_sync_out_pci) ? "P" : " ");
  388. printk(KERN_INFO "%s", s);
  389. }
  390. int __init qdio_setup_init(void)
  391. {
  392. qdio_q_cache = kmem_cache_create("qdio_q", sizeof(struct qdio_q),
  393. 256, 0, NULL);
  394. if (!qdio_q_cache)
  395. return -ENOMEM;
  396. /* Check for OSA/FCP thin interrupts (bit 67). */
  397. DBF_EVENT("thinint:%1d",
  398. (css_general_characteristics.aif_osa) ? 1 : 0);
  399. /* Check for QEBSM support in general (bit 58). */
  400. DBF_EVENT("cssQEBSM:%1d", (qebsm_possible()) ? 1 : 0);
  401. return 0;
  402. }
  403. void qdio_setup_exit(void)
  404. {
  405. kmem_cache_destroy(qdio_q_cache);
  406. }