rtc-twl.c 15 KB

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  1. /*
  2. * rtc-twl.c -- TWL Real Time Clock interface
  3. *
  4. * Copyright (C) 2007 MontaVista Software, Inc
  5. * Author: Alexandre Rusev <source@mvista.com>
  6. *
  7. * Based on original TI driver twl4030-rtc.c
  8. * Copyright (C) 2006 Texas Instruments, Inc.
  9. *
  10. * Based on rtc-omap.c
  11. * Copyright (C) 2003 MontaVista Software, Inc.
  12. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  13. * Copyright (C) 2006 David Brownell
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/types.h>
  25. #include <linux/rtc.h>
  26. #include <linux/bcd.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/i2c/twl.h>
  30. /*
  31. * RTC block register offsets (use TWL_MODULE_RTC)
  32. */
  33. enum {
  34. REG_SECONDS_REG = 0,
  35. REG_MINUTES_REG,
  36. REG_HOURS_REG,
  37. REG_DAYS_REG,
  38. REG_MONTHS_REG,
  39. REG_YEARS_REG,
  40. REG_WEEKS_REG,
  41. REG_ALARM_SECONDS_REG,
  42. REG_ALARM_MINUTES_REG,
  43. REG_ALARM_HOURS_REG,
  44. REG_ALARM_DAYS_REG,
  45. REG_ALARM_MONTHS_REG,
  46. REG_ALARM_YEARS_REG,
  47. REG_RTC_CTRL_REG,
  48. REG_RTC_STATUS_REG,
  49. REG_RTC_INTERRUPTS_REG,
  50. REG_RTC_COMP_LSB_REG,
  51. REG_RTC_COMP_MSB_REG,
  52. };
  53. const static u8 twl4030_rtc_reg_map[] = {
  54. [REG_SECONDS_REG] = 0x00,
  55. [REG_MINUTES_REG] = 0x01,
  56. [REG_HOURS_REG] = 0x02,
  57. [REG_DAYS_REG] = 0x03,
  58. [REG_MONTHS_REG] = 0x04,
  59. [REG_YEARS_REG] = 0x05,
  60. [REG_WEEKS_REG] = 0x06,
  61. [REG_ALARM_SECONDS_REG] = 0x07,
  62. [REG_ALARM_MINUTES_REG] = 0x08,
  63. [REG_ALARM_HOURS_REG] = 0x09,
  64. [REG_ALARM_DAYS_REG] = 0x0A,
  65. [REG_ALARM_MONTHS_REG] = 0x0B,
  66. [REG_ALARM_YEARS_REG] = 0x0C,
  67. [REG_RTC_CTRL_REG] = 0x0D,
  68. [REG_RTC_STATUS_REG] = 0x0E,
  69. [REG_RTC_INTERRUPTS_REG] = 0x0F,
  70. [REG_RTC_COMP_LSB_REG] = 0x10,
  71. [REG_RTC_COMP_MSB_REG] = 0x11,
  72. };
  73. const static u8 twl6030_rtc_reg_map[] = {
  74. [REG_SECONDS_REG] = 0x00,
  75. [REG_MINUTES_REG] = 0x01,
  76. [REG_HOURS_REG] = 0x02,
  77. [REG_DAYS_REG] = 0x03,
  78. [REG_MONTHS_REG] = 0x04,
  79. [REG_YEARS_REG] = 0x05,
  80. [REG_WEEKS_REG] = 0x06,
  81. [REG_ALARM_SECONDS_REG] = 0x08,
  82. [REG_ALARM_MINUTES_REG] = 0x09,
  83. [REG_ALARM_HOURS_REG] = 0x0A,
  84. [REG_ALARM_DAYS_REG] = 0x0B,
  85. [REG_ALARM_MONTHS_REG] = 0x0C,
  86. [REG_ALARM_YEARS_REG] = 0x0D,
  87. [REG_RTC_CTRL_REG] = 0x10,
  88. [REG_RTC_STATUS_REG] = 0x11,
  89. [REG_RTC_INTERRUPTS_REG] = 0x12,
  90. [REG_RTC_COMP_LSB_REG] = 0x13,
  91. [REG_RTC_COMP_MSB_REG] = 0x14,
  92. };
  93. /* RTC_CTRL_REG bitfields */
  94. #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
  95. #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
  96. #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
  97. #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
  98. #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
  99. #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
  100. #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
  101. /* RTC_STATUS_REG bitfields */
  102. #define BIT_RTC_STATUS_REG_RUN_M 0x02
  103. #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
  104. #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
  105. #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
  106. #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
  107. #define BIT_RTC_STATUS_REG_ALARM_M 0x40
  108. #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
  109. /* RTC_INTERRUPTS_REG bitfields */
  110. #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
  111. #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
  112. #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
  113. /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
  114. #define ALL_TIME_REGS 6
  115. /*----------------------------------------------------------------------*/
  116. static u8 *rtc_reg_map;
  117. /*
  118. * Supports 1 byte read from TWL RTC register.
  119. */
  120. static int twl_rtc_read_u8(u8 *data, u8 reg)
  121. {
  122. int ret;
  123. ret = twl_i2c_read_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
  124. if (ret < 0)
  125. pr_err("twl_rtc: Could not read TWL"
  126. "register %X - error %d\n", reg, ret);
  127. return ret;
  128. }
  129. /*
  130. * Supports 1 byte write to TWL RTC registers.
  131. */
  132. static int twl_rtc_write_u8(u8 data, u8 reg)
  133. {
  134. int ret;
  135. ret = twl_i2c_write_u8(TWL_MODULE_RTC, data, (rtc_reg_map[reg]));
  136. if (ret < 0)
  137. pr_err("twl_rtc: Could not write TWL"
  138. "register %X - error %d\n", reg, ret);
  139. return ret;
  140. }
  141. /*
  142. * Cache the value for timer/alarm interrupts register; this is
  143. * only changed by callers holding rtc ops lock (or resume).
  144. */
  145. static unsigned char rtc_irq_bits;
  146. /*
  147. * Enable 1/second update and/or alarm interrupts.
  148. */
  149. static int set_rtc_irq_bit(unsigned char bit)
  150. {
  151. unsigned char val;
  152. int ret;
  153. val = rtc_irq_bits | bit;
  154. val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
  155. ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  156. if (ret == 0)
  157. rtc_irq_bits = val;
  158. return ret;
  159. }
  160. /*
  161. * Disable update and/or alarm interrupts.
  162. */
  163. static int mask_rtc_irq_bit(unsigned char bit)
  164. {
  165. unsigned char val;
  166. int ret;
  167. val = rtc_irq_bits & ~bit;
  168. ret = twl_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  169. if (ret == 0)
  170. rtc_irq_bits = val;
  171. return ret;
  172. }
  173. static int twl_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
  174. {
  175. int ret;
  176. if (enabled)
  177. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  178. else
  179. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  180. return ret;
  181. }
  182. static int twl_rtc_update_irq_enable(struct device *dev, unsigned enabled)
  183. {
  184. int ret;
  185. if (enabled)
  186. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  187. else
  188. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  189. return ret;
  190. }
  191. /*
  192. * Gets current TWL RTC time and date parameters.
  193. *
  194. * The RTC's time/alarm representation is not what gmtime(3) requires
  195. * Linux to use:
  196. *
  197. * - Months are 1..12 vs Linux 0-11
  198. * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
  199. */
  200. static int twl_rtc_read_time(struct device *dev, struct rtc_time *tm)
  201. {
  202. unsigned char rtc_data[ALL_TIME_REGS + 1];
  203. int ret;
  204. u8 save_control;
  205. ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  206. if (ret < 0)
  207. return ret;
  208. save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
  209. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  210. if (ret < 0)
  211. return ret;
  212. ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
  213. (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
  214. if (ret < 0) {
  215. dev_err(dev, "rtc_read_time error %d\n", ret);
  216. return ret;
  217. }
  218. tm->tm_sec = bcd2bin(rtc_data[0]);
  219. tm->tm_min = bcd2bin(rtc_data[1]);
  220. tm->tm_hour = bcd2bin(rtc_data[2]);
  221. tm->tm_mday = bcd2bin(rtc_data[3]);
  222. tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
  223. tm->tm_year = bcd2bin(rtc_data[5]) + 100;
  224. return ret;
  225. }
  226. static int twl_rtc_set_time(struct device *dev, struct rtc_time *tm)
  227. {
  228. unsigned char save_control;
  229. unsigned char rtc_data[ALL_TIME_REGS + 1];
  230. int ret;
  231. rtc_data[1] = bin2bcd(tm->tm_sec);
  232. rtc_data[2] = bin2bcd(tm->tm_min);
  233. rtc_data[3] = bin2bcd(tm->tm_hour);
  234. rtc_data[4] = bin2bcd(tm->tm_mday);
  235. rtc_data[5] = bin2bcd(tm->tm_mon + 1);
  236. rtc_data[6] = bin2bcd(tm->tm_year - 100);
  237. /* Stop RTC while updating the TC registers */
  238. ret = twl_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  239. if (ret < 0)
  240. goto out;
  241. save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
  242. twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  243. if (ret < 0)
  244. goto out;
  245. /* update all the time registers in one shot */
  246. ret = twl_i2c_write(TWL_MODULE_RTC, rtc_data,
  247. (rtc_reg_map[REG_SECONDS_REG]), ALL_TIME_REGS);
  248. if (ret < 0) {
  249. dev_err(dev, "rtc_set_time error %d\n", ret);
  250. goto out;
  251. }
  252. /* Start back RTC */
  253. save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
  254. ret = twl_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  255. out:
  256. return ret;
  257. }
  258. /*
  259. * Gets current TWL RTC alarm time.
  260. */
  261. static int twl_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  262. {
  263. unsigned char rtc_data[ALL_TIME_REGS + 1];
  264. int ret;
  265. ret = twl_i2c_read(TWL_MODULE_RTC, rtc_data,
  266. (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
  267. if (ret < 0) {
  268. dev_err(dev, "rtc_read_alarm error %d\n", ret);
  269. return ret;
  270. }
  271. /* some of these fields may be wildcard/"match all" */
  272. alm->time.tm_sec = bcd2bin(rtc_data[0]);
  273. alm->time.tm_min = bcd2bin(rtc_data[1]);
  274. alm->time.tm_hour = bcd2bin(rtc_data[2]);
  275. alm->time.tm_mday = bcd2bin(rtc_data[3]);
  276. alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
  277. alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
  278. /* report cached alarm enable state */
  279. if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
  280. alm->enabled = 1;
  281. return ret;
  282. }
  283. static int twl_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  284. {
  285. unsigned char alarm_data[ALL_TIME_REGS + 1];
  286. int ret;
  287. ret = twl_rtc_alarm_irq_enable(dev, 0);
  288. if (ret)
  289. goto out;
  290. alarm_data[1] = bin2bcd(alm->time.tm_sec);
  291. alarm_data[2] = bin2bcd(alm->time.tm_min);
  292. alarm_data[3] = bin2bcd(alm->time.tm_hour);
  293. alarm_data[4] = bin2bcd(alm->time.tm_mday);
  294. alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
  295. alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
  296. /* update all the alarm registers in one shot */
  297. ret = twl_i2c_write(TWL_MODULE_RTC, alarm_data,
  298. (rtc_reg_map[REG_ALARM_SECONDS_REG]), ALL_TIME_REGS);
  299. if (ret) {
  300. dev_err(dev, "rtc_set_alarm error %d\n", ret);
  301. goto out;
  302. }
  303. if (alm->enabled)
  304. ret = twl_rtc_alarm_irq_enable(dev, 1);
  305. out:
  306. return ret;
  307. }
  308. static irqreturn_t twl_rtc_interrupt(int irq, void *rtc)
  309. {
  310. unsigned long events = 0;
  311. int ret = IRQ_NONE;
  312. int res;
  313. u8 rd_reg;
  314. #ifdef CONFIG_LOCKDEP
  315. /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
  316. * we don't want and can't tolerate. Although it might be
  317. * friendlier not to borrow this thread context...
  318. */
  319. local_irq_enable();
  320. #endif
  321. res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  322. if (res)
  323. goto out;
  324. /*
  325. * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
  326. * only one (ALARM or RTC) interrupt source may be enabled
  327. * at time, we also could check our results
  328. * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
  329. */
  330. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  331. events |= RTC_IRQF | RTC_AF;
  332. else
  333. events |= RTC_IRQF | RTC_UF;
  334. res = twl_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
  335. REG_RTC_STATUS_REG);
  336. if (res)
  337. goto out;
  338. if (twl_class_is_4030()) {
  339. /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
  340. * needs 2 reads to clear the interrupt. One read is done in
  341. * do_twl_pwrirq(). Doing the second read, to clear
  342. * the bit.
  343. *
  344. * FIXME the reason PWR_ISR1 needs an extra read is that
  345. * RTC_IF retriggered until we cleared REG_ALARM_M above.
  346. * But re-reading like this is a bad hack; by doing so we
  347. * risk wrongly clearing status for some other IRQ (losing
  348. * the interrupt). Be smarter about handling RTC_UF ...
  349. */
  350. res = twl_i2c_read_u8(TWL4030_MODULE_INT,
  351. &rd_reg, TWL4030_INT_PWR_ISR1);
  352. if (res)
  353. goto out;
  354. }
  355. /* Notify RTC core on event */
  356. rtc_update_irq(rtc, 1, events);
  357. ret = IRQ_HANDLED;
  358. out:
  359. return ret;
  360. }
  361. static struct rtc_class_ops twl_rtc_ops = {
  362. .read_time = twl_rtc_read_time,
  363. .set_time = twl_rtc_set_time,
  364. .read_alarm = twl_rtc_read_alarm,
  365. .set_alarm = twl_rtc_set_alarm,
  366. .alarm_irq_enable = twl_rtc_alarm_irq_enable,
  367. .update_irq_enable = twl_rtc_update_irq_enable,
  368. };
  369. /*----------------------------------------------------------------------*/
  370. static int __devinit twl_rtc_probe(struct platform_device *pdev)
  371. {
  372. struct rtc_device *rtc;
  373. int ret = 0;
  374. int irq = platform_get_irq(pdev, 0);
  375. u8 rd_reg;
  376. if (irq <= 0)
  377. return -EINVAL;
  378. rtc = rtc_device_register(pdev->name,
  379. &pdev->dev, &twl_rtc_ops, THIS_MODULE);
  380. if (IS_ERR(rtc)) {
  381. ret = PTR_ERR(rtc);
  382. dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
  383. PTR_ERR(rtc));
  384. goto out0;
  385. }
  386. platform_set_drvdata(pdev, rtc);
  387. ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  388. if (ret < 0)
  389. goto out1;
  390. if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
  391. dev_warn(&pdev->dev, "Power up reset detected.\n");
  392. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  393. dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
  394. /* Clear RTC Power up reset and pending alarm interrupts */
  395. ret = twl_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
  396. if (ret < 0)
  397. goto out1;
  398. ret = request_irq(irq, twl_rtc_interrupt,
  399. IRQF_TRIGGER_RISING,
  400. dev_name(&rtc->dev), rtc);
  401. if (ret < 0) {
  402. dev_err(&pdev->dev, "IRQ is not free.\n");
  403. goto out1;
  404. }
  405. if (twl_class_is_6030()) {
  406. twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
  407. REG_INT_MSK_LINE_A);
  408. twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK,
  409. REG_INT_MSK_STS_A);
  410. }
  411. /* Check RTC module status, Enable if it is off */
  412. ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
  413. if (ret < 0)
  414. goto out2;
  415. if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
  416. dev_info(&pdev->dev, "Enabling TWL-RTC.\n");
  417. rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
  418. ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
  419. if (ret < 0)
  420. goto out2;
  421. }
  422. /* init cached IRQ enable bits */
  423. ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
  424. if (ret < 0)
  425. goto out2;
  426. return ret;
  427. out2:
  428. free_irq(irq, rtc);
  429. out1:
  430. rtc_device_unregister(rtc);
  431. out0:
  432. return ret;
  433. }
  434. /*
  435. * Disable all TWL RTC module interrupts.
  436. * Sets status flag to free.
  437. */
  438. static int __devexit twl_rtc_remove(struct platform_device *pdev)
  439. {
  440. /* leave rtc running, but disable irqs */
  441. struct rtc_device *rtc = platform_get_drvdata(pdev);
  442. int irq = platform_get_irq(pdev, 0);
  443. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  444. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  445. if (twl_class_is_6030()) {
  446. twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
  447. REG_INT_MSK_LINE_A);
  448. twl6030_interrupt_mask(TWL6030_RTC_INT_MASK,
  449. REG_INT_MSK_STS_A);
  450. }
  451. free_irq(irq, rtc);
  452. rtc_device_unregister(rtc);
  453. platform_set_drvdata(pdev, NULL);
  454. return 0;
  455. }
  456. static void twl_rtc_shutdown(struct platform_device *pdev)
  457. {
  458. /* mask timer interrupts, but leave alarm interrupts on to enable
  459. power-on when alarm is triggered */
  460. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  461. }
  462. #ifdef CONFIG_PM
  463. static unsigned char irqstat;
  464. static int twl_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  465. {
  466. irqstat = rtc_irq_bits;
  467. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  468. return 0;
  469. }
  470. static int twl_rtc_resume(struct platform_device *pdev)
  471. {
  472. set_rtc_irq_bit(irqstat);
  473. return 0;
  474. }
  475. #else
  476. #define twl_rtc_suspend NULL
  477. #define twl_rtc_resume NULL
  478. #endif
  479. MODULE_ALIAS("platform:twl_rtc");
  480. static struct platform_driver twl4030rtc_driver = {
  481. .probe = twl_rtc_probe,
  482. .remove = __devexit_p(twl_rtc_remove),
  483. .shutdown = twl_rtc_shutdown,
  484. .suspend = twl_rtc_suspend,
  485. .resume = twl_rtc_resume,
  486. .driver = {
  487. .owner = THIS_MODULE,
  488. .name = "twl_rtc",
  489. },
  490. };
  491. static int __init twl_rtc_init(void)
  492. {
  493. if (twl_class_is_4030())
  494. rtc_reg_map = (u8 *) twl4030_rtc_reg_map;
  495. else
  496. rtc_reg_map = (u8 *) twl6030_rtc_reg_map;
  497. return platform_driver_register(&twl4030rtc_driver);
  498. }
  499. module_init(twl_rtc_init);
  500. static void __exit twl_rtc_exit(void)
  501. {
  502. platform_driver_unregister(&twl4030rtc_driver);
  503. }
  504. module_exit(twl_rtc_exit);
  505. MODULE_AUTHOR("Texas Instruments, MontaVista Software");
  506. MODULE_LICENSE("GPL");