rtc-omap.c 13 KB

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  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/io.h>
  23. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  24. * with century-range alarm matching, driven by the 32kHz clock.
  25. *
  26. * The main user-visible ways it differs from PC RTCs are by omitting
  27. * "don't care" alarm fields and sub-second periodic IRQs, and having
  28. * an autoadjust mechanism to calibrate to the true oscillator rate.
  29. *
  30. * Board-specific wiring options include using split power mode with
  31. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  32. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  33. * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  34. */
  35. #define OMAP_RTC_BASE 0xfffb4800
  36. /* RTC registers */
  37. #define OMAP_RTC_SECONDS_REG 0x00
  38. #define OMAP_RTC_MINUTES_REG 0x04
  39. #define OMAP_RTC_HOURS_REG 0x08
  40. #define OMAP_RTC_DAYS_REG 0x0C
  41. #define OMAP_RTC_MONTHS_REG 0x10
  42. #define OMAP_RTC_YEARS_REG 0x14
  43. #define OMAP_RTC_WEEKS_REG 0x18
  44. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  45. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  46. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  47. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  48. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  49. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  50. #define OMAP_RTC_CTRL_REG 0x40
  51. #define OMAP_RTC_STATUS_REG 0x44
  52. #define OMAP_RTC_INTERRUPTS_REG 0x48
  53. #define OMAP_RTC_COMP_LSB_REG 0x4c
  54. #define OMAP_RTC_COMP_MSB_REG 0x50
  55. #define OMAP_RTC_OSC_REG 0x54
  56. /* OMAP_RTC_CTRL_REG bit fields: */
  57. #define OMAP_RTC_CTRL_SPLIT (1<<7)
  58. #define OMAP_RTC_CTRL_DISABLE (1<<6)
  59. #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
  60. #define OMAP_RTC_CTRL_TEST (1<<4)
  61. #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
  62. #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
  63. #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
  64. #define OMAP_RTC_CTRL_STOP (1<<0)
  65. /* OMAP_RTC_STATUS_REG bit fields: */
  66. #define OMAP_RTC_STATUS_POWER_UP (1<<7)
  67. #define OMAP_RTC_STATUS_ALARM (1<<6)
  68. #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
  69. #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
  70. #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
  71. #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
  72. #define OMAP_RTC_STATUS_RUN (1<<1)
  73. #define OMAP_RTC_STATUS_BUSY (1<<0)
  74. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  75. #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
  76. #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
  77. static void __iomem *rtc_base;
  78. #define rtc_read(addr) __raw_readb(rtc_base + (addr))
  79. #define rtc_write(val, addr) __raw_writeb(val, rtc_base + (addr))
  80. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  81. * so the only other requirement is that register accesses which
  82. * require BUSY to be clear are made with IRQs locally disabled
  83. */
  84. static void rtc_wait_not_busy(void)
  85. {
  86. int count = 0;
  87. u8 status;
  88. /* BUSY may stay active for 1/32768 second (~30 usec) */
  89. for (count = 0; count < 50; count++) {
  90. status = rtc_read(OMAP_RTC_STATUS_REG);
  91. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  92. break;
  93. udelay(1);
  94. }
  95. /* now we have ~15 usec to read/write various registers */
  96. }
  97. static irqreturn_t rtc_irq(int irq, void *rtc)
  98. {
  99. unsigned long events = 0;
  100. u8 irq_data;
  101. irq_data = rtc_read(OMAP_RTC_STATUS_REG);
  102. /* alarm irq? */
  103. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  104. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  105. events |= RTC_IRQF | RTC_AF;
  106. }
  107. /* 1/sec periodic/update irq? */
  108. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  109. events |= RTC_IRQF | RTC_UF;
  110. rtc_update_irq(rtc, 1, events);
  111. return IRQ_HANDLED;
  112. }
  113. #ifdef CONFIG_RTC_INTF_DEV
  114. static int
  115. omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  116. {
  117. u8 reg;
  118. switch (cmd) {
  119. case RTC_AIE_OFF:
  120. case RTC_AIE_ON:
  121. case RTC_UIE_OFF:
  122. case RTC_UIE_ON:
  123. break;
  124. default:
  125. return -ENOIOCTLCMD;
  126. }
  127. local_irq_disable();
  128. rtc_wait_not_busy();
  129. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  130. switch (cmd) {
  131. /* AIE = Alarm Interrupt Enable */
  132. case RTC_AIE_OFF:
  133. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  134. break;
  135. case RTC_AIE_ON:
  136. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  137. break;
  138. /* UIE = Update Interrupt Enable (1/second) */
  139. case RTC_UIE_OFF:
  140. reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
  141. break;
  142. case RTC_UIE_ON:
  143. reg |= OMAP_RTC_INTERRUPTS_IT_TIMER;
  144. break;
  145. }
  146. rtc_wait_not_busy();
  147. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  148. local_irq_enable();
  149. return 0;
  150. }
  151. #else
  152. #define omap_rtc_ioctl NULL
  153. #endif
  154. /* this hardware doesn't support "don't care" alarm fields */
  155. static int tm2bcd(struct rtc_time *tm)
  156. {
  157. if (rtc_valid_tm(tm) != 0)
  158. return -EINVAL;
  159. tm->tm_sec = bin2bcd(tm->tm_sec);
  160. tm->tm_min = bin2bcd(tm->tm_min);
  161. tm->tm_hour = bin2bcd(tm->tm_hour);
  162. tm->tm_mday = bin2bcd(tm->tm_mday);
  163. tm->tm_mon = bin2bcd(tm->tm_mon + 1);
  164. /* epoch == 1900 */
  165. if (tm->tm_year < 100 || tm->tm_year > 199)
  166. return -EINVAL;
  167. tm->tm_year = bin2bcd(tm->tm_year - 100);
  168. return 0;
  169. }
  170. static void bcd2tm(struct rtc_time *tm)
  171. {
  172. tm->tm_sec = bcd2bin(tm->tm_sec);
  173. tm->tm_min = bcd2bin(tm->tm_min);
  174. tm->tm_hour = bcd2bin(tm->tm_hour);
  175. tm->tm_mday = bcd2bin(tm->tm_mday);
  176. tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
  177. /* epoch == 1900 */
  178. tm->tm_year = bcd2bin(tm->tm_year) + 100;
  179. }
  180. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  181. {
  182. /* we don't report wday/yday/isdst ... */
  183. local_irq_disable();
  184. rtc_wait_not_busy();
  185. tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
  186. tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
  187. tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
  188. tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
  189. tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
  190. tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
  191. local_irq_enable();
  192. bcd2tm(tm);
  193. return 0;
  194. }
  195. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  196. {
  197. if (tm2bcd(tm) < 0)
  198. return -EINVAL;
  199. local_irq_disable();
  200. rtc_wait_not_busy();
  201. rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
  202. rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
  203. rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
  204. rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
  205. rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
  206. rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
  207. local_irq_enable();
  208. return 0;
  209. }
  210. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  211. {
  212. local_irq_disable();
  213. rtc_wait_not_busy();
  214. alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
  215. alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
  216. alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
  217. alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
  218. alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
  219. alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
  220. local_irq_enable();
  221. bcd2tm(&alm->time);
  222. alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
  223. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  224. return 0;
  225. }
  226. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  227. {
  228. u8 reg;
  229. if (tm2bcd(&alm->time) < 0)
  230. return -EINVAL;
  231. local_irq_disable();
  232. rtc_wait_not_busy();
  233. rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
  234. rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
  235. rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
  236. rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
  237. rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
  238. rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
  239. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  240. if (alm->enabled)
  241. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  242. else
  243. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  244. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  245. local_irq_enable();
  246. return 0;
  247. }
  248. static struct rtc_class_ops omap_rtc_ops = {
  249. .ioctl = omap_rtc_ioctl,
  250. .read_time = omap_rtc_read_time,
  251. .set_time = omap_rtc_set_time,
  252. .read_alarm = omap_rtc_read_alarm,
  253. .set_alarm = omap_rtc_set_alarm,
  254. };
  255. static int omap_rtc_alarm;
  256. static int omap_rtc_timer;
  257. static int __init omap_rtc_probe(struct platform_device *pdev)
  258. {
  259. struct resource *res, *mem;
  260. struct rtc_device *rtc;
  261. u8 reg, new_ctrl;
  262. omap_rtc_timer = platform_get_irq(pdev, 0);
  263. if (omap_rtc_timer <= 0) {
  264. pr_debug("%s: no update irq?\n", pdev->name);
  265. return -ENOENT;
  266. }
  267. omap_rtc_alarm = platform_get_irq(pdev, 1);
  268. if (omap_rtc_alarm <= 0) {
  269. pr_debug("%s: no alarm irq?\n", pdev->name);
  270. return -ENOENT;
  271. }
  272. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  273. if (!res) {
  274. pr_debug("%s: RTC resource data missing\n", pdev->name);
  275. return -ENOENT;
  276. }
  277. mem = request_mem_region(res->start, resource_size(res), pdev->name);
  278. if (!mem) {
  279. pr_debug("%s: RTC registers at %08x are not free\n",
  280. pdev->name, res->start);
  281. return -EBUSY;
  282. }
  283. rtc_base = ioremap(res->start, resource_size(res));
  284. if (!rtc_base) {
  285. pr_debug("%s: RTC registers can't be mapped\n", pdev->name);
  286. goto fail;
  287. }
  288. rtc = rtc_device_register(pdev->name, &pdev->dev,
  289. &omap_rtc_ops, THIS_MODULE);
  290. if (IS_ERR(rtc)) {
  291. pr_debug("%s: can't register RTC device, err %ld\n",
  292. pdev->name, PTR_ERR(rtc));
  293. goto fail0;
  294. }
  295. platform_set_drvdata(pdev, rtc);
  296. dev_set_drvdata(&rtc->dev, mem);
  297. /* clear pending irqs, and set 1/second periodic,
  298. * which we'll use instead of update irqs
  299. */
  300. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  301. /* clear old status */
  302. reg = rtc_read(OMAP_RTC_STATUS_REG);
  303. if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
  304. pr_info("%s: RTC power up reset detected\n",
  305. pdev->name);
  306. rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
  307. }
  308. if (reg & (u8) OMAP_RTC_STATUS_ALARM)
  309. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  310. /* handle periodic and alarm irqs */
  311. if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
  312. dev_name(&rtc->dev), rtc)) {
  313. pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
  314. pdev->name, omap_rtc_timer);
  315. goto fail1;
  316. }
  317. if ((omap_rtc_timer != omap_rtc_alarm) &&
  318. (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
  319. dev_name(&rtc->dev), rtc))) {
  320. pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
  321. pdev->name, omap_rtc_alarm);
  322. goto fail2;
  323. }
  324. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  325. reg = rtc_read(OMAP_RTC_CTRL_REG);
  326. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  327. pr_info("%s: already running\n", pdev->name);
  328. /* force to 24 hour mode */
  329. new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  330. new_ctrl |= OMAP_RTC_CTRL_STOP;
  331. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  332. *
  333. * - Boards wired so that RTC_WAKE_INT does something, and muxed
  334. * right (W13_1610_RTC_WAKE_INT is the default after chip reset),
  335. * should initialize the device wakeup flag appropriately.
  336. *
  337. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  338. * rather than nPWRON_RESET, should forcibly enable split
  339. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  340. * is write-only, and always reads as zero...)
  341. */
  342. device_init_wakeup(&pdev->dev, 0);
  343. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  344. pr_info("%s: split power mode\n", pdev->name);
  345. if (reg != new_ctrl)
  346. rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
  347. return 0;
  348. fail2:
  349. free_irq(omap_rtc_timer, NULL);
  350. fail1:
  351. rtc_device_unregister(rtc);
  352. fail0:
  353. iounmap(rtc_base);
  354. fail:
  355. release_resource(mem);
  356. return -EIO;
  357. }
  358. static int __exit omap_rtc_remove(struct platform_device *pdev)
  359. {
  360. struct rtc_device *rtc = platform_get_drvdata(pdev);
  361. device_init_wakeup(&pdev->dev, 0);
  362. /* leave rtc running, but disable irqs */
  363. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  364. free_irq(omap_rtc_timer, rtc);
  365. if (omap_rtc_timer != omap_rtc_alarm)
  366. free_irq(omap_rtc_alarm, rtc);
  367. release_resource(dev_get_drvdata(&rtc->dev));
  368. rtc_device_unregister(rtc);
  369. return 0;
  370. }
  371. #ifdef CONFIG_PM
  372. static u8 irqstat;
  373. static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  374. {
  375. irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  376. /* FIXME the RTC alarm is not currently acting as a wakeup event
  377. * source, and in fact this enable() call is just saving a flag
  378. * that's never used...
  379. */
  380. if (device_may_wakeup(&pdev->dev))
  381. enable_irq_wake(omap_rtc_alarm);
  382. else
  383. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  384. return 0;
  385. }
  386. static int omap_rtc_resume(struct platform_device *pdev)
  387. {
  388. if (device_may_wakeup(&pdev->dev))
  389. disable_irq_wake(omap_rtc_alarm);
  390. else
  391. rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
  392. return 0;
  393. }
  394. #else
  395. #define omap_rtc_suspend NULL
  396. #define omap_rtc_resume NULL
  397. #endif
  398. static void omap_rtc_shutdown(struct platform_device *pdev)
  399. {
  400. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  401. }
  402. MODULE_ALIAS("platform:omap_rtc");
  403. static struct platform_driver omap_rtc_driver = {
  404. .remove = __exit_p(omap_rtc_remove),
  405. .suspend = omap_rtc_suspend,
  406. .resume = omap_rtc_resume,
  407. .shutdown = omap_rtc_shutdown,
  408. .driver = {
  409. .name = "omap_rtc",
  410. .owner = THIS_MODULE,
  411. },
  412. };
  413. static int __init rtc_init(void)
  414. {
  415. return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
  416. }
  417. module_init(rtc_init);
  418. static void __exit rtc_exit(void)
  419. {
  420. platform_driver_unregister(&omap_rtc_driver);
  421. }
  422. module_exit(rtc_exit);
  423. MODULE_AUTHOR("George G. Davis (and others)");
  424. MODULE_LICENSE("GPL");