wm831x-dcdc.c 26 KB

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  1. /*
  2. * wm831x-dcdc.c -- DC-DC buck convertor driver for the WM831x series
  3. *
  4. * Copyright 2009 Wolfson Microelectronics PLC.
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License as published by the
  10. * Free Software Foundation; either version 2 of the License, or (at your
  11. * option) any later version.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/bitops.h>
  17. #include <linux/err.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/driver.h>
  21. #include <linux/regulator/machine.h>
  22. #include <linux/gpio.h>
  23. #include <linux/mfd/wm831x/core.h>
  24. #include <linux/mfd/wm831x/regulator.h>
  25. #include <linux/mfd/wm831x/pdata.h>
  26. #define WM831X_BUCKV_MAX_SELECTOR 0x68
  27. #define WM831X_BUCKP_MAX_SELECTOR 0x66
  28. #define WM831X_DCDC_MODE_FAST 0
  29. #define WM831X_DCDC_MODE_NORMAL 1
  30. #define WM831X_DCDC_MODE_IDLE 2
  31. #define WM831X_DCDC_MODE_STANDBY 3
  32. #define WM831X_DCDC_MAX_NAME 6
  33. /* Register offsets in control block */
  34. #define WM831X_DCDC_CONTROL_1 0
  35. #define WM831X_DCDC_CONTROL_2 1
  36. #define WM831X_DCDC_ON_CONFIG 2
  37. #define WM831X_DCDC_SLEEP_CONTROL 3
  38. #define WM831X_DCDC_DVS_CONTROL 4
  39. /*
  40. * Shared
  41. */
  42. struct wm831x_dcdc {
  43. char name[WM831X_DCDC_MAX_NAME];
  44. struct regulator_desc desc;
  45. int base;
  46. struct wm831x *wm831x;
  47. struct regulator_dev *regulator;
  48. int dvs_gpio;
  49. int dvs_gpio_state;
  50. int on_vsel;
  51. int dvs_vsel;
  52. };
  53. static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
  54. {
  55. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  56. struct wm831x *wm831x = dcdc->wm831x;
  57. int mask = 1 << rdev_get_id(rdev);
  58. int reg;
  59. reg = wm831x_reg_read(wm831x, WM831X_DCDC_ENABLE);
  60. if (reg < 0)
  61. return reg;
  62. if (reg & mask)
  63. return 1;
  64. else
  65. return 0;
  66. }
  67. static int wm831x_dcdc_enable(struct regulator_dev *rdev)
  68. {
  69. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  70. struct wm831x *wm831x = dcdc->wm831x;
  71. int mask = 1 << rdev_get_id(rdev);
  72. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, mask);
  73. }
  74. static int wm831x_dcdc_disable(struct regulator_dev *rdev)
  75. {
  76. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  77. struct wm831x *wm831x = dcdc->wm831x;
  78. int mask = 1 << rdev_get_id(rdev);
  79. return wm831x_set_bits(wm831x, WM831X_DCDC_ENABLE, mask, 0);
  80. }
  81. static unsigned int wm831x_dcdc_get_mode(struct regulator_dev *rdev)
  82. {
  83. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  84. struct wm831x *wm831x = dcdc->wm831x;
  85. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  86. int val;
  87. val = wm831x_reg_read(wm831x, reg);
  88. if (val < 0)
  89. return val;
  90. val = (val & WM831X_DC1_ON_MODE_MASK) >> WM831X_DC1_ON_MODE_SHIFT;
  91. switch (val) {
  92. case WM831X_DCDC_MODE_FAST:
  93. return REGULATOR_MODE_FAST;
  94. case WM831X_DCDC_MODE_NORMAL:
  95. return REGULATOR_MODE_NORMAL;
  96. case WM831X_DCDC_MODE_STANDBY:
  97. return REGULATOR_MODE_STANDBY;
  98. case WM831X_DCDC_MODE_IDLE:
  99. return REGULATOR_MODE_IDLE;
  100. default:
  101. BUG();
  102. }
  103. }
  104. static int wm831x_dcdc_set_mode_int(struct wm831x *wm831x, int reg,
  105. unsigned int mode)
  106. {
  107. int val;
  108. switch (mode) {
  109. case REGULATOR_MODE_FAST:
  110. val = WM831X_DCDC_MODE_FAST;
  111. break;
  112. case REGULATOR_MODE_NORMAL:
  113. val = WM831X_DCDC_MODE_NORMAL;
  114. break;
  115. case REGULATOR_MODE_STANDBY:
  116. val = WM831X_DCDC_MODE_STANDBY;
  117. break;
  118. case REGULATOR_MODE_IDLE:
  119. val = WM831X_DCDC_MODE_IDLE;
  120. break;
  121. default:
  122. return -EINVAL;
  123. }
  124. return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_MODE_MASK,
  125. val << WM831X_DC1_ON_MODE_SHIFT);
  126. }
  127. static int wm831x_dcdc_set_mode(struct regulator_dev *rdev, unsigned int mode)
  128. {
  129. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  130. struct wm831x *wm831x = dcdc->wm831x;
  131. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  132. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  133. }
  134. static int wm831x_dcdc_set_suspend_mode(struct regulator_dev *rdev,
  135. unsigned int mode)
  136. {
  137. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  138. struct wm831x *wm831x = dcdc->wm831x;
  139. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  140. return wm831x_dcdc_set_mode_int(wm831x, reg, mode);
  141. }
  142. static int wm831x_dcdc_get_status(struct regulator_dev *rdev)
  143. {
  144. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  145. struct wm831x *wm831x = dcdc->wm831x;
  146. int ret;
  147. /* First, check for errors */
  148. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  149. if (ret < 0)
  150. return ret;
  151. if (ret & (1 << rdev_get_id(rdev))) {
  152. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  153. rdev_get_id(rdev) + 1);
  154. return REGULATOR_STATUS_ERROR;
  155. }
  156. /* DCDC1 and DCDC2 can additionally detect high voltage/current */
  157. if (rdev_get_id(rdev) < 2) {
  158. if (ret & (WM831X_DC1_OV_STS << rdev_get_id(rdev))) {
  159. dev_dbg(wm831x->dev, "DCDC%d over voltage\n",
  160. rdev_get_id(rdev) + 1);
  161. return REGULATOR_STATUS_ERROR;
  162. }
  163. if (ret & (WM831X_DC1_HC_STS << rdev_get_id(rdev))) {
  164. dev_dbg(wm831x->dev, "DCDC%d over current\n",
  165. rdev_get_id(rdev) + 1);
  166. return REGULATOR_STATUS_ERROR;
  167. }
  168. }
  169. /* Is the regulator on? */
  170. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  171. if (ret < 0)
  172. return ret;
  173. if (!(ret & (1 << rdev_get_id(rdev))))
  174. return REGULATOR_STATUS_OFF;
  175. /* TODO: When we handle hardware control modes so we can report the
  176. * current mode. */
  177. return REGULATOR_STATUS_ON;
  178. }
  179. static irqreturn_t wm831x_dcdc_uv_irq(int irq, void *data)
  180. {
  181. struct wm831x_dcdc *dcdc = data;
  182. regulator_notifier_call_chain(dcdc->regulator,
  183. REGULATOR_EVENT_UNDER_VOLTAGE,
  184. NULL);
  185. return IRQ_HANDLED;
  186. }
  187. static irqreturn_t wm831x_dcdc_oc_irq(int irq, void *data)
  188. {
  189. struct wm831x_dcdc *dcdc = data;
  190. regulator_notifier_call_chain(dcdc->regulator,
  191. REGULATOR_EVENT_OVER_CURRENT,
  192. NULL);
  193. return IRQ_HANDLED;
  194. }
  195. /*
  196. * BUCKV specifics
  197. */
  198. static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
  199. unsigned selector)
  200. {
  201. if (selector <= 0x8)
  202. return 600000;
  203. if (selector <= WM831X_BUCKV_MAX_SELECTOR)
  204. return 600000 + ((selector - 0x8) * 12500);
  205. return -EINVAL;
  206. }
  207. static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
  208. int min_uV, int max_uV)
  209. {
  210. u16 vsel;
  211. if (min_uV < 600000)
  212. vsel = 0;
  213. else if (min_uV <= 1800000)
  214. vsel = ((min_uV - 600000) / 12500) + 8;
  215. else
  216. return -EINVAL;
  217. if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
  218. return -EINVAL;
  219. return vsel;
  220. }
  221. static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev,
  222. int min_uV, int max_uV)
  223. {
  224. u16 vsel;
  225. if (max_uV < 600000 || max_uV > 1800000)
  226. return -EINVAL;
  227. vsel = ((max_uV - 600000) / 12500) + 8;
  228. if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV ||
  229. wm831x_buckv_list_voltage(rdev, vsel) < max_uV)
  230. return -EINVAL;
  231. return vsel;
  232. }
  233. static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
  234. {
  235. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  236. if (state == dcdc->dvs_gpio_state)
  237. return 0;
  238. dcdc->dvs_gpio_state = state;
  239. gpio_set_value(dcdc->dvs_gpio, state);
  240. /* Should wait for DVS state change to be asserted if we have
  241. * a GPIO for it, for now assume the device is configured
  242. * for the fastest possible transition.
  243. */
  244. return 0;
  245. }
  246. static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
  247. int min_uV, int max_uV)
  248. {
  249. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  250. struct wm831x *wm831x = dcdc->wm831x;
  251. int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  252. int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
  253. int vsel, ret;
  254. vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
  255. if (vsel < 0)
  256. return vsel;
  257. /* If this value is already set then do a GPIO update if we can */
  258. if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
  259. return wm831x_buckv_set_dvs(rdev, 0);
  260. if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
  261. return wm831x_buckv_set_dvs(rdev, 1);
  262. /* Always set the ON status to the minimum voltage */
  263. ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
  264. if (ret < 0)
  265. return ret;
  266. dcdc->on_vsel = vsel;
  267. if (!dcdc->dvs_gpio)
  268. return ret;
  269. /* Kick the voltage transition now */
  270. ret = wm831x_buckv_set_dvs(rdev, 0);
  271. if (ret < 0)
  272. return ret;
  273. /* Set the high voltage as the DVS voltage. This is optimised
  274. * for CPUfreq usage, most processors will keep the maximum
  275. * voltage constant and lower the minimum with the frequency. */
  276. vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV);
  277. if (vsel < 0) {
  278. /* This should never happen - at worst the same vsel
  279. * should be chosen */
  280. WARN_ON(vsel < 0);
  281. return 0;
  282. }
  283. /* Don't bother if it's the same VSEL we're already using */
  284. if (vsel == dcdc->on_vsel)
  285. return 0;
  286. ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel);
  287. if (ret == 0)
  288. dcdc->dvs_vsel = vsel;
  289. else
  290. dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n",
  291. ret);
  292. return 0;
  293. }
  294. static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
  295. int uV)
  296. {
  297. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  298. struct wm831x *wm831x = dcdc->wm831x;
  299. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  300. int vsel;
  301. vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
  302. if (vsel < 0)
  303. return vsel;
  304. return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
  305. }
  306. static int wm831x_buckv_get_voltage(struct regulator_dev *rdev)
  307. {
  308. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  309. if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
  310. return wm831x_buckv_list_voltage(rdev, dcdc->dvs_vsel);
  311. else
  312. return wm831x_buckv_list_voltage(rdev, dcdc->on_vsel);
  313. }
  314. /* Current limit options */
  315. static u16 wm831x_dcdc_ilim[] = {
  316. 125, 250, 375, 500, 625, 750, 875, 1000
  317. };
  318. static int wm831x_buckv_set_current_limit(struct regulator_dev *rdev,
  319. int min_uA, int max_uA)
  320. {
  321. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  322. struct wm831x *wm831x = dcdc->wm831x;
  323. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  324. int i;
  325. for (i = 0; i < ARRAY_SIZE(wm831x_dcdc_ilim); i++) {
  326. if (max_uA <= wm831x_dcdc_ilim[i])
  327. break;
  328. }
  329. if (i == ARRAY_SIZE(wm831x_dcdc_ilim))
  330. return -EINVAL;
  331. return wm831x_set_bits(wm831x, reg, WM831X_DC1_HC_THR_MASK, i);
  332. }
  333. static int wm831x_buckv_get_current_limit(struct regulator_dev *rdev)
  334. {
  335. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  336. struct wm831x *wm831x = dcdc->wm831x;
  337. u16 reg = dcdc->base + WM831X_DCDC_CONTROL_2;
  338. int val;
  339. val = wm831x_reg_read(wm831x, reg);
  340. if (val < 0)
  341. return val;
  342. return wm831x_dcdc_ilim[val & WM831X_DC1_HC_THR_MASK];
  343. }
  344. static struct regulator_ops wm831x_buckv_ops = {
  345. .set_voltage = wm831x_buckv_set_voltage,
  346. .get_voltage = wm831x_buckv_get_voltage,
  347. .list_voltage = wm831x_buckv_list_voltage,
  348. .set_suspend_voltage = wm831x_buckv_set_suspend_voltage,
  349. .set_current_limit = wm831x_buckv_set_current_limit,
  350. .get_current_limit = wm831x_buckv_get_current_limit,
  351. .is_enabled = wm831x_dcdc_is_enabled,
  352. .enable = wm831x_dcdc_enable,
  353. .disable = wm831x_dcdc_disable,
  354. .get_status = wm831x_dcdc_get_status,
  355. .get_mode = wm831x_dcdc_get_mode,
  356. .set_mode = wm831x_dcdc_set_mode,
  357. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  358. };
  359. /*
  360. * Set up DVS control. We just log errors since we can still run
  361. * (with reduced performance) if we fail.
  362. */
  363. static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
  364. struct wm831x_buckv_pdata *pdata)
  365. {
  366. struct wm831x *wm831x = dcdc->wm831x;
  367. int ret;
  368. u16 ctrl;
  369. if (!pdata || !pdata->dvs_gpio)
  370. return;
  371. switch (pdata->dvs_control_src) {
  372. case 1:
  373. ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
  374. break;
  375. case 2:
  376. ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
  377. break;
  378. default:
  379. dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
  380. pdata->dvs_control_src, dcdc->name);
  381. return;
  382. }
  383. ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
  384. WM831X_DC1_DVS_SRC_MASK, ctrl);
  385. if (ret < 0) {
  386. dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
  387. dcdc->name, ret);
  388. return;
  389. }
  390. ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
  391. if (ret < 0) {
  392. dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
  393. dcdc->name, ret);
  394. return;
  395. }
  396. /* gpiolib won't let us read the GPIO status so pick the higher
  397. * of the two existing voltages so we take it as platform data.
  398. */
  399. dcdc->dvs_gpio_state = pdata->dvs_init_state;
  400. ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
  401. if (ret < 0) {
  402. dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
  403. dcdc->name, ret);
  404. gpio_free(pdata->dvs_gpio);
  405. return;
  406. }
  407. dcdc->dvs_gpio = pdata->dvs_gpio;
  408. }
  409. static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
  410. {
  411. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  412. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  413. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  414. struct wm831x_dcdc *dcdc;
  415. struct resource *res;
  416. int ret, irq;
  417. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  418. if (pdata == NULL || pdata->dcdc[id] == NULL)
  419. return -ENODEV;
  420. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  421. if (dcdc == NULL) {
  422. dev_err(&pdev->dev, "Unable to allocate private data\n");
  423. return -ENOMEM;
  424. }
  425. dcdc->wm831x = wm831x;
  426. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  427. if (res == NULL) {
  428. dev_err(&pdev->dev, "No I/O resource\n");
  429. ret = -EINVAL;
  430. goto err;
  431. }
  432. dcdc->base = res->start;
  433. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  434. dcdc->desc.name = dcdc->name;
  435. dcdc->desc.id = id;
  436. dcdc->desc.type = REGULATOR_VOLTAGE;
  437. dcdc->desc.n_voltages = WM831X_BUCKV_MAX_SELECTOR + 1;
  438. dcdc->desc.ops = &wm831x_buckv_ops;
  439. dcdc->desc.owner = THIS_MODULE;
  440. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  441. if (ret < 0) {
  442. dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
  443. goto err;
  444. }
  445. dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
  446. ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
  447. if (ret < 0) {
  448. dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
  449. goto err;
  450. }
  451. dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
  452. if (pdata->dcdc[id])
  453. wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
  454. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  455. pdata->dcdc[id], dcdc);
  456. if (IS_ERR(dcdc->regulator)) {
  457. ret = PTR_ERR(dcdc->regulator);
  458. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  459. id + 1, ret);
  460. goto err;
  461. }
  462. irq = platform_get_irq_byname(pdev, "UV");
  463. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  464. IRQF_TRIGGER_RISING, dcdc->name,
  465. dcdc);
  466. if (ret != 0) {
  467. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  468. irq, ret);
  469. goto err_regulator;
  470. }
  471. irq = platform_get_irq_byname(pdev, "HC");
  472. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_oc_irq,
  473. IRQF_TRIGGER_RISING, dcdc->name,
  474. dcdc);
  475. if (ret != 0) {
  476. dev_err(&pdev->dev, "Failed to request HC IRQ %d: %d\n",
  477. irq, ret);
  478. goto err_uv;
  479. }
  480. platform_set_drvdata(pdev, dcdc);
  481. return 0;
  482. err_uv:
  483. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  484. err_regulator:
  485. regulator_unregister(dcdc->regulator);
  486. err:
  487. if (dcdc->dvs_gpio)
  488. gpio_free(dcdc->dvs_gpio);
  489. kfree(dcdc);
  490. return ret;
  491. }
  492. static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
  493. {
  494. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  495. struct wm831x *wm831x = dcdc->wm831x;
  496. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc);
  497. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  498. regulator_unregister(dcdc->regulator);
  499. if (dcdc->dvs_gpio)
  500. gpio_free(dcdc->dvs_gpio);
  501. kfree(dcdc);
  502. return 0;
  503. }
  504. static struct platform_driver wm831x_buckv_driver = {
  505. .probe = wm831x_buckv_probe,
  506. .remove = __devexit_p(wm831x_buckv_remove),
  507. .driver = {
  508. .name = "wm831x-buckv",
  509. },
  510. };
  511. /*
  512. * BUCKP specifics
  513. */
  514. static int wm831x_buckp_list_voltage(struct regulator_dev *rdev,
  515. unsigned selector)
  516. {
  517. if (selector <= WM831X_BUCKP_MAX_SELECTOR)
  518. return 850000 + (selector * 25000);
  519. else
  520. return -EINVAL;
  521. }
  522. static int wm831x_buckp_set_voltage_int(struct regulator_dev *rdev, int reg,
  523. int min_uV, int max_uV)
  524. {
  525. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  526. struct wm831x *wm831x = dcdc->wm831x;
  527. u16 vsel;
  528. if (min_uV <= 34000000)
  529. vsel = (min_uV - 850000) / 25000;
  530. else
  531. return -EINVAL;
  532. if (wm831x_buckp_list_voltage(rdev, vsel) > max_uV)
  533. return -EINVAL;
  534. return wm831x_set_bits(wm831x, reg, WM831X_DC3_ON_VSEL_MASK, vsel);
  535. }
  536. static int wm831x_buckp_set_voltage(struct regulator_dev *rdev,
  537. int min_uV, int max_uV)
  538. {
  539. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  540. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  541. return wm831x_buckp_set_voltage_int(rdev, reg, min_uV, max_uV);
  542. }
  543. static int wm831x_buckp_set_suspend_voltage(struct regulator_dev *rdev,
  544. int uV)
  545. {
  546. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  547. u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
  548. return wm831x_buckp_set_voltage_int(rdev, reg, uV, uV);
  549. }
  550. static int wm831x_buckp_get_voltage(struct regulator_dev *rdev)
  551. {
  552. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  553. struct wm831x *wm831x = dcdc->wm831x;
  554. u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
  555. int val;
  556. val = wm831x_reg_read(wm831x, reg);
  557. if (val < 0)
  558. return val;
  559. return wm831x_buckp_list_voltage(rdev, val & WM831X_DC3_ON_VSEL_MASK);
  560. }
  561. static struct regulator_ops wm831x_buckp_ops = {
  562. .set_voltage = wm831x_buckp_set_voltage,
  563. .get_voltage = wm831x_buckp_get_voltage,
  564. .list_voltage = wm831x_buckp_list_voltage,
  565. .set_suspend_voltage = wm831x_buckp_set_suspend_voltage,
  566. .is_enabled = wm831x_dcdc_is_enabled,
  567. .enable = wm831x_dcdc_enable,
  568. .disable = wm831x_dcdc_disable,
  569. .get_status = wm831x_dcdc_get_status,
  570. .get_mode = wm831x_dcdc_get_mode,
  571. .set_mode = wm831x_dcdc_set_mode,
  572. .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
  573. };
  574. static __devinit int wm831x_buckp_probe(struct platform_device *pdev)
  575. {
  576. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  577. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  578. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  579. struct wm831x_dcdc *dcdc;
  580. struct resource *res;
  581. int ret, irq;
  582. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  583. if (pdata == NULL || pdata->dcdc[id] == NULL)
  584. return -ENODEV;
  585. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  586. if (dcdc == NULL) {
  587. dev_err(&pdev->dev, "Unable to allocate private data\n");
  588. return -ENOMEM;
  589. }
  590. dcdc->wm831x = wm831x;
  591. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  592. if (res == NULL) {
  593. dev_err(&pdev->dev, "No I/O resource\n");
  594. ret = -EINVAL;
  595. goto err;
  596. }
  597. dcdc->base = res->start;
  598. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  599. dcdc->desc.name = dcdc->name;
  600. dcdc->desc.id = id;
  601. dcdc->desc.type = REGULATOR_VOLTAGE;
  602. dcdc->desc.n_voltages = WM831X_BUCKP_MAX_SELECTOR + 1;
  603. dcdc->desc.ops = &wm831x_buckp_ops;
  604. dcdc->desc.owner = THIS_MODULE;
  605. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  606. pdata->dcdc[id], dcdc);
  607. if (IS_ERR(dcdc->regulator)) {
  608. ret = PTR_ERR(dcdc->regulator);
  609. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  610. id + 1, ret);
  611. goto err;
  612. }
  613. irq = platform_get_irq_byname(pdev, "UV");
  614. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  615. IRQF_TRIGGER_RISING, dcdc->name,
  616. dcdc);
  617. if (ret != 0) {
  618. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  619. irq, ret);
  620. goto err_regulator;
  621. }
  622. platform_set_drvdata(pdev, dcdc);
  623. return 0;
  624. err_regulator:
  625. regulator_unregister(dcdc->regulator);
  626. err:
  627. kfree(dcdc);
  628. return ret;
  629. }
  630. static __devexit int wm831x_buckp_remove(struct platform_device *pdev)
  631. {
  632. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  633. struct wm831x *wm831x = dcdc->wm831x;
  634. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  635. regulator_unregister(dcdc->regulator);
  636. kfree(dcdc);
  637. return 0;
  638. }
  639. static struct platform_driver wm831x_buckp_driver = {
  640. .probe = wm831x_buckp_probe,
  641. .remove = __devexit_p(wm831x_buckp_remove),
  642. .driver = {
  643. .name = "wm831x-buckp",
  644. },
  645. };
  646. /*
  647. * DCDC boost convertors
  648. */
  649. static int wm831x_boostp_get_status(struct regulator_dev *rdev)
  650. {
  651. struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
  652. struct wm831x *wm831x = dcdc->wm831x;
  653. int ret;
  654. /* First, check for errors */
  655. ret = wm831x_reg_read(wm831x, WM831X_DCDC_UV_STATUS);
  656. if (ret < 0)
  657. return ret;
  658. if (ret & (1 << rdev_get_id(rdev))) {
  659. dev_dbg(wm831x->dev, "DCDC%d under voltage\n",
  660. rdev_get_id(rdev) + 1);
  661. return REGULATOR_STATUS_ERROR;
  662. }
  663. /* Is the regulator on? */
  664. ret = wm831x_reg_read(wm831x, WM831X_DCDC_STATUS);
  665. if (ret < 0)
  666. return ret;
  667. if (ret & (1 << rdev_get_id(rdev)))
  668. return REGULATOR_STATUS_ON;
  669. else
  670. return REGULATOR_STATUS_OFF;
  671. }
  672. static struct regulator_ops wm831x_boostp_ops = {
  673. .get_status = wm831x_boostp_get_status,
  674. .is_enabled = wm831x_dcdc_is_enabled,
  675. .enable = wm831x_dcdc_enable,
  676. .disable = wm831x_dcdc_disable,
  677. };
  678. static __devinit int wm831x_boostp_probe(struct platform_device *pdev)
  679. {
  680. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  681. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  682. int id = pdev->id % ARRAY_SIZE(pdata->dcdc);
  683. struct wm831x_dcdc *dcdc;
  684. struct resource *res;
  685. int ret, irq;
  686. dev_dbg(&pdev->dev, "Probing DCDC%d\n", id + 1);
  687. if (pdata == NULL || pdata->dcdc[id] == NULL)
  688. return -ENODEV;
  689. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  690. if (dcdc == NULL) {
  691. dev_err(&pdev->dev, "Unable to allocate private data\n");
  692. return -ENOMEM;
  693. }
  694. dcdc->wm831x = wm831x;
  695. res = platform_get_resource(pdev, IORESOURCE_IO, 0);
  696. if (res == NULL) {
  697. dev_err(&pdev->dev, "No I/O resource\n");
  698. ret = -EINVAL;
  699. goto err;
  700. }
  701. dcdc->base = res->start;
  702. snprintf(dcdc->name, sizeof(dcdc->name), "DCDC%d", id + 1);
  703. dcdc->desc.name = dcdc->name;
  704. dcdc->desc.id = id;
  705. dcdc->desc.type = REGULATOR_VOLTAGE;
  706. dcdc->desc.ops = &wm831x_boostp_ops;
  707. dcdc->desc.owner = THIS_MODULE;
  708. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  709. pdata->dcdc[id], dcdc);
  710. if (IS_ERR(dcdc->regulator)) {
  711. ret = PTR_ERR(dcdc->regulator);
  712. dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
  713. id + 1, ret);
  714. goto err;
  715. }
  716. irq = platform_get_irq_byname(pdev, "UV");
  717. ret = wm831x_request_irq(wm831x, irq, wm831x_dcdc_uv_irq,
  718. IRQF_TRIGGER_RISING, dcdc->name,
  719. dcdc);
  720. if (ret != 0) {
  721. dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
  722. irq, ret);
  723. goto err_regulator;
  724. }
  725. platform_set_drvdata(pdev, dcdc);
  726. return 0;
  727. err_regulator:
  728. regulator_unregister(dcdc->regulator);
  729. err:
  730. kfree(dcdc);
  731. return ret;
  732. }
  733. static __devexit int wm831x_boostp_remove(struct platform_device *pdev)
  734. {
  735. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  736. struct wm831x *wm831x = dcdc->wm831x;
  737. wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
  738. regulator_unregister(dcdc->regulator);
  739. kfree(dcdc);
  740. return 0;
  741. }
  742. static struct platform_driver wm831x_boostp_driver = {
  743. .probe = wm831x_boostp_probe,
  744. .remove = __devexit_p(wm831x_boostp_remove),
  745. .driver = {
  746. .name = "wm831x-boostp",
  747. },
  748. };
  749. /*
  750. * External Power Enable
  751. *
  752. * These aren't actually DCDCs but look like them in hardware so share
  753. * code.
  754. */
  755. #define WM831X_EPE_BASE 6
  756. static struct regulator_ops wm831x_epe_ops = {
  757. .is_enabled = wm831x_dcdc_is_enabled,
  758. .enable = wm831x_dcdc_enable,
  759. .disable = wm831x_dcdc_disable,
  760. .get_status = wm831x_dcdc_get_status,
  761. };
  762. static __devinit int wm831x_epe_probe(struct platform_device *pdev)
  763. {
  764. struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
  765. struct wm831x_pdata *pdata = wm831x->dev->platform_data;
  766. int id = pdev->id % ARRAY_SIZE(pdata->epe);
  767. struct wm831x_dcdc *dcdc;
  768. int ret;
  769. dev_dbg(&pdev->dev, "Probing EPE%d\n", id + 1);
  770. if (pdata == NULL || pdata->epe[id] == NULL)
  771. return -ENODEV;
  772. dcdc = kzalloc(sizeof(struct wm831x_dcdc), GFP_KERNEL);
  773. if (dcdc == NULL) {
  774. dev_err(&pdev->dev, "Unable to allocate private data\n");
  775. return -ENOMEM;
  776. }
  777. dcdc->wm831x = wm831x;
  778. /* For current parts this is correct; probably need to revisit
  779. * in future.
  780. */
  781. snprintf(dcdc->name, sizeof(dcdc->name), "EPE%d", id + 1);
  782. dcdc->desc.name = dcdc->name;
  783. dcdc->desc.id = id + WM831X_EPE_BASE; /* Offset in DCDC registers */
  784. dcdc->desc.ops = &wm831x_epe_ops;
  785. dcdc->desc.type = REGULATOR_VOLTAGE;
  786. dcdc->desc.owner = THIS_MODULE;
  787. dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
  788. pdata->epe[id], dcdc);
  789. if (IS_ERR(dcdc->regulator)) {
  790. ret = PTR_ERR(dcdc->regulator);
  791. dev_err(wm831x->dev, "Failed to register EPE%d: %d\n",
  792. id + 1, ret);
  793. goto err;
  794. }
  795. platform_set_drvdata(pdev, dcdc);
  796. return 0;
  797. err:
  798. kfree(dcdc);
  799. return ret;
  800. }
  801. static __devexit int wm831x_epe_remove(struct platform_device *pdev)
  802. {
  803. struct wm831x_dcdc *dcdc = platform_get_drvdata(pdev);
  804. regulator_unregister(dcdc->regulator);
  805. kfree(dcdc);
  806. return 0;
  807. }
  808. static struct platform_driver wm831x_epe_driver = {
  809. .probe = wm831x_epe_probe,
  810. .remove = __devexit_p(wm831x_epe_remove),
  811. .driver = {
  812. .name = "wm831x-epe",
  813. },
  814. };
  815. static int __init wm831x_dcdc_init(void)
  816. {
  817. int ret;
  818. ret = platform_driver_register(&wm831x_buckv_driver);
  819. if (ret != 0)
  820. pr_err("Failed to register WM831x BUCKV driver: %d\n", ret);
  821. ret = platform_driver_register(&wm831x_buckp_driver);
  822. if (ret != 0)
  823. pr_err("Failed to register WM831x BUCKP driver: %d\n", ret);
  824. ret = platform_driver_register(&wm831x_boostp_driver);
  825. if (ret != 0)
  826. pr_err("Failed to register WM831x BOOST driver: %d\n", ret);
  827. ret = platform_driver_register(&wm831x_epe_driver);
  828. if (ret != 0)
  829. pr_err("Failed to register WM831x EPE driver: %d\n", ret);
  830. return 0;
  831. }
  832. subsys_initcall(wm831x_dcdc_init);
  833. static void __exit wm831x_dcdc_exit(void)
  834. {
  835. platform_driver_unregister(&wm831x_epe_driver);
  836. platform_driver_unregister(&wm831x_boostp_driver);
  837. platform_driver_unregister(&wm831x_buckp_driver);
  838. platform_driver_unregister(&wm831x_buckv_driver);
  839. }
  840. module_exit(wm831x_dcdc_exit);
  841. /* Module information */
  842. MODULE_AUTHOR("Mark Brown");
  843. MODULE_DESCRIPTION("WM831x DC-DC convertor driver");
  844. MODULE_LICENSE("GPL");
  845. MODULE_ALIAS("platform:wm831x-buckv");
  846. MODULE_ALIAS("platform:wm831x-buckp");