wl1251_acx.h 35 KB

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  1. /*
  2. * This file is part of wl1251
  3. *
  4. * Copyright (c) 1998-2007 Texas Instruments Incorporated
  5. * Copyright (C) 2008 Nokia Corporation
  6. *
  7. * Contact: Kalle Valo <kalle.valo@nokia.com>
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * version 2 as published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  21. * 02110-1301 USA
  22. *
  23. */
  24. #ifndef __WL1251_ACX_H__
  25. #define __WL1251_ACX_H__
  26. #include "wl1251.h"
  27. #include "wl1251_cmd.h"
  28. /* Target's information element */
  29. struct acx_header {
  30. struct wl1251_cmd_header cmd;
  31. /* acx (or information element) header */
  32. u16 id;
  33. /* payload length (not including headers */
  34. u16 len;
  35. };
  36. struct acx_error_counter {
  37. struct acx_header header;
  38. /* The number of PLCP errors since the last time this */
  39. /* information element was interrogated. This field is */
  40. /* automatically cleared when it is interrogated.*/
  41. u32 PLCP_error;
  42. /* The number of FCS errors since the last time this */
  43. /* information element was interrogated. This field is */
  44. /* automatically cleared when it is interrogated.*/
  45. u32 FCS_error;
  46. /* The number of MPDUs without PLCP header errors received*/
  47. /* since the last time this information element was interrogated. */
  48. /* This field is automatically cleared when it is interrogated.*/
  49. u32 valid_frame;
  50. /* the number of missed sequence numbers in the squentially */
  51. /* values of frames seq numbers */
  52. u32 seq_num_miss;
  53. } __attribute__ ((packed));
  54. struct acx_revision {
  55. struct acx_header header;
  56. /*
  57. * The WiLink firmware version, an ASCII string x.x.x.x,
  58. * that uniquely identifies the current firmware.
  59. * The left most digit is incremented each time a
  60. * significant change is made to the firmware, such as
  61. * code redesign or new platform support.
  62. * The second digit is incremented when major enhancements
  63. * are added or major fixes are made.
  64. * The third digit is incremented for each GA release.
  65. * The fourth digit is incremented for each build.
  66. * The first two digits identify a firmware release version,
  67. * in other words, a unique set of features.
  68. * The first three digits identify a GA release.
  69. */
  70. char fw_version[20];
  71. /*
  72. * This 4 byte field specifies the WiLink hardware version.
  73. * bits 0 - 15: Reserved.
  74. * bits 16 - 23: Version ID - The WiLink version ID
  75. * (1 = first spin, 2 = second spin, and so on).
  76. * bits 24 - 31: Chip ID - The WiLink chip ID.
  77. */
  78. u32 hw_version;
  79. } __attribute__ ((packed));
  80. enum wl1251_psm_mode {
  81. /* Active mode */
  82. WL1251_PSM_CAM = 0,
  83. /* Power save mode */
  84. WL1251_PSM_PS = 1,
  85. /* Extreme low power */
  86. WL1251_PSM_ELP = 2,
  87. };
  88. struct acx_sleep_auth {
  89. struct acx_header header;
  90. /* The sleep level authorization of the device. */
  91. /* 0 - Always active*/
  92. /* 1 - Power down mode: light / fast sleep*/
  93. /* 2 - ELP mode: Deep / Max sleep*/
  94. u8 sleep_auth;
  95. u8 padding[3];
  96. } __attribute__ ((packed));
  97. enum {
  98. HOSTIF_PCI_MASTER_HOST_INDIRECT,
  99. HOSTIF_PCI_MASTER_HOST_DIRECT,
  100. HOSTIF_SLAVE,
  101. HOSTIF_PKT_RING,
  102. HOSTIF_DONTCARE = 0xFF
  103. };
  104. #define DEFAULT_UCAST_PRIORITY 0
  105. #define DEFAULT_RX_Q_PRIORITY 0
  106. #define DEFAULT_NUM_STATIONS 1
  107. #define DEFAULT_RXQ_PRIORITY 0 /* low 0 .. 15 high */
  108. #define DEFAULT_RXQ_TYPE 0x07 /* All frames, Data/Ctrl/Mgmt */
  109. #define TRACE_BUFFER_MAX_SIZE 256
  110. #define DP_RX_PACKET_RING_CHUNK_SIZE 1600
  111. #define DP_TX_PACKET_RING_CHUNK_SIZE 1600
  112. #define DP_RX_PACKET_RING_CHUNK_NUM 2
  113. #define DP_TX_PACKET_RING_CHUNK_NUM 2
  114. #define DP_TX_COMPLETE_TIME_OUT 20
  115. #define FW_TX_CMPLT_BLOCK_SIZE 16
  116. struct acx_data_path_params {
  117. struct acx_header header;
  118. u16 rx_packet_ring_chunk_size;
  119. u16 tx_packet_ring_chunk_size;
  120. u8 rx_packet_ring_chunk_num;
  121. u8 tx_packet_ring_chunk_num;
  122. /*
  123. * Maximum number of packets that can be gathered
  124. * in the TX complete ring before an interrupt
  125. * is generated.
  126. */
  127. u8 tx_complete_threshold;
  128. /* Number of pending TX complete entries in cyclic ring.*/
  129. u8 tx_complete_ring_depth;
  130. /*
  131. * Max num microseconds since a packet enters the TX
  132. * complete ring until an interrupt is generated.
  133. */
  134. u32 tx_complete_timeout;
  135. } __attribute__ ((packed));
  136. struct acx_data_path_params_resp {
  137. struct acx_header header;
  138. u16 rx_packet_ring_chunk_size;
  139. u16 tx_packet_ring_chunk_size;
  140. u8 rx_packet_ring_chunk_num;
  141. u8 tx_packet_ring_chunk_num;
  142. u8 pad[2];
  143. u32 rx_packet_ring_addr;
  144. u32 tx_packet_ring_addr;
  145. u32 rx_control_addr;
  146. u32 tx_control_addr;
  147. u32 tx_complete_addr;
  148. } __attribute__ ((packed));
  149. #define TX_MSDU_LIFETIME_MIN 0
  150. #define TX_MSDU_LIFETIME_MAX 3000
  151. #define TX_MSDU_LIFETIME_DEF 512
  152. #define RX_MSDU_LIFETIME_MIN 0
  153. #define RX_MSDU_LIFETIME_MAX 0xFFFFFFFF
  154. #define RX_MSDU_LIFETIME_DEF 512000
  155. struct acx_rx_msdu_lifetime {
  156. struct acx_header header;
  157. /*
  158. * The maximum amount of time, in TU, before the
  159. * firmware discards the MSDU.
  160. */
  161. u32 lifetime;
  162. } __attribute__ ((packed));
  163. /*
  164. * RX Config Options Table
  165. * Bit Definition
  166. * === ==========
  167. * 31:14 Reserved
  168. * 13 Copy RX Status - when set, write three receive status words
  169. * to top of rx'd MPDUs.
  170. * When cleared, do not write three status words (added rev 1.5)
  171. * 12 Reserved
  172. * 11 RX Complete upon FCS error - when set, give rx complete
  173. * interrupt for FCS errors, after the rx filtering, e.g. unicast
  174. * frames not to us with FCS error will not generate an interrupt.
  175. * 10 SSID Filter Enable - When set, the WiLink discards all beacon,
  176. * probe request, and probe response frames with an SSID that does
  177. * not match the SSID specified by the host in the START/JOIN
  178. * command.
  179. * When clear, the WiLink receives frames with any SSID.
  180. * 9 Broadcast Filter Enable - When set, the WiLink discards all
  181. * broadcast frames. When clear, the WiLink receives all received
  182. * broadcast frames.
  183. * 8:6 Reserved
  184. * 5 BSSID Filter Enable - When set, the WiLink discards any frames
  185. * with a BSSID that does not match the BSSID specified by the
  186. * host.
  187. * When clear, the WiLink receives frames from any BSSID.
  188. * 4 MAC Addr Filter - When set, the WiLink discards any frames
  189. * with a destination address that does not match the MAC address
  190. * of the adaptor.
  191. * When clear, the WiLink receives frames destined to any MAC
  192. * address.
  193. * 3 Promiscuous - When set, the WiLink receives all valid frames
  194. * (i.e., all frames that pass the FCS check).
  195. * When clear, only frames that pass the other filters specified
  196. * are received.
  197. * 2 FCS - When set, the WiLink includes the FCS with the received
  198. * frame.
  199. * When cleared, the FCS is discarded.
  200. * 1 PLCP header - When set, write all data from baseband to frame
  201. * buffer including PHY header.
  202. * 0 Reserved - Always equal to 0.
  203. *
  204. * RX Filter Options Table
  205. * Bit Definition
  206. * === ==========
  207. * 31:12 Reserved - Always equal to 0.
  208. * 11 Association - When set, the WiLink receives all association
  209. * related frames (association request/response, reassocation
  210. * request/response, and disassociation). When clear, these frames
  211. * are discarded.
  212. * 10 Auth/De auth - When set, the WiLink receives all authentication
  213. * and de-authentication frames. When clear, these frames are
  214. * discarded.
  215. * 9 Beacon - When set, the WiLink receives all beacon frames.
  216. * When clear, these frames are discarded.
  217. * 8 Contention Free - When set, the WiLink receives all contention
  218. * free frames.
  219. * When clear, these frames are discarded.
  220. * 7 Control - When set, the WiLink receives all control frames.
  221. * When clear, these frames are discarded.
  222. * 6 Data - When set, the WiLink receives all data frames.
  223. * When clear, these frames are discarded.
  224. * 5 FCS Error - When set, the WiLink receives frames that have FCS
  225. * errors.
  226. * When clear, these frames are discarded.
  227. * 4 Management - When set, the WiLink receives all management
  228. * frames.
  229. * When clear, these frames are discarded.
  230. * 3 Probe Request - When set, the WiLink receives all probe request
  231. * frames.
  232. * When clear, these frames are discarded.
  233. * 2 Probe Response - When set, the WiLink receives all probe
  234. * response frames.
  235. * When clear, these frames are discarded.
  236. * 1 RTS/CTS/ACK - When set, the WiLink receives all RTS, CTS and ACK
  237. * frames.
  238. * When clear, these frames are discarded.
  239. * 0 Rsvd Type/Sub Type - When set, the WiLink receives all frames
  240. * that have reserved frame types and sub types as defined by the
  241. * 802.11 specification.
  242. * When clear, these frames are discarded.
  243. */
  244. struct acx_rx_config {
  245. struct acx_header header;
  246. u32 config_options;
  247. u32 filter_options;
  248. } __attribute__ ((packed));
  249. enum {
  250. QOS_AC_BE = 0,
  251. QOS_AC_BK,
  252. QOS_AC_VI,
  253. QOS_AC_VO,
  254. QOS_HIGHEST_AC_INDEX = QOS_AC_VO,
  255. };
  256. #define MAX_NUM_OF_AC (QOS_HIGHEST_AC_INDEX+1)
  257. #define FIRST_AC_INDEX QOS_AC_BE
  258. #define MAX_NUM_OF_802_1d_TAGS 8
  259. #define AC_PARAMS_MAX_TSID 15
  260. #define MAX_APSD_CONF 0xffff
  261. #define QOS_TX_HIGH_MIN (0)
  262. #define QOS_TX_HIGH_MAX (100)
  263. #define QOS_TX_HIGH_BK_DEF (25)
  264. #define QOS_TX_HIGH_BE_DEF (35)
  265. #define QOS_TX_HIGH_VI_DEF (35)
  266. #define QOS_TX_HIGH_VO_DEF (35)
  267. #define QOS_TX_LOW_BK_DEF (15)
  268. #define QOS_TX_LOW_BE_DEF (25)
  269. #define QOS_TX_LOW_VI_DEF (25)
  270. #define QOS_TX_LOW_VO_DEF (25)
  271. struct acx_tx_queue_qos_config {
  272. struct acx_header header;
  273. u8 qid;
  274. u8 pad[3];
  275. /* Max number of blocks allowd in the queue */
  276. u16 high_threshold;
  277. /* Lowest memory blocks guaranteed for this queue */
  278. u16 low_threshold;
  279. } __attribute__ ((packed));
  280. struct acx_packet_detection {
  281. struct acx_header header;
  282. u32 threshold;
  283. } __attribute__ ((packed));
  284. enum acx_slot_type {
  285. SLOT_TIME_LONG = 0,
  286. SLOT_TIME_SHORT = 1,
  287. DEFAULT_SLOT_TIME = SLOT_TIME_SHORT,
  288. MAX_SLOT_TIMES = 0xFF
  289. };
  290. #define STATION_WONE_INDEX 0
  291. struct acx_slot {
  292. struct acx_header header;
  293. u8 wone_index; /* Reserved */
  294. u8 slot_time;
  295. u8 reserved[6];
  296. } __attribute__ ((packed));
  297. #define ADDRESS_GROUP_MAX (8)
  298. #define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ADDRESS_GROUP_MAX)
  299. struct acx_dot11_grp_addr_tbl {
  300. struct acx_header header;
  301. u8 enabled;
  302. u8 num_groups;
  303. u8 pad[2];
  304. u8 mac_table[ADDRESS_GROUP_MAX_LEN];
  305. } __attribute__ ((packed));
  306. #define RX_TIMEOUT_PS_POLL_MIN 0
  307. #define RX_TIMEOUT_PS_POLL_MAX (200000)
  308. #define RX_TIMEOUT_PS_POLL_DEF (15)
  309. #define RX_TIMEOUT_UPSD_MIN 0
  310. #define RX_TIMEOUT_UPSD_MAX (200000)
  311. #define RX_TIMEOUT_UPSD_DEF (15)
  312. struct acx_rx_timeout {
  313. struct acx_header header;
  314. /*
  315. * The longest time the STA will wait to receive
  316. * traffic from the AP after a PS-poll has been
  317. * transmitted.
  318. */
  319. u16 ps_poll_timeout;
  320. /*
  321. * The longest time the STA will wait to receive
  322. * traffic from the AP after a frame has been sent
  323. * from an UPSD enabled queue.
  324. */
  325. u16 upsd_timeout;
  326. } __attribute__ ((packed));
  327. #define RTS_THRESHOLD_MIN 0
  328. #define RTS_THRESHOLD_MAX 4096
  329. #define RTS_THRESHOLD_DEF 2347
  330. struct acx_rts_threshold {
  331. struct acx_header header;
  332. u16 threshold;
  333. u8 pad[2];
  334. } __attribute__ ((packed));
  335. struct acx_beacon_filter_option {
  336. struct acx_header header;
  337. u8 enable;
  338. /*
  339. * The number of beacons without the unicast TIM
  340. * bit set that the firmware buffers before
  341. * signaling the host about ready frames.
  342. * When set to 0 and the filter is enabled, beacons
  343. * without the unicast TIM bit set are dropped.
  344. */
  345. u8 max_num_beacons;
  346. u8 pad[2];
  347. } __attribute__ ((packed));
  348. /*
  349. * ACXBeaconFilterEntry (not 221)
  350. * Byte Offset Size (Bytes) Definition
  351. * =========== ============ ==========
  352. * 0 1 IE identifier
  353. * 1 1 Treatment bit mask
  354. *
  355. * ACXBeaconFilterEntry (221)
  356. * Byte Offset Size (Bytes) Definition
  357. * =========== ============ ==========
  358. * 0 1 IE identifier
  359. * 1 1 Treatment bit mask
  360. * 2 3 OUI
  361. * 5 1 Type
  362. * 6 2 Version
  363. *
  364. *
  365. * Treatment bit mask - The information element handling:
  366. * bit 0 - The information element is compared and transferred
  367. * in case of change.
  368. * bit 1 - The information element is transferred to the host
  369. * with each appearance or disappearance.
  370. * Note that both bits can be set at the same time.
  371. */
  372. #define BEACON_FILTER_TABLE_MAX_IE_NUM (32)
  373. #define BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM (6)
  374. #define BEACON_FILTER_TABLE_IE_ENTRY_SIZE (2)
  375. #define BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE (6)
  376. #define BEACON_FILTER_TABLE_MAX_SIZE ((BEACON_FILTER_TABLE_MAX_IE_NUM * \
  377. BEACON_FILTER_TABLE_IE_ENTRY_SIZE) + \
  378. (BEACON_FILTER_TABLE_MAX_VENDOR_SPECIFIC_IE_NUM * \
  379. BEACON_FILTER_TABLE_EXTRA_VENDOR_SPECIFIC_IE_SIZE))
  380. #define BEACON_RULE_PASS_ON_CHANGE BIT(0)
  381. #define BEACON_RULE_PASS_ON_APPEARANCE BIT(1)
  382. #define BEACON_FILTER_IE_ID_CHANNEL_SWITCH_ANN (37)
  383. struct acx_beacon_filter_ie_table {
  384. struct acx_header header;
  385. u8 num_ie;
  386. u8 table[BEACON_FILTER_TABLE_MAX_SIZE];
  387. u8 pad[3];
  388. } __attribute__ ((packed));
  389. #define SYNCH_FAIL_DEFAULT_THRESHOLD 10 /* number of beacons */
  390. #define NO_BEACON_DEFAULT_TIMEOUT (500) /* in microseconds */
  391. struct acx_conn_monit_params {
  392. struct acx_header header;
  393. u32 synch_fail_thold; /* number of beacons missed */
  394. u32 bss_lose_timeout; /* number of TU's from synch fail */
  395. };
  396. enum {
  397. SG_ENABLE = 0,
  398. SG_DISABLE,
  399. SG_SENSE_NO_ACTIVITY,
  400. SG_SENSE_ACTIVE
  401. };
  402. struct acx_bt_wlan_coex {
  403. struct acx_header header;
  404. /*
  405. * 0 -> PTA enabled
  406. * 1 -> PTA disabled
  407. * 2 -> sense no active mode, i.e.
  408. * an interrupt is sent upon
  409. * BT activity.
  410. * 3 -> PTA is switched on in response
  411. * to the interrupt sending.
  412. */
  413. u8 enable;
  414. u8 pad[3];
  415. } __attribute__ ((packed));
  416. #define PTA_ANTENNA_TYPE_DEF (0)
  417. #define PTA_BT_HP_MAXTIME_DEF (2000)
  418. #define PTA_WLAN_HP_MAX_TIME_DEF (5000)
  419. #define PTA_SENSE_DISABLE_TIMER_DEF (1350)
  420. #define PTA_PROTECTIVE_RX_TIME_DEF (1500)
  421. #define PTA_PROTECTIVE_TX_TIME_DEF (1500)
  422. #define PTA_TIMEOUT_NEXT_BT_LP_PACKET_DEF (3000)
  423. #define PTA_SIGNALING_TYPE_DEF (1)
  424. #define PTA_AFH_LEVERAGE_ON_DEF (0)
  425. #define PTA_NUMBER_QUIET_CYCLE_DEF (0)
  426. #define PTA_MAX_NUM_CTS_DEF (3)
  427. #define PTA_NUMBER_OF_WLAN_PACKETS_DEF (2)
  428. #define PTA_NUMBER_OF_BT_PACKETS_DEF (2)
  429. #define PTA_PROTECTIVE_RX_TIME_FAST_DEF (1500)
  430. #define PTA_PROTECTIVE_TX_TIME_FAST_DEF (3000)
  431. #define PTA_CYCLE_TIME_FAST_DEF (8700)
  432. #define PTA_RX_FOR_AVALANCHE_DEF (5)
  433. #define PTA_ELP_HP_DEF (0)
  434. #define PTA_ANTI_STARVE_PERIOD_DEF (500)
  435. #define PTA_ANTI_STARVE_NUM_CYCLE_DEF (4)
  436. #define PTA_ALLOW_PA_SD_DEF (1)
  437. #define PTA_TIME_BEFORE_BEACON_DEF (6300)
  438. #define PTA_HPDM_MAX_TIME_DEF (1600)
  439. #define PTA_TIME_OUT_NEXT_WLAN_DEF (2550)
  440. #define PTA_AUTO_MODE_NO_CTS_DEF (0)
  441. #define PTA_BT_HP_RESPECTED_DEF (3)
  442. #define PTA_WLAN_RX_MIN_RATE_DEF (24)
  443. #define PTA_ACK_MODE_DEF (1)
  444. struct acx_bt_wlan_coex_param {
  445. struct acx_header header;
  446. /*
  447. * The minimum rate of a received WLAN packet in the STA,
  448. * during protective mode, of which a new BT-HP request
  449. * during this Rx will always be respected and gain the antenna.
  450. */
  451. u32 min_rate;
  452. /* Max time the BT HP will be respected. */
  453. u16 bt_hp_max_time;
  454. /* Max time the WLAN HP will be respected. */
  455. u16 wlan_hp_max_time;
  456. /*
  457. * The time between the last BT activity
  458. * and the moment when the sense mode returns
  459. * to SENSE_INACTIVE.
  460. */
  461. u16 sense_disable_timer;
  462. /* Time before the next BT HP instance */
  463. u16 rx_time_bt_hp;
  464. u16 tx_time_bt_hp;
  465. /* range: 10-20000 default: 1500 */
  466. u16 rx_time_bt_hp_fast;
  467. u16 tx_time_bt_hp_fast;
  468. /* range: 2000-65535 default: 8700 */
  469. u16 wlan_cycle_fast;
  470. /* range: 0 - 15000 (Msec) default: 1000 */
  471. u16 bt_anti_starvation_period;
  472. /* range 400-10000(Usec) default: 3000 */
  473. u16 next_bt_lp_packet;
  474. /* Deafult: worst case for BT DH5 traffic */
  475. u16 wake_up_beacon;
  476. /* range: 0-50000(Usec) default: 1050 */
  477. u16 hp_dm_max_guard_time;
  478. /*
  479. * This is to prevent both BT & WLAN antenna
  480. * starvation.
  481. * Range: 100-50000(Usec) default:2550
  482. */
  483. u16 next_wlan_packet;
  484. /* 0 -> shared antenna */
  485. u8 antenna_type;
  486. /*
  487. * 0 -> TI legacy
  488. * 1 -> Palau
  489. */
  490. u8 signal_type;
  491. /*
  492. * BT AFH status
  493. * 0 -> no AFH
  494. * 1 -> from dedicated GPIO
  495. * 2 -> AFH on (from host)
  496. */
  497. u8 afh_leverage_on;
  498. /*
  499. * The number of cycles during which no
  500. * TX will be sent after 1 cycle of RX
  501. * transaction in protective mode
  502. */
  503. u8 quiet_cycle_num;
  504. /*
  505. * The maximum number of CTSs that will
  506. * be sent for receiving RX packet in
  507. * protective mode
  508. */
  509. u8 max_cts;
  510. /*
  511. * The number of WLAN packets
  512. * transferred in common mode before
  513. * switching to BT.
  514. */
  515. u8 wlan_packets_num;
  516. /*
  517. * The number of BT packets
  518. * transferred in common mode before
  519. * switching to WLAN.
  520. */
  521. u8 bt_packets_num;
  522. /* range: 1-255 default: 5 */
  523. u8 missed_rx_avalanche;
  524. /* range: 0-1 default: 1 */
  525. u8 wlan_elp_hp;
  526. /* range: 0 - 15 default: 4 */
  527. u8 bt_anti_starvation_cycles;
  528. u8 ack_mode_dual_ant;
  529. /*
  530. * Allow PA_SD assertion/de-assertion
  531. * during enabled BT activity.
  532. */
  533. u8 pa_sd_enable;
  534. /*
  535. * Enable/Disable PTA in auto mode:
  536. * Support Both Active & P.S modes
  537. */
  538. u8 pta_auto_mode_enable;
  539. /* range: 0 - 20 default: 1 */
  540. u8 bt_hp_respected_num;
  541. } __attribute__ ((packed));
  542. #define CCA_THRSH_ENABLE_ENERGY_D 0x140A
  543. #define CCA_THRSH_DISABLE_ENERGY_D 0xFFEF
  544. struct acx_energy_detection {
  545. struct acx_header header;
  546. /* The RX Clear Channel Assessment threshold in the PHY */
  547. u16 rx_cca_threshold;
  548. u8 tx_energy_detection;
  549. u8 pad;
  550. } __attribute__ ((packed));
  551. #define BCN_RX_TIMEOUT_DEF_VALUE 10000
  552. #define BROADCAST_RX_TIMEOUT_DEF_VALUE 20000
  553. #define RX_BROADCAST_IN_PS_DEF_VALUE 1
  554. #define CONSECUTIVE_PS_POLL_FAILURE_DEF 4
  555. struct acx_beacon_broadcast {
  556. struct acx_header header;
  557. u16 beacon_rx_timeout;
  558. u16 broadcast_timeout;
  559. /* Enables receiving of broadcast packets in PS mode */
  560. u8 rx_broadcast_in_ps;
  561. /* Consecutive PS Poll failures before updating the host */
  562. u8 ps_poll_threshold;
  563. u8 pad[2];
  564. } __attribute__ ((packed));
  565. struct acx_event_mask {
  566. struct acx_header header;
  567. u32 event_mask;
  568. u32 high_event_mask; /* Unused */
  569. } __attribute__ ((packed));
  570. #define CFG_RX_FCS BIT(2)
  571. #define CFG_RX_ALL_GOOD BIT(3)
  572. #define CFG_UNI_FILTER_EN BIT(4)
  573. #define CFG_BSSID_FILTER_EN BIT(5)
  574. #define CFG_MC_FILTER_EN BIT(6)
  575. #define CFG_MC_ADDR0_EN BIT(7)
  576. #define CFG_MC_ADDR1_EN BIT(8)
  577. #define CFG_BC_REJECT_EN BIT(9)
  578. #define CFG_SSID_FILTER_EN BIT(10)
  579. #define CFG_RX_INT_FCS_ERROR BIT(11)
  580. #define CFG_RX_INT_ENCRYPTED BIT(12)
  581. #define CFG_RX_WR_RX_STATUS BIT(13)
  582. #define CFG_RX_FILTER_NULTI BIT(14)
  583. #define CFG_RX_RESERVE BIT(15)
  584. #define CFG_RX_TIMESTAMP_TSF BIT(16)
  585. #define CFG_RX_RSV_EN BIT(0)
  586. #define CFG_RX_RCTS_ACK BIT(1)
  587. #define CFG_RX_PRSP_EN BIT(2)
  588. #define CFG_RX_PREQ_EN BIT(3)
  589. #define CFG_RX_MGMT_EN BIT(4)
  590. #define CFG_RX_FCS_ERROR BIT(5)
  591. #define CFG_RX_DATA_EN BIT(6)
  592. #define CFG_RX_CTL_EN BIT(7)
  593. #define CFG_RX_CF_EN BIT(8)
  594. #define CFG_RX_BCN_EN BIT(9)
  595. #define CFG_RX_AUTH_EN BIT(10)
  596. #define CFG_RX_ASSOC_EN BIT(11)
  597. #define SCAN_PASSIVE BIT(0)
  598. #define SCAN_5GHZ_BAND BIT(1)
  599. #define SCAN_TRIGGERED BIT(2)
  600. #define SCAN_PRIORITY_HIGH BIT(3)
  601. struct acx_fw_gen_frame_rates {
  602. struct acx_header header;
  603. u8 tx_ctrl_frame_rate; /* RATE_* */
  604. u8 tx_ctrl_frame_mod; /* CCK_* or PBCC_* */
  605. u8 tx_mgt_frame_rate;
  606. u8 tx_mgt_frame_mod;
  607. } __attribute__ ((packed));
  608. /* STA MAC */
  609. struct acx_dot11_station_id {
  610. struct acx_header header;
  611. u8 mac[ETH_ALEN];
  612. u8 pad[2];
  613. } __attribute__ ((packed));
  614. struct acx_feature_config {
  615. struct acx_header header;
  616. u32 options;
  617. u32 data_flow_options;
  618. } __attribute__ ((packed));
  619. struct acx_current_tx_power {
  620. struct acx_header header;
  621. u8 current_tx_power;
  622. u8 padding[3];
  623. } __attribute__ ((packed));
  624. struct acx_dot11_default_key {
  625. struct acx_header header;
  626. u8 id;
  627. u8 pad[3];
  628. } __attribute__ ((packed));
  629. struct acx_tsf_info {
  630. struct acx_header header;
  631. u32 current_tsf_msb;
  632. u32 current_tsf_lsb;
  633. u32 last_TBTT_msb;
  634. u32 last_TBTT_lsb;
  635. u8 last_dtim_count;
  636. u8 pad[3];
  637. } __attribute__ ((packed));
  638. enum acx_wake_up_event {
  639. WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/
  640. WAKE_UP_EVENT_DTIM_BITMAP = 0x02, /* Wake on every DTIM*/
  641. WAKE_UP_EVENT_N_DTIM_BITMAP = 0x04, /* Wake on every Nth DTIM */
  642. WAKE_UP_EVENT_N_BEACONS_BITMAP = 0x08, /* Wake on every Nth Beacon */
  643. WAKE_UP_EVENT_BITS_MASK = 0x0F
  644. };
  645. struct acx_wake_up_condition {
  646. struct acx_header header;
  647. u8 wake_up_event; /* Only one bit can be set */
  648. u8 listen_interval;
  649. u8 pad[2];
  650. } __attribute__ ((packed));
  651. struct acx_aid {
  652. struct acx_header header;
  653. /*
  654. * To be set when associated with an AP.
  655. */
  656. u16 aid;
  657. u8 pad[2];
  658. } __attribute__ ((packed));
  659. enum acx_preamble_type {
  660. ACX_PREAMBLE_LONG = 0,
  661. ACX_PREAMBLE_SHORT = 1
  662. };
  663. struct acx_preamble {
  664. struct acx_header header;
  665. /*
  666. * When set, the WiLink transmits the frames with a short preamble and
  667. * when cleared, the WiLink transmits the frames with a long preamble.
  668. */
  669. u8 preamble;
  670. u8 padding[3];
  671. } __attribute__ ((packed));
  672. enum acx_ctsprotect_type {
  673. CTSPROTECT_DISABLE = 0,
  674. CTSPROTECT_ENABLE = 1
  675. };
  676. struct acx_ctsprotect {
  677. struct acx_header header;
  678. u8 ctsprotect;
  679. u8 padding[3];
  680. } __attribute__ ((packed));
  681. struct acx_tx_statistics {
  682. u32 internal_desc_overflow;
  683. } __attribute__ ((packed));
  684. struct acx_rx_statistics {
  685. u32 out_of_mem;
  686. u32 hdr_overflow;
  687. u32 hw_stuck;
  688. u32 dropped;
  689. u32 fcs_err;
  690. u32 xfr_hint_trig;
  691. u32 path_reset;
  692. u32 reset_counter;
  693. } __attribute__ ((packed));
  694. struct acx_dma_statistics {
  695. u32 rx_requested;
  696. u32 rx_errors;
  697. u32 tx_requested;
  698. u32 tx_errors;
  699. } __attribute__ ((packed));
  700. struct acx_isr_statistics {
  701. /* host command complete */
  702. u32 cmd_cmplt;
  703. /* fiqisr() */
  704. u32 fiqs;
  705. /* (INT_STS_ND & INT_TRIG_RX_HEADER) */
  706. u32 rx_headers;
  707. /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */
  708. u32 rx_completes;
  709. /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */
  710. u32 rx_mem_overflow;
  711. /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */
  712. u32 rx_rdys;
  713. /* irqisr() */
  714. u32 irqs;
  715. /* (INT_STS_ND & INT_TRIG_TX_PROC) */
  716. u32 tx_procs;
  717. /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */
  718. u32 decrypt_done;
  719. /* (INT_STS_ND & INT_TRIG_DMA0) */
  720. u32 dma0_done;
  721. /* (INT_STS_ND & INT_TRIG_DMA1) */
  722. u32 dma1_done;
  723. /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */
  724. u32 tx_exch_complete;
  725. /* (INT_STS_ND & INT_TRIG_COMMAND) */
  726. u32 commands;
  727. /* (INT_STS_ND & INT_TRIG_RX_PROC) */
  728. u32 rx_procs;
  729. /* (INT_STS_ND & INT_TRIG_PM_802) */
  730. u32 hw_pm_mode_changes;
  731. /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */
  732. u32 host_acknowledges;
  733. /* (INT_STS_ND & INT_TRIG_PM_PCI) */
  734. u32 pci_pm;
  735. /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */
  736. u32 wakeups;
  737. /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */
  738. u32 low_rssi;
  739. } __attribute__ ((packed));
  740. struct acx_wep_statistics {
  741. /* WEP address keys configured */
  742. u32 addr_key_count;
  743. /* default keys configured */
  744. u32 default_key_count;
  745. u32 reserved;
  746. /* number of times that WEP key not found on lookup */
  747. u32 key_not_found;
  748. /* number of times that WEP key decryption failed */
  749. u32 decrypt_fail;
  750. /* WEP packets decrypted */
  751. u32 packets;
  752. /* WEP decrypt interrupts */
  753. u32 interrupt;
  754. } __attribute__ ((packed));
  755. #define ACX_MISSED_BEACONS_SPREAD 10
  756. struct acx_pwr_statistics {
  757. /* the amount of enters into power save mode (both PD & ELP) */
  758. u32 ps_enter;
  759. /* the amount of enters into ELP mode */
  760. u32 elp_enter;
  761. /* the amount of missing beacon interrupts to the host */
  762. u32 missing_bcns;
  763. /* the amount of wake on host-access times */
  764. u32 wake_on_host;
  765. /* the amount of wake on timer-expire */
  766. u32 wake_on_timer_exp;
  767. /* the number of packets that were transmitted with PS bit set */
  768. u32 tx_with_ps;
  769. /* the number of packets that were transmitted with PS bit clear */
  770. u32 tx_without_ps;
  771. /* the number of received beacons */
  772. u32 rcvd_beacons;
  773. /* the number of entering into PowerOn (power save off) */
  774. u32 power_save_off;
  775. /* the number of entries into power save mode */
  776. u16 enable_ps;
  777. /*
  778. * the number of exits from power save, not including failed PS
  779. * transitions
  780. */
  781. u16 disable_ps;
  782. /*
  783. * the number of times the TSF counter was adjusted because
  784. * of drift
  785. */
  786. u32 fix_tsf_ps;
  787. /* Gives statistics about the spread continuous missed beacons.
  788. * The 16 LSB are dedicated for the PS mode.
  789. * The 16 MSB are dedicated for the PS mode.
  790. * cont_miss_bcns_spread[0] - single missed beacon.
  791. * cont_miss_bcns_spread[1] - two continuous missed beacons.
  792. * cont_miss_bcns_spread[2] - three continuous missed beacons.
  793. * ...
  794. * cont_miss_bcns_spread[9] - ten and more continuous missed beacons.
  795. */
  796. u32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD];
  797. /* the number of beacons in awake mode */
  798. u32 rcvd_awake_beacons;
  799. } __attribute__ ((packed));
  800. struct acx_mic_statistics {
  801. u32 rx_pkts;
  802. u32 calc_failure;
  803. } __attribute__ ((packed));
  804. struct acx_aes_statistics {
  805. u32 encrypt_fail;
  806. u32 decrypt_fail;
  807. u32 encrypt_packets;
  808. u32 decrypt_packets;
  809. u32 encrypt_interrupt;
  810. u32 decrypt_interrupt;
  811. } __attribute__ ((packed));
  812. struct acx_event_statistics {
  813. u32 heart_beat;
  814. u32 calibration;
  815. u32 rx_mismatch;
  816. u32 rx_mem_empty;
  817. u32 rx_pool;
  818. u32 oom_late;
  819. u32 phy_transmit_error;
  820. u32 tx_stuck;
  821. } __attribute__ ((packed));
  822. struct acx_ps_statistics {
  823. u32 pspoll_timeouts;
  824. u32 upsd_timeouts;
  825. u32 upsd_max_sptime;
  826. u32 upsd_max_apturn;
  827. u32 pspoll_max_apturn;
  828. u32 pspoll_utilization;
  829. u32 upsd_utilization;
  830. } __attribute__ ((packed));
  831. struct acx_rxpipe_statistics {
  832. u32 rx_prep_beacon_drop;
  833. u32 descr_host_int_trig_rx_data;
  834. u32 beacon_buffer_thres_host_int_trig_rx_data;
  835. u32 missed_beacon_host_int_trig_rx_data;
  836. u32 tx_xfr_host_int_trig_rx_data;
  837. } __attribute__ ((packed));
  838. struct acx_statistics {
  839. struct acx_header header;
  840. struct acx_tx_statistics tx;
  841. struct acx_rx_statistics rx;
  842. struct acx_dma_statistics dma;
  843. struct acx_isr_statistics isr;
  844. struct acx_wep_statistics wep;
  845. struct acx_pwr_statistics pwr;
  846. struct acx_aes_statistics aes;
  847. struct acx_mic_statistics mic;
  848. struct acx_event_statistics event;
  849. struct acx_ps_statistics ps;
  850. struct acx_rxpipe_statistics rxpipe;
  851. } __attribute__ ((packed));
  852. #define ACX_MAX_RATE_CLASSES 8
  853. #define ACX_RATE_MASK_UNSPECIFIED 0
  854. #define ACX_RATE_RETRY_LIMIT 10
  855. struct acx_rate_class {
  856. u32 enabled_rates;
  857. u8 short_retry_limit;
  858. u8 long_retry_limit;
  859. u8 aflags;
  860. u8 reserved;
  861. };
  862. struct acx_rate_policy {
  863. struct acx_header header;
  864. u32 rate_class_cnt;
  865. struct acx_rate_class rate_class[ACX_MAX_RATE_CLASSES];
  866. } __attribute__ ((packed));
  867. struct wl1251_acx_memory {
  868. __le16 num_stations; /* number of STAs to be supported. */
  869. u16 reserved_1;
  870. /*
  871. * Nmber of memory buffers for the RX mem pool.
  872. * The actual number may be less if there are
  873. * not enough blocks left for the minimum num
  874. * of TX ones.
  875. */
  876. u8 rx_mem_block_num;
  877. u8 reserved_2;
  878. u8 num_tx_queues; /* From 1 to 16 */
  879. u8 host_if_options; /* HOST_IF* */
  880. u8 tx_min_mem_block_num;
  881. u8 num_ssid_profiles;
  882. __le16 debug_buffer_size;
  883. } __attribute__ ((packed));
  884. #define ACX_RX_DESC_MIN 1
  885. #define ACX_RX_DESC_MAX 127
  886. #define ACX_RX_DESC_DEF 32
  887. struct wl1251_acx_rx_queue_config {
  888. u8 num_descs;
  889. u8 pad;
  890. u8 type;
  891. u8 priority;
  892. __le32 dma_address;
  893. } __attribute__ ((packed));
  894. #define ACX_TX_DESC_MIN 1
  895. #define ACX_TX_DESC_MAX 127
  896. #define ACX_TX_DESC_DEF 16
  897. struct wl1251_acx_tx_queue_config {
  898. u8 num_descs;
  899. u8 pad[2];
  900. u8 attributes;
  901. } __attribute__ ((packed));
  902. #define MAX_TX_QUEUE_CONFIGS 5
  903. #define MAX_TX_QUEUES 4
  904. struct wl1251_acx_config_memory {
  905. struct acx_header header;
  906. struct wl1251_acx_memory mem_config;
  907. struct wl1251_acx_rx_queue_config rx_queue_config;
  908. struct wl1251_acx_tx_queue_config tx_queue_config[MAX_TX_QUEUE_CONFIGS];
  909. } __attribute__ ((packed));
  910. struct wl1251_acx_mem_map {
  911. struct acx_header header;
  912. void *code_start;
  913. void *code_end;
  914. void *wep_defkey_start;
  915. void *wep_defkey_end;
  916. void *sta_table_start;
  917. void *sta_table_end;
  918. void *packet_template_start;
  919. void *packet_template_end;
  920. void *queue_memory_start;
  921. void *queue_memory_end;
  922. void *packet_memory_pool_start;
  923. void *packet_memory_pool_end;
  924. void *debug_buffer1_start;
  925. void *debug_buffer1_end;
  926. void *debug_buffer2_start;
  927. void *debug_buffer2_end;
  928. /* Number of blocks FW allocated for TX packets */
  929. u32 num_tx_mem_blocks;
  930. /* Number of blocks FW allocated for RX packets */
  931. u32 num_rx_mem_blocks;
  932. } __attribute__ ((packed));
  933. struct wl1251_acx_wr_tbtt_and_dtim {
  934. struct acx_header header;
  935. /* Time in TUs between two consecutive beacons */
  936. u16 tbtt;
  937. /*
  938. * DTIM period
  939. * For BSS: Number of TBTTs in a DTIM period (range: 1-10)
  940. * For IBSS: value shall be set to 1
  941. */
  942. u8 dtim;
  943. u8 padding;
  944. } __attribute__ ((packed));
  945. /*************************************************************************
  946. Host Interrupt Register (WiLink -> Host)
  947. **************************************************************************/
  948. /* RX packet is ready in Xfer buffer #0 */
  949. #define WL1251_ACX_INTR_RX0_DATA BIT(0)
  950. /* TX result(s) are in the TX complete buffer */
  951. #define WL1251_ACX_INTR_TX_RESULT BIT(1)
  952. /* OBSOLETE */
  953. #define WL1251_ACX_INTR_TX_XFR BIT(2)
  954. /* RX packet is ready in Xfer buffer #1 */
  955. #define WL1251_ACX_INTR_RX1_DATA BIT(3)
  956. /* Event was entered to Event MBOX #A */
  957. #define WL1251_ACX_INTR_EVENT_A BIT(4)
  958. /* Event was entered to Event MBOX #B */
  959. #define WL1251_ACX_INTR_EVENT_B BIT(5)
  960. /* OBSOLETE */
  961. #define WL1251_ACX_INTR_WAKE_ON_HOST BIT(6)
  962. /* Trace meassge on MBOX #A */
  963. #define WL1251_ACX_INTR_TRACE_A BIT(7)
  964. /* Trace meassge on MBOX #B */
  965. #define WL1251_ACX_INTR_TRACE_B BIT(8)
  966. /* Command processing completion */
  967. #define WL1251_ACX_INTR_CMD_COMPLETE BIT(9)
  968. /* Init sequence is done */
  969. #define WL1251_ACX_INTR_INIT_COMPLETE BIT(14)
  970. #define WL1251_ACX_INTR_ALL 0xFFFFFFFF
  971. enum {
  972. ACX_WAKE_UP_CONDITIONS = 0x0002,
  973. ACX_MEM_CFG = 0x0003,
  974. ACX_SLOT = 0x0004,
  975. ACX_QUEUE_HEAD = 0x0005, /* for MASTER mode only */
  976. ACX_AC_CFG = 0x0007,
  977. ACX_MEM_MAP = 0x0008,
  978. ACX_AID = 0x000A,
  979. ACX_RADIO_PARAM = 0x000B, /* Not used */
  980. ACX_CFG = 0x000C, /* Not used */
  981. ACX_FW_REV = 0x000D,
  982. ACX_MEDIUM_USAGE = 0x000F,
  983. ACX_RX_CFG = 0x0010,
  984. ACX_TX_QUEUE_CFG = 0x0011, /* FIXME: only used by wl1251 */
  985. ACX_BSS_IN_PS = 0x0012, /* for AP only */
  986. ACX_STATISTICS = 0x0013, /* Debug API */
  987. ACX_FEATURE_CFG = 0x0015,
  988. ACX_MISC_CFG = 0x0017, /* Not used */
  989. ACX_TID_CFG = 0x001A,
  990. ACX_BEACON_FILTER_OPT = 0x001F,
  991. ACX_LOW_RSSI = 0x0020,
  992. ACX_NOISE_HIST = 0x0021,
  993. ACX_HDK_VERSION = 0x0022, /* ??? */
  994. ACX_PD_THRESHOLD = 0x0023,
  995. ACX_DATA_PATH_PARAMS = 0x0024, /* WO */
  996. ACX_DATA_PATH_RESP_PARAMS = 0x0024, /* RO */
  997. ACX_CCA_THRESHOLD = 0x0025,
  998. ACX_EVENT_MBOX_MASK = 0x0026,
  999. #ifdef FW_RUNNING_AS_AP
  1000. ACX_DTIM_PERIOD = 0x0027, /* for AP only */
  1001. #else
  1002. ACX_WR_TBTT_AND_DTIM = 0x0027, /* STA only */
  1003. #endif
  1004. ACX_ACI_OPTION_CFG = 0x0029, /* OBSOLETE (for 1251)*/
  1005. ACX_GPIO_CFG = 0x002A, /* Not used */
  1006. ACX_GPIO_SET = 0x002B, /* Not used */
  1007. ACX_PM_CFG = 0x002C, /* To Be Documented */
  1008. ACX_CONN_MONIT_PARAMS = 0x002D,
  1009. ACX_AVERAGE_RSSI = 0x002E, /* Not used */
  1010. ACX_CONS_TX_FAILURE = 0x002F,
  1011. ACX_BCN_DTIM_OPTIONS = 0x0031,
  1012. ACX_SG_ENABLE = 0x0032,
  1013. ACX_SG_CFG = 0x0033,
  1014. ACX_ANTENNA_DIVERSITY_CFG = 0x0035, /* To Be Documented */
  1015. ACX_LOW_SNR = 0x0037, /* To Be Documented */
  1016. ACX_BEACON_FILTER_TABLE = 0x0038,
  1017. ACX_ARP_IP_FILTER = 0x0039,
  1018. ACX_ROAMING_STATISTICS_TBL = 0x003B,
  1019. ACX_RATE_POLICY = 0x003D,
  1020. ACX_CTS_PROTECTION = 0x003E,
  1021. ACX_SLEEP_AUTH = 0x003F,
  1022. ACX_PREAMBLE_TYPE = 0x0040,
  1023. ACX_ERROR_CNT = 0x0041,
  1024. ACX_FW_GEN_FRAME_RATES = 0x0042,
  1025. ACX_IBSS_FILTER = 0x0044,
  1026. ACX_SERVICE_PERIOD_TIMEOUT = 0x0045,
  1027. ACX_TSF_INFO = 0x0046,
  1028. ACX_CONFIG_PS_WMM = 0x0049,
  1029. ACX_ENABLE_RX_DATA_FILTER = 0x004A,
  1030. ACX_SET_RX_DATA_FILTER = 0x004B,
  1031. ACX_GET_DATA_FILTER_STATISTICS = 0x004C,
  1032. ACX_POWER_LEVEL_TABLE = 0x004D,
  1033. ACX_BET_ENABLE = 0x0050,
  1034. DOT11_STATION_ID = 0x1001,
  1035. DOT11_RX_MSDU_LIFE_TIME = 0x1004,
  1036. DOT11_CUR_TX_PWR = 0x100D,
  1037. DOT11_DEFAULT_KEY = 0x1010,
  1038. DOT11_RX_DOT11_MODE = 0x1012,
  1039. DOT11_RTS_THRESHOLD = 0x1013,
  1040. DOT11_GROUP_ADDRESS_TBL = 0x1014,
  1041. MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL,
  1042. MAX_IE = 0xFFFF
  1043. };
  1044. int wl1251_acx_frame_rates(struct wl1251 *wl, u8 ctrl_rate, u8 ctrl_mod,
  1045. u8 mgt_rate, u8 mgt_mod);
  1046. int wl1251_acx_station_id(struct wl1251 *wl);
  1047. int wl1251_acx_default_key(struct wl1251 *wl, u8 key_id);
  1048. int wl1251_acx_wake_up_conditions(struct wl1251 *wl, u8 wake_up_event,
  1049. u8 listen_interval);
  1050. int wl1251_acx_sleep_auth(struct wl1251 *wl, u8 sleep_auth);
  1051. int wl1251_acx_fw_version(struct wl1251 *wl, char *buf, size_t len);
  1052. int wl1251_acx_tx_power(struct wl1251 *wl, int power);
  1053. int wl1251_acx_feature_cfg(struct wl1251 *wl);
  1054. int wl1251_acx_mem_map(struct wl1251 *wl,
  1055. struct acx_header *mem_map, size_t len);
  1056. int wl1251_acx_data_path_params(struct wl1251 *wl,
  1057. struct acx_data_path_params_resp *data_path);
  1058. int wl1251_acx_rx_msdu_life_time(struct wl1251 *wl, u32 life_time);
  1059. int wl1251_acx_rx_config(struct wl1251 *wl, u32 config, u32 filter);
  1060. int wl1251_acx_pd_threshold(struct wl1251 *wl);
  1061. int wl1251_acx_slot(struct wl1251 *wl, enum acx_slot_type slot_time);
  1062. int wl1251_acx_group_address_tbl(struct wl1251 *wl);
  1063. int wl1251_acx_service_period_timeout(struct wl1251 *wl);
  1064. int wl1251_acx_rts_threshold(struct wl1251 *wl, u16 rts_threshold);
  1065. int wl1251_acx_beacon_filter_opt(struct wl1251 *wl, bool enable_filter);
  1066. int wl1251_acx_beacon_filter_table(struct wl1251 *wl);
  1067. int wl1251_acx_conn_monit_params(struct wl1251 *wl);
  1068. int wl1251_acx_sg_enable(struct wl1251 *wl);
  1069. int wl1251_acx_sg_cfg(struct wl1251 *wl);
  1070. int wl1251_acx_cca_threshold(struct wl1251 *wl);
  1071. int wl1251_acx_bcn_dtim_options(struct wl1251 *wl);
  1072. int wl1251_acx_aid(struct wl1251 *wl, u16 aid);
  1073. int wl1251_acx_event_mbox_mask(struct wl1251 *wl, u32 event_mask);
  1074. int wl1251_acx_set_preamble(struct wl1251 *wl, enum acx_preamble_type preamble);
  1075. int wl1251_acx_cts_protect(struct wl1251 *wl,
  1076. enum acx_ctsprotect_type ctsprotect);
  1077. int wl1251_acx_statistics(struct wl1251 *wl, struct acx_statistics *stats);
  1078. int wl1251_acx_tsf_info(struct wl1251 *wl, u64 *mactime);
  1079. int wl1251_acx_rate_policies(struct wl1251 *wl);
  1080. int wl1251_acx_mem_cfg(struct wl1251 *wl);
  1081. int wl1251_acx_wr_tbtt_and_dtim(struct wl1251 *wl, u16 tbtt, u8 dtim);
  1082. #endif /* __WL1251_ACX_H__ */